hibernate.c 41 KB

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  1. //*****************************************************************************
  2. //
  3. // hibernate.c - Driver for the Hibernation module
  4. //
  5. // Copyright (c) 2007-2011 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Texas Instruments (TI) is supplying this software for use solely and
  9. // exclusively on TI's microcontroller products. The software is owned by
  10. // TI and/or its suppliers, and is protected under applicable copyright
  11. // laws. You may not combine this software with "viral" open-source
  12. // software in order to form a larger program.
  13. //
  14. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  15. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  16. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  18. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  19. // DAMAGES, FOR ANY REASON WHATSOEVER.
  20. //
  21. // This is part of revision 8264 of the Stellaris Peripheral Driver Library.
  22. //
  23. //*****************************************************************************
  24. //*****************************************************************************
  25. //
  26. //! \addtogroup hibernate_api
  27. //! @{
  28. //
  29. //*****************************************************************************
  30. #include "inc/hw_hibernate.h"
  31. #include "inc/hw_ints.h"
  32. #include "inc/hw_sysctl.h"
  33. #include "inc/hw_types.h"
  34. #include "driverlib/debug.h"
  35. #include "driverlib/hibernate.h"
  36. #include "driverlib/interrupt.h"
  37. #include "driverlib/sysctl.h"
  38. //*****************************************************************************
  39. //
  40. // The delay in microseconds for writing to the Hibernation module registers.
  41. //
  42. //*****************************************************************************
  43. #define DELAY_USECS 95
  44. //*****************************************************************************
  45. //
  46. // The number of processor cycles to execute one pass of the delay loop.
  47. //
  48. //*****************************************************************************
  49. #define LOOP_CYCLES 3
  50. //*****************************************************************************
  51. //
  52. // The calculated number of delay loops to achieve the write delay.
  53. //
  54. //*****************************************************************************
  55. static unsigned long g_ulWriteDelay;
  56. //*****************************************************************************
  57. //
  58. //! \internal
  59. //!
  60. //! Polls until the write complete (WRC) bit in the hibernate control register
  61. //! is set.
  62. //!
  63. //! \param None.
  64. //!
  65. //! On non-Fury-class devices, the hibernate module provides an indication when
  66. //! any write is completed. This mechanism is used to pace writes to the
  67. //! module. This function merely polls this bit and returns as soon as it is
  68. //! set. At this point, it is safe to perform another write to the module.
  69. //!
  70. //! \return None.
  71. //
  72. //*****************************************************************************
  73. void
  74. HibernateWriteComplete(void)
  75. {
  76. //
  77. // Add a delay here to enforce the required delay between write accesses to
  78. // certain Hibernation module registers.
  79. //
  80. if(CLASS_IS_FURY)
  81. {
  82. //
  83. // Delay a fixed time on Fury-class devices
  84. //
  85. SysCtlDelay(g_ulWriteDelay);
  86. }
  87. else
  88. {
  89. //
  90. // Spin until the write complete bit is set, for later devices.
  91. //
  92. while(!(HWREG(HIB_CTL) & HIB_CTL_WRC))
  93. {
  94. }
  95. }
  96. }
  97. //*****************************************************************************
  98. //
  99. //! Enables the Hibernation module for operation.
  100. //!
  101. //! \param ulHibClk is the rate of the clock supplied to the Hibernation
  102. //! module.
  103. //!
  104. //! This function enables the Hibernation module for operation. This function
  105. //! should be called before any of the Hibernation module features are used.
  106. //!
  107. //! The peripheral clock is the same as the processor clock. This value is
  108. //! returned by SysCtlClockGet(), or it can be explicitly hard-coded if it is
  109. //! constant and known (to save the code/execution overhead of a call to
  110. //! SysCtlClockGet()).
  111. //!
  112. //! This function replaces the original HibernateEnable() API and performs the
  113. //! same actions. A macro is provided in <tt>hibernate.h</tt> to map the
  114. //! original API to this API.
  115. //!
  116. //! \return None.
  117. //
  118. //*****************************************************************************
  119. void
  120. HibernateEnableExpClk(unsigned long ulHibClk)
  121. {
  122. //
  123. // Turn on the clock enable bit.
  124. //
  125. HWREG(HIB_CTL) |= HIB_CTL_CLK32EN;
  126. //
  127. // For Fury-class devices, compute the number of delay loops that must be
  128. // used to achieve the desired delay for writes to the hibernation
  129. // registers. This value will be used in calls to SysCtlDelay().
  130. //
  131. if(CLASS_IS_FURY)
  132. {
  133. g_ulWriteDelay = (((ulHibClk / 1000) * DELAY_USECS) /
  134. (1000L * LOOP_CYCLES));
  135. g_ulWriteDelay++;
  136. }
  137. else
  138. {
  139. //
  140. // Non-fury parts must wait for write complete following register
  141. // load (above).
  142. //
  143. HibernateWriteComplete();
  144. }
  145. }
  146. //*****************************************************************************
  147. //
  148. //! Disables the Hibernation module for operation.
  149. //!
  150. //! This function disables the Hibernation module for operation. After this
  151. //! function is called, none of the Hibernation module features are available.
  152. //!
  153. //! \return None.
  154. //
  155. //*****************************************************************************
  156. void
  157. HibernateDisable(void)
  158. {
  159. //
  160. // Turn off the clock enable bit.
  161. //
  162. HWREG(HIB_CTL) &= ~HIB_CTL_CLK32EN;
  163. //
  164. // Wait for write completion
  165. //
  166. HibernateWriteComplete();
  167. }
  168. //*****************************************************************************
  169. //
  170. //! Selects the clock input for the Hibernation module.
  171. //!
  172. //! \param ulClockInput specifies the clock input.
  173. //!
  174. //! This function configures the clock input for the Hibernation module. The
  175. //! configuration option chosen depends entirely on hardware design. The clock
  176. //! input for the module is either a 32.768 kHz oscillator or a 4.194304 MHz
  177. //! crystal. The \e ulClockFlags parameter must be one of the following:
  178. //!
  179. //! - \b HIBERNATE_CLOCK_SEL_RAW - use the raw signal from a 32.768 kHz
  180. //! oscillator.
  181. //! - \b HIBERNATE_CLOCK_SEL_DIV128 - use the crystal input, divided by 128.
  182. //!
  183. //! \note The \b HIBERNATE_CLOCK_SEL_DIV128 setting is not available on all
  184. //! Stellaris devices. Please consult the data sheet to determine if the
  185. //! device that you are using supports the 4.194304 crystal as a source for the
  186. //! Hibernation module.
  187. //!
  188. //! \return None.
  189. //
  190. //*****************************************************************************
  191. void
  192. HibernateClockSelect(unsigned long ulClockInput)
  193. {
  194. //
  195. // Check the arguments.
  196. //
  197. ASSERT((ulClockInput == HIBERNATE_CLOCK_SEL_RAW) ||
  198. (ulClockInput == HIBERNATE_CLOCK_SEL_DIV128));
  199. //
  200. // Set the clock selection bit according to the parameter.
  201. //
  202. HWREG(HIB_CTL) = ulClockInput | (HWREG(HIB_CTL) & ~HIB_CTL_CLKSEL);
  203. //
  204. // Wait for write completion
  205. //
  206. HibernateWriteComplete();
  207. }
  208. //*****************************************************************************
  209. //
  210. //! Configures the clock input for the Hibernation module.
  211. //!
  212. //! \param ulConfig is one of the possible configuration options for the clock
  213. //! input listed below.
  214. //!
  215. //! This function is used to configure the clock input for the Hibernation
  216. //! module. The \e ulConfig parameter can be one of the following values:
  217. //!
  218. //! - \b HIBERNATE_OSC_DISABLE specifies that the internal oscillator
  219. //! is powered off and either an externally supplied clock source or no clock
  220. //! source is being used.
  221. //! - \b HIBERNATE_OSC_HIGHDRIVE specifies a higher drive strength when a 24pF
  222. //! filter capacitor is used with a crystal.
  223. //! - \b HIBERNATE_OSC_LOWDRIVE specifies a lower drive strength when a 12pF
  224. //! filter capacitor is used with a crystal.
  225. //!
  226. //! The \b HIBERNATE_OSC_DISABLE option is used to disable and power down the
  227. //! internal oscillator if an external clock source or no clock source is used
  228. //! instead of a 32.768 kHz crystal. In the case where an external crystal is
  229. //! used, either the \b HIBERNATE_OSC_HIGHDRIVE or \b HIBERNATE_OSC_LOWDRIVE is
  230. //! used. This optimizes the oscillator drive strength to match the size of
  231. //! the filter capacitor that is used with the external crystal circuit.
  232. //!
  233. //! \note The ability to configure the clock input in the Hibernation
  234. //! module is not available on all Stellaris devices. Please consult the data
  235. //! sheet for the Stellaris device that you are using to determine if this
  236. //! feature is available.
  237. //!
  238. //! \return None.
  239. //
  240. //*****************************************************************************
  241. void
  242. HibernateClockConfig(unsigned long ulConfig)
  243. {
  244. unsigned long ulHIBCtl;
  245. ASSERT((ulConfig & (HIBERNATE_OSC_HIGHDRIVE | HIBERNATE_OSC_LOWDRIVE |
  246. HIBERNATE_OSC_DISABLE)) == 0);
  247. ulHIBCtl = HWREG(HIB_CTL);
  248. //
  249. // Clear the current configuration bits.
  250. //
  251. ulHIBCtl &= ~(HIBERNATE_OSC_HIGHDRIVE | HIBERNATE_OSC_LOWDRIVE |
  252. HIBERNATE_OSC_DISABLE);
  253. //
  254. // Set the new configuration bits.
  255. //
  256. ulHIBCtl |= ulConfig & (HIBERNATE_OSC_HIGHDRIVE | HIBERNATE_OSC_LOWDRIVE |
  257. HIBERNATE_OSC_DISABLE);
  258. //
  259. // Set the hibernation clocking configuration.
  260. //
  261. HWREG(HIB_CTL) = ulHIBCtl;
  262. //
  263. // Wait for write completion
  264. //
  265. HibernateWriteComplete();
  266. }
  267. //*****************************************************************************
  268. //
  269. //! Enables the RTC feature of the Hibernation module.
  270. //!
  271. //! This function enables the RTC in the Hibernation module. The RTC can be
  272. //! used to wake the processor from hibernation at a certain time, or to
  273. //! generate interrupts at certain times. This function must be called before
  274. //! using any of the RTC features of the Hibernation module.
  275. //!
  276. //! \return None.
  277. //
  278. //*****************************************************************************
  279. void
  280. HibernateRTCEnable(void)
  281. {
  282. //
  283. // Turn on the RTC enable bit.
  284. //
  285. HWREG(HIB_CTL) |= HIB_CTL_RTCEN;
  286. //
  287. // Wait for write completion
  288. //
  289. HibernateWriteComplete();
  290. }
  291. //*****************************************************************************
  292. //
  293. //! Disables the RTC feature of the Hibernation module.
  294. //!
  295. //! This function disables the RTC in the Hibernation module. After calling
  296. //! this function, the RTC features of the Hibernation module are not
  297. //! available.
  298. //!
  299. //! \return None.
  300. //
  301. //*****************************************************************************
  302. void
  303. HibernateRTCDisable(void)
  304. {
  305. //
  306. // Turn off the RTC enable bit.
  307. //
  308. HWREG(HIB_CTL) &= ~HIB_CTL_RTCEN;
  309. //
  310. // Wait for write completion
  311. //
  312. HibernateWriteComplete();
  313. }
  314. //*****************************************************************************
  315. //
  316. //! Forces the Hibernation module to initiate a check of the battery voltage.
  317. //!
  318. //! This function forces the Hibernation module to initiate a check of the
  319. //! battery voltage immediately rather than waiting for the next check interval
  320. //! to pass. After calling this function, the application should call the
  321. //! () function and wait for the function to return a zero
  322. //! value before calling the HibernateIntStatus() to check if the return code
  323. //! has the \b HIBERNATE_INT_LOW_BAT set. If \b HIBERNATE_INT_LOW_BAT is set
  324. //! this indicates that battery level is low. The application can also enable
  325. //! the \b HIBERNATE_INT_LOW_BAT interrupt and wait for an interrupt to
  326. //! indicate that the battery level is low.
  327. //!
  328. //! \note A hibernation request is held off if a battery check is in progress.
  329. //! This function is only available on some Stellaris devices.
  330. //!
  331. //! \return None.
  332. //
  333. //*****************************************************************************
  334. void
  335. HibernateBatCheckStart(void)
  336. {
  337. //
  338. // Initiated a forced battery check.
  339. //
  340. HWREG(HIB_CTL) |= HIB_CTL_BATCHK;
  341. //
  342. // Wait for write completion
  343. //
  344. HibernateWriteComplete();
  345. }
  346. //*****************************************************************************
  347. //
  348. //! Returns if a forced battery check has completed.
  349. //!
  350. //! This function returns if the forced battery check initiated by a call to
  351. //! the HibernateBatCheckStart() function has completed. This function
  352. //! returns a non-zero value until the battery level check has completed. Once
  353. //! this function returns a value of zero, the hibernation module has completed
  354. //! the battery check and the HibernateIntStatus() function can be used to
  355. //! check if the battery was low by checking if the value returned has the
  356. //! \b HIBERNATE_INT_LOW_BAT set.
  357. //!
  358. //! \note This function is only available on some Stellaris devices.
  359. //!
  360. //! \return The value is zero when the battery level check has completed or
  361. //! non-zero if the check is still in process.
  362. //
  363. //*****************************************************************************
  364. unsigned long
  365. HibernateBatCheckDone(void)
  366. {
  367. //
  368. // Read the current state of the batter check.
  369. //
  370. return(HWREG(HIB_CTL) & HIB_CTL_BATCHK);
  371. }
  372. //*****************************************************************************
  373. //
  374. //! Configures the wake conditions for the Hibernation module.
  375. //!
  376. //! \param ulWakeFlags specifies which conditions should be used for waking.
  377. //!
  378. //! This function enables the conditions under which the Hibernation module
  379. //! wakes. The \e ulWakeFlags parameter is the logical OR of any combination
  380. //! of the following:
  381. //!
  382. //! - \b HIBERNATE_WAKE_PIN - wake when the external wake pin is asserted.
  383. //! - \b HIBERNATE_WAKE_RTC - wake when one of the RTC matches occurs.
  384. //! - \b HIBERNATE_WAKE_LOW_BAT - wake from hibernate due to a low battery
  385. //! level being detected.
  386. //!
  387. //! \note The \b HIBERNATE_WAKE_LOW_BAT parameter is only available on some
  388. //! Stellaris devices.
  389. //!
  390. //! \return None.
  391. //
  392. //*****************************************************************************
  393. void
  394. HibernateWakeSet(unsigned long ulWakeFlags)
  395. {
  396. //
  397. // Check the arguments.
  398. //
  399. ASSERT(!(ulWakeFlags & ~(HIBERNATE_WAKE_PIN | HIBERNATE_WAKE_RTC |
  400. HIBERNATE_WAKE_LOW_BAT)));
  401. //
  402. // Set the specified wake flags in the control register.
  403. //
  404. HWREG(HIB_CTL) = (ulWakeFlags |
  405. (HWREG(HIB_CTL) & ~(HIBERNATE_WAKE_PIN
  406. | HIBERNATE_WAKE_RTC |
  407. HIBERNATE_WAKE_LOW_BAT)));
  408. //
  409. // Wait for write completion
  410. //
  411. HibernateWriteComplete();
  412. }
  413. //*****************************************************************************
  414. //
  415. //! Gets the currently configured wake conditions for the Hibernation module.
  416. //!
  417. //! This function returns the flags representing the wake configuration for the
  418. //! Hibernation module. The return value is a combination of the following
  419. //! flags:
  420. //!
  421. //! - \b HIBERNATE_WAKE_PIN - wake when the external wake pin is asserted.
  422. //! - \b HIBERNATE_WAKE_RTC - wake when one of the RTC matches occurs.
  423. //! - \b HIBERNATE_WAKE_LOW_BAT - wake from hibernate due to a low battery
  424. //! level being detected.
  425. //!
  426. //! \note The \b HIBERNATE_WAKE_LOW_BAT parameter is only available on some
  427. //! Stellaris devices.
  428. //!
  429. //! \return Returns flags indicating the configured wake conditions.
  430. //
  431. //*****************************************************************************
  432. unsigned long
  433. HibernateWakeGet(void)
  434. {
  435. //
  436. // Read the wake bits from the control register and return
  437. // those bits to the caller.
  438. //
  439. return(HWREG(HIB_CTL) & (HIBERNATE_WAKE_PIN | HIBERNATE_WAKE_RTC
  440. | HIBERNATE_WAKE_LOW_BAT));
  441. }
  442. //*****************************************************************************
  443. //
  444. //! Configures the low battery detection.
  445. //!
  446. //! \param ulLowBatFlags specifies behavior of low battery detection.
  447. //!
  448. //! This function enables the low battery detection and whether hibernation is
  449. //! allowed if a low battery is detected. If low battery detection is enabled,
  450. //! then a low battery condition is indicated in the raw interrupt status
  451. //! register, and can also trigger an interrupt. Optionally, hibernation can be
  452. //! aborted if a low battery is detected.
  453. //!
  454. //! The \e ulLowBatFlags parameter is one of the following values:
  455. //!
  456. //! - \b HIBERNATE_LOW_BAT_DETECT - detect a low battery condition.
  457. //! - \b HIBERNATE_LOW_BAT_ABORT - detect a low battery condition, and abort
  458. //! hibernation if low battery is detected.
  459. //!
  460. //! The other setting in the \e ulLowBatFlags allows the caller to set one of
  461. //! the following voltage level trigger values :
  462. //!
  463. //! - \b HIBERNATE_LOW_BAT_1_9V - voltage low level is 1.9V
  464. //! - \b HIBERNATE_LOW_BAT_2_1V - voltage low level is 2.1V
  465. //! - \b HIBERNATE_LOW_BAT_2_3V - voltage low level is 2.3V
  466. //! - \b HIBERNATE_LOW_BAT_2_5V - voltage low level is 2.5V
  467. //!
  468. //! \b Example: Abort hibernate if the voltage level is below 2.1V.
  469. //!
  470. //! \verbatim
  471. //! HibernateLowBatSet(HIBERNATE_LOW_BAT_ABORT | HIBERNATE_LOW_BAT_2_1V);
  472. //! \endverbatim
  473. //!
  474. //! \note The parameters with the specific voltage levels are only available on
  475. //! some Stellaris devices.
  476. //!
  477. //! \return None.
  478. //
  479. //*****************************************************************************
  480. void
  481. HibernateLowBatSet(unsigned long ulLowBatFlags)
  482. {
  483. //
  484. // Check the arguments.
  485. //
  486. ASSERT(!(ulLowBatFlags & ~(HIB_CTL_VBATSEL_M | HIBERNATE_LOW_BAT_ABORT)));
  487. //
  488. // Set the low battery detect and abort bits in the control register,
  489. // according to the parameter.
  490. //
  491. HWREG(HIB_CTL) = (ulLowBatFlags |
  492. (HWREG(HIB_CTL) & ~(HIB_CTL_VBATSEL_M
  493. | HIBERNATE_LOW_BAT_ABORT)));
  494. //
  495. // Wait for write completion
  496. //
  497. HibernateWriteComplete();
  498. }
  499. //*****************************************************************************
  500. //
  501. //! Gets the currently configured low battery detection behavior.
  502. //!
  503. //! This function returns a value representing the currently configured low
  504. //! battery detection behavior.
  505. //!
  506. //! The return value is a combination of the values described in the
  507. //! HibernateLowBatSet() function.
  508. //!
  509. //! \return Returns a value indicating the configured low battery detection.
  510. //
  511. //*****************************************************************************
  512. unsigned long
  513. HibernateLowBatGet(void)
  514. {
  515. //
  516. // Read the supported low bat bits from the control register and return
  517. // those bits to the caller.
  518. //
  519. return(HWREG(HIB_CTL) & (HIB_CTL_VBATSEL_M | HIBERNATE_LOW_BAT_ABORT));
  520. }
  521. //*****************************************************************************
  522. //
  523. //! Sets the value of the real time clock (RTC) counter.
  524. //!
  525. //! \param ulRTCValue is the new value for the RTC.
  526. //!
  527. //! This function sets the value of the RTC. The RTC count seconds if the
  528. //! hardware is configured correctly. The RTC must be enabled by calling
  529. //! HibernateRTCEnable() before calling this function.
  530. //!
  531. //! \return None.
  532. //
  533. //*****************************************************************************
  534. void
  535. HibernateRTCSet(unsigned long ulRTCValue)
  536. {
  537. //
  538. // Write the new RTC value to the RTC load register.
  539. //
  540. HWREG(HIB_RTCLD) = ulRTCValue;
  541. //
  542. // Wait for write completion
  543. //
  544. HibernateWriteComplete();
  545. }
  546. //*****************************************************************************
  547. //
  548. //! Gets the value of the real time clock (RTC) counter.
  549. //!
  550. //! This function gets the value of the RTC and returns it to the caller.
  551. //!
  552. //! \return Returns the value of the RTC.
  553. //
  554. //*****************************************************************************
  555. unsigned long
  556. HibernateRTCGet(void)
  557. {
  558. //
  559. // Return the value of the RTC counter register to the caller.
  560. //
  561. return(HWREG(HIB_RTCC));
  562. }
  563. //*****************************************************************************
  564. //
  565. //! Sets the value of the RTC match 0 register.
  566. //!
  567. //! \param ulMatch is the value for the match register.
  568. //!
  569. //! This function sets the match 0 register for the RTC. The Hibernation
  570. //! module can be configured to wake from hibernation, and/or generate an
  571. //! interrupt when the value of the RTC counter is the same as the match
  572. //! register.
  573. //!
  574. //! \return None.
  575. //
  576. //*****************************************************************************
  577. void
  578. HibernateRTCMatch0Set(unsigned long ulMatch)
  579. {
  580. //
  581. // Write the new match value to the match register.
  582. //
  583. HWREG(HIB_RTCM0) = ulMatch;
  584. //
  585. // Wait for write completion
  586. //
  587. HibernateWriteComplete();
  588. }
  589. //*****************************************************************************
  590. //
  591. //! Gets the value of the RTC match 0 register.
  592. //!
  593. //! This function gets the value of the match 0 register for the RTC.
  594. //!
  595. //! \return Returns the value of the match register.
  596. //
  597. //*****************************************************************************
  598. unsigned long
  599. HibernateRTCMatch0Get(void)
  600. {
  601. //
  602. // Return the value of the match register to the caller.
  603. //
  604. return(HWREG(HIB_RTCM0));
  605. }
  606. //*****************************************************************************
  607. //
  608. //! Sets the value of the RTC match 1 register.
  609. //!
  610. //! \param ulMatch is the value for the match register.
  611. //!
  612. //! This function sets the match 1 register for the RTC. The Hibernation
  613. //! module can be configured to wake from hibernation, and/or generate an
  614. //! interrupt when the value of the RTC counter is the same as the match
  615. //! register.
  616. //!
  617. //! \note The Hibernation RTC Match 1 feature is not available on all Stellaris
  618. //! devices. Please consult the data sheet for the Stellaris device that you
  619. //! are using to determine if this feature is available.
  620. //!
  621. //! \return None.
  622. //
  623. //*****************************************************************************
  624. void
  625. HibernateRTCMatch1Set(unsigned long ulMatch)
  626. {
  627. //
  628. // Write the new match value to the match register.
  629. //
  630. HWREG(HIB_RTCM1) = ulMatch;
  631. //
  632. // Wait for write completion
  633. //
  634. HibernateWriteComplete();
  635. }
  636. //*****************************************************************************
  637. //
  638. //! Gets the value of the RTC match 1 register.
  639. //!
  640. //! This function gets the value of the match 1 register for the RTC.
  641. //!
  642. //! \note The Hibernation RTC Match 1 feature is not available on all Stellaris
  643. //! devices. Please consult the data sheet for the Stellaris device that you
  644. //! are using to determine if this feature is available.
  645. //!
  646. //! \return Returns the value of the match register.
  647. //
  648. //*****************************************************************************
  649. unsigned long
  650. HibernateRTCMatch1Get(void)
  651. {
  652. //
  653. // Return the value of the match register to the caller.
  654. //
  655. return(HWREG(HIB_RTCM1));
  656. }
  657. //*****************************************************************************
  658. //
  659. //! Sets the value of the RTC sub second match 0 register.
  660. //!
  661. //! \param ulMatch is the value for the sub second match register.
  662. //!
  663. //! This function sets the sub second match 0 register for the RTC in 1/32768
  664. //! of a second increments. The Hibernation module can be configured to wake
  665. //! from hibernation, and/or generate an interrupt when the value of the RTC
  666. //! counter is the same as the match combined with the sub second match
  667. //! register.
  668. //!
  669. //! \note The Hibernation sub second RTC Match 0 feature is not available on
  670. //! all Stellaris devices. Please consult the data sheet for the Stellaris
  671. //! device that you are using to determine if this feature is available.
  672. //!
  673. //! \return None.
  674. //
  675. //*****************************************************************************
  676. void
  677. HibernateRTCSSMatch0Set(unsigned long ulMatch)
  678. {
  679. //
  680. // Write the new sub second match value to the sub second match register.
  681. //
  682. HWREG(HIB_RTCSS) = ulMatch << HIB_RTCSS_RTCSSM_S;
  683. //
  684. // Wait for write complete to be signaled on later devices.
  685. //
  686. HibernateWriteComplete();
  687. }
  688. //*****************************************************************************
  689. //
  690. //! Returns the value of the RTC sub second match 0 register.
  691. //!
  692. //! This function returns the current value of the sub second match 0 register
  693. //! for the RTC. The value returned is in 1/32768 second increments.
  694. //!
  695. //! \note The Hibernation sub second RTC Match 0 feature is not available on
  696. //! all Stellaris devices. Please consult the data sheet for the Stellaris
  697. //! device that you are using to determine if this feature is available.
  698. //!
  699. //! \return Returns the value of the sub section match register.
  700. //
  701. //*****************************************************************************
  702. unsigned long
  703. HibernateRTCSSMatch0Get(void)
  704. {
  705. //
  706. // Read the current second RTC count.
  707. //
  708. return(HWREG(HIB_RTCSS) >> HIB_RTCSS_RTCSSM_S);
  709. }
  710. //*****************************************************************************
  711. //
  712. //! Returns the current value of the RTC sub second count.
  713. //!
  714. //! This function returns the current value of the sub second count for the
  715. //! for the RTC in 1/32768 of a second increments.
  716. //!
  717. //! \note The Hibernation sub second RTC Match 0 feature is not available on
  718. //! all Stellaris devices. Please consult the data sheet for the Stellaris
  719. //! device that you are using to determine if this feature is available.
  720. //!
  721. //! \return The current RTC sub second count in 1/32768 seconds.
  722. //
  723. //*****************************************************************************
  724. unsigned long
  725. HibernateRTCSSGet(void)
  726. {
  727. //
  728. // Read the current second RTC count.
  729. //
  730. return(HWREG(HIB_RTCSS) & HIB_RTCSS_RTCSSC_M);
  731. }
  732. //*****************************************************************************
  733. //
  734. //! Sets the value of the RTC predivider trim register.
  735. //!
  736. //! \param ulTrim is the new value for the pre-divider trim register.
  737. //!
  738. //! This function sets the value of the pre-divider trim register. The input
  739. //! time source is divided by the pre-divider to achieve a one-second clock
  740. //! rate. Once every 64 seconds, the value of the pre-divider trim register is
  741. //! applied to the predivider to allow fine-tuning of the RTC rate, in order
  742. //! to make corrections to the rate. The software application can make
  743. //! adjustments to the predivider trim register to account for variations in
  744. //! the accuracy of the input time source. The nominal value is 0x7FFF, and it
  745. //! can be adjusted up or down in order to fine-tune the RTC rate.
  746. //!
  747. //! \return None.
  748. //
  749. //*****************************************************************************
  750. void
  751. HibernateRTCTrimSet(unsigned long ulTrim)
  752. {
  753. //
  754. // Check the arguments.
  755. //
  756. ASSERT(ulTrim < 0x10000);
  757. //
  758. // Write the new trim value to the trim register.
  759. //
  760. HWREG(HIB_RTCT) = ulTrim;
  761. //
  762. // Wait for write completion
  763. //
  764. HibernateWriteComplete();
  765. }
  766. //*****************************************************************************
  767. //
  768. //! Gets the value of the RTC predivider trim register.
  769. //!
  770. //! This function gets the value of the pre-divider trim register. This
  771. //! function can be used to get the current value of the trim register prior
  772. //! to making an adjustment by using the HibernateRTCTrimSet() function.
  773. //!
  774. //! \return None.
  775. //
  776. //*****************************************************************************
  777. unsigned long
  778. HibernateRTCTrimGet(void)
  779. {
  780. //
  781. // Return the value of the trim register to the caller.
  782. //
  783. return(HWREG(HIB_RTCT));
  784. }
  785. //*****************************************************************************
  786. //
  787. //! Stores data in the battery-backed memory of the Hibernation module.
  788. //!
  789. //! \param pulData points to the data that the caller wants to store in the
  790. //! memory of the Hibernation module.
  791. //! \param ulCount is the count of 32-bit words to store.
  792. //!
  793. //! Stores a set of data in the Hibernation module battery-backed memory.
  794. //! This memory is preserved when the power to the processor is turned off,
  795. //! and can be used to store application state information which is available
  796. //! when the processor wakes. Up to 64 32-bit words can be stored in the
  797. //! battery-backed memory. The data can be restored by calling the
  798. //! HibernateDataGet() function.
  799. //!
  800. //! \note The amount of memory available in the Hibernation module varies
  801. //! across Stellaris devices. Please consult the data sheet for the Stellaris
  802. //! device that you are using to determine the amount of memory available in
  803. //! the Hibernation module.
  804. //!
  805. //! \return None.
  806. //
  807. //*****************************************************************************
  808. void
  809. HibernateDataSet(unsigned long *pulData, unsigned long ulCount)
  810. {
  811. unsigned long ulIdx;
  812. //
  813. // Check the arguments.
  814. //
  815. ASSERT(ulCount <= 64);
  816. ASSERT(pulData != 0);
  817. //
  818. // Loop through all the words to be stored, storing one at a time.
  819. //
  820. for(ulIdx = 0; ulIdx < ulCount; ulIdx++)
  821. {
  822. //
  823. // Write a word to the battery-backed storage area.
  824. //
  825. HWREG(HIB_DATA + (ulIdx * 4)) = pulData[ulIdx];
  826. //
  827. // Wait for write completion
  828. //
  829. HibernateWriteComplete();
  830. }
  831. }
  832. //*****************************************************************************
  833. //
  834. //! Reads a set of data from the battery-backed memory of the Hibernation
  835. //! module.
  836. //!
  837. //! \param pulData points to a location where the data that is read from the
  838. //! Hibernation module is stored.
  839. //! \param ulCount is the count of 32-bit words to read.
  840. //!
  841. //! This function retrieves a set of data from the Hibernation module battery-
  842. //! backed memory that was previously stored with the HibernateDataSet()
  843. //! function. The caller must ensure that \e pulData points to a large enough
  844. //! memory block to hold all the data that is read from the battery-backed
  845. //! memory.
  846. //!
  847. //! \note The amount of memory available in the Hibernation module varies
  848. //! across Stellaris devices. Please consult the data sheet for the Stellaris
  849. //! device that you are using to determine the amount of memory available in
  850. //! the Hibernation module.
  851. //!
  852. //! \return None.
  853. //
  854. //*****************************************************************************
  855. void
  856. HibernateDataGet(unsigned long *pulData, unsigned long ulCount)
  857. {
  858. unsigned long ulIdx;
  859. //
  860. // Check the arguments.
  861. //
  862. ASSERT(ulCount <= 64);
  863. ASSERT(pulData != 0);
  864. //
  865. // Loop through all the words to be restored, reading one at a time.
  866. //
  867. for(ulIdx = 0; ulIdx < ulCount; ulIdx++)
  868. {
  869. //
  870. // Read a word from the battery-backed storage area. No delay is
  871. // required between reads.
  872. //
  873. pulData[ulIdx] = HWREG(HIB_DATA + (ulIdx * 4));
  874. }
  875. }
  876. //*****************************************************************************
  877. //
  878. //! Requests hibernation mode.
  879. //!
  880. //! This function requests the Hibernation module to disable the external
  881. //! regulator, thus removing power from the processor and all peripherals. The
  882. //! Hibernation module remains powered from the battery or auxiliary power
  883. //! supply.
  884. //!
  885. //! The Hibernation module re-enables the external regulator when one of
  886. //! the configured wake conditions occurs (such as RTC match or external
  887. //! \b WAKE pin). When the power is restored the processor goes through a
  888. //! power-on reset although the Hibernation module is not reset. The processor
  889. //! can retrieve saved state information with the HibernateDataGet() function.
  890. //! Prior to calling the function to request hibernation mode, the conditions
  891. //! for waking must have already been set by using the HibernateWakeSet()
  892. //! function.
  893. //!
  894. //! Note that this function may return because some time may elapse before the
  895. //! power is actually removed, or it may not be removed at all. For this
  896. //! reason, the processor continues to execute instructions for some time
  897. //! and the caller should be prepared for this function to return. There are
  898. //! various reasons why the power may not be removed. For example, if the
  899. //! HibernateLowBatSet() function was used to configure an abort if low
  900. //! battery is detected, then the power is not removed if the battery
  901. //! voltage is too low. There may be other reasons, related to the external
  902. //! circuit design, that a request for hibernation may not actually occur.
  903. //!
  904. //! For all these reasons, the caller must be prepared for this function to
  905. //! return. The simplest way to handle it is to just enter an infinite loop
  906. //! and wait for the power to be removed.
  907. //!
  908. //! \return None.
  909. //
  910. //*****************************************************************************
  911. void
  912. HibernateRequest(void)
  913. {
  914. //
  915. // Set the bit in the control register to cut main power to the processor.
  916. //
  917. HWREG(HIB_CTL) |= HIB_CTL_HIBREQ;
  918. //
  919. // Wait for write completion
  920. //
  921. HibernateWriteComplete();
  922. }
  923. //*****************************************************************************
  924. //
  925. //! Enables interrupts for the Hibernation module.
  926. //!
  927. //! \param ulIntFlags is the bit mask of the interrupts to be enabled.
  928. //!
  929. //! This function enables the specified interrupt sources from the Hibernation
  930. //! module.
  931. //!
  932. //! The \e ulIntFlags parameter must be the logical OR of any combination of
  933. //! the following:
  934. //!
  935. //! - \b HIBERNATE_INT_WR_COMPLETE - write complete interrupt
  936. //! - \b HIBERNATE_INT_PIN_WAKE - wake from pin interrupt
  937. //! - \b HIBERNATE_INT_LOW_BAT - low battery interrupt
  938. //! - \b HIBERNATE_INT_RTC_MATCH_0 - RTC match 0 interrupt
  939. //! - \b HIBERNATE_INT_RTC_MATCH_1 - RTC match 1 interrupt
  940. //!
  941. //! \note The \b HIBERNATE_INT_WR_COMPLETE and \b HIBERNATE_INT_RTC_MATCH_1
  942. //! settings are not available on all Stellaris devices. Please consult the
  943. //! data sheet for the Stellaris device that you are using to determine if
  944. //! these interrupt sources are available.
  945. //!
  946. //! \return None.
  947. //
  948. //*****************************************************************************
  949. void
  950. HibernateIntEnable(unsigned long ulIntFlags)
  951. {
  952. //
  953. // Check the arguments.
  954. //
  955. ASSERT(!(ulIntFlags & ~(HIBERNATE_INT_PIN_WAKE | HIBERNATE_INT_LOW_BAT |
  956. HIBERNATE_INT_RTC_MATCH_0 |
  957. HIBERNATE_INT_RTC_MATCH_1 |
  958. HIBERNATE_INT_WR_COMPLETE)));
  959. //
  960. // Set the specified interrupt mask bits.
  961. //
  962. HWREG(HIB_IM) |= ulIntFlags;
  963. //
  964. // Wait for write completion
  965. //
  966. HibernateWriteComplete();
  967. }
  968. //*****************************************************************************
  969. //
  970. //! Disables interrupts for the Hibernation module.
  971. //!
  972. //! \param ulIntFlags is the bit mask of the interrupts to be disabled.
  973. //!
  974. //! This function disables the specified interrupt sources from the
  975. //! Hibernation module.
  976. //!
  977. //! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
  978. //! parameter to the HibernateIntEnable() function.
  979. //!
  980. //! \return None.
  981. //
  982. //*****************************************************************************
  983. void
  984. HibernateIntDisable(unsigned long ulIntFlags)
  985. {
  986. //
  987. // Check the arguments.
  988. //
  989. ASSERT(!(ulIntFlags & ~(HIBERNATE_INT_PIN_WAKE | HIBERNATE_INT_LOW_BAT |
  990. HIBERNATE_INT_RTC_MATCH_0 |
  991. HIBERNATE_INT_RTC_MATCH_1 |
  992. HIBERNATE_INT_WR_COMPLETE)));
  993. //
  994. // Clear the specified interrupt mask bits.
  995. //
  996. HWREG(HIB_IM) &= ~ulIntFlags;
  997. //
  998. // Wait for write completion
  999. //
  1000. HibernateWriteComplete();
  1001. }
  1002. //*****************************************************************************
  1003. //
  1004. //! Registers an interrupt handler for the Hibernation module interrupt.
  1005. //!
  1006. //! \param pfnHandler points to the function to be called when a hibernation
  1007. //! interrupt occurs.
  1008. //!
  1009. //! This function registers the interrupt handler in the system interrupt
  1010. //! controller. The interrupt is enabled at the global level, but individual
  1011. //! interrupt sources must still be enabled with a call to
  1012. //! HibernateIntEnable().
  1013. //!
  1014. //! \sa IntRegister() for important information about registering interrupt
  1015. //! handlers.
  1016. //!
  1017. //! \return None.
  1018. //
  1019. //*****************************************************************************
  1020. void
  1021. HibernateIntRegister(void (*pfnHandler)(void))
  1022. {
  1023. //
  1024. // Register the interrupt handler.
  1025. //
  1026. IntRegister(INT_HIBERNATE, pfnHandler);
  1027. //
  1028. // Enable the hibernate module interrupt.
  1029. //
  1030. IntEnable(INT_HIBERNATE);
  1031. }
  1032. //*****************************************************************************
  1033. //
  1034. //! Unregisters an interrupt handler for the Hibernation module interrupt.
  1035. //!
  1036. //! This function unregisters the interrupt handler in the system interrupt
  1037. //! controller. The interrupt is disabled at the global level, and the
  1038. //! interrupt handler is longer called.
  1039. //!
  1040. //! \sa IntRegister() for important information about registering interrupt
  1041. //! handlers.
  1042. //!
  1043. //! \return None.
  1044. //
  1045. //*****************************************************************************
  1046. void
  1047. HibernateIntUnregister(void)
  1048. {
  1049. //
  1050. // Disable the hibernate interrupt.
  1051. //
  1052. IntDisable(INT_HIBERNATE);
  1053. //
  1054. // Unregister the interrupt handler.
  1055. //
  1056. IntUnregister(INT_HIBERNATE);
  1057. }
  1058. //*****************************************************************************
  1059. //
  1060. //! Gets the current interrupt status of the Hibernation module.
  1061. //!
  1062. //! \param bMasked is false to retrieve the raw interrupt status, and true to
  1063. //! retrieve the masked interrupt status.
  1064. //!
  1065. //! This function returns the interrupt status of the Hibernation module. The
  1066. //! caller can use this function to determine the cause of a hibernation
  1067. //! interrupt. Either the masked or raw interrupt status can be returned.
  1068. //!
  1069. //! \return Returns the interrupt status as a bit field with the values as
  1070. //! described in the HibernateIntEnable() function.
  1071. //
  1072. //*****************************************************************************
  1073. unsigned long
  1074. HibernateIntStatus(tBoolean bMasked)
  1075. {
  1076. //
  1077. // Read and return the Hibernation module raw or masked interrupt status.
  1078. //
  1079. if(bMasked == true)
  1080. {
  1081. return(HWREG(HIB_MIS) & 0xf);
  1082. }
  1083. else
  1084. {
  1085. return(HWREG(HIB_RIS) & 0xf);
  1086. }
  1087. }
  1088. //*****************************************************************************
  1089. //
  1090. //! Clears pending interrupts from the Hibernation module.
  1091. //!
  1092. //! \param ulIntFlags is the bit mask of the interrupts to be cleared.
  1093. //!
  1094. //! This function clears the specified interrupt sources. This function must
  1095. //! be called within the interrupt handler or else the handler is called again
  1096. //! upon exit.
  1097. //!
  1098. //! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
  1099. //! parameter to the HibernateIntEnable() function.
  1100. //!
  1101. //! \note Because there is a write buffer in the Cortex-M processor, it may
  1102. //! take several clock cycles before the interrupt source is actually cleared.
  1103. //! Therefore, it is recommended that the interrupt source be cleared early in
  1104. //! the interrupt handler (as opposed to the very last action) to avoid
  1105. //! returning from the interrupt handler before the interrupt source is
  1106. //! actually cleared. Failure to do so may result in the interrupt handler
  1107. //! being immediately reentered (because the interrupt controller still sees
  1108. //! the interrupt source asserted).
  1109. //!
  1110. //! \return None.
  1111. //
  1112. //*****************************************************************************
  1113. void
  1114. HibernateIntClear(unsigned long ulIntFlags)
  1115. {
  1116. //
  1117. // Check the arguments.
  1118. //
  1119. ASSERT(!(ulIntFlags & ~(HIBERNATE_INT_PIN_WAKE | HIBERNATE_INT_LOW_BAT |
  1120. HIBERNATE_INT_RTC_MATCH_0 |
  1121. HIBERNATE_INT_RTC_MATCH_1)));
  1122. //
  1123. // Write the specified interrupt bits into the interrupt clear register.
  1124. //
  1125. HWREG(HIB_IC) |= ulIntFlags;
  1126. //
  1127. // Wait for write completion
  1128. //
  1129. HibernateWriteComplete();
  1130. }
  1131. //*****************************************************************************
  1132. //
  1133. //! Checks to see if the Hibernation module is already powered up.
  1134. //!
  1135. //! This function queries the control register to determine if the module is
  1136. //! already active. This function can be called at a power-on reset to help
  1137. //! determine if the reset is due to a wake from hibernation or a cold start.
  1138. //! If the Hibernation module is already active, then it does not need to be
  1139. //! re-enabled and its status can be queried immediately.
  1140. //!
  1141. //! The software application should also use the HibernateIntStatus() function
  1142. //! to read the raw interrupt status to determine the cause of the wake. The
  1143. //! HibernateDataGet() function can be used to restore state. These
  1144. //! combinations of functions can be used by the software to determine if the
  1145. //! processor is waking from hibernation and the appropriate action to take as
  1146. //! a result.
  1147. //!
  1148. //! \return Returns \b true if the module is already active, and \b false if
  1149. //! not.
  1150. //
  1151. //*****************************************************************************
  1152. unsigned long
  1153. HibernateIsActive(void)
  1154. {
  1155. //
  1156. // Read the control register, and return true if the module is enabled.
  1157. //
  1158. return(HWREG(HIB_CTL) & HIB_CTL_CLK32EN ? 1 : 0);
  1159. }
  1160. //*****************************************************************************
  1161. //
  1162. // Close the Doxygen group.
  1163. //! @}
  1164. //
  1165. //*****************************************************************************