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lpc.h 26 KB

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  1. //*****************************************************************************
  2. //
  3. // lpc.h - Prototypes for the Low Pin Count (LPC) driver.
  4. //
  5. // Copyright (c) 2010-2011 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Texas Instruments (TI) is supplying this software for use solely and
  9. // exclusively on TI's microcontroller products. The software is owned by
  10. // TI and/or its suppliers, and is protected under applicable copyright
  11. // laws. You may not combine this software with "viral" open-source
  12. // software in order to form a larger program.
  13. //
  14. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  15. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  16. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  18. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  19. // DAMAGES, FOR ANY REASON WHATSOEVER.
  20. //
  21. // This is part of revision 8264 of the Stellaris Peripheral Driver Library.
  22. //
  23. //*****************************************************************************
  24. #ifndef __LPC_H__
  25. #define __LPC_H__
  26. //*****************************************************************************
  27. //
  28. // If building with a C++ compiler, make all of the definitions in this header
  29. // have a C binding.
  30. //
  31. //*****************************************************************************
  32. #ifdef __cplusplus
  33. extern "C"
  34. {
  35. #endif
  36. //*****************************************************************************
  37. //
  38. // Values that can be passed to LPCConfigSet as the ulConfig value, and
  39. // returned from LPCConfigGet.
  40. //
  41. //*****************************************************************************
  42. #define LPC_CFG_WAKE 0x00000100 // Restart the LPC Bus
  43. //*****************************************************************************
  44. //
  45. // Values that can be returned from LPCStatus.
  46. //
  47. //*****************************************************************************
  48. #define LPC_STATUS_RST 0x00000400 // LPC is in Reset
  49. #define LPC_STATUS_BUSY 0x00000200 // LPC is Busy
  50. #define LPC_STATUS_SLEEP 0x00000100 // LPC is in Sleep Mode
  51. #define LPC_STATUS_CA7 0x00000080 // Channel 7 Active
  52. #define LPC_STATUS_CA6 0x00000040 // Channel 6 Active
  53. #define LPC_STATUS_CA5 0x00000020 // Channel 5 Active
  54. #define LPC_STATUS_CA4 0x00000010 // Channel 4 Active
  55. #define LPC_STATUS_CA3 0x00000008 // Channel 3 Active
  56. #define LPC_STATUS_CA2 0x00000004 // Channel 2 Active
  57. #define LPC_STATUS_CA1 0x00000002 // Channel 1 Active
  58. #define LPC_STATUS_CA0 0x00000001 // Channel 0 Active
  59. //*****************************************************************************
  60. //
  61. // Values that can be passed to LPCIRQSet and LPCIRQClear in the ulIRQ
  62. // parameter and returned from LPCIRQGet.
  63. //
  64. //*****************************************************************************
  65. #define LPC_IRQ15 0x80000000 // Serial IRQ15
  66. #define LPC_IRQ14 0x40000000 // Serial IRQ14
  67. #define LPC_IRQ13 0x20000000 // Serial IRQ13
  68. #define LPC_IRQ12 0x10000000 // Serial IRQ12
  69. #define LPC_IRQ11 0x08000000 // Serial IRQ11
  70. #define LPC_IRQ10 0x04000000 // Serial IRQ10
  71. #define LPC_IRQ9 0x02000000 // Serial IRQ9
  72. #define LPC_IRQ8 0x01000000 // Serial IRQ8
  73. #define LPC_IRQ7 0x00800000 // Serial IRQ7
  74. #define LPC_IRQ6 0x00400000 // Serial IRQ6
  75. #define LPC_IRQ5 0x00200000 // Serial IRQ5
  76. #define LPC_IRQ4 0x00100000 // Serial IRQ4
  77. #define LPC_IRQ3 0x00080000 // Serial IRQ3
  78. #define LPC_IRQ2 0x00040000 // Serial IRQ2
  79. #define LPC_IRQ1 0x00020000 // Serial IRQ1
  80. #define LPC_IRQ0 0x00010000 // Serial IRQ0
  81. //*****************************************************************************
  82. //
  83. // Addition values that can be returned from LPCIRQGet.
  84. //
  85. //*****************************************************************************
  86. #define LPC_IRQ_BUSY 0x00000004 // SERIRQ frame in progress
  87. #define LPC_IRQ_CONT 0x00000001 // SERIRQ in Continuous Mode
  88. //*****************************************************************************
  89. //
  90. // Values that can be passed as the ulChannel parameter in LPCChannel...
  91. // API calls.
  92. //
  93. //*****************************************************************************
  94. #define LPC_CHAN_CH0 0 // LPC Channel 0
  95. #define LPC_CHAN_CH1 1 // LPC Channel 1
  96. #define LPC_CHAN_CH2 2 // LPC Channel 2
  97. #define LPC_CHAN_CH3 3 // LPC Channel 3
  98. #define LPC_CHAN_CH4 4 // LPC Channel 4
  99. #define LPC_CHAN_CH5 5 // LPC Channel 5
  100. #define LPC_CHAN_CH6 6 // LPC Channel 6
  101. #define LPC_CHAN_CH7 7 // LPC Channel 7 (COMx)
  102. #define LPC_CHAN_COMx 7 // LPC Channel 7 (COMx)
  103. //*****************************************************************************
  104. //
  105. // Values that can be passed as part of the ulConfig parameter in the
  106. // LPCChannelConfig... functions.
  107. //
  108. //*****************************************************************************
  109. #define LPC_CHAN_IRQSEL2_NONE 0x00000000 // LPC Channel IRQSEL2 Disabled
  110. #define LPC_CHAN_IRQSEL2_IRQ0 0x00080000 // LPC Channel IRQSEL2 IRQ0
  111. #define LPC_CHAN_IRQSEL2_IRQ1 0x10080000 // LPC Channel IRQSEL2 IRQ1
  112. #define LPC_CHAN_IRQSEL2_IRQ2 0x20080000 // LPC Channel IRQSEL2 IRQ2
  113. #define LPC_CHAN_IRQSEL2_IRQ3 0x30080000 // LPC Channel IRQSEL2 IRQ3
  114. #define LPC_CHAN_IRQSEL2_IRQ4 0x40080000 // LPC Channel IRQSEL2 IRQ4
  115. #define LPC_CHAN_IRQSEL2_IRQ5 0x50080000 // LPC Channel IRQSEL2 IRQ5
  116. #define LPC_CHAN_IRQSEL2_IRQ6 0x60080000 // LPC Channel IRQSEL2 IRQ6
  117. #define LPC_CHAN_IRQSEL2_IRQ7 0x70080000 // LPC Channel IRQSEL2 IRQ7
  118. #define LPC_CHAN_IRQSEL2_IRQ8 0x80080000 // LPC Channel IRQSEL2 IRQ8
  119. #define LPC_CHAN_IRQSEL2_IRQ9 0x90080000 // LPC Channel IRQSEL2 IRQ9
  120. #define LPC_CHAN_IRQSEL2_IRQ10 0xA0080000 // LPC Channel IRQSEL2 IRQ10
  121. #define LPC_CHAN_IRQSEL2_IRQ11 0xB0080000 // LPC Channel IRQSEL2 IRQ11
  122. #define LPC_CHAN_IRQSEL2_IRQ12 0xC0080000 // LPC Channel IRQSEL2 IRQ12
  123. #define LPC_CHAN_IRQSEL2_IRQ13 0xD0080000 // LPC Channel IRQSEL2 IRQ13
  124. #define LPC_CHAN_IRQSEL2_IRQ14 0xE0080000 // LPC Channel IRQSEL2 IRQ14
  125. #define LPC_CHAN_IRQSEL2_IRQ15 0xF0080000 // LPC Channel IRQSEL2 IRQ15
  126. #define LPC_CHAN_COMxIRQ_DISABLE \
  127. 0x00000000 // LCP Channel COMx IRQ Disabled
  128. #define LPC_CHAN_COMxIRQ_ENABLE 0x00080000 // LCP Channel COMx IRQ Enabled
  129. #define LPC_CHAN_IRQSEL1_NONE 0x00000000 // LPC Channel IRQSEL1 Disabled
  130. #define LPC_CHAN_IRQSEL1_IRQ0 0x00040000 // LPC Channel IRQSEL1 IRQ0
  131. #define LPC_CHAN_IRQSEL1_IRQ1 0x01040000 // LPC Channel IRQSEL1 IRQ1
  132. #define LPC_CHAN_IRQSEL1_IRQ2 0x02040000 // LPC Channel IRQSEL1 IRQ2
  133. #define LPC_CHAN_IRQSEL1_IRQ3 0x03040000 // LPC Channel IRQSEL1 IRQ3
  134. #define LPC_CHAN_IRQSEL1_IRQ4 0x04040000 // LPC Channel IRQSEL1 IRQ4
  135. #define LPC_CHAN_IRQSEL1_IRQ5 0x05040000 // LPC Channel IRQSEL1 IRQ5
  136. #define LPC_CHAN_IRQSEL1_IRQ6 0x06040000 // LPC Channel IRQSEL1 IRQ6
  137. #define LPC_CHAN_IRQSEL1_IRQ7 0x07040000 // LPC Channel IRQSEL1 IRQ7
  138. #define LPC_CHAN_IRQSEL1_IRQ8 0x08040000 // LPC Channel IRQSEL1 IRQ8
  139. #define LPC_CHAN_IRQSEL1_IRQ9 0x09040000 // LPC Channel IRQSEL1 IRQ9
  140. #define LPC_CHAN_IRQSEL1_IRQ10 0x0A040000 // LPC Channel IRQSEL1 IRQ10
  141. #define LPC_CHAN_IRQSEL1_IRQ11 0x0B040000 // LPC Channel IRQSEL1 IRQ11
  142. #define LPC_CHAN_IRQSEL1_IRQ12 0x0C040000 // LPC Channel IRQSEL1 IRQ12
  143. #define LPC_CHAN_IRQSEL1_IRQ13 0x0D040000 // LPC Channel IRQSEL1 IRQ13
  144. #define LPC_CHAN_IRQSEL1_IRQ14 0x0E040000 // LPC Channel IRQSEL1 IRQ14
  145. #define LPC_CHAN_IRQSEL1_IRQ15 0x0F040000 // LPC Channel IRQSEL1 IRQ15
  146. #define LPC_CHAN_IRQSEL0_NONE 0x00000000 // LPC Channel IRQSEL0 Disabled
  147. #define LPC_CHAN_IRQSEL0_IRQ0 0x00000000 // LPC Channel IRQSEL0 IRQ0
  148. #define LPC_CHAN_IRQSEL0_IRQ1 0x00100000 // LPC Channel IRQSEL0 IRQ1
  149. #define LPC_CHAN_IRQSEL0_IRQ2 0x00200000 // LPC Channel IRQSEL0 IRQ2
  150. #define LPC_CHAN_IRQSEL0_IRQ3 0x00300000 // LPC Channel IRQSEL0 IRQ3
  151. #define LPC_CHAN_IRQSEL0_IRQ4 0x00400000 // LPC Channel IRQSEL0 IRQ4
  152. #define LPC_CHAN_IRQSEL0_IRQ5 0x00500000 // LPC Channel IRQSEL0 IRQ5
  153. #define LPC_CHAN_IRQSEL0_IRQ6 0x00600000 // LPC Channel IRQSEL0 IRQ6
  154. #define LPC_CHAN_IRQSEL0_IRQ7 0x00700000 // LPC Channel IRQSEL0 IRQ7
  155. #define LPC_CHAN_IRQSEL0_IRQ8 0x00800000 // LPC Channel IRQSEL0 IRQ8
  156. #define LPC_CHAN_IRQSEL0_IRQ9 0x00900000 // LPC Channel IRQSEL0 IRQ9
  157. #define LPC_CHAN_IRQSEL0_IRQ10 0x00A00000 // LPC Channel IRQSEL0 IRQ10
  158. #define LPC_CHAN_IRQSEL0_IRQ11 0x00B00000 // LPC Channel IRQSEL0 IRQ11
  159. #define LPC_CHAN_IRQSEL0_IRQ12 0x00C00000 // LPC Channel IRQSEL0 IRQ12
  160. #define LPC_CHAN_IRQSEL0_IRQ13 0x00D00000 // LPC Channel IRQSEL0 IRQ13
  161. #define LPC_CHAN_IRQSEL0_IRQ14 0x00E00000 // LPC Channel IRQSEL0 IRQ14
  162. #define LPC_CHAN_IRQSEL0_IRQ15 0x00F00000 // LPC Channel IRQSEL0 IRQ15
  163. #define LPC_CHAN_IRQEN0_OFF 0x00000000 // LPC Channel IRQEN0 Disabled
  164. #define LPC_CHAN_IRQEN0_TRG1 0x00010000 // LPC Channel IRQEN0 Trigger 1
  165. #define LPC_CHAN_IRQEN0_TRG2 0x00020000 // LPC Channel IRQEN0 Trigger 2
  166. #define LPC_CHAN_IRQEN0_TRG3 0x00030000 // LPC Channel IRQEN0 Trigger 3
  167. #define LPC_CHAN_MBARB_ENABLED 0x00000000 // LPC Channel Mailbox Arbritration
  168. // enabled.
  169. #define LPC_CHAN_MBARB_DISABLED 0x00008000 // LPC Channel Mailbox Arbritration
  170. // disabled.
  171. #define LPC_CHAN_SIZE_4 0x00000000 // Mailbox IO/Memory Window size
  172. // is 4 Bytes.
  173. #define LPC_CHAN_SIZE_8 0x00000004 // Mailbox IO/Memory Window size
  174. // is 4 Bytes.
  175. #define LPC_CHAN_SIZE_16 0x00000008 // Mailbox IO/Memory Window size
  176. // is 4 Bytes.
  177. #define LPC_CHAN_SIZE_32 0x0000000C // Mailbox IO/Memory Window size
  178. // is 4 Bytes.
  179. #define LPC_CHAN_SIZE_64 0x00000010 // Mailbox IO/Memory Window size
  180. // is 4 Bytes.
  181. #define LPC_CHAN_SIZE_128 0x00000014 // Mailbox IO/Memory Window size
  182. // is 4 Bytes.
  183. #define LPC_CHAN_SIZE_256 0x00000018 // Mailbox IO/Memory Window size
  184. // is 4 Bytes.
  185. #define LPC_CHAN_SIZE_512 0x0000001C // Mailbox IO/Memory Window size
  186. // is 4 Bytes.
  187. //*****************************************************************************
  188. //
  189. // Values that can be passed to LCPChannelConfigCOMxSet as the ulCOMxMode
  190. // parameter or returned from LPCChannelConfigGet in the pulCOMxMode
  191. // parameter.
  192. //
  193. //*****************************************************************************
  194. #define LPC_COMx_MODE_FRMHNML 0x00000000 // Normal From Host model.
  195. #define LPC_COMx_MODE_FRMHIGN 0x00020000 // Ignore From Host data.
  196. #define LPC_COMx_MODE_FRMHDMA 0x00040000 // COMx DMA on From Host data to
  197. // memory
  198. #define LPC_COMx_MODE_UARTDMA 0x00060000 // COMx DMA on From Host data to
  199. // UART1
  200. //*****************************************************************************
  201. //
  202. // Additinal values that can be returned from LPCChannelConfigGet in the
  203. // pulCOMxMode parameter.
  204. //
  205. //*****************************************************************************
  206. #define LPC_COMx_ENABLED 0x00010000 // COMx mode enabled.
  207. //*****************************************************************************
  208. //
  209. // Values that can be passed to LPCIntEnable, LPCIntDisable, and LPCIntClear
  210. // as the ulIntFlags parameter and returned by LPCIntStatus.
  211. //
  212. //*****************************************************************************
  213. #define LPC_INT_RST 0x80000000 // LPC Bus Enters or Exits
  214. // Reset State.
  215. #define LPC_INT_SLEEP 0x40000000 // LPC Bus Enters or Exits
  216. // Sleep State.
  217. #define LPC_INT_COMx 0x20000000 // COMx has read/written
  218. // data.
  219. #define LPC_INT_SIRQ 0x10000000 // SERIRQ frame has completed
  220. #define LPC_INT_CH6_EP_TO_HOST (1 << 24) // To-Host has been read.
  221. #define LPC_INT_CH6_EP_FROM_DATA \
  222. (2 << 24) // From-Host has been written as
  223. // data.
  224. #define LPC_INT_CH6_EP_FROM_CMD (4 << 24) // From-Host has been written as
  225. // command.
  226. #define LPC_INT_CH6_MB_HOST_WON (1 << 24) // Host Won (HW1ST)
  227. #define LPC_INT_CH6_MB_HOST_WRITE \
  228. (2 << 24) // Host Wrote Last Byte.
  229. #define LPC_INT_CH6_MB_HOST_READ \
  230. (4 << 24) // Host Read Last Byte
  231. #define LPC_INT_CH6_MB_MCU_LOST (8 << 24) // MCU Lost (when host had HW1ST).
  232. #define LPC_INT_CH5_EP_TO_HOST (1 << 20) // To-Host has been read.
  233. #define LPC_INT_CH5_EP_FROM_DATA \
  234. (2 << 20) // From-Host has been written as
  235. // data.
  236. #define LPC_INT_CH5_EP_FROM_CMD (4 << 20) // From-Host has been written as
  237. // command.
  238. #define LPC_INT_CH5_MB_HOST_WON (1 << 20) // Host Won (HW1ST)
  239. #define LPC_INT_CH5_MB_HOST_WRITE \
  240. (2 << 20) // Host Wrote Last Byte.
  241. #define LPC_INT_CH5_MB_HOST_READ \
  242. (4 << 20) // Host Read Last Byte
  243. #define LPC_INT_CH5_MB_MCU_LOST (8 << 20) // MCU Lost (when host had HW1ST).
  244. #define LPC_INT_CH4_EP_TO_HOST (1 << 16) // To-Host has been read.
  245. #define LPC_INT_CH4_EP_FROM_DATA \
  246. (2 << 16) // From-Host has been written as
  247. // data.
  248. #define LPC_INT_CH4_EP_FROM_CMD (4 << 16) // From-Host has been written as
  249. // command.
  250. #define LPC_INT_CH4_MB_HOST_WON (1 << 16) // Host Won (HW1ST)
  251. #define LPC_INT_CH4_MB_HOST_WRITE \
  252. (2 << 16) // Host Wrote Last Byte.
  253. #define LPC_INT_CH4_MB_HOST_READ \
  254. (4 << 16) // Host Read Last Byte
  255. #define LPC_INT_CH4_MB_MCU_LOST (8 << 16) // MCU Lost (when host had HW1ST).
  256. #define LPC_INT_CH3_EP_TO_HOST (1 << 12) // To-Host has been read.
  257. #define LPC_INT_CH3_EP_FROM_DATA \
  258. (2 << 12) // From-Host has been written as
  259. // data.
  260. #define LPC_INT_CH3_EP_FROM_CMD (4 << 12) // From-Host has been written as
  261. // command.
  262. #define LPC_INT_CH3_MB_HOST_WON (1 << 12) // Host Won (HW1ST)
  263. #define LPC_INT_CH3_MB_HOST_WRITE \
  264. (2 << 12) // Host Wrote Last Byte.
  265. #define LPC_INT_CH3_MB_HOST_READ \
  266. (4 << 12) // Host Read Last Byte
  267. #define LPC_INT_CH3_MB_MCU_LOST (8 << 12) // MCU Lost (when host had HW1ST).
  268. #define LPC_INT_CH2_EP_TO_HOST (1 << 8) // To-Host has been read.
  269. #define LPC_INT_CH2_EP_FROM_DATA \
  270. (2 << 8) // From-Host has been written as
  271. // data.
  272. #define LPC_INT_CH2_EP_FROM_CMD (4 << 8) // From-Host has been written as
  273. // command.
  274. #define LPC_INT_CH2_MB_HOST_WON (1 << 8) // Host Won (HW1ST)
  275. #define LPC_INT_CH2_MB_HOST_WRITE \
  276. (2 << 8) // Host Wrote Last Byte.
  277. #define LPC_INT_CH2_MB_HOST_READ \
  278. (4 << 8) // Host Read Last Byte
  279. #define LPC_INT_CH2_MB_MCU_LOST (8 << 8) // MCU Lost (when host had HW1ST).
  280. #define LPC_INT_CH1_EP_TO_HOST (1 << 4) // To-Host has been read.
  281. #define LPC_INT_CH1_EP_FROM_DATA \
  282. (2 << 4) // From-Host has been written as
  283. // data.
  284. #define LPC_INT_CH1_EP_FROM_CMD (4 << 4) // From-Host has been written as
  285. // command.
  286. #define LPC_INT_CH1_MB_HOST_WON (1 << 4) // Host Won (HW1ST)
  287. #define LPC_INT_CH1_MB_HOST_WRITE \
  288. (2 << 4) // Host Wrote Last Byte.
  289. #define LPC_INT_CH1_MB_HOST_READ \
  290. (4 << 4) // Host Read Last Byte
  291. #define LPC_INT_CH1_MB_MCU_LOST (8 << 4) // MCU Lost (when host had HW1ST).
  292. #define LPC_INT_CH0_EP_TO_HOST (1 << 0) // To-Host has been read.
  293. #define LPC_INT_CH0_EP_FROM_DATA \
  294. (2 << 0) // From-Host has been written as
  295. // data.
  296. #define LPC_INT_CH0_EP_FROM_CMD (4 << 0) // From-Host has been written as
  297. // command.
  298. #define LPC_INT_CH0_MB_HOST_WON (1 << 0) // Host Won (HW1ST)
  299. #define LPC_INT_CH0_MB_HOST_WRITE \
  300. (2 << 0) // Host Wrote Last Byte.
  301. #define LPC_INT_CH0_MB_HOST_READ \
  302. (4 << 0) // Host Read Last Byte
  303. #define LPC_INT_CH0_MB_MCU_LOST (8 << 0) // MCU Lost (when host had HW1ST).
  304. //*****************************************************************************
  305. //
  306. // Values that can be passed to LPCCOMxInt... functions as the ulIntFlags
  307. // parameter and returned by LPCIntStatus.
  308. //
  309. //*****************************************************************************
  310. #define LPC_COMx_INT_CX 0x02000000 // Raw Event State for COMx
  311. #define LPC_COMx_INT_CXTX 0x01000000 // Raw Event State for COMx TX
  312. #define LPC_COMx_INT_CXRX 0x00800000 // Raw Event State for COMx RX
  313. #define LPC_COMx_MASK_CX 0x00200000 // Event Mask for COMx
  314. #define LPC_COMx_MASK_CXTX 0x00100000 // Event Mask for COMx TX
  315. #define LPC_COMx_MASK_CXRX 0x00080000 // Event Mask for COMx RX
  316. //*****************************************************************************
  317. //
  318. // Values that can be passed to the LPCChannelDMAConfigSet function as part
  319. // of the ulConfig or ulMask parameter, or can be returned from the
  320. // LPCChannelConfigGet function.
  321. //
  322. //*****************************************************************************
  323. #define LPC_DMA_CH3_WEN 0x00000080 // Trigger DMA for "To Host" data
  324. // buffer is empty.
  325. #define LPC_DMA_CH3_REN 0x00000040 // Trigger DMA when "From Host"
  326. // data buffer is full.
  327. #define LPC_DMA_CH2_WEN 0x00000020 // Trigger DMA for "To Host" data
  328. // buffer is empty.
  329. #define LPC_DMA_CH2_REN 0x00000010 // Trigger DMA when "From Host"
  330. // data buffer is full.
  331. #define LPC_DMA_CH1_WEN 0x00000008 // Trigger DMA for "To Host" data
  332. // buffer is empty.
  333. #define LPC_DMA_CH1_REN 0x00000004 // Trigger DMA when "From Host"
  334. // data buffer is full.
  335. #define LPC_DMA_CH0_WEN 0x00000002 // Trigger DMA for "To Host" data
  336. // buffer is empty.
  337. #define LPC_DMA_CH0_REN 0x00000001 // Trigger DMA when "From Host"
  338. // data buffer is full.
  339. //*****************************************************************************
  340. //
  341. // Values that can be passed to the LPCChannelStatusSet and
  342. // LPCChannelStatusClear function, and returned by the LPCChannelStatusGet
  343. // function.
  344. //
  345. //*****************************************************************************
  346. #define LPC_CH_ST_USER0 0x00000100 // User Status Bit 0
  347. #define LPC_CH_ST_USER1 0x00000200 // User Status Bit 1
  348. #define LPC_CH_ST_USER2 0x00000400 // User Status Bit 2
  349. #define LPC_CH_ST_USER3 0x00000800 // User Status Bit 3
  350. #define LPC_CH_ST_USER4 0x00001000 // User Status Bit 4
  351. //*****************************************************************************
  352. //
  353. // Additinoal values that can be returned by the LPCChannelStatusGet function.
  354. //
  355. //*****************************************************************************
  356. #define LPC_CH_ST_LASTHW 0x00000080 // Last Host Write
  357. #define LPC_CH_ST_HW1ST 0x00000040 // First Host Write
  358. #define LPC_CH_ST_LASTSW 0x00000020 // Last Slave Write
  359. #define LPC_CH_ST_SW1ST 0x00000010 // First Slave Write
  360. #define LPC_CH_ST_CMD 0x00000008 // Command or Data
  361. #define LPC_CH_ST_FRMH 0x00000002 // From-Host Transaction
  362. #define LPC_CH_ST_TOH 0x00000001 // To-Host Transaction
  363. //*****************************************************************************
  364. //
  365. // Prototypes for the APIs.
  366. //
  367. //*****************************************************************************
  368. extern void LPCConfigSet(unsigned long ulBase, unsigned long ulConfig);
  369. extern unsigned long LPCConfigGet(unsigned long ulBase);
  370. extern unsigned long LPCStatusGet(unsigned long ulBase,
  371. unsigned long *pulCount,
  372. unsigned long *pulPoolSize);
  373. extern void LPCStatusBlockAddressSet(unsigned long ulBase,
  374. unsigned long ulAddress,
  375. tBoolean bEnabled);
  376. extern unsigned LPCStatusBlockAddressGet(unsigned long ulBase);
  377. extern void LPCSCIAssert(unsigned long ulBase, unsigned long ulCount);
  378. extern void LPCIRQConfig(unsigned long ulBase, tBoolean bIRQPulse,
  379. tBoolean bIRQOnChange);
  380. extern void LPCIRQSet(unsigned long ulBase, unsigned long ulIRQ);
  381. extern void LPCIRQClear(unsigned long ulBase, unsigned long ulIRQ);
  382. extern unsigned long LPCIRQGet(unsigned long ulBase);
  383. extern void LPCIRQSend(unsigned long ulBase);
  384. extern void LPCIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
  385. extern void LPCIntUnregister(unsigned long ulBase);
  386. extern void LPCIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
  387. extern void LPCIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
  388. extern unsigned long LPCIntStatus(unsigned long ulBase, tBoolean bMasked);
  389. extern void LPCIntClear(unsigned long ulBase, unsigned long ulIntFlags);
  390. extern void LPCChannelEnable(unsigned long ulBase, unsigned long ulChannel);
  391. extern void LPCChannelDisable(unsigned long ulBase, unsigned long ulChannel);
  392. extern void LPCChannelConfigEPSet(unsigned long ulBase,
  393. unsigned long ulChannel,
  394. unsigned long ulConfig,
  395. unsigned long ulAddress,
  396. unsigned long ulOffset);
  397. extern void LPCChannelConfigMBSet(unsigned long ulBase,
  398. unsigned long ulChannel,
  399. unsigned long ulConfig,
  400. unsigned long ulAddress,
  401. unsigned long ulOffset);
  402. extern void LPCChannelConfigCOMxSet(unsigned long ulBase,
  403. unsigned long ulChannel,
  404. unsigned long ulConfig,
  405. unsigned long ulAddress,
  406. unsigned long ulOffset,
  407. unsigned long ulCOMxMode);
  408. extern unsigned long LPCChannelConfigGet(unsigned long ulBase,
  409. unsigned long ulChannel,
  410. unsigned long *pulAddress,
  411. unsigned long *pulOffset,
  412. unsigned long *pulCOMxMode);
  413. extern unsigned long LPCChannelPoolAddressGet(unsigned long ulBase,
  414. unsigned long ulChannel);
  415. extern unsigned long LPCChannelStatusGet(unsigned long ulBase,
  416. unsigned long ulChannel);
  417. extern void LPCChannelStatusSet(unsigned long ulBase, unsigned long ulChannel,
  418. unsigned long ulStatus);
  419. extern void LPCChannelStatusClear(unsigned long ulBase,
  420. unsigned long ulChannel,
  421. unsigned long ulStatus);
  422. extern void LPCChannelDMAConfigSet(unsigned long ulBase,
  423. unsigned long ulConfig,
  424. unsigned long ulMask);
  425. extern unsigned long LPCChannelDMAConfigGet(unsigned long ulBase);
  426. extern unsigned char LPCByteRead(unsigned long ulBase, unsigned long ulOffset);
  427. extern void LPCByteWrite(unsigned long ulBase, unsigned long ulOffset,
  428. unsigned char ucData);
  429. extern unsigned short LPCHalfWordRead(unsigned long ulBase,
  430. unsigned long ulOffset);
  431. extern void LPCHalfWordWrite(unsigned long ulBase, unsigned long ulOffset,
  432. unsigned short usData);
  433. extern unsigned long LPCWordRead(unsigned long ulBase, unsigned long ulOffset);
  434. extern void LPCWordWrite(unsigned long ulBase, unsigned long ulOffset,
  435. unsigned long ulData);
  436. extern void LPCCOMxIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
  437. extern void LPCCOMxIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
  438. extern unsigned long LPCCOMxIntStatus(unsigned long ulBase, tBoolean bMasked);
  439. extern void LPCCOMxIntClear(unsigned long ulBase, unsigned long ulIntFlags);
  440. //*****************************************************************************
  441. //
  442. // Mark the end of the C bindings section for C++ compilers.
  443. //
  444. //*****************************************************************************
  445. #ifdef __cplusplus
  446. }
  447. #endif
  448. #endif // __LPC_H__