peci.h 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226
  1. //*****************************************************************************
  2. //
  3. // peci.h - Prototypes for Platform Environment Control Interface (PECI)
  4. // driver.
  5. //
  6. // Copyright (c) 2010-2011 Texas Instruments Incorporated. All rights reserved.
  7. // Software License Agreement
  8. //
  9. // Texas Instruments (TI) is supplying this software for use solely and
  10. // exclusively on TI's microcontroller products. The software is owned by
  11. // TI and/or its suppliers, and is protected under applicable copyright
  12. // laws. You may not combine this software with "viral" open-source
  13. // software in order to form a larger program.
  14. //
  15. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  16. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  17. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  18. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  19. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  20. // DAMAGES, FOR ANY REASON WHATSOEVER.
  21. //
  22. // This is part of revision 8264 of the Stellaris Peripheral Driver Library.
  23. //
  24. //*****************************************************************************
  25. #ifndef __PECI_H__
  26. #define __PECI_H__
  27. //*****************************************************************************
  28. //
  29. // If building with a C++ compiler, make all of the definitions in this header
  30. // have a C binding.
  31. //
  32. //*****************************************************************************
  33. #ifdef __cplusplus
  34. extern "C"
  35. {
  36. #endif
  37. //*****************************************************************************
  38. //
  39. // Values that can be passed to PECIConfigDomain, PECIEnableDomain,
  40. // PECIDisableDomain, PECIReadDomainValue, PECIReadDomainMax, and
  41. // PECIClearDomain as the ulDomain parameter.
  42. //
  43. //*****************************************************************************
  44. #define PECI_DOMAIN_M0D0 0 // Microprocessor 0 / Domain 0
  45. #define PECI_DOMAIN_M0D1 1 // Microprocessor 0 / Domain 1
  46. #define PECI_DOMAIN_M1D0 2 // Microprocessor 1 / Domain 0
  47. #define PECI_DOMAIN_M1D1 3 // Microprocessor 1 / Domain 1
  48. //*****************************************************************************
  49. //
  50. // Values that can be passed to PECIIntEnable, PECIIntDisable, and PECIIntClear
  51. // as the ulIntFlags parameter and returned by PECIIntStatus.
  52. //
  53. //*****************************************************************************
  54. #define PECI_READ 0x00000001 // End of PECI Poll
  55. #define PECI_ERR 0x00000002 // Error on PECI Poll
  56. #define PECI_AC 0x00000004 // Advanced Command Complete
  57. #define PECI_M0D0 0x00030000 // Microprocessor 0 / Domain 0
  58. #define PECI_M0D1 0x000C0000 // Microprocessor 0 / Domain 1
  59. #define PECI_M1D0 0x00300000 // Microprocessor 1 / Domain 0
  60. #define PECI_M1D1 0x00C00000 // Microprocessor 1 / Domain 1
  61. //*****************************************************************************
  62. //
  63. // Additional values that can be returned by PECIIntStatus.
  64. //
  65. //*****************************************************************************
  66. #define PECI_M0D0_MODE1_HIGH 0x00030000 // Microprocessor 0 / Domain 0
  67. // Mode 1
  68. // Temperature IS above HIGH
  69. #define PECI_M0D0_MODE2_MID 0x00020000 // Microprocessor 0 / Domain 0
  70. // Mode 2
  71. // Temperature CROSSED above LOW
  72. #define PECI_M0D0_MODE2_HIGH 0x00030000 // Microprocessor 0 / Domain 0
  73. // Mode 2
  74. // Temperature CROSSED above HIGH
  75. #define PECI_M0D0_MODE3_LOW 0x00010000 // Microprocessor 0 / Domain 0
  76. // Mode 3
  77. // Temperature CROSSED below LOW
  78. #define PECI_M0D0_MODE3_MID 0x00020000 // Microprocessor 0 / Domain 0
  79. // Mode 3
  80. // Temperature CROSSED above LOW or
  81. // Temperature CROSSED below HIGH
  82. #define PECI_M0D0_MODE3_HIGH 0x00030000 // Microprocessor 0 / Domain 0
  83. // Mode 3
  84. // Temperature CROSSED above HIGH
  85. #define PECI_M0D1_MODE1_HIGH 0x00030000 // Microprocessor 0 / Domain 1
  86. // Mode 1
  87. // Temperature IS above HIGH
  88. #define PECI_M0D1_MODE2_MID 0x00020000 // Microprocessor 0 / Domain 1
  89. // Mode 2
  90. // Temperature CROSSED above LOW
  91. #define PECI_M0D1_MODE2_HIGH 0x00030000 // Microprocessor 0 / Domain 1
  92. // Mode 2
  93. // Temperature CROSSED above HIGH
  94. #define PECI_M0D1_MODE3_LOW 0x00010000 // Microprocessor 0 / Domain 1
  95. // Mode 3
  96. // Temperature CROSSED below LOW
  97. #define PECI_M0D1_MODE3_MID 0x00020000 // Microprocessor 0 / Domain 1
  98. // Mode 3
  99. // Temperature CROSSED above LOW or
  100. // Temperature CROSSED below HIGH
  101. #define PECI_M0D1_MODE3_HIGH 0x00030000 // Microprocessor 0 / Domain 1
  102. // Mode 3
  103. // Temperature CROSSED above HIGH
  104. #define PECI_M1D0_MODE1_HIGH 0x00030000 // Microprocessor 1 / Domain 0
  105. // Mode 1
  106. // Temperature IS above HIGH
  107. #define PECI_M1D0_MODE2_MID 0x00020000 // Microprocessor 1 / Domain 0
  108. // Mode 2
  109. // Temperature CROSSED above LOW
  110. #define PECI_M1D0_MODE2_HIGH 0x00030000 // Microprocessor 1 / Domain 0
  111. // Mode 2
  112. // Temperature CROSSED above HIGH
  113. #define PECI_M1D0_MODE3_LOW 0x00010000 // Microprocessor 1 / Domain 0
  114. // Mode 3
  115. // Temperature CROSSED below LOW
  116. #define PECI_M1D0_MODE3_MID 0x00020000 // Microprocessor 1 / Domain 0
  117. // Mode 3
  118. // Temperature CROSSED above LOW or
  119. // Temperature CROSSED below HIGH
  120. #define PECI_M1D0_MODE3_HIGH 0x00030000 // Microprocessor 1 / Domain 0
  121. // Mode 3
  122. // Temperature CROSSED above HIGH
  123. #define PECI_M1D1_MODE1_HIGH 0x00030000 // Microprocessor 1 / Domain 1
  124. // Mode 1
  125. // Temperature IS above HIGH
  126. #define PECI_M1D1_MODE2_MID 0x00020000 // Microprocessor 1 / Domain 1
  127. // Mode 2
  128. // Temperature CROSSED above LOW
  129. #define PECI_M1D1_MODE2_HIGH 0x00030000 // Microprocessor 1 / Domain 1
  130. // Mode 2
  131. // Temperature CROSSED above HIGH
  132. #define PECI_M1D1_MODE3_LOW 0x00010000 // Microprocessor 1 / Domain 1
  133. // Mode 3
  134. // Temperature CROSSED below LOW
  135. #define PECI_M1D1_MODE3_MID 0x00020000 // Microprocessor 1 / Domain 1
  136. // Mode 3
  137. // Temperature CROSSED above LOW or
  138. // Temperature CROSSED below HIGH
  139. #define PECI_M1D1_MODE3_HIGH 0x00030000 // Microprocessor 1 / Domain 1
  140. // Mode 3
  141. // Temperature CROSSED above HIGH
  142. //*****************************************************************************
  143. //
  144. // Values that can be passed to PECIIntEnable as the ulIntMode parameter.
  145. //
  146. //*****************************************************************************
  147. #define PECI_M0D0_MODE1 0x00010000 // Domain Interrupt Mode 1
  148. #define PECI_M0D0_MODE2 0x00020000 // Domain Interrupt Mode 2
  149. #define PECI_M0D0_MODE3 0x00030000 // Domain Interrupt Mode 3
  150. #define PECI_M0D1_MODE1 0x00040000 // Domain Interrupt Mode 1
  151. #define PECI_M0D1_MODE2 0x00080000 // Domain Interrupt Mode 2
  152. #define PECI_M0D1_MODE3 0x000C0000 // Domain Interrupt Mode 3
  153. #define PECI_M1D0_MODE1 0x00100000 // Domain Interrupt Mode 1
  154. #define PECI_M1D0_MODE2 0x00200000 // Domain Interrupt Mode 2
  155. #define PECI_M1D0_MODE3 0x00300000 // Domain Interrupt Mode 3
  156. #define PECI_M1D1_MODE1 0x00400000 // Domain Interrupt Mode 1
  157. #define PECI_M1D1_MODE2 0x00800000 // Domain Interrupt Mode 2
  158. #define PECI_M1D1_MODE3 0x00C00000 // Domain Interrupt Mode 3
  159. //*****************************************************************************
  160. //
  161. // Prototypes for the APIs.
  162. //
  163. //*****************************************************************************
  164. extern void PECIConfigSet(unsigned long ulBase, unsigned long ulPECIClk,
  165. unsigned long ulBaud, unsigned long ulPoll,
  166. unsigned long ulOffset, unsigned long ulRetry);
  167. extern void PECIConfigGet(unsigned long ulBase, unsigned long ulPECIClk,
  168. unsigned long *pulBaud, unsigned long *pulPoll,
  169. unsigned long *pulOffset, unsigned long *pulRetry);
  170. extern void PECIBypassEnable(unsigned long ulBase);
  171. extern void PECIBypassDisable(unsigned long ulBase);
  172. extern void PECIDomainConfigSet(unsigned long ulBase, unsigned long ulDomain,
  173. unsigned long ulHigh, unsigned long ulLow);
  174. extern void PECIDomainConfigGet(unsigned long ulBase, unsigned long ulDomain,
  175. unsigned long *pulHigh, unsigned long *pulLow);
  176. extern void PECIDomainEnable(unsigned long ulBase, unsigned long ulDomain);
  177. extern void PECIDomainDisable(unsigned long ulBase, unsigned long ulDomain);
  178. extern unsigned long PECIDomainValueGet(unsigned long ulBase,
  179. unsigned long ulDomain);
  180. extern unsigned long PECIDomainMaxReadGet(unsigned long ulBase,
  181. unsigned long ulDomain);
  182. extern void PECIDomainValueClear(unsigned long ulBase, unsigned long ulDomain);
  183. extern void PECIDomainMaxReadClear(unsigned long ulBase,
  184. unsigned long ulDomain);
  185. extern void PECIIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
  186. extern void PECIIntUnregister(unsigned long ulBase);
  187. extern void PECIIntEnable(unsigned long ulBase, unsigned long ulIntFlags,
  188. unsigned long ulIntMode);
  189. extern void PECIIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
  190. extern unsigned long PECIIntStatus(unsigned long ulBase, tBoolean bMasked);
  191. extern void PECIIntClear(unsigned long ulBase, unsigned long ulIntFlags);
  192. extern void PECIAdvCmdSend(unsigned long ulBase, unsigned char ucCmd,
  193. unsigned char ucHidRe, unsigned char ucDomain,
  194. unsigned char ucProcAdd, unsigned long ulArg,
  195. unsigned char ucSize, unsigned long ulData0,
  196. unsigned long ulData1);
  197. extern unsigned long PECIAdvCmdSendNonBlocking(unsigned long ulBase,
  198. unsigned char ucCmd,
  199. unsigned char ucHidRe,
  200. unsigned char ucDomain,
  201. unsigned char ucProcAdd,
  202. unsigned long ulArg,
  203. unsigned char ucSize,
  204. unsigned long ulData0,
  205. unsigned long ulData1);
  206. extern unsigned long PECIAdvCmdStatusGet(unsigned long ulBase,
  207. unsigned long *pulData0,
  208. unsigned long *pulData1);
  209. //*****************************************************************************
  210. //
  211. // Mark the end of the C bindings section for C++ compilers.
  212. //
  213. //*****************************************************************************
  214. #ifdef __cplusplus
  215. }
  216. #endif
  217. #endif // __PECI_H__