start_gcc.c 16 KB

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  1. //*****************************************************************************
  2. //
  3. // startup_gcc.c - Startup code for use with GNU tools.
  4. //
  5. // Copyright (c) 2011 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Texas Instruments (TI) is supplying this software for use solely and
  9. // exclusively on TI's microcontroller products. The software is owned by
  10. // TI and/or its suppliers, and is protected under applicable copyright
  11. // laws. You may not combine this software with "viral" open-source
  12. // software in order to form a larger program.
  13. //
  14. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  15. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  16. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  18. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  19. // DAMAGES, FOR ANY REASON WHATSOEVER.
  20. //
  21. // This is part of revision 8264 of the EK-LM4F232 Firmware Package.
  22. //
  23. //*****************************************************************************
  24. #include "inc/hw_nvic.h"
  25. #include "inc/hw_types.h"
  26. //*****************************************************************************
  27. //
  28. // Forward declaration of the default fault handlers.
  29. //
  30. //*****************************************************************************
  31. void Reset_Handler(void);
  32. static void NmiSR(void);
  33. static void FaultISR(void);
  34. static void IntDefaultHandler(void);
  35. //*****************************************************************************
  36. //
  37. // External declaration for the interrupt handler used by the application.
  38. //
  39. //*****************************************************************************
  40. /* RT-Thread interface */
  41. static void HardFault_Handler(void);
  42. static void PendSV_Handler(void);
  43. static void rt_hw_timer_handler(void);
  44. static void rt_hw_uart_isr_1(void);
  45. //*****************************************************************************
  46. //
  47. // The entry point for the application.
  48. //
  49. //*****************************************************************************
  50. extern int main(void);
  51. //*****************************************************************************
  52. //
  53. // Reserve space for the system stack.
  54. //
  55. //*****************************************************************************
  56. static unsigned long pulStack[256];
  57. //*****************************************************************************
  58. //
  59. // The vector table. Note that the proper constructs must be placed on this to
  60. // ensure that it ends up at physical address 0x0000.0000.
  61. //
  62. //*****************************************************************************
  63. __attribute__ ((section(".isr_vector")))
  64. void (* const g_pfnVectors[])(void) =
  65. {
  66. (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)),
  67. // The initial stack pointer
  68. Reset_Handler, // The reset handler
  69. NmiSR, // The NMI handler
  70. HardFault_Handler, // The hard fault handler
  71. IntDefaultHandler, // The MPU fault handler
  72. IntDefaultHandler, // The bus fault handler
  73. IntDefaultHandler, // The usage fault handler
  74. 0, // Reserved
  75. 0, // Reserved
  76. 0, // Reserved
  77. 0, // Reserved
  78. IntDefaultHandler, // SVCall handler
  79. IntDefaultHandler, // Debug monitor handler
  80. 0, // Reserved
  81. PendSV_Handler, // The PendSV handler
  82. rt_hw_timer_handler, // The SysTick handler
  83. IntDefaultHandler, // GPIO Port A
  84. IntDefaultHandler, // GPIO Port B
  85. IntDefaultHandler, // GPIO Port C
  86. IntDefaultHandler, // GPIO Port D
  87. IntDefaultHandler, // GPIO Port E
  88. rt_hw_uart_isr_1, // UART0 Rx and Tx
  89. IntDefaultHandler, // UART1 Rx and Tx
  90. IntDefaultHandler, // SSI0 Rx and Tx
  91. IntDefaultHandler, // I2C0 Master and Slave
  92. IntDefaultHandler, // PWM Fault
  93. IntDefaultHandler, // PWM Generator 0
  94. IntDefaultHandler, // PWM Generator 1
  95. IntDefaultHandler, // PWM Generator 2
  96. IntDefaultHandler, // Quadrature Encoder 0
  97. IntDefaultHandler, // ADC Sequence 0
  98. IntDefaultHandler, // ADC Sequence 1
  99. IntDefaultHandler, // ADC Sequence 2
  100. IntDefaultHandler, // ADC Sequence 3
  101. IntDefaultHandler, // Watchdog timer
  102. IntDefaultHandler, // Timer 0 subtimer A
  103. IntDefaultHandler, // Timer 0 subtimer B
  104. IntDefaultHandler, // Timer 1 subtimer A
  105. IntDefaultHandler, // Timer 1 subtimer B
  106. IntDefaultHandler, // Timer 2 subtimer A
  107. IntDefaultHandler, // Timer 2 subtimer B
  108. IntDefaultHandler, // Analog Comparator 0
  109. IntDefaultHandler, // Analog Comparator 1
  110. IntDefaultHandler, // Analog Comparator 2
  111. IntDefaultHandler, // System Control (PLL, OSC, BO)
  112. IntDefaultHandler, // FLASH Control
  113. IntDefaultHandler, // GPIO Port F
  114. IntDefaultHandler, // GPIO Port G
  115. IntDefaultHandler, // GPIO Port H
  116. IntDefaultHandler, // UART2 Rx and Tx
  117. IntDefaultHandler, // SSI1 Rx and Tx
  118. IntDefaultHandler, // Timer 3 subtimer A
  119. IntDefaultHandler, // Timer 3 subtimer B
  120. IntDefaultHandler, // I2C1 Master and Slave
  121. IntDefaultHandler, // Quadrature Encoder 1
  122. IntDefaultHandler, // CAN0
  123. IntDefaultHandler, // CAN1
  124. IntDefaultHandler, // CAN2
  125. IntDefaultHandler, // Ethernet
  126. IntDefaultHandler, // Hibernate
  127. IntDefaultHandler, // USB0
  128. IntDefaultHandler, // PWM Generator 3
  129. IntDefaultHandler, // uDMA Software Transfer
  130. IntDefaultHandler, // uDMA Error
  131. IntDefaultHandler, // ADC1 Sequence 0
  132. IntDefaultHandler, // ADC1 Sequence 1
  133. IntDefaultHandler, // ADC1 Sequence 2
  134. IntDefaultHandler, // ADC1 Sequence 3
  135. IntDefaultHandler, // I2S0
  136. IntDefaultHandler, // External Bus Interface 0
  137. IntDefaultHandler, // GPIO Port J
  138. IntDefaultHandler, // GPIO Port K
  139. IntDefaultHandler, // GPIO Port L
  140. IntDefaultHandler, // SSI2 Rx and Tx
  141. IntDefaultHandler, // SSI3 Rx and Tx
  142. IntDefaultHandler, // UART3 Rx and Tx
  143. IntDefaultHandler, // UART4 Rx and Tx
  144. IntDefaultHandler, // UART5 Rx and Tx
  145. IntDefaultHandler, // UART6 Rx and Tx
  146. IntDefaultHandler, // UART7 Rx and Tx
  147. 0, // Reserved
  148. 0, // Reserved
  149. 0, // Reserved
  150. 0, // Reserved
  151. IntDefaultHandler, // I2C2 Master and Slave
  152. IntDefaultHandler, // I2C3 Master and Slave
  153. IntDefaultHandler, // Timer 4 subtimer A
  154. IntDefaultHandler, // Timer 4 subtimer B
  155. 0, // Reserved
  156. 0, // Reserved
  157. 0, // Reserved
  158. 0, // Reserved
  159. 0, // Reserved
  160. 0, // Reserved
  161. 0, // Reserved
  162. 0, // Reserved
  163. 0, // Reserved
  164. 0, // Reserved
  165. 0, // Reserved
  166. 0, // Reserved
  167. 0, // Reserved
  168. 0, // Reserved
  169. 0, // Reserved
  170. 0, // Reserved
  171. 0, // Reserved
  172. 0, // Reserved
  173. 0, // Reserved
  174. 0, // Reserved
  175. IntDefaultHandler, // Timer 5 subtimer A
  176. IntDefaultHandler, // Timer 5 subtimer B
  177. IntDefaultHandler, // Wide Timer 0 subtimer A
  178. IntDefaultHandler, // Wide Timer 0 subtimer B
  179. IntDefaultHandler, // Wide Timer 1 subtimer A
  180. IntDefaultHandler, // Wide Timer 1 subtimer B
  181. IntDefaultHandler, // Wide Timer 2 subtimer A
  182. IntDefaultHandler, // Wide Timer 2 subtimer B
  183. IntDefaultHandler, // Wide Timer 3 subtimer A
  184. IntDefaultHandler, // Wide Timer 3 subtimer B
  185. IntDefaultHandler, // Wide Timer 4 subtimer A
  186. IntDefaultHandler, // Wide Timer 4 subtimer B
  187. IntDefaultHandler, // Wide Timer 5 subtimer A
  188. IntDefaultHandler, // Wide Timer 5 subtimer B
  189. IntDefaultHandler, // FPU
  190. IntDefaultHandler, // PECI 0
  191. IntDefaultHandler, // LPC 0
  192. IntDefaultHandler, // I2C4 Master and Slave
  193. IntDefaultHandler, // I2C5 Master and Slave
  194. IntDefaultHandler, // GPIO Port M
  195. IntDefaultHandler, // GPIO Port N
  196. IntDefaultHandler, // Quadrature Encoder 2
  197. IntDefaultHandler, // Fan 0
  198. 0, // Reserved
  199. IntDefaultHandler, // GPIO Port P (Summary or P0)
  200. IntDefaultHandler, // GPIO Port P1
  201. IntDefaultHandler, // GPIO Port P2
  202. IntDefaultHandler, // GPIO Port P3
  203. IntDefaultHandler, // GPIO Port P4
  204. IntDefaultHandler, // GPIO Port P5
  205. IntDefaultHandler, // GPIO Port P6
  206. IntDefaultHandler, // GPIO Port P7
  207. IntDefaultHandler, // GPIO Port Q (Summary or Q0)
  208. IntDefaultHandler, // GPIO Port Q1
  209. IntDefaultHandler, // GPIO Port Q2
  210. IntDefaultHandler, // GPIO Port Q3
  211. IntDefaultHandler, // GPIO Port Q4
  212. IntDefaultHandler, // GPIO Port Q5
  213. IntDefaultHandler, // GPIO Port Q6
  214. IntDefaultHandler, // GPIO Port Q7
  215. IntDefaultHandler, // GPIO Port R
  216. IntDefaultHandler, // GPIO Port S
  217. IntDefaultHandler, // PWM 1 Generator 0
  218. IntDefaultHandler, // PWM 1 Generator 1
  219. IntDefaultHandler, // PWM 1 Generator 2
  220. IntDefaultHandler, // PWM 1 Generator 3
  221. IntDefaultHandler // PWM 1 Fault
  222. };
  223. //*****************************************************************************
  224. //
  225. // The following are constructs created by the linker, indicating where the
  226. // the "data" and "bss" segments reside in memory. The initializers for the
  227. // for the "data" segment resides immediately following the "text" segment.
  228. //
  229. //*****************************************************************************
  230. extern unsigned long _sidata;
  231. extern unsigned long _sdata;
  232. extern unsigned long _edata;
  233. extern unsigned long _sbss;
  234. extern unsigned long _ebss;
  235. //*****************************************************************************
  236. //
  237. // This is the code that gets called when the processor first starts execution
  238. // following a reset event. Only the absolutely necessary set is performed,
  239. // after which the application supplied entry() routine is called. Any fancy
  240. // actions (such as making decisions based on the reset cause register, and
  241. // resetting the bits in that register) are left solely in the hands of the
  242. // application.
  243. //
  244. //*****************************************************************************
  245. void
  246. Reset_Handler(void)
  247. {
  248. unsigned long *pulSrc, *pulDest;
  249. //
  250. // Copy the data segment initializers from flash to SRAM.
  251. //
  252. pulSrc = &_sidata;
  253. for(pulDest = &_sdata; pulDest < &_edata; )
  254. {
  255. *pulDest++ = *pulSrc++;
  256. }
  257. //
  258. // Zero fill the bss segment.
  259. //
  260. __asm(" ldr r0, =_sbss\n"
  261. " ldr r1, =_ebss\n"
  262. " mov r2, #0\n"
  263. " .thumb_func\n"
  264. "zero_loop:\n"
  265. " cmp r0, r1\n"
  266. " it lt\n"
  267. " strlt r2, [r0], #4\n"
  268. " blt zero_loop");
  269. //
  270. // Enable the floating-point unit. This must be done here to handle the
  271. // case where main() uses floating-point and the function prologue saves
  272. // floating-point registers (which will fault if floating-point is not
  273. // enabled). Any configuration of the floating-point unit using DriverLib
  274. // APIs must be done here prior to the floating-point unit being enabled.
  275. //
  276. // Note that this does not use DriverLib since it might not be included in
  277. // this project.
  278. //
  279. HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
  280. ~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
  281. NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL);
  282. //
  283. // Call the application's entry point.
  284. //
  285. main();
  286. }
  287. //*****************************************************************************
  288. //
  289. // This is the code that gets called when the processor receives a NMI. This
  290. // simply enters an infinite loop, preserving the system state for examination
  291. // by a debugger.
  292. //
  293. //*****************************************************************************
  294. static void
  295. NmiSR(void)
  296. {
  297. //
  298. // Enter an infinite loop.
  299. //
  300. while(1)
  301. {
  302. }
  303. }
  304. //*****************************************************************************
  305. //
  306. // This is the code that gets called when the processor receives a fault
  307. // interrupt. This simply enters an infinite loop, preserving the system state
  308. // for examination by a debugger.
  309. //
  310. //*****************************************************************************
  311. static void
  312. FaultISR(void)
  313. {
  314. //
  315. // Enter an infinite loop.
  316. //
  317. while(1)
  318. {
  319. }
  320. }
  321. //*****************************************************************************
  322. //
  323. // This is the code that gets called when the processor receives an unexpected
  324. // interrupt. This simply enters an infinite loop, preserving the system state
  325. // for examination by a debugger.
  326. //
  327. //*****************************************************************************
  328. static void
  329. IntDefaultHandler(void)
  330. {
  331. //
  332. // Go into an infinite loop.
  333. //
  334. while(1)
  335. {
  336. }
  337. }