rtconfig.py 3.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127
  1. import os
  2. # toolchains options
  3. ARCH='arm'
  4. CPU='cortex-m0'
  5. CROSS_TOOL='keil'
  6. if os.getenv('RTT_CC'):
  7. CROSS_TOOL = os.getenv('RTT_CC')
  8. # cross_tool provides the cross compiler
  9. # EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
  10. if CROSS_TOOL == 'gcc':
  11. PLATFORM = 'gcc'
  12. EXEC_PATH = 'C:/Program Files/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin'
  13. elif CROSS_TOOL == 'keil':
  14. PLATFORM = 'armcc'
  15. EXEC_PATH = 'C:/Keil'
  16. elif CROSS_TOOL == 'iar':
  17. print('================ERROR============================')
  18. print('Not support iar yet!')
  19. print('=================================================')
  20. exit(0)
  21. if os.getenv('RTT_EXEC_PATH'):
  22. EXEC_PATH = os.getenv('RTT_EXEC_PATH')
  23. #BUILD = 'debug'
  24. BUILD = 'release'
  25. STM32_TYPE = 'STM32F0XX'
  26. if PLATFORM == 'gcc':
  27. # toolchains
  28. PREFIX = 'arm-none-eabi-'
  29. CC = PREFIX + 'gcc'
  30. AS = PREFIX + 'gcc'
  31. AR = PREFIX + 'ar'
  32. LINK = PREFIX + 'gcc'
  33. TARGET_EXT = 'elf'
  34. SIZE = PREFIX + 'size'
  35. OBJDUMP = PREFIX + 'objdump'
  36. OBJCPY = PREFIX + 'objcopy'
  37. DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
  38. CFLAGS = DEVICE
  39. AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
  40. LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T stm32_rom.ld'
  41. CPATH = ''
  42. LPATH = ''
  43. if BUILD == 'debug':
  44. CFLAGS += ' -O0 -gdwarf-2'
  45. AFLAGS += ' -gdwarf-2'
  46. else:
  47. CFLAGS += ' -O2'
  48. POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
  49. elif PLATFORM == 'armcc':
  50. # toolchains
  51. CC = 'armcc'
  52. AS = 'armasm'
  53. AR = 'armar'
  54. LINK = 'armlink'
  55. TARGET_EXT = 'axf'
  56. DEVICE = ' --device DARMSTM'
  57. CFLAGS = DEVICE + ' --apcs=interwork'
  58. AFLAGS = DEVICE
  59. LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct'
  60. CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
  61. LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
  62. EXEC_PATH += '/arm/bin40/'
  63. if BUILD == 'debug':
  64. CFLAGS += ' -g -O0'
  65. AFLAGS += ' -g'
  66. else:
  67. CFLAGS += ' -O2'
  68. POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
  69. elif PLATFORM == 'iar':
  70. # toolchains
  71. CC = 'iccarm'
  72. AS = 'iasmarm'
  73. AR = 'iarchive'
  74. LINK = 'ilinkarm'
  75. TARGET_EXT = 'out'
  76. DEVICE = ' -D USE_STDPERIPH_DRIVER' + ' -D STM32F10X_HD'
  77. CFLAGS = DEVICE
  78. CFLAGS += ' --diag_suppress Pa050'
  79. CFLAGS += ' --no_cse'
  80. CFLAGS += ' --no_unroll'
  81. CFLAGS += ' --no_inline'
  82. CFLAGS += ' --no_code_motion'
  83. CFLAGS += ' --no_tbaa'
  84. CFLAGS += ' --no_clustering'
  85. CFLAGS += ' --no_scheduling'
  86. CFLAGS += ' --debug'
  87. CFLAGS += ' --endian=little'
  88. CFLAGS += ' --cpu=Cortex-M0'
  89. CFLAGS += ' -e'
  90. CFLAGS += ' --fpu=None'
  91. CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
  92. CFLAGS += ' -Ol'
  93. CFLAGS += ' --use_c++_inline'
  94. AFLAGS = ''
  95. AFLAGS += ' -s+'
  96. AFLAGS += ' -w+'
  97. AFLAGS += ' -r'
  98. AFLAGS += ' --cpu Cortex-M0'
  99. AFLAGS += ' --fpu None'
  100. LFLAGS = ' --config stm32f0xx_flash.icf'
  101. LFLAGS += ' --redirect _Printf=_PrintfTiny'
  102. LFLAGS += ' --redirect _Scanf=_ScanfSmall'
  103. LFLAGS += ' --entry __iar_program_start'
  104. EXEC_PATH = EXEC_PATH + '/arm/bin/'
  105. POST_ACTION = ''