stm32f1xx_hal_i2c.c 167 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_i2c.c
  4. * @author MCD Application Team
  5. * @version V1.1.1
  6. * @date 12-May-2017
  7. * @brief I2C HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the Inter Integrated Circuit (I2C) peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral State, Mode and Error functions
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### How to use this driver #####
  17. ==============================================================================
  18. [..]
  19. The I2C HAL driver can be used as follows:
  20. (#) Declare a I2C_HandleTypeDef handle structure, for example:
  21. I2C_HandleTypeDef hi2c;
  22. (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
  23. (##) Enable the I2Cx interface clock
  24. (##) I2C pins configuration
  25. (+++) Enable the clock for the I2C GPIOs
  26. (+++) Configure I2C pins as alternate function open-drain
  27. (##) NVIC configuration if you need to use interrupt process
  28. (+++) Configure the I2Cx interrupt priority
  29. (+++) Enable the NVIC I2C IRQ Channel
  30. (##) DMA Configuration if you need to use DMA process
  31. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
  32. (+++) Enable the DMAx interface clock using
  33. (+++) Configure the DMA handle parameters
  34. (+++) Configure the DMA Tx or Rx channel
  35. (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
  36. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
  37. the DMA Tx or Rx channel
  38. (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
  39. Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
  40. (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
  41. (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
  42. (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
  43. (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
  44. *** Polling mode IO operation ***
  45. =================================
  46. [..]
  47. (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
  48. (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
  49. (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
  50. (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
  51. *** Polling mode IO MEM operation ***
  52. =====================================
  53. [..]
  54. (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
  55. (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
  56. *** Interrupt mode IO operation ***
  57. ===================================
  58. [..]
  59. (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
  60. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  61. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  62. (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
  63. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  64. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  65. (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
  66. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  67. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  68. (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
  69. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  70. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  71. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  72. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  73. (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  74. (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  75. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  76. *** Interrupt mode IO sequential operation ***
  77. ==============================================
  78. [..]
  79. (@) These interfaces allow to manage a sequential transfer with a repeated start condition
  80. when a direction change during transfer
  81. [..]
  82. (+) A specific option field manage the different steps of a sequential transfer
  83. (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
  84. (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
  85. (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
  86. and data to transfer without a final stop condition
  87. (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
  88. and with new data to transfer if the direction change or manage only the new data to transfer
  89. if no direction change and without a final stop condition in both cases
  90. (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
  91. and with new data to transfer if the direction change or manage only the new data to transfer
  92. if no direction change and with a final stop condition in both cases
  93. (+) Differents sequential I2C interfaces are listed below:
  94. (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
  95. (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
  96. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
  97. (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
  98. (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
  99. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
  100. (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  101. (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  102. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  103. (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
  104. (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
  105. add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
  106. (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
  107. add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
  108. (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
  109. (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
  110. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
  111. (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
  112. (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
  113. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
  114. (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  115. add his own code by customization of function pointer HAL_I2C_ErrorCallback()
  116. *** Interrupt mode IO MEM operation ***
  117. =======================================
  118. [..]
  119. (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
  120. HAL_I2C_Mem_Write_IT()
  121. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  122. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  123. (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
  124. HAL_I2C_Mem_Read_IT()
  125. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  126. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  127. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  128. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  129. *** DMA mode IO operation ***
  130. ==============================
  131. [..]
  132. (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
  133. HAL_I2C_Master_Transmit_DMA()
  134. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  135. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  136. (+) Receive in master mode an amount of data in non blocking mode (DMA) using
  137. HAL_I2C_Master_Receive_DMA()
  138. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  139. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  140. (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
  141. HAL_I2C_Slave_Transmit_DMA()
  142. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  143. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  144. (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
  145. HAL_I2C_Slave_Receive_DMA()
  146. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  147. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  148. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  149. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  150. (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  151. (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  152. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  153. *** DMA mode IO MEM operation ***
  154. =================================
  155. [..]
  156. (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
  157. HAL_I2C_Mem_Write_DMA()
  158. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  159. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  160. (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
  161. HAL_I2C_Mem_Read_DMA()
  162. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  163. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  164. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  165. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  166. *** I2C HAL driver macros list ***
  167. ==================================
  168. [..]
  169. Below the list of most used macros in I2C HAL driver.
  170. (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
  171. (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
  172. (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
  173. (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
  174. (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
  175. (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
  176. [..]
  177. (@) You can refer to the I2C HAL driver header file for more useful macros
  178. *** I2C Workarounds linked to Silicon Limitation ***
  179. ====================================================
  180. [..]
  181. Below the list of all silicon limitations implemented for HAL on STM32F1xx product.
  182. (@) See ErrataSheet to know full silicon limitation list of your product.
  183. (#) Workarounds Implemented inside I2C HAL Driver
  184. (##) Wrong data read into data register (Polling and Interrupt mode)
  185. (##) Start cannot be generated after a misplaced Stop
  186. (##) Some software events must be managed before the current byte is being transferred:
  187. Workaround: Use DMA in general, except when the Master is receiving a single byte.
  188. For Interupt mode, I2C should have the highest priority in the application.
  189. (##) Mismatch on the "Setup time for a repeated Start condition" timing parameter:
  190. Workaround: Reduce the frequency down to 88 kHz or use the I2C Fast-mode if
  191. supported by the slave.
  192. (##) Data valid time (tVD;DAT) violated without the OVR flag being set:
  193. Workaround: If the slave device allows it, use the clock stretching mechanism
  194. by programming NoStretchMode = I2C_NOSTRETCH_DISABLE in HAL_I2C_Init.
  195. @endverbatim
  196. ******************************************************************************
  197. * @attention
  198. *
  199. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  200. *
  201. * Redistribution and use in source and binary forms, with or without modification,
  202. * are permitted provided that the following conditions are met:
  203. * 1. Redistributions of source code must retain the above copyright notice,
  204. * this list of conditions and the following disclaimer.
  205. * 2. Redistributions in binary form must reproduce the above copyright notice,
  206. * this list of conditions and the following disclaimer in the documentation
  207. * and/or other materials provided with the distribution.
  208. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  209. * may be used to endorse or promote products derived from this software
  210. * without specific prior written permission.
  211. *
  212. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  213. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  214. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  215. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  216. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  217. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  218. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  219. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  220. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  221. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  222. *
  223. ******************************************************************************
  224. */
  225. /* Includes ------------------------------------------------------------------*/
  226. #include "stm32f1xx_hal.h"
  227. /** @addtogroup STM32F1xx_HAL_Driver
  228. * @{
  229. */
  230. /** @defgroup I2C I2C
  231. * @brief I2C HAL module driver
  232. * @{
  233. */
  234. #ifdef HAL_I2C_MODULE_ENABLED
  235. /* Private typedef -----------------------------------------------------------*/
  236. /* Private define ------------------------------------------------------------*/
  237. /** @addtogroup I2C_Private_Define
  238. * @{
  239. */
  240. #define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
  241. #define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
  242. #define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
  243. /* Private define for @ref PreviousState usage */
  244. #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */
  245. #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
  246. #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
  247. #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
  248. #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
  249. #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
  250. /**
  251. * @}
  252. */
  253. /* Private macro -------------------------------------------------------------*/
  254. /* Private variables ---------------------------------------------------------*/
  255. /* Private function prototypes -----------------------------------------------*/
  256. /** @addtogroup I2C_Private_Functions
  257. * @{
  258. */
  259. /* Private functions to handle DMA transfer */
  260. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
  261. static void I2C_DMAError(DMA_HandleTypeDef *hdma);
  262. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
  263. static void I2C_ITError(I2C_HandleTypeDef *hi2c);
  264. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  265. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  266. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  267. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  268. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
  269. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
  270. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  271. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  272. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  273. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  274. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
  275. /* Private functions for I2C transfer IRQ handler */
  276. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
  277. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
  278. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
  279. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
  280. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
  281. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
  282. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
  283. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
  284. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
  285. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
  286. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
  287. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
  288. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
  289. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
  290. /**
  291. * @}
  292. */
  293. /* Exported functions --------------------------------------------------------*/
  294. /** @defgroup I2C_Exported_Functions I2C Exported Functions
  295. * @{
  296. */
  297. /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  298. * @brief Initialization and Configuration functions
  299. *
  300. @verbatim
  301. ===============================================================================
  302. ##### Initialization and de-initialization functions #####
  303. ===============================================================================
  304. [..] This subsection provides a set of functions allowing to initialize and
  305. de-initialize the I2Cx peripheral:
  306. (+) User must Implement HAL_I2C_MspInit() function in which he configures
  307. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
  308. (+) Call the function HAL_I2C_Init() to configure the selected device with
  309. the selected configuration:
  310. (++) Communication Speed
  311. (++) Duty cycle
  312. (++) Addressing mode
  313. (++) Own Address 1
  314. (++) Dual Addressing mode
  315. (++) Own Address 2
  316. (++) General call mode
  317. (++) Nostretch mode
  318. (+) Call the function HAL_I2C_DeInit() to restore the default configuration
  319. of the selected I2Cx peripheral.
  320. @endverbatim
  321. * @{
  322. */
  323. /**
  324. * @brief Initializes the I2C according to the specified parameters
  325. * in the I2C_InitTypeDef and create the associated handle.
  326. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  327. * the configuration information for I2C module
  328. * @retval HAL status
  329. */
  330. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
  331. {
  332. uint32_t freqrange = 0U;
  333. uint32_t pclk1 = 0U;
  334. /* Check the I2C handle allocation */
  335. if(hi2c == NULL)
  336. {
  337. return HAL_ERROR;
  338. }
  339. /* Check the parameters */
  340. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  341. assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
  342. assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
  343. assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
  344. assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
  345. assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
  346. assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
  347. assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
  348. assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
  349. if(hi2c->State == HAL_I2C_STATE_RESET)
  350. {
  351. /* Allocate lock resource and initialize it */
  352. hi2c->Lock = HAL_UNLOCKED;
  353. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  354. HAL_I2C_MspInit(hi2c);
  355. }
  356. hi2c->State = HAL_I2C_STATE_BUSY;
  357. /* Disable the selected I2C peripheral */
  358. __HAL_I2C_DISABLE(hi2c);
  359. /* Get PCLK1 frequency */
  360. pclk1 = HAL_RCC_GetPCLK1Freq();
  361. /* Calculate frequency range */
  362. freqrange = I2C_FREQRANGE(pclk1);
  363. /*---------------------------- I2Cx CR2 Configuration ----------------------*/
  364. /* Configure I2Cx: Frequency range */
  365. hi2c->Instance->CR2 = freqrange;
  366. /*---------------------------- I2Cx TRISE Configuration --------------------*/
  367. /* Configure I2Cx: Rise Time */
  368. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  369. /*---------------------------- I2Cx CCR Configuration ----------------------*/
  370. /* Configure I2Cx: Speed */
  371. hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
  372. /*---------------------------- I2Cx CR1 Configuration ----------------------*/
  373. /* Configure I2Cx: Generalcall and NoStretch mode */
  374. hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
  375. /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
  376. /* Configure I2Cx: Own Address1 and addressing mode */
  377. hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
  378. /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
  379. /* Configure I2Cx: Dual mode and Own Address2 */
  380. hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
  381. /* Enable the selected I2C peripheral */
  382. __HAL_I2C_ENABLE(hi2c);
  383. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  384. hi2c->State = HAL_I2C_STATE_READY;
  385. hi2c->PreviousState = I2C_STATE_NONE;
  386. hi2c->Mode = HAL_I2C_MODE_NONE;
  387. return HAL_OK;
  388. }
  389. /**
  390. * @brief DeInitializes the I2C peripheral.
  391. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  392. * the configuration information for I2C module
  393. * @retval HAL status
  394. */
  395. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
  396. {
  397. /* Check the I2C handle allocation */
  398. if(hi2c == NULL)
  399. {
  400. return HAL_ERROR;
  401. }
  402. /* Check the parameters */
  403. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  404. hi2c->State = HAL_I2C_STATE_BUSY;
  405. /* Disable the I2C Peripheral Clock */
  406. __HAL_I2C_DISABLE(hi2c);
  407. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  408. HAL_I2C_MspDeInit(hi2c);
  409. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  410. hi2c->State = HAL_I2C_STATE_RESET;
  411. hi2c->PreviousState = I2C_STATE_NONE;
  412. hi2c->Mode = HAL_I2C_MODE_NONE;
  413. /* Release Lock */
  414. __HAL_UNLOCK(hi2c);
  415. return HAL_OK;
  416. }
  417. /**
  418. * @brief I2C MSP Init.
  419. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  420. * the configuration information for I2C module
  421. * @retval None
  422. */
  423. __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
  424. {
  425. /* Prevent unused argument(s) compilation warning */
  426. UNUSED(hi2c);
  427. /* NOTE : This function Should not be modified, when the callback is needed,
  428. the HAL_I2C_MspInit could be implemented in the user file
  429. */
  430. }
  431. /**
  432. * @brief I2C MSP DeInit
  433. * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
  434. * the configuration information for I2C module
  435. * @retval None
  436. */
  437. __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
  438. {
  439. /* Prevent unused argument(s) compilation warning */
  440. UNUSED(hi2c);
  441. /* NOTE : This function Should not be modified, when the callback is needed,
  442. the HAL_I2C_MspDeInit could be implemented in the user file
  443. */
  444. }
  445. /**
  446. * @}
  447. */
  448. /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
  449. * @brief Data transfers functions
  450. *
  451. @verbatim
  452. ===============================================================================
  453. ##### IO operation functions #####
  454. ===============================================================================
  455. [..]
  456. This subsection provides a set of functions allowing to manage the I2C data
  457. transfers.
  458. (#) There are two modes of transfer:
  459. (++) Blocking mode : The communication is performed in the polling mode.
  460. The status of all data processing is returned by the same function
  461. after finishing transfer.
  462. (++) No-Blocking mode : The communication is performed using Interrupts
  463. or DMA. These functions return the status of the transfer startup.
  464. The end of the data processing will be indicated through the
  465. dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
  466. using DMA mode.
  467. (#) Blocking mode functions are :
  468. (++) HAL_I2C_Master_Transmit()
  469. (++) HAL_I2C_Master_Receive()
  470. (++) HAL_I2C_Slave_Transmit()
  471. (++) HAL_I2C_Slave_Receive()
  472. (++) HAL_I2C_Mem_Write()
  473. (++) HAL_I2C_Mem_Read()
  474. (++) HAL_I2C_IsDeviceReady()
  475. (#) No-Blocking mode functions with Interrupt are :
  476. (++) HAL_I2C_Master_Transmit_IT()
  477. (++) HAL_I2C_Master_Receive_IT()
  478. (++) HAL_I2C_Slave_Transmit_IT()
  479. (++) HAL_I2C_Slave_Receive_IT()
  480. (++) HAL_I2C_Master_Sequential_Transmit_IT()
  481. (++) HAL_I2C_Master_Sequential_Receive_IT()
  482. (++) HAL_I2C_Slave_Sequential_Transmit_IT()
  483. (++) HAL_I2C_Slave_Sequential_Receive_IT()
  484. (++) HAL_I2C_Mem_Write_IT()
  485. (++) HAL_I2C_Mem_Read_IT()
  486. (#) No-Blocking mode functions with DMA are :
  487. (++) HAL_I2C_Master_Transmit_DMA()
  488. (++) HAL_I2C_Master_Receive_DMA()
  489. (++) HAL_I2C_Slave_Transmit_DMA()
  490. (++) HAL_I2C_Slave_Receive_DMA()
  491. (++) HAL_I2C_Mem_Write_DMA()
  492. (++) HAL_I2C_Mem_Read_DMA()
  493. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  494. (++) HAL_I2C_MemTxCpltCallback()
  495. (++) HAL_I2C_MemRxCpltCallback()
  496. (++) HAL_I2C_MasterTxCpltCallback()
  497. (++) HAL_I2C_MasterRxCpltCallback()
  498. (++) HAL_I2C_SlaveTxCpltCallback()
  499. (++) HAL_I2C_SlaveRxCpltCallback()
  500. (++) HAL_I2C_ErrorCallback()
  501. (++) HAL_I2C_AbortCpltCallback()
  502. @endverbatim
  503. * @{
  504. */
  505. /**
  506. * @brief Transmits in master mode an amount of data in blocking mode.
  507. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  508. * the configuration information for the specified I2C.
  509. * @param DevAddress Target device address: The device 7 bits address value
  510. * in datasheet must be shift at right before call interface
  511. * @param pData Pointer to data buffer
  512. * @param Size Amount of data to be sent
  513. * @param Timeout Timeout duration
  514. * @retval HAL status
  515. */
  516. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  517. {
  518. uint32_t tickstart = 0x00U;
  519. /* Init tickstart for timeout management*/
  520. tickstart = HAL_GetTick();
  521. if(hi2c->State == HAL_I2C_STATE_READY)
  522. {
  523. /* Wait until BUSY flag is reset */
  524. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  525. {
  526. return HAL_BUSY;
  527. }
  528. /* Process Locked */
  529. __HAL_LOCK(hi2c);
  530. /* Check if the I2C is already enabled */
  531. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  532. {
  533. /* Enable I2C peripheral */
  534. __HAL_I2C_ENABLE(hi2c);
  535. }
  536. /* Disable Pos */
  537. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  538. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  539. hi2c->Mode = HAL_I2C_MODE_MASTER;
  540. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  541. /* Prepare transfer parameters */
  542. hi2c->pBuffPtr = pData;
  543. hi2c->XferCount = Size;
  544. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  545. hi2c->XferSize = hi2c->XferCount;
  546. /* Send Slave Address */
  547. if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  548. {
  549. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  550. {
  551. /* Process Unlocked */
  552. __HAL_UNLOCK(hi2c);
  553. return HAL_ERROR;
  554. }
  555. else
  556. {
  557. /* Process Unlocked */
  558. __HAL_UNLOCK(hi2c);
  559. return HAL_TIMEOUT;
  560. }
  561. }
  562. /* Clear ADDR flag */
  563. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  564. while(hi2c->XferSize > 0U)
  565. {
  566. /* Wait until TXE flag is set */
  567. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  568. {
  569. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  570. {
  571. /* Generate Stop */
  572. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  573. return HAL_ERROR;
  574. }
  575. else
  576. {
  577. return HAL_TIMEOUT;
  578. }
  579. }
  580. /* Write data to DR */
  581. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  582. hi2c->XferCount--;
  583. hi2c->XferSize--;
  584. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  585. {
  586. /* Write data to DR */
  587. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  588. hi2c->XferCount--;
  589. hi2c->XferSize--;
  590. }
  591. /* Wait until BTF flag is set */
  592. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  593. {
  594. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  595. {
  596. /* Generate Stop */
  597. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  598. return HAL_ERROR;
  599. }
  600. else
  601. {
  602. return HAL_TIMEOUT;
  603. }
  604. }
  605. }
  606. /* Generate Stop */
  607. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  608. hi2c->State = HAL_I2C_STATE_READY;
  609. hi2c->Mode = HAL_I2C_MODE_NONE;
  610. /* Process Unlocked */
  611. __HAL_UNLOCK(hi2c);
  612. return HAL_OK;
  613. }
  614. else
  615. {
  616. return HAL_BUSY;
  617. }
  618. }
  619. /**
  620. * @brief Receives in master mode an amount of data in blocking mode.
  621. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  622. * the configuration information for the specified I2C.
  623. * @param DevAddress Target device address: The device 7 bits address value
  624. * in datasheet must be shift at right before call interface
  625. * @param pData Pointer to data buffer
  626. * @param Size Amount of data to be sent
  627. * @param Timeout Timeout duration
  628. * @retval HAL status
  629. */
  630. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  631. {
  632. uint32_t tickstart = 0x00U;
  633. /* Init tickstart for timeout management*/
  634. tickstart = HAL_GetTick();
  635. if(hi2c->State == HAL_I2C_STATE_READY)
  636. {
  637. /* Wait until BUSY flag is reset */
  638. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  639. {
  640. return HAL_BUSY;
  641. }
  642. /* Process Locked */
  643. __HAL_LOCK(hi2c);
  644. /* Check if the I2C is already enabled */
  645. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  646. {
  647. /* Enable I2C peripheral */
  648. __HAL_I2C_ENABLE(hi2c);
  649. }
  650. /* Disable Pos */
  651. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  652. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  653. hi2c->Mode = HAL_I2C_MODE_MASTER;
  654. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  655. /* Prepare transfer parameters */
  656. hi2c->pBuffPtr = pData;
  657. hi2c->XferCount = Size;
  658. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  659. hi2c->XferSize = hi2c->XferCount;
  660. /* Send Slave Address */
  661. if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  662. {
  663. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  664. {
  665. /* Process Unlocked */
  666. __HAL_UNLOCK(hi2c);
  667. return HAL_ERROR;
  668. }
  669. else
  670. {
  671. /* Process Unlocked */
  672. __HAL_UNLOCK(hi2c);
  673. return HAL_TIMEOUT;
  674. }
  675. }
  676. if(hi2c->XferSize == 0U)
  677. {
  678. /* Clear ADDR flag */
  679. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  680. /* Generate Stop */
  681. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  682. }
  683. else if(hi2c->XferSize == 1U)
  684. {
  685. /* Disable Acknowledge */
  686. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  687. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  688. software sequence must complete before the current byte end of transfer */
  689. __disable_irq();
  690. /* Clear ADDR flag */
  691. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  692. /* Generate Stop */
  693. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  694. /* Re-enable IRQs */
  695. __enable_irq();
  696. }
  697. else if(hi2c->XferSize == 2U)
  698. {
  699. /* Enable Pos */
  700. hi2c->Instance->CR1 |= I2C_CR1_POS;
  701. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  702. software sequence must complete before the current byte end of transfer */
  703. __disable_irq();
  704. /* Clear ADDR flag */
  705. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  706. /* Disable Acknowledge */
  707. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  708. /* Re-enable IRQs */
  709. __enable_irq();
  710. }
  711. else
  712. {
  713. /* Enable Acknowledge */
  714. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  715. /* Clear ADDR flag */
  716. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  717. }
  718. while(hi2c->XferSize > 0U)
  719. {
  720. if(hi2c->XferSize <= 3U)
  721. {
  722. /* One byte */
  723. if(hi2c->XferSize == 1U)
  724. {
  725. /* Wait until RXNE flag is set */
  726. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  727. {
  728. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  729. {
  730. return HAL_TIMEOUT;
  731. }
  732. else
  733. {
  734. return HAL_ERROR;
  735. }
  736. }
  737. /* Read data from DR */
  738. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  739. hi2c->XferSize--;
  740. hi2c->XferCount--;
  741. }
  742. /* Two bytes */
  743. else if(hi2c->XferSize == 2U)
  744. {
  745. /* Wait until BTF flag is set */
  746. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  747. {
  748. return HAL_TIMEOUT;
  749. }
  750. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  751. software sequence must complete before the current byte end of transfer */
  752. __disable_irq();
  753. /* Generate Stop */
  754. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  755. /* Read data from DR */
  756. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  757. hi2c->XferSize--;
  758. hi2c->XferCount--;
  759. /* Re-enable IRQs */
  760. __enable_irq();
  761. /* Read data from DR */
  762. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  763. hi2c->XferSize--;
  764. hi2c->XferCount--;
  765. }
  766. /* 3 Last bytes */
  767. else
  768. {
  769. /* Wait until BTF flag is set */
  770. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  771. {
  772. return HAL_TIMEOUT;
  773. }
  774. /* Disable Acknowledge */
  775. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  776. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  777. software sequence must complete before the current byte end of transfer */
  778. __disable_irq();
  779. /* Read data from DR */
  780. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  781. hi2c->XferSize--;
  782. hi2c->XferCount--;
  783. /* Wait until BTF flag is set */
  784. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  785. {
  786. return HAL_TIMEOUT;
  787. }
  788. /* Generate Stop */
  789. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  790. /* Read data from DR */
  791. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  792. hi2c->XferSize--;
  793. hi2c->XferCount--;
  794. /* Re-enable IRQs */
  795. __enable_irq();
  796. /* Read data from DR */
  797. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  798. hi2c->XferSize--;
  799. hi2c->XferCount--;
  800. }
  801. }
  802. else
  803. {
  804. /* Wait until RXNE flag is set */
  805. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  806. {
  807. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  808. {
  809. return HAL_TIMEOUT;
  810. }
  811. else
  812. {
  813. return HAL_ERROR;
  814. }
  815. }
  816. /* Read data from DR */
  817. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  818. hi2c->XferSize--;
  819. hi2c->XferCount--;
  820. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  821. {
  822. /* Read data from DR */
  823. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  824. hi2c->XferSize--;
  825. hi2c->XferCount--;
  826. }
  827. }
  828. }
  829. hi2c->State = HAL_I2C_STATE_READY;
  830. hi2c->Mode = HAL_I2C_MODE_NONE;
  831. /* Process Unlocked */
  832. __HAL_UNLOCK(hi2c);
  833. return HAL_OK;
  834. }
  835. else
  836. {
  837. return HAL_BUSY;
  838. }
  839. }
  840. /**
  841. * @brief Transmits in slave mode an amount of data in blocking mode.
  842. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  843. * the configuration information for the specified I2C.
  844. * @param pData Pointer to data buffer
  845. * @param Size Amount of data to be sent
  846. * @param Timeout Timeout duration
  847. * @retval HAL status
  848. */
  849. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  850. {
  851. uint32_t tickstart = 0x00U;
  852. /* Init tickstart for timeout management*/
  853. tickstart = HAL_GetTick();
  854. if(hi2c->State == HAL_I2C_STATE_READY)
  855. {
  856. if((pData == NULL) || (Size == 0U))
  857. {
  858. return HAL_ERROR;
  859. }
  860. /* Process Locked */
  861. __HAL_LOCK(hi2c);
  862. /* Check if the I2C is already enabled */
  863. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  864. {
  865. /* Enable I2C peripheral */
  866. __HAL_I2C_ENABLE(hi2c);
  867. }
  868. /* Disable Pos */
  869. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  870. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  871. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  872. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  873. /* Prepare transfer parameters */
  874. hi2c->pBuffPtr = pData;
  875. hi2c->XferCount = Size;
  876. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  877. hi2c->XferSize = hi2c->XferCount;
  878. /* Enable Address Acknowledge */
  879. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  880. /* Wait until ADDR flag is set */
  881. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  882. {
  883. return HAL_TIMEOUT;
  884. }
  885. /* Clear ADDR flag */
  886. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  887. /* If 10bit addressing mode is selected */
  888. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
  889. {
  890. /* Wait until ADDR flag is set */
  891. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  892. {
  893. return HAL_TIMEOUT;
  894. }
  895. /* Clear ADDR flag */
  896. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  897. }
  898. while(hi2c->XferSize > 0U)
  899. {
  900. /* Wait until TXE flag is set */
  901. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  902. {
  903. /* Disable Address Acknowledge */
  904. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  905. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  906. {
  907. return HAL_ERROR;
  908. }
  909. else
  910. {
  911. return HAL_TIMEOUT;
  912. }
  913. }
  914. /* Write data to DR */
  915. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  916. hi2c->XferCount--;
  917. hi2c->XferSize--;
  918. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  919. {
  920. /* Write data to DR */
  921. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  922. hi2c->XferCount--;
  923. hi2c->XferSize--;
  924. }
  925. }
  926. /* Wait until AF flag is set */
  927. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
  928. {
  929. return HAL_TIMEOUT;
  930. }
  931. /* Clear AF flag */
  932. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  933. /* Disable Address Acknowledge */
  934. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  935. hi2c->State = HAL_I2C_STATE_READY;
  936. hi2c->Mode = HAL_I2C_MODE_NONE;
  937. /* Process Unlocked */
  938. __HAL_UNLOCK(hi2c);
  939. return HAL_OK;
  940. }
  941. else
  942. {
  943. return HAL_BUSY;
  944. }
  945. }
  946. /**
  947. * @brief Receive in slave mode an amount of data in blocking mode
  948. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  949. * the configuration information for the specified I2C.
  950. * @param pData Pointer to data buffer
  951. * @param Size Amount of data to be sent
  952. * @param Timeout Timeout duration
  953. * @retval HAL status
  954. */
  955. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  956. {
  957. uint32_t tickstart = 0x00U;
  958. /* Init tickstart for timeout management*/
  959. tickstart = HAL_GetTick();
  960. if(hi2c->State == HAL_I2C_STATE_READY)
  961. {
  962. if((pData == NULL) || (Size == 0U))
  963. {
  964. return HAL_ERROR;
  965. }
  966. /* Process Locked */
  967. __HAL_LOCK(hi2c);
  968. /* Check if the I2C is already enabled */
  969. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  970. {
  971. /* Enable I2C peripheral */
  972. __HAL_I2C_ENABLE(hi2c);
  973. }
  974. /* Disable Pos */
  975. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  976. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  977. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  978. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  979. /* Prepare transfer parameters */
  980. hi2c->pBuffPtr = pData;
  981. hi2c->XferCount = Size;
  982. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  983. hi2c->XferSize = hi2c->XferCount;
  984. /* Enable Address Acknowledge */
  985. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  986. /* Wait until ADDR flag is set */
  987. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  988. {
  989. return HAL_TIMEOUT;
  990. }
  991. /* Clear ADDR flag */
  992. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  993. while(hi2c->XferSize > 0U)
  994. {
  995. /* Wait until RXNE flag is set */
  996. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  997. {
  998. /* Disable Address Acknowledge */
  999. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1000. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  1001. {
  1002. return HAL_TIMEOUT;
  1003. }
  1004. else
  1005. {
  1006. return HAL_ERROR;
  1007. }
  1008. }
  1009. /* Read data from DR */
  1010. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  1011. hi2c->XferSize--;
  1012. hi2c->XferCount--;
  1013. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
  1014. {
  1015. /* Read data from DR */
  1016. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  1017. hi2c->XferSize--;
  1018. hi2c->XferCount--;
  1019. }
  1020. }
  1021. /* Wait until STOP flag is set */
  1022. if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1023. {
  1024. /* Disable Address Acknowledge */
  1025. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1026. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1027. {
  1028. return HAL_ERROR;
  1029. }
  1030. else
  1031. {
  1032. return HAL_TIMEOUT;
  1033. }
  1034. }
  1035. /* Clear STOP flag */
  1036. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  1037. /* Disable Address Acknowledge */
  1038. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1039. hi2c->State = HAL_I2C_STATE_READY;
  1040. hi2c->Mode = HAL_I2C_MODE_NONE;
  1041. /* Process Unlocked */
  1042. __HAL_UNLOCK(hi2c);
  1043. return HAL_OK;
  1044. }
  1045. else
  1046. {
  1047. return HAL_BUSY;
  1048. }
  1049. }
  1050. /**
  1051. * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
  1052. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1053. * the configuration information for the specified I2C.
  1054. * @param DevAddress Target device address: The device 7 bits address value
  1055. * in datasheet must be shift at right before call interface
  1056. * @param pData Pointer to data buffer
  1057. * @param Size Amount of data to be sent
  1058. * @retval HAL status
  1059. */
  1060. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1061. {
  1062. __IO uint32_t count = 0U;
  1063. if(hi2c->State == HAL_I2C_STATE_READY)
  1064. {
  1065. /* Wait until BUSY flag is reset */
  1066. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1067. do
  1068. {
  1069. if(count-- == 0U)
  1070. {
  1071. hi2c->PreviousState = I2C_STATE_NONE;
  1072. hi2c->State= HAL_I2C_STATE_READY;
  1073. /* Process Unlocked */
  1074. __HAL_UNLOCK(hi2c);
  1075. return HAL_TIMEOUT;
  1076. }
  1077. }
  1078. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1079. /* Process Locked */
  1080. __HAL_LOCK(hi2c);
  1081. /* Check if the I2C is already enabled */
  1082. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1083. {
  1084. /* Enable I2C peripheral */
  1085. __HAL_I2C_ENABLE(hi2c);
  1086. }
  1087. /* Disable Pos */
  1088. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1089. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1090. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1091. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1092. /* Prepare transfer parameters */
  1093. hi2c->pBuffPtr = pData;
  1094. hi2c->XferCount = Size;
  1095. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1096. hi2c->XferSize = hi2c->XferCount;
  1097. hi2c->Devaddress = DevAddress;
  1098. /* Generate Start */
  1099. hi2c->Instance->CR1 |= I2C_CR1_START;
  1100. /* Process Unlocked */
  1101. __HAL_UNLOCK(hi2c);
  1102. /* Note : The I2C interrupts must be enabled after unlocking current process
  1103. to avoid the risk of I2C interrupt handle execution before current
  1104. process unlock */
  1105. /* Enable EVT, BUF and ERR interrupt */
  1106. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1107. return HAL_OK;
  1108. }
  1109. else
  1110. {
  1111. return HAL_BUSY;
  1112. }
  1113. }
  1114. /**
  1115. * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
  1116. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1117. * the configuration information for the specified I2C.
  1118. * @param DevAddress Target device address: The device 7 bits address value
  1119. * in datasheet must be shift at right before call interface
  1120. * @param pData Pointer to data buffer
  1121. * @param Size Amount of data to be sent
  1122. * @retval HAL status
  1123. */
  1124. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1125. {
  1126. __IO uint32_t count = 0U;
  1127. if(hi2c->State == HAL_I2C_STATE_READY)
  1128. {
  1129. /* Wait until BUSY flag is reset */
  1130. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1131. do
  1132. {
  1133. if(count-- == 0U)
  1134. {
  1135. hi2c->PreviousState = I2C_STATE_NONE;
  1136. hi2c->State= HAL_I2C_STATE_READY;
  1137. /* Process Unlocked */
  1138. __HAL_UNLOCK(hi2c);
  1139. return HAL_TIMEOUT;
  1140. }
  1141. }
  1142. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1143. /* Process Locked */
  1144. __HAL_LOCK(hi2c);
  1145. /* Check if the I2C is already enabled */
  1146. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1147. {
  1148. /* Enable I2C peripheral */
  1149. __HAL_I2C_ENABLE(hi2c);
  1150. }
  1151. /* Disable Pos */
  1152. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1153. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1154. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1155. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1156. /* Prepare transfer parameters */
  1157. hi2c->pBuffPtr = pData;
  1158. hi2c->XferCount = Size;
  1159. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1160. hi2c->XferSize = hi2c->XferCount;
  1161. hi2c->Devaddress = DevAddress;
  1162. /* Enable Acknowledge */
  1163. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1164. /* Generate Start */
  1165. hi2c->Instance->CR1 |= I2C_CR1_START;
  1166. /* Process Unlocked */
  1167. __HAL_UNLOCK(hi2c);
  1168. /* Note : The I2C interrupts must be enabled after unlocking current process
  1169. to avoid the risk of I2C interrupt handle execution before current
  1170. process unlock */
  1171. /* Enable EVT, BUF and ERR interrupt */
  1172. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1173. return HAL_OK;
  1174. }
  1175. else
  1176. {
  1177. return HAL_BUSY;
  1178. }
  1179. }
  1180. /**
  1181. * @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt
  1182. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1183. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1184. * the configuration information for the specified I2C.
  1185. * @param DevAddress Target device address: The device 7 bits address value
  1186. * in datasheet must be shift at right before call interface
  1187. * @param pData Pointer to data buffer
  1188. * @param Size Amount of data to be sent
  1189. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1190. * @retval HAL status
  1191. */
  1192. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1193. {
  1194. __IO uint32_t Prev_State = 0x00U;
  1195. __IO uint32_t count = 0x00U;
  1196. /* Check the parameters */
  1197. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1198. if(hi2c->State == HAL_I2C_STATE_READY)
  1199. {
  1200. /* Check Busy Flag only if FIRST call of Master interface */
  1201. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1202. {
  1203. /* Wait until BUSY flag is reset */
  1204. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1205. do
  1206. {
  1207. if(count-- == 0U)
  1208. {
  1209. hi2c->PreviousState = I2C_STATE_NONE;
  1210. hi2c->State= HAL_I2C_STATE_READY;
  1211. /* Process Unlocked */
  1212. __HAL_UNLOCK(hi2c);
  1213. return HAL_TIMEOUT;
  1214. }
  1215. }
  1216. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1217. }
  1218. /* Process Locked */
  1219. __HAL_LOCK(hi2c);
  1220. /* Check if the I2C is already enabled */
  1221. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1222. {
  1223. /* Enable I2C peripheral */
  1224. __HAL_I2C_ENABLE(hi2c);
  1225. }
  1226. /* Disable Pos */
  1227. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1228. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1229. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1230. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1231. /* Prepare transfer parameters */
  1232. hi2c->pBuffPtr = pData;
  1233. hi2c->XferCount = Size;
  1234. hi2c->XferOptions = XferOptions;
  1235. hi2c->XferSize = hi2c->XferCount;
  1236. hi2c->Devaddress = DevAddress;
  1237. Prev_State = hi2c->PreviousState;
  1238. /* Generate Start */
  1239. if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
  1240. {
  1241. /* Generate Start condition if first transfer */
  1242. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1243. {
  1244. /* Generate Start */
  1245. hi2c->Instance->CR1 |= I2C_CR1_START;
  1246. }
  1247. else
  1248. {
  1249. /* Generate ReStart */
  1250. hi2c->Instance->CR1 |= I2C_CR1_START;
  1251. }
  1252. }
  1253. /* Process Unlocked */
  1254. __HAL_UNLOCK(hi2c);
  1255. /* Note : The I2C interrupts must be enabled after unlocking current process
  1256. to avoid the risk of I2C interrupt handle execution before current
  1257. process unlock */
  1258. /* Enable EVT, BUF and ERR interrupt */
  1259. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1260. return HAL_OK;
  1261. }
  1262. else
  1263. {
  1264. return HAL_BUSY;
  1265. }
  1266. }
  1267. /**
  1268. * @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt
  1269. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1270. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1271. * the configuration information for the specified I2C.
  1272. * @param DevAddress Target device address: The device 7 bits address value
  1273. * in datasheet must be shift at right before call interface
  1274. * @param pData Pointer to data buffer
  1275. * @param Size Amount of data to be sent
  1276. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1277. * @retval HAL status
  1278. */
  1279. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1280. {
  1281. __IO uint32_t count = 0U;
  1282. /* Check the parameters */
  1283. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1284. if(hi2c->State == HAL_I2C_STATE_READY)
  1285. {
  1286. /* Check Busy Flag only if FIRST call of Master interface */
  1287. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1288. {
  1289. /* Wait until BUSY flag is reset */
  1290. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1291. do
  1292. {
  1293. if(count-- == 0U)
  1294. {
  1295. hi2c->PreviousState = I2C_STATE_NONE;
  1296. hi2c->State= HAL_I2C_STATE_READY;
  1297. /* Process Unlocked */
  1298. __HAL_UNLOCK(hi2c);
  1299. return HAL_TIMEOUT;
  1300. }
  1301. }
  1302. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1303. }
  1304. /* Process Locked */
  1305. __HAL_LOCK(hi2c);
  1306. /* Check if the I2C is already enabled */
  1307. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1308. {
  1309. /* Enable I2C peripheral */
  1310. __HAL_I2C_ENABLE(hi2c);
  1311. }
  1312. /* Disable Pos */
  1313. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1314. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1315. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1316. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1317. /* Prepare transfer parameters */
  1318. hi2c->pBuffPtr = pData;
  1319. hi2c->XferCount = Size;
  1320. hi2c->XferOptions = XferOptions;
  1321. hi2c->XferSize = hi2c->XferCount;
  1322. hi2c->Devaddress = DevAddress;
  1323. if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
  1324. {
  1325. /* Generate Start condition if first transfer */
  1326. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
  1327. {
  1328. /* Enable Acknowledge */
  1329. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1330. /* Generate Start */
  1331. hi2c->Instance->CR1 |= I2C_CR1_START;
  1332. }
  1333. else
  1334. {
  1335. /* Enable Acknowledge */
  1336. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1337. /* Generate ReStart */
  1338. hi2c->Instance->CR1 |= I2C_CR1_START;
  1339. }
  1340. }
  1341. /* Process Unlocked */
  1342. __HAL_UNLOCK(hi2c);
  1343. /* Note : The I2C interrupts must be enabled after unlocking current process
  1344. to avoid the risk of I2C interrupt handle execution before current
  1345. process unlock */
  1346. /* Enable EVT, BUF and ERR interrupt */
  1347. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1348. return HAL_OK;
  1349. }
  1350. else
  1351. {
  1352. return HAL_BUSY;
  1353. }
  1354. }
  1355. /**
  1356. * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
  1357. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1358. * the configuration information for the specified I2C.
  1359. * @param pData Pointer to data buffer
  1360. * @param Size Amount of data to be sent
  1361. * @retval HAL status
  1362. */
  1363. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1364. {
  1365. __IO uint32_t count = 0U;
  1366. if(hi2c->State == HAL_I2C_STATE_READY)
  1367. {
  1368. if((pData == NULL) || (Size == 0U))
  1369. {
  1370. return HAL_ERROR;
  1371. }
  1372. /* Wait until BUSY flag is reset */
  1373. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1374. do
  1375. {
  1376. if(count-- == 0U)
  1377. {
  1378. hi2c->PreviousState = I2C_STATE_NONE;
  1379. hi2c->State= HAL_I2C_STATE_READY;
  1380. /* Process Unlocked */
  1381. __HAL_UNLOCK(hi2c);
  1382. return HAL_TIMEOUT;
  1383. }
  1384. }
  1385. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1386. /* Process Locked */
  1387. __HAL_LOCK(hi2c);
  1388. /* Check if the I2C is already enabled */
  1389. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1390. {
  1391. /* Enable I2C peripheral */
  1392. __HAL_I2C_ENABLE(hi2c);
  1393. }
  1394. /* Disable Pos */
  1395. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1396. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1397. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1398. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1399. /* Prepare transfer parameters */
  1400. hi2c->pBuffPtr = pData;
  1401. hi2c->XferCount = Size;
  1402. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1403. hi2c->XferSize = hi2c->XferCount;
  1404. /* Enable Address Acknowledge */
  1405. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1406. /* Process Unlocked */
  1407. __HAL_UNLOCK(hi2c);
  1408. /* Note : The I2C interrupts must be enabled after unlocking current process
  1409. to avoid the risk of I2C interrupt handle execution before current
  1410. process unlock */
  1411. /* Enable EVT, BUF and ERR interrupt */
  1412. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1413. return HAL_OK;
  1414. }
  1415. else
  1416. {
  1417. return HAL_BUSY;
  1418. }
  1419. }
  1420. /**
  1421. * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
  1422. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1423. * the configuration information for the specified I2C.
  1424. * @param pData Pointer to data buffer
  1425. * @param Size Amount of data to be sent
  1426. * @retval HAL status
  1427. */
  1428. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1429. {
  1430. __IO uint32_t count = 0U;
  1431. if(hi2c->State == HAL_I2C_STATE_READY)
  1432. {
  1433. if((pData == NULL) || (Size == 0U))
  1434. {
  1435. return HAL_ERROR;
  1436. }
  1437. /* Wait until BUSY flag is reset */
  1438. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1439. do
  1440. {
  1441. if(count-- == 0U)
  1442. {
  1443. hi2c->PreviousState = I2C_STATE_NONE;
  1444. hi2c->State= HAL_I2C_STATE_READY;
  1445. /* Process Unlocked */
  1446. __HAL_UNLOCK(hi2c);
  1447. return HAL_TIMEOUT;
  1448. }
  1449. }
  1450. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1451. /* Process Locked */
  1452. __HAL_LOCK(hi2c);
  1453. /* Check if the I2C is already enabled */
  1454. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1455. {
  1456. /* Enable I2C peripheral */
  1457. __HAL_I2C_ENABLE(hi2c);
  1458. }
  1459. /* Disable Pos */
  1460. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1461. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1462. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1463. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1464. /* Prepare transfer parameters */
  1465. hi2c->pBuffPtr = pData;
  1466. hi2c->XferSize = Size;
  1467. hi2c->XferCount = Size;
  1468. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1469. /* Enable Address Acknowledge */
  1470. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1471. /* Process Unlocked */
  1472. __HAL_UNLOCK(hi2c);
  1473. /* Note : The I2C interrupts must be enabled after unlocking current process
  1474. to avoid the risk of I2C interrupt handle execution before current
  1475. process unlock */
  1476. /* Enable EVT, BUF and ERR interrupt */
  1477. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1478. return HAL_OK;
  1479. }
  1480. else
  1481. {
  1482. return HAL_BUSY;
  1483. }
  1484. }
  1485. /**
  1486. * @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
  1487. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1488. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1489. * the configuration information for I2C module
  1490. * @param pData Pointer to data buffer
  1491. * @param Size Amount of data to be sent
  1492. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1493. * @retval HAL status
  1494. */
  1495. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1496. {
  1497. /* Check the parameters */
  1498. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1499. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1500. {
  1501. if((pData == NULL) || (Size == 0U))
  1502. {
  1503. return HAL_ERROR;
  1504. }
  1505. /* Process Locked */
  1506. __HAL_LOCK(hi2c);
  1507. /* Check if the I2C is already enabled */
  1508. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1509. {
  1510. /* Enable I2C peripheral */
  1511. __HAL_I2C_ENABLE(hi2c);
  1512. }
  1513. /* Disable Pos */
  1514. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1515. hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
  1516. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1517. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1518. /* Prepare transfer parameters */
  1519. hi2c->pBuffPtr = pData;
  1520. hi2c->XferCount = Size;
  1521. hi2c->XferOptions = XferOptions;
  1522. hi2c->XferSize = hi2c->XferCount;
  1523. /* Clear ADDR flag */
  1524. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1525. /* Process Unlocked */
  1526. __HAL_UNLOCK(hi2c);
  1527. /* Note : The I2C interrupts must be enabled after unlocking current process
  1528. to avoid the risk of I2C interrupt handle execution before current
  1529. process unlock */
  1530. /* Enable EVT, BUF and ERR interrupt */
  1531. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1532. return HAL_OK;
  1533. }
  1534. else
  1535. {
  1536. return HAL_BUSY;
  1537. }
  1538. }
  1539. /**
  1540. * @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
  1541. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1542. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1543. * the configuration information for the specified I2C.
  1544. * @param pData Pointer to data buffer
  1545. * @param Size Amount of data to be sent
  1546. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1547. * @retval HAL status
  1548. */
  1549. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1550. {
  1551. /* Check the parameters */
  1552. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1553. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1554. {
  1555. if((pData == NULL) || (Size == 0U))
  1556. {
  1557. return HAL_ERROR;
  1558. }
  1559. /* Process Locked */
  1560. __HAL_LOCK(hi2c);
  1561. /* Check if the I2C is already enabled */
  1562. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1563. {
  1564. /* Enable I2C peripheral */
  1565. __HAL_I2C_ENABLE(hi2c);
  1566. }
  1567. /* Disable Pos */
  1568. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1569. hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
  1570. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1571. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1572. /* Prepare transfer parameters */
  1573. hi2c->pBuffPtr = pData;
  1574. hi2c->XferCount = Size;
  1575. hi2c->XferOptions = XferOptions;
  1576. hi2c->XferSize = hi2c->XferCount;
  1577. /* Clear ADDR flag */
  1578. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1579. /* Process Unlocked */
  1580. __HAL_UNLOCK(hi2c);
  1581. /* Note : The I2C interrupts must be enabled after unlocking current process
  1582. to avoid the risk of I2C interrupt handle execution before current
  1583. process unlock */
  1584. /* Enable EVT, BUF and ERR interrupt */
  1585. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1586. return HAL_OK;
  1587. }
  1588. else
  1589. {
  1590. return HAL_BUSY;
  1591. }
  1592. }
  1593. /**
  1594. * @brief Enable the Address listen mode with Interrupt.
  1595. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1596. * the configuration information for the specified I2C.
  1597. * @retval HAL status
  1598. */
  1599. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
  1600. {
  1601. if(hi2c->State == HAL_I2C_STATE_READY)
  1602. {
  1603. hi2c->State = HAL_I2C_STATE_LISTEN;
  1604. /* Check if the I2C is already enabled */
  1605. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1606. {
  1607. /* Enable I2C peripheral */
  1608. __HAL_I2C_ENABLE(hi2c);
  1609. }
  1610. /* Enable Address Acknowledge */
  1611. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1612. /* Enable EVT and ERR interrupt */
  1613. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1614. return HAL_OK;
  1615. }
  1616. else
  1617. {
  1618. return HAL_BUSY;
  1619. }
  1620. }
  1621. /**
  1622. * @brief Disable the Address listen mode with Interrupt.
  1623. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1624. * the configuration information for the specified I2C.
  1625. * @retval HAL status
  1626. */
  1627. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
  1628. {
  1629. /* Declaration of tmp to prevent undefined behavior of volatile usage */
  1630. uint32_t tmp;
  1631. /* Disable Address listen mode only if a transfer is not ongoing */
  1632. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1633. {
  1634. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  1635. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  1636. hi2c->State = HAL_I2C_STATE_READY;
  1637. hi2c->Mode = HAL_I2C_MODE_NONE;
  1638. /* Disable Address Acknowledge */
  1639. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1640. /* Disable EVT and ERR interrupt */
  1641. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1642. return HAL_OK;
  1643. }
  1644. else
  1645. {
  1646. return HAL_BUSY;
  1647. }
  1648. }
  1649. /**
  1650. * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
  1651. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1652. * the configuration information for the specified I2C.
  1653. * @param DevAddress Target device address: The device 7 bits address value
  1654. * in datasheet must be shift at right before call interface
  1655. * @param pData Pointer to data buffer
  1656. * @param Size Amount of data to be sent
  1657. * @retval HAL status
  1658. */
  1659. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1660. {
  1661. __IO uint32_t count = 0U;
  1662. if(hi2c->State == HAL_I2C_STATE_READY)
  1663. {
  1664. /* Wait until BUSY flag is reset */
  1665. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1666. do
  1667. {
  1668. if(count-- == 0U)
  1669. {
  1670. hi2c->PreviousState = I2C_STATE_NONE;
  1671. hi2c->State= HAL_I2C_STATE_READY;
  1672. /* Process Unlocked */
  1673. __HAL_UNLOCK(hi2c);
  1674. return HAL_TIMEOUT;
  1675. }
  1676. }
  1677. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1678. /* Process Locked */
  1679. __HAL_LOCK(hi2c);
  1680. /* Check if the I2C is already enabled */
  1681. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1682. {
  1683. /* Enable I2C peripheral */
  1684. __HAL_I2C_ENABLE(hi2c);
  1685. }
  1686. /* Disable Pos */
  1687. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1688. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1689. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1690. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1691. /* Prepare transfer parameters */
  1692. hi2c->pBuffPtr = pData;
  1693. hi2c->XferCount = Size;
  1694. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1695. hi2c->XferSize = hi2c->XferCount;
  1696. hi2c->Devaddress = DevAddress;
  1697. if(hi2c->XferSize > 0U)
  1698. {
  1699. /* Set the I2C DMA transfer complete callback */
  1700. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1701. /* Set the DMA error callback */
  1702. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1703. /* Set the unused DMA callbacks to NULL */
  1704. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1705. hi2c->hdmatx->XferAbortCallback = NULL;
  1706. /* Enable the DMA channel */
  1707. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  1708. /* Enable Acknowledge */
  1709. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1710. /* Generate Start */
  1711. hi2c->Instance->CR1 |= I2C_CR1_START;
  1712. /* Process Unlocked */
  1713. __HAL_UNLOCK(hi2c);
  1714. /* Note : The I2C interrupts must be enabled after unlocking current process
  1715. to avoid the risk of I2C interrupt handle execution before current
  1716. process unlock */
  1717. /* Enable EVT and ERR interrupt */
  1718. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1719. /* Enable DMA Request */
  1720. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1721. }
  1722. else
  1723. {
  1724. /* Enable Acknowledge */
  1725. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1726. /* Generate Start */
  1727. hi2c->Instance->CR1 |= I2C_CR1_START;
  1728. /* Process Unlocked */
  1729. __HAL_UNLOCK(hi2c);
  1730. /* Note : The I2C interrupts must be enabled after unlocking current process
  1731. to avoid the risk of I2C interrupt handle execution before current
  1732. process unlock */
  1733. /* Enable EVT, BUF and ERR interrupt */
  1734. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1735. }
  1736. return HAL_OK;
  1737. }
  1738. else
  1739. {
  1740. return HAL_BUSY;
  1741. }
  1742. }
  1743. /**
  1744. * @brief Receive in master mode an amount of data in non-blocking mode with DMA
  1745. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1746. * the configuration information for the specified I2C.
  1747. * @param DevAddress Target device address: The device 7 bits address value
  1748. * in datasheet must be shift at right before call interface
  1749. * @param pData Pointer to data buffer
  1750. * @param Size Amount of data to be sent
  1751. * @retval HAL status
  1752. */
  1753. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1754. {
  1755. __IO uint32_t count = 0U;
  1756. if(hi2c->State == HAL_I2C_STATE_READY)
  1757. {
  1758. /* Wait until BUSY flag is reset */
  1759. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1760. do
  1761. {
  1762. if(count-- == 0U)
  1763. {
  1764. hi2c->PreviousState = I2C_STATE_NONE;
  1765. hi2c->State= HAL_I2C_STATE_READY;
  1766. /* Process Unlocked */
  1767. __HAL_UNLOCK(hi2c);
  1768. return HAL_TIMEOUT;
  1769. }
  1770. }
  1771. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1772. /* Process Locked */
  1773. __HAL_LOCK(hi2c);
  1774. /* Check if the I2C is already enabled */
  1775. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1776. {
  1777. /* Enable I2C peripheral */
  1778. __HAL_I2C_ENABLE(hi2c);
  1779. }
  1780. /* Disable Pos */
  1781. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1782. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1783. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1784. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1785. /* Prepare transfer parameters */
  1786. hi2c->pBuffPtr = pData;
  1787. hi2c->XferCount = Size;
  1788. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1789. hi2c->XferSize = hi2c->XferCount;
  1790. hi2c->Devaddress = DevAddress;
  1791. if(hi2c->XferSize > 0U)
  1792. {
  1793. /* Set the I2C DMA transfer complete callback */
  1794. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  1795. /* Set the DMA error callback */
  1796. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1797. /* Set the unused DMA callbacks to NULL */
  1798. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  1799. hi2c->hdmarx->XferAbortCallback = NULL;
  1800. /* Enable the DMA channel */
  1801. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  1802. /* Enable Acknowledge */
  1803. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1804. /* Generate Start */
  1805. hi2c->Instance->CR1 |= I2C_CR1_START;
  1806. /* Process Unlocked */
  1807. __HAL_UNLOCK(hi2c);
  1808. /* Note : The I2C interrupts must be enabled after unlocking current process
  1809. to avoid the risk of I2C interrupt handle execution before current
  1810. process unlock */
  1811. /* Enable EVT and ERR interrupt */
  1812. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1813. /* Enable DMA Request */
  1814. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1815. }
  1816. else
  1817. {
  1818. /* Enable Acknowledge */
  1819. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1820. /* Generate Start */
  1821. hi2c->Instance->CR1 |= I2C_CR1_START;
  1822. /* Process Unlocked */
  1823. __HAL_UNLOCK(hi2c);
  1824. /* Note : The I2C interrupts must be enabled after unlocking current process
  1825. to avoid the risk of I2C interrupt handle execution before current
  1826. process unlock */
  1827. /* Enable EVT, BUF and ERR interrupt */
  1828. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1829. }
  1830. return HAL_OK;
  1831. }
  1832. else
  1833. {
  1834. return HAL_BUSY;
  1835. }
  1836. }
  1837. /**
  1838. * @brief Abort a master I2C process communication with Interrupt.
  1839. * @note This abort can be called only if state is ready
  1840. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1841. * the configuration information for the specified I2C.
  1842. * @param DevAddress Target device address: The device 7 bits address value
  1843. * in datasheet must be shift at right before call interface
  1844. * @retval HAL status
  1845. */
  1846. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
  1847. {
  1848. /* Prevent unused argument(s) compilation warning */
  1849. UNUSED(DevAddress);
  1850. /* Abort Master transfer during Receive or Transmit process */
  1851. if(hi2c->Mode == HAL_I2C_MODE_MASTER)
  1852. {
  1853. /* Process Locked */
  1854. __HAL_LOCK(hi2c);
  1855. hi2c->PreviousState = I2C_STATE_NONE;
  1856. hi2c->State = HAL_I2C_STATE_ABORT;
  1857. /* Disable Acknowledge */
  1858. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1859. /* Generate Stop */
  1860. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1861. hi2c->XferCount = 0U;
  1862. /* Disable EVT, BUF and ERR interrupt */
  1863. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1864. /* Process Unlocked */
  1865. __HAL_UNLOCK(hi2c);
  1866. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1867. I2C_ITError(hi2c);
  1868. return HAL_OK;
  1869. }
  1870. else
  1871. {
  1872. /* Wrong usage of abort function */
  1873. /* This function should be used only in case of abort monitored by master device */
  1874. return HAL_ERROR;
  1875. }
  1876. }
  1877. /**
  1878. * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
  1879. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1880. * the configuration information for the specified I2C.
  1881. * @param pData Pointer to data buffer
  1882. * @param Size Amount of data to be sent
  1883. * @retval HAL status
  1884. */
  1885. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1886. {
  1887. __IO uint32_t count = 0U;
  1888. if(hi2c->State == HAL_I2C_STATE_READY)
  1889. {
  1890. if((pData == NULL) || (Size == 0U))
  1891. {
  1892. return HAL_ERROR;
  1893. }
  1894. /* Wait until BUSY flag is reset */
  1895. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1896. do
  1897. {
  1898. if(count-- == 0U)
  1899. {
  1900. hi2c->PreviousState = I2C_STATE_NONE;
  1901. hi2c->State= HAL_I2C_STATE_READY;
  1902. /* Process Unlocked */
  1903. __HAL_UNLOCK(hi2c);
  1904. return HAL_TIMEOUT;
  1905. }
  1906. }
  1907. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1908. /* Process Locked */
  1909. __HAL_LOCK(hi2c);
  1910. /* Check if the I2C is already enabled */
  1911. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1912. {
  1913. /* Enable I2C peripheral */
  1914. __HAL_I2C_ENABLE(hi2c);
  1915. }
  1916. /* Disable Pos */
  1917. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1918. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1919. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1920. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1921. /* Prepare transfer parameters */
  1922. hi2c->pBuffPtr = pData;
  1923. hi2c->XferCount = Size;
  1924. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1925. hi2c->XferSize = hi2c->XferCount;
  1926. /* Set the I2C DMA transfer complete callback */
  1927. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1928. /* Set the DMA error callback */
  1929. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1930. /* Set the unused DMA callbacks to NULL */
  1931. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1932. hi2c->hdmatx->XferAbortCallback = NULL;
  1933. /* Enable the DMA channel */
  1934. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  1935. /* Enable Address Acknowledge */
  1936. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1937. /* Process Unlocked */
  1938. __HAL_UNLOCK(hi2c);
  1939. /* Note : The I2C interrupts must be enabled after unlocking current process
  1940. to avoid the risk of I2C interrupt handle execution before current
  1941. process unlock */
  1942. /* Enable EVT and ERR interrupt */
  1943. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1944. /* Enable DMA Request */
  1945. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1946. return HAL_OK;
  1947. }
  1948. else
  1949. {
  1950. return HAL_BUSY;
  1951. }
  1952. }
  1953. /**
  1954. * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
  1955. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1956. * the configuration information for the specified I2C.
  1957. * @param pData Pointer to data buffer
  1958. * @param Size Amount of data to be sent
  1959. * @retval HAL status
  1960. */
  1961. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1962. {
  1963. __IO uint32_t count = 0U;
  1964. if(hi2c->State == HAL_I2C_STATE_READY)
  1965. {
  1966. if((pData == NULL) || (Size == 0U))
  1967. {
  1968. return HAL_ERROR;
  1969. }
  1970. /* Wait until BUSY flag is reset */
  1971. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1972. do
  1973. {
  1974. if(count-- == 0U)
  1975. {
  1976. hi2c->PreviousState = I2C_STATE_NONE;
  1977. hi2c->State= HAL_I2C_STATE_READY;
  1978. /* Process Unlocked */
  1979. __HAL_UNLOCK(hi2c);
  1980. return HAL_TIMEOUT;
  1981. }
  1982. }
  1983. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1984. /* Process Locked */
  1985. __HAL_LOCK(hi2c);
  1986. /* Check if the I2C is already enabled */
  1987. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1988. {
  1989. /* Enable I2C peripheral */
  1990. __HAL_I2C_ENABLE(hi2c);
  1991. }
  1992. /* Disable Pos */
  1993. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1994. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1995. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1996. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1997. /* Prepare transfer parameters */
  1998. hi2c->pBuffPtr = pData;
  1999. hi2c->XferCount = Size;
  2000. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2001. hi2c->XferSize = hi2c->XferCount;
  2002. /* Set the I2C DMA transfer complete callback */
  2003. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2004. /* Set the DMA error callback */
  2005. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2006. /* Set the unused DMA callbacks to NULL */
  2007. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  2008. hi2c->hdmarx->XferAbortCallback = NULL;
  2009. /* Enable the DMA channel */
  2010. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  2011. /* Enable Address Acknowledge */
  2012. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  2013. /* Process Unlocked */
  2014. __HAL_UNLOCK(hi2c);
  2015. /* Note : The I2C interrupts must be enabled after unlocking current process
  2016. to avoid the risk of I2C interrupt handle execution before current
  2017. process unlock */
  2018. /* Enable EVT and ERR interrupt */
  2019. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2020. /* Enable DMA Request */
  2021. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2022. return HAL_OK;
  2023. }
  2024. else
  2025. {
  2026. return HAL_BUSY;
  2027. }
  2028. }
  2029. /**
  2030. * @brief Write an amount of data in blocking mode to a specific memory address
  2031. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2032. * the configuration information for the specified I2C.
  2033. * @param DevAddress Target device address
  2034. * @param MemAddress Internal memory address
  2035. * @param MemAddSize Size of internal memory address
  2036. * @param pData Pointer to data buffer
  2037. * @param Size Amount of data to be sent
  2038. * @param Timeout Timeout duration
  2039. * @retval HAL status
  2040. */
  2041. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2042. {
  2043. uint32_t tickstart = 0x00U;
  2044. /* Init tickstart for timeout management*/
  2045. tickstart = HAL_GetTick();
  2046. /* Check the parameters */
  2047. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2048. if(hi2c->State == HAL_I2C_STATE_READY)
  2049. {
  2050. /* Wait until BUSY flag is reset */
  2051. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2052. {
  2053. return HAL_BUSY;
  2054. }
  2055. /* Process Locked */
  2056. __HAL_LOCK(hi2c);
  2057. /* Check if the I2C is already enabled */
  2058. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2059. {
  2060. /* Enable I2C peripheral */
  2061. __HAL_I2C_ENABLE(hi2c);
  2062. }
  2063. /* Disable Pos */
  2064. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2065. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2066. hi2c->Mode = HAL_I2C_MODE_MEM;
  2067. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2068. /* Prepare transfer parameters */
  2069. hi2c->pBuffPtr = pData;
  2070. hi2c->XferCount = Size;
  2071. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2072. hi2c->XferSize = hi2c->XferCount;
  2073. /* Send Slave Address and Memory Address */
  2074. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2075. {
  2076. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2077. {
  2078. /* Process Unlocked */
  2079. __HAL_UNLOCK(hi2c);
  2080. return HAL_ERROR;
  2081. }
  2082. else
  2083. {
  2084. /* Process Unlocked */
  2085. __HAL_UNLOCK(hi2c);
  2086. return HAL_TIMEOUT;
  2087. }
  2088. }
  2089. while(hi2c->XferSize > 0U)
  2090. {
  2091. /* Wait until TXE flag is set */
  2092. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2093. {
  2094. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2095. {
  2096. /* Generate Stop */
  2097. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2098. return HAL_ERROR;
  2099. }
  2100. else
  2101. {
  2102. return HAL_TIMEOUT;
  2103. }
  2104. }
  2105. /* Write data to DR */
  2106. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2107. hi2c->XferSize--;
  2108. hi2c->XferCount--;
  2109. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  2110. {
  2111. /* Write data to DR */
  2112. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2113. hi2c->XferSize--;
  2114. hi2c->XferCount--;
  2115. }
  2116. }
  2117. /* Wait until BTF flag is set */
  2118. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2119. {
  2120. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2121. {
  2122. /* Generate Stop */
  2123. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2124. return HAL_ERROR;
  2125. }
  2126. else
  2127. {
  2128. return HAL_TIMEOUT;
  2129. }
  2130. }
  2131. /* Generate Stop */
  2132. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2133. hi2c->State = HAL_I2C_STATE_READY;
  2134. hi2c->Mode = HAL_I2C_MODE_NONE;
  2135. /* Process Unlocked */
  2136. __HAL_UNLOCK(hi2c);
  2137. return HAL_OK;
  2138. }
  2139. else
  2140. {
  2141. return HAL_BUSY;
  2142. }
  2143. }
  2144. /**
  2145. * @brief Read an amount of data in blocking mode from a specific memory address
  2146. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2147. * the configuration information for the specified I2C.
  2148. * @param DevAddress Target device address
  2149. * @param MemAddress Internal memory address
  2150. * @param MemAddSize Size of internal memory address
  2151. * @param pData Pointer to data buffer
  2152. * @param Size Amount of data to be sent
  2153. * @param Timeout Timeout duration
  2154. * @retval HAL status
  2155. */
  2156. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2157. {
  2158. uint32_t tickstart = 0x00U;
  2159. /* Init tickstart for timeout management*/
  2160. tickstart = HAL_GetTick();
  2161. /* Check the parameters */
  2162. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2163. if(hi2c->State == HAL_I2C_STATE_READY)
  2164. {
  2165. /* Wait until BUSY flag is reset */
  2166. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2167. {
  2168. return HAL_BUSY;
  2169. }
  2170. /* Process Locked */
  2171. __HAL_LOCK(hi2c);
  2172. /* Check if the I2C is already enabled */
  2173. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2174. {
  2175. /* Enable I2C peripheral */
  2176. __HAL_I2C_ENABLE(hi2c);
  2177. }
  2178. /* Disable Pos */
  2179. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2180. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2181. hi2c->Mode = HAL_I2C_MODE_MEM;
  2182. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2183. /* Prepare transfer parameters */
  2184. hi2c->pBuffPtr = pData;
  2185. hi2c->XferCount = Size;
  2186. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2187. hi2c->XferSize = hi2c->XferCount;
  2188. /* Send Slave Address and Memory Address */
  2189. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2190. {
  2191. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2192. {
  2193. /* Process Unlocked */
  2194. __HAL_UNLOCK(hi2c);
  2195. return HAL_ERROR;
  2196. }
  2197. else
  2198. {
  2199. /* Process Unlocked */
  2200. __HAL_UNLOCK(hi2c);
  2201. return HAL_TIMEOUT;
  2202. }
  2203. }
  2204. if(hi2c->XferSize == 0U)
  2205. {
  2206. /* Clear ADDR flag */
  2207. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2208. /* Generate Stop */
  2209. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2210. }
  2211. else if(hi2c->XferSize == 1U)
  2212. {
  2213. /* Disable Acknowledge */
  2214. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2215. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  2216. software sequence must complete before the current byte end of transfer */
  2217. __disable_irq();
  2218. /* Clear ADDR flag */
  2219. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2220. /* Generate Stop */
  2221. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2222. /* Re-enable IRQs */
  2223. __enable_irq();
  2224. }
  2225. else if(hi2c->XferSize == 2U)
  2226. {
  2227. /* Enable Pos */
  2228. hi2c->Instance->CR1 |= I2C_CR1_POS;
  2229. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  2230. software sequence must complete before the current byte end of transfer */
  2231. __disable_irq();
  2232. /* Clear ADDR flag */
  2233. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2234. /* Disable Acknowledge */
  2235. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2236. /* Re-enable IRQs */
  2237. __enable_irq();
  2238. }
  2239. else
  2240. {
  2241. /* Enable Acknowledge */
  2242. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2243. /* Clear ADDR flag */
  2244. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2245. }
  2246. while(hi2c->XferSize > 0U)
  2247. {
  2248. if(hi2c->XferSize <= 3U)
  2249. {
  2250. /* One byte */
  2251. if(hi2c->XferSize== 1U)
  2252. {
  2253. /* Wait until RXNE flag is set */
  2254. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2255. {
  2256. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2257. {
  2258. return HAL_TIMEOUT;
  2259. }
  2260. else
  2261. {
  2262. return HAL_ERROR;
  2263. }
  2264. }
  2265. /* Read data from DR */
  2266. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2267. hi2c->XferSize--;
  2268. hi2c->XferCount--;
  2269. }
  2270. /* Two bytes */
  2271. else if(hi2c->XferSize == 2U)
  2272. {
  2273. /* Wait until BTF flag is set */
  2274. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2275. {
  2276. return HAL_TIMEOUT;
  2277. }
  2278. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  2279. software sequence must complete before the current byte end of transfer */
  2280. __disable_irq();
  2281. /* Generate Stop */
  2282. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2283. /* Read data from DR */
  2284. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2285. hi2c->XferSize--;
  2286. hi2c->XferCount--;
  2287. /* Re-enable IRQs */
  2288. __enable_irq();
  2289. /* Read data from DR */
  2290. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2291. hi2c->XferSize--;
  2292. hi2c->XferCount--;
  2293. }
  2294. /* 3 Last bytes */
  2295. else
  2296. {
  2297. /* Wait until BTF flag is set */
  2298. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2299. {
  2300. return HAL_TIMEOUT;
  2301. }
  2302. /* Disable Acknowledge */
  2303. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2304. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  2305. software sequence must complete before the current byte end of transfer */
  2306. __disable_irq();
  2307. /* Read data from DR */
  2308. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2309. hi2c->XferSize--;
  2310. hi2c->XferCount--;
  2311. /* Wait until BTF flag is set */
  2312. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2313. {
  2314. return HAL_TIMEOUT;
  2315. }
  2316. /* Generate Stop */
  2317. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2318. /* Read data from DR */
  2319. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2320. hi2c->XferSize--;
  2321. hi2c->XferCount--;
  2322. /* Re-enable IRQs */
  2323. __enable_irq();
  2324. /* Read data from DR */
  2325. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2326. hi2c->XferSize--;
  2327. hi2c->XferCount--;
  2328. }
  2329. }
  2330. else
  2331. {
  2332. /* Wait until RXNE flag is set */
  2333. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2334. {
  2335. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2336. {
  2337. return HAL_TIMEOUT;
  2338. }
  2339. else
  2340. {
  2341. return HAL_ERROR;
  2342. }
  2343. }
  2344. /* Read data from DR */
  2345. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2346. hi2c->XferSize--;
  2347. hi2c->XferCount--;
  2348. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2349. {
  2350. /* Read data from DR */
  2351. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2352. hi2c->XferSize--;
  2353. hi2c->XferCount--;
  2354. }
  2355. }
  2356. }
  2357. hi2c->State = HAL_I2C_STATE_READY;
  2358. hi2c->Mode = HAL_I2C_MODE_NONE;
  2359. /* Process Unlocked */
  2360. __HAL_UNLOCK(hi2c);
  2361. return HAL_OK;
  2362. }
  2363. else
  2364. {
  2365. return HAL_BUSY;
  2366. }
  2367. }
  2368. /**
  2369. * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
  2370. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2371. * the configuration information for the specified I2C.
  2372. * @param DevAddress Target device address
  2373. * @param MemAddress Internal memory address
  2374. * @param MemAddSize Size of internal memory address
  2375. * @param pData Pointer to data buffer
  2376. * @param Size Amount of data to be sent
  2377. * @retval HAL status
  2378. */
  2379. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2380. {
  2381. __IO uint32_t count = 0U;
  2382. /* Check the parameters */
  2383. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2384. if(hi2c->State == HAL_I2C_STATE_READY)
  2385. {
  2386. /* Wait until BUSY flag is reset */
  2387. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2388. do
  2389. {
  2390. if(count-- == 0U)
  2391. {
  2392. hi2c->PreviousState = I2C_STATE_NONE;
  2393. hi2c->State= HAL_I2C_STATE_READY;
  2394. /* Process Unlocked */
  2395. __HAL_UNLOCK(hi2c);
  2396. return HAL_TIMEOUT;
  2397. }
  2398. }
  2399. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2400. /* Process Locked */
  2401. __HAL_LOCK(hi2c);
  2402. /* Check if the I2C is already enabled */
  2403. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2404. {
  2405. /* Enable I2C peripheral */
  2406. __HAL_I2C_ENABLE(hi2c);
  2407. }
  2408. /* Disable Pos */
  2409. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2410. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2411. hi2c->Mode = HAL_I2C_MODE_MEM;
  2412. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2413. /* Prepare transfer parameters */
  2414. hi2c->pBuffPtr = pData;
  2415. hi2c->XferSize = Size;
  2416. hi2c->XferCount = Size;
  2417. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2418. hi2c->Devaddress = DevAddress;
  2419. hi2c->Memaddress = MemAddress;
  2420. hi2c->MemaddSize = MemAddSize;
  2421. hi2c->EventCount = 0U;
  2422. /* Generate Start */
  2423. hi2c->Instance->CR1 |= I2C_CR1_START;
  2424. /* Process Unlocked */
  2425. __HAL_UNLOCK(hi2c);
  2426. /* Note : The I2C interrupts must be enabled after unlocking current process
  2427. to avoid the risk of I2C interrupt handle execution before current
  2428. process unlock */
  2429. /* Enable EVT, BUF and ERR interrupt */
  2430. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2431. return HAL_OK;
  2432. }
  2433. else
  2434. {
  2435. return HAL_BUSY;
  2436. }
  2437. }
  2438. /**
  2439. * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
  2440. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2441. * the configuration information for the specified I2C.
  2442. * @param DevAddress Target device address
  2443. * @param MemAddress Internal memory address
  2444. * @param MemAddSize Size of internal memory address
  2445. * @param pData Pointer to data buffer
  2446. * @param Size Amount of data to be sent
  2447. * @retval HAL status
  2448. */
  2449. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2450. {
  2451. __IO uint32_t count = 0U;
  2452. /* Check the parameters */
  2453. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2454. if(hi2c->State == HAL_I2C_STATE_READY)
  2455. {
  2456. /* Wait until BUSY flag is reset */
  2457. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2458. do
  2459. {
  2460. if(count-- == 0U)
  2461. {
  2462. hi2c->PreviousState = I2C_STATE_NONE;
  2463. hi2c->State= HAL_I2C_STATE_READY;
  2464. /* Process Unlocked */
  2465. __HAL_UNLOCK(hi2c);
  2466. return HAL_TIMEOUT;
  2467. }
  2468. }
  2469. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2470. /* Process Locked */
  2471. __HAL_LOCK(hi2c);
  2472. /* Check if the I2C is already enabled */
  2473. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2474. {
  2475. /* Enable I2C peripheral */
  2476. __HAL_I2C_ENABLE(hi2c);
  2477. }
  2478. /* Disable Pos */
  2479. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2480. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2481. hi2c->Mode = HAL_I2C_MODE_MEM;
  2482. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2483. /* Prepare transfer parameters */
  2484. hi2c->pBuffPtr = pData;
  2485. hi2c->XferSize = Size;
  2486. hi2c->XferCount = Size;
  2487. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2488. hi2c->Devaddress = DevAddress;
  2489. hi2c->Memaddress = MemAddress;
  2490. hi2c->MemaddSize = MemAddSize;
  2491. hi2c->EventCount = 0U;
  2492. /* Enable Acknowledge */
  2493. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  2494. /* Generate Start */
  2495. hi2c->Instance->CR1 |= I2C_CR1_START;
  2496. /* Process Unlocked */
  2497. __HAL_UNLOCK(hi2c);
  2498. if(hi2c->XferSize > 0U)
  2499. {
  2500. /* Note : The I2C interrupts must be enabled after unlocking current process
  2501. to avoid the risk of I2C interrupt handle execution before current
  2502. process unlock */
  2503. /* Enable EVT, BUF and ERR interrupt */
  2504. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2505. }
  2506. return HAL_OK;
  2507. }
  2508. else
  2509. {
  2510. return HAL_BUSY;
  2511. }
  2512. }
  2513. /**
  2514. * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
  2515. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2516. * the configuration information for the specified I2C.
  2517. * @param DevAddress Target device address
  2518. * @param MemAddress Internal memory address
  2519. * @param MemAddSize Size of internal memory address
  2520. * @param pData Pointer to data buffer
  2521. * @param Size Amount of data to be sent
  2522. * @retval HAL status
  2523. */
  2524. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2525. {
  2526. __IO uint32_t count = 0U;
  2527. uint32_t tickstart = 0x00U;
  2528. /* Init tickstart for timeout management*/
  2529. tickstart = HAL_GetTick();
  2530. /* Check the parameters */
  2531. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2532. if(hi2c->State == HAL_I2C_STATE_READY)
  2533. {
  2534. /* Wait until BUSY flag is reset */
  2535. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2536. do
  2537. {
  2538. if(count-- == 0U)
  2539. {
  2540. hi2c->PreviousState = I2C_STATE_NONE;
  2541. hi2c->State= HAL_I2C_STATE_READY;
  2542. /* Process Unlocked */
  2543. __HAL_UNLOCK(hi2c);
  2544. return HAL_TIMEOUT;
  2545. }
  2546. }
  2547. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2548. /* Process Locked */
  2549. __HAL_LOCK(hi2c);
  2550. /* Check if the I2C is already enabled */
  2551. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2552. {
  2553. /* Enable I2C peripheral */
  2554. __HAL_I2C_ENABLE(hi2c);
  2555. }
  2556. /* Disable Pos */
  2557. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2558. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2559. hi2c->Mode = HAL_I2C_MODE_MEM;
  2560. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2561. /* Prepare transfer parameters */
  2562. hi2c->pBuffPtr = pData;
  2563. hi2c->XferSize = Size;
  2564. hi2c->XferCount = Size;
  2565. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2566. if(hi2c->XferSize > 0U)
  2567. {
  2568. /* Set the I2C DMA transfer complete callback */
  2569. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  2570. /* Set the DMA error callback */
  2571. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  2572. /* Set the unused DMA callbacks to NULL */
  2573. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  2574. hi2c->hdmatx->XferAbortCallback = NULL;
  2575. /* Enable the DMA channel */
  2576. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  2577. /* Send Slave Address and Memory Address */
  2578. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2579. {
  2580. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2581. {
  2582. /* Process Unlocked */
  2583. __HAL_UNLOCK(hi2c);
  2584. return HAL_ERROR;
  2585. }
  2586. else
  2587. {
  2588. /* Process Unlocked */
  2589. __HAL_UNLOCK(hi2c);
  2590. return HAL_TIMEOUT;
  2591. }
  2592. }
  2593. /* Clear ADDR flag */
  2594. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2595. /* Process Unlocked */
  2596. __HAL_UNLOCK(hi2c);
  2597. /* Note : The I2C interrupts must be enabled after unlocking current process
  2598. to avoid the risk of I2C interrupt handle execution before current
  2599. process unlock */
  2600. /* Enable ERR interrupt */
  2601. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2602. /* Enable DMA Request */
  2603. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2604. }
  2605. return HAL_OK;
  2606. }
  2607. else
  2608. {
  2609. return HAL_BUSY;
  2610. }
  2611. }
  2612. /**
  2613. * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
  2614. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2615. * the configuration information for the specified I2C.
  2616. * @param DevAddress Target device address
  2617. * @param MemAddress Internal memory address
  2618. * @param MemAddSize Size of internal memory address
  2619. * @param pData Pointer to data buffer
  2620. * @param Size Amount of data to be read
  2621. * @retval HAL status
  2622. */
  2623. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2624. {
  2625. uint32_t tickstart = 0x00U;
  2626. __IO uint32_t count = 0U;
  2627. /* Init tickstart for timeout management*/
  2628. tickstart = HAL_GetTick();
  2629. /* Check the parameters */
  2630. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2631. if(hi2c->State == HAL_I2C_STATE_READY)
  2632. {
  2633. /* Wait until BUSY flag is reset */
  2634. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2635. do
  2636. {
  2637. if(count-- == 0U)
  2638. {
  2639. hi2c->PreviousState = I2C_STATE_NONE;
  2640. hi2c->State= HAL_I2C_STATE_READY;
  2641. /* Process Unlocked */
  2642. __HAL_UNLOCK(hi2c);
  2643. return HAL_TIMEOUT;
  2644. }
  2645. }
  2646. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2647. /* Process Locked */
  2648. __HAL_LOCK(hi2c);
  2649. /* Check if the I2C is already enabled */
  2650. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2651. {
  2652. /* Enable I2C peripheral */
  2653. __HAL_I2C_ENABLE(hi2c);
  2654. }
  2655. /* Disable Pos */
  2656. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2657. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2658. hi2c->Mode = HAL_I2C_MODE_MEM;
  2659. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2660. /* Prepare transfer parameters */
  2661. hi2c->pBuffPtr = pData;
  2662. hi2c->XferCount = Size;
  2663. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2664. hi2c->XferSize = hi2c->XferCount;
  2665. if(hi2c->XferSize > 0U)
  2666. {
  2667. /* Set the I2C DMA transfer complete callback */
  2668. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2669. /* Set the DMA error callback */
  2670. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2671. /* Set the unused DMA callbacks to NULL */
  2672. hi2c->hdmarx->XferAbortCallback = NULL;
  2673. /* Enable the DMA channel */
  2674. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  2675. /* Send Slave Address and Memory Address */
  2676. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2677. {
  2678. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2679. {
  2680. /* Process Unlocked */
  2681. __HAL_UNLOCK(hi2c);
  2682. return HAL_ERROR;
  2683. }
  2684. else
  2685. {
  2686. /* Process Unlocked */
  2687. __HAL_UNLOCK(hi2c);
  2688. return HAL_TIMEOUT;
  2689. }
  2690. }
  2691. if(Size == 1U)
  2692. {
  2693. /* Disable Acknowledge */
  2694. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2695. }
  2696. else
  2697. {
  2698. /* Enable Last DMA bit */
  2699. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  2700. }
  2701. /* Clear ADDR flag */
  2702. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2703. /* Process Unlocked */
  2704. __HAL_UNLOCK(hi2c);
  2705. /* Note : The I2C interrupts must be enabled after unlocking current process
  2706. to avoid the risk of I2C interrupt handle execution before current
  2707. process unlock */
  2708. /* Enable ERR interrupt */
  2709. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2710. /* Enable DMA Request */
  2711. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2712. }
  2713. else
  2714. {
  2715. /* Send Slave Address and Memory Address */
  2716. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2717. {
  2718. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2719. {
  2720. /* Process Unlocked */
  2721. __HAL_UNLOCK(hi2c);
  2722. return HAL_ERROR;
  2723. }
  2724. else
  2725. {
  2726. /* Process Unlocked */
  2727. __HAL_UNLOCK(hi2c);
  2728. return HAL_TIMEOUT;
  2729. }
  2730. }
  2731. /* Clear ADDR flag */
  2732. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2733. /* Generate Stop */
  2734. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2735. hi2c->State = HAL_I2C_STATE_READY;
  2736. /* Process Unlocked */
  2737. __HAL_UNLOCK(hi2c);
  2738. }
  2739. return HAL_OK;
  2740. }
  2741. else
  2742. {
  2743. return HAL_BUSY;
  2744. }
  2745. }
  2746. /**
  2747. * @brief Checks if target device is ready for communication.
  2748. * @note This function is used with Memory devices
  2749. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2750. * the configuration information for the specified I2C.
  2751. * @param DevAddress Target device address
  2752. * @param Trials Number of trials
  2753. * @param Timeout Timeout duration
  2754. * @retval HAL status
  2755. */
  2756. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
  2757. {
  2758. uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
  2759. /* Get tick */
  2760. tickstart = HAL_GetTick();
  2761. if(hi2c->State == HAL_I2C_STATE_READY)
  2762. {
  2763. /* Wait until BUSY flag is reset */
  2764. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2765. {
  2766. return HAL_BUSY;
  2767. }
  2768. /* Process Locked */
  2769. __HAL_LOCK(hi2c);
  2770. /* Check if the I2C is already enabled */
  2771. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2772. {
  2773. /* Enable I2C peripheral */
  2774. __HAL_I2C_ENABLE(hi2c);
  2775. }
  2776. /* Disable Pos */
  2777. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2778. hi2c->State = HAL_I2C_STATE_BUSY;
  2779. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2780. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2781. do
  2782. {
  2783. /* Generate Start */
  2784. hi2c->Instance->CR1 |= I2C_CR1_START;
  2785. /* Wait until SB flag is set */
  2786. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
  2787. {
  2788. return HAL_TIMEOUT;
  2789. }
  2790. /* Send slave address */
  2791. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  2792. /* Wait until ADDR or AF flag are set */
  2793. /* Get tick */
  2794. tickstart = HAL_GetTick();
  2795. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2796. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2797. tmp3 = hi2c->State;
  2798. while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
  2799. {
  2800. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  2801. {
  2802. hi2c->State = HAL_I2C_STATE_TIMEOUT;
  2803. }
  2804. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2805. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2806. tmp3 = hi2c->State;
  2807. }
  2808. hi2c->State = HAL_I2C_STATE_READY;
  2809. /* Check if the ADDR flag has been set */
  2810. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
  2811. {
  2812. /* Generate Stop */
  2813. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2814. /* Clear ADDR Flag */
  2815. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2816. /* Wait until BUSY flag is reset */
  2817. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2818. {
  2819. return HAL_TIMEOUT;
  2820. }
  2821. hi2c->State = HAL_I2C_STATE_READY;
  2822. /* Process Unlocked */
  2823. __HAL_UNLOCK(hi2c);
  2824. return HAL_OK;
  2825. }
  2826. else
  2827. {
  2828. /* Generate Stop */
  2829. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2830. /* Clear AF Flag */
  2831. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2832. /* Wait until BUSY flag is reset */
  2833. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2834. {
  2835. return HAL_TIMEOUT;
  2836. }
  2837. }
  2838. }while(I2C_Trials++ < Trials);
  2839. hi2c->State = HAL_I2C_STATE_READY;
  2840. /* Process Unlocked */
  2841. __HAL_UNLOCK(hi2c);
  2842. return HAL_ERROR;
  2843. }
  2844. else
  2845. {
  2846. return HAL_BUSY;
  2847. }
  2848. }
  2849. /**
  2850. * @brief This function handles I2C event interrupt request.
  2851. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2852. * the configuration information for the specified I2C.
  2853. * @retval None
  2854. */
  2855. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
  2856. {
  2857. uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
  2858. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2859. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2860. uint32_t CurrentMode = hi2c->Mode;
  2861. /* Master or Memory mode selected */
  2862. if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  2863. {
  2864. /* SB Set ----------------------------------------------------------------*/
  2865. if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2866. {
  2867. I2C_Master_SB(hi2c);
  2868. }
  2869. /* ADD10 Set -------------------------------------------------------------*/
  2870. else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2871. {
  2872. I2C_Master_ADD10(hi2c);
  2873. }
  2874. /* ADDR Set --------------------------------------------------------------*/
  2875. else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2876. {
  2877. I2C_Master_ADDR(hi2c);
  2878. }
  2879. /* I2C in mode Transmitter -----------------------------------------------*/
  2880. if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2881. {
  2882. /* TXE set and BTF reset -----------------------------------------------*/
  2883. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2884. {
  2885. I2C_MasterTransmit_TXE(hi2c);
  2886. }
  2887. /* BTF set -------------------------------------------------------------*/
  2888. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2889. {
  2890. I2C_MasterTransmit_BTF(hi2c);
  2891. }
  2892. }
  2893. /* I2C in mode Receiver --------------------------------------------------*/
  2894. else
  2895. {
  2896. /* RXNE set and BTF reset -----------------------------------------------*/
  2897. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2898. {
  2899. I2C_MasterReceive_RXNE(hi2c);
  2900. }
  2901. /* BTF set -------------------------------------------------------------*/
  2902. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2903. {
  2904. I2C_MasterReceive_BTF(hi2c);
  2905. }
  2906. }
  2907. }
  2908. /* Slave mode selected */
  2909. else
  2910. {
  2911. /* ADDR set --------------------------------------------------------------*/
  2912. if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2913. {
  2914. I2C_Slave_ADDR(hi2c);
  2915. }
  2916. /* STOPF set --------------------------------------------------------------*/
  2917. else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2918. {
  2919. I2C_Slave_STOPF(hi2c);
  2920. }
  2921. /* I2C in mode Transmitter -----------------------------------------------*/
  2922. else if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2923. {
  2924. /* TXE set and BTF reset -----------------------------------------------*/
  2925. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2926. {
  2927. I2C_SlaveTransmit_TXE(hi2c);
  2928. }
  2929. /* BTF set -------------------------------------------------------------*/
  2930. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2931. {
  2932. I2C_SlaveTransmit_BTF(hi2c);
  2933. }
  2934. }
  2935. /* I2C in mode Receiver --------------------------------------------------*/
  2936. else
  2937. {
  2938. /* RXNE set and BTF reset ----------------------------------------------*/
  2939. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2940. {
  2941. I2C_SlaveReceive_RXNE(hi2c);
  2942. }
  2943. /* BTF set -------------------------------------------------------------*/
  2944. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2945. {
  2946. I2C_SlaveReceive_BTF(hi2c);
  2947. }
  2948. }
  2949. }
  2950. }
  2951. /**
  2952. * @brief This function handles I2C error interrupt request.
  2953. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2954. * the configuration information for the specified I2C.
  2955. * @retval None
  2956. */
  2957. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
  2958. {
  2959. uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
  2960. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2961. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2962. /* I2C Bus error interrupt occurred ----------------------------------------*/
  2963. if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2964. {
  2965. hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
  2966. /* Clear BERR flag */
  2967. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
  2968. /* Workaround: Start cannot be generated after a misplaced Stop */
  2969. SET_BIT(hi2c->Instance->CR1, I2C_CR1_SWRST);
  2970. }
  2971. /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
  2972. if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2973. {
  2974. hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
  2975. /* Clear ARLO flag */
  2976. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
  2977. }
  2978. /* I2C Acknowledge failure error interrupt occurred ------------------------*/
  2979. if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2980. {
  2981. tmp1 = hi2c->Mode;
  2982. tmp2 = hi2c->XferCount;
  2983. tmp3 = hi2c->State;
  2984. tmp4 = hi2c->PreviousState;
  2985. if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
  2986. ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
  2987. ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
  2988. {
  2989. I2C_Slave_AF(hi2c);
  2990. }
  2991. else
  2992. {
  2993. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  2994. /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
  2995. if(hi2c->Mode == HAL_I2C_MODE_MASTER)
  2996. {
  2997. /* Generate Stop */
  2998. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2999. }
  3000. /* Clear AF flag */
  3001. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3002. }
  3003. }
  3004. /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
  3005. if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  3006. {
  3007. hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
  3008. /* Clear OVR flag */
  3009. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
  3010. }
  3011. /* Call the Error Callback in case of Error detected -----------------------*/
  3012. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  3013. {
  3014. I2C_ITError(hi2c);
  3015. }
  3016. }
  3017. /**
  3018. * @brief Master Tx Transfer completed callback.
  3019. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3020. * the configuration information for the specified I2C.
  3021. * @retval None
  3022. */
  3023. __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
  3024. {
  3025. /* Prevent unused argument(s) compilation warning */
  3026. UNUSED(hi2c);
  3027. /* NOTE : This function should not be modified, when the callback is needed,
  3028. the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
  3029. */
  3030. }
  3031. /**
  3032. * @brief Master Rx Transfer completed callback.
  3033. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3034. * the configuration information for the specified I2C.
  3035. * @retval None
  3036. */
  3037. __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3038. {
  3039. /* Prevent unused argument(s) compilation warning */
  3040. UNUSED(hi2c);
  3041. /* NOTE : This function should not be modified, when the callback is needed,
  3042. the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
  3043. */
  3044. }
  3045. /** @brief Slave Tx Transfer completed callback.
  3046. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3047. * the configuration information for the specified I2C.
  3048. * @retval None
  3049. */
  3050. __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
  3051. {
  3052. /* Prevent unused argument(s) compilation warning */
  3053. UNUSED(hi2c);
  3054. /* NOTE : This function should not be modified, when the callback is needed,
  3055. the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
  3056. */
  3057. }
  3058. /**
  3059. * @brief Slave Rx Transfer completed callback.
  3060. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3061. * the configuration information for the specified I2C.
  3062. * @retval None
  3063. */
  3064. __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3065. {
  3066. /* Prevent unused argument(s) compilation warning */
  3067. UNUSED(hi2c);
  3068. /* NOTE : This function should not be modified, when the callback is needed,
  3069. the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
  3070. */
  3071. }
  3072. /**
  3073. * @brief Slave Address Match callback.
  3074. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3075. * the configuration information for the specified I2C.
  3076. * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
  3077. * @param AddrMatchCode Address Match Code
  3078. * @retval None
  3079. */
  3080. __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
  3081. {
  3082. /* Prevent unused argument(s) compilation warning */
  3083. UNUSED(hi2c);
  3084. UNUSED(TransferDirection);
  3085. UNUSED(AddrMatchCode);
  3086. /* NOTE : This function should not be modified, when the callback is needed,
  3087. the HAL_I2C_AddrCallback can be implemented in the user file
  3088. */
  3089. }
  3090. /**
  3091. * @brief Listen Complete callback.
  3092. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3093. * the configuration information for the specified I2C.
  3094. * @retval None
  3095. */
  3096. __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
  3097. {
  3098. /* Prevent unused argument(s) compilation warning */
  3099. UNUSED(hi2c);
  3100. /* NOTE : This function should not be modified, when the callback is needed,
  3101. the HAL_I2C_ListenCpltCallback can be implemented in the user file
  3102. */
  3103. }
  3104. /**
  3105. * @brief Memory Tx Transfer completed callback.
  3106. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3107. * the configuration information for the specified I2C.
  3108. * @retval None
  3109. */
  3110. __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
  3111. {
  3112. /* Prevent unused argument(s) compilation warning */
  3113. UNUSED(hi2c);
  3114. /* NOTE : This function should not be modified, when the callback is needed,
  3115. the HAL_I2C_MemTxCpltCallback can be implemented in the user file
  3116. */
  3117. }
  3118. /**
  3119. * @brief Memory Rx Transfer completed callback.
  3120. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3121. * the configuration information for the specified I2C.
  3122. * @retval None
  3123. */
  3124. __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3125. {
  3126. /* Prevent unused argument(s) compilation warning */
  3127. UNUSED(hi2c);
  3128. /* NOTE : This function should not be modified, when the callback is needed,
  3129. the HAL_I2C_MemRxCpltCallback can be implemented in the user file
  3130. */
  3131. }
  3132. /**
  3133. * @brief I2C error callback.
  3134. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3135. * the configuration information for the specified I2C.
  3136. * @retval None
  3137. */
  3138. __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
  3139. {
  3140. /* Prevent unused argument(s) compilation warning */
  3141. UNUSED(hi2c);
  3142. /* NOTE : This function should not be modified, when the callback is needed,
  3143. the HAL_I2C_ErrorCallback can be implemented in the user file
  3144. */
  3145. }
  3146. /**
  3147. * @brief I2C abort callback.
  3148. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3149. * the configuration information for the specified I2C.
  3150. * @retval None
  3151. */
  3152. __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
  3153. {
  3154. /* Prevent unused argument(s) compilation warning */
  3155. UNUSED(hi2c);
  3156. /* NOTE : This function should not be modified, when the callback is needed,
  3157. the HAL_I2C_AbortCpltCallback could be implemented in the user file
  3158. */
  3159. }
  3160. /**
  3161. * @}
  3162. */
  3163. /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  3164. * @brief Peripheral State and Errors functions
  3165. *
  3166. @verbatim
  3167. ===============================================================================
  3168. ##### Peripheral State, Mode and Error functions #####
  3169. ===============================================================================
  3170. [..]
  3171. This subsection permits to get in run-time the status of the peripheral
  3172. and the data flow.
  3173. @endverbatim
  3174. * @{
  3175. */
  3176. /**
  3177. * @brief Return the I2C handle state.
  3178. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3179. * the configuration information for the specified I2C.
  3180. * @retval HAL state
  3181. */
  3182. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
  3183. {
  3184. /* Return I2C handle state */
  3185. return hi2c->State;
  3186. }
  3187. /**
  3188. * @brief Return the I2C Master, Slave, Memory or no mode.
  3189. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3190. * the configuration information for I2C module
  3191. * @retval HAL mode
  3192. */
  3193. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
  3194. {
  3195. return hi2c->Mode;
  3196. }
  3197. /**
  3198. * @brief Return the I2C error code
  3199. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3200. * the configuration information for the specified I2C.
  3201. * @retval I2C Error Code
  3202. */
  3203. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
  3204. {
  3205. return hi2c->ErrorCode;
  3206. }
  3207. /**
  3208. * @}
  3209. */
  3210. /**
  3211. * @brief Handle TXE flag for Master
  3212. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3213. * the configuration information for I2C module
  3214. * @retval HAL status
  3215. */
  3216. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3217. {
  3218. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3219. uint32_t CurrentState = hi2c->State;
  3220. uint32_t CurrentMode = hi2c->Mode;
  3221. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3222. if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  3223. {
  3224. /* Call TxCpltCallback() directly if no stop mode is set */
  3225. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3226. {
  3227. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3228. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3229. hi2c->Mode = HAL_I2C_MODE_NONE;
  3230. hi2c->State = HAL_I2C_STATE_READY;
  3231. HAL_I2C_MasterTxCpltCallback(hi2c);
  3232. }
  3233. else /* Generate Stop condition then Call TxCpltCallback() */
  3234. {
  3235. /* Disable EVT, BUF and ERR interrupt */
  3236. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3237. /* Generate Stop */
  3238. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3239. hi2c->PreviousState = I2C_STATE_NONE;
  3240. hi2c->State = HAL_I2C_STATE_READY;
  3241. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3242. {
  3243. hi2c->Mode = HAL_I2C_MODE_NONE;
  3244. HAL_I2C_MemTxCpltCallback(hi2c);
  3245. }
  3246. else
  3247. {
  3248. hi2c->Mode = HAL_I2C_MODE_NONE;
  3249. HAL_I2C_MasterTxCpltCallback(hi2c);
  3250. }
  3251. }
  3252. }
  3253. else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
  3254. ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
  3255. {
  3256. if(hi2c->XferCount == 0U)
  3257. {
  3258. /* Disable BUF interrupt */
  3259. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3260. }
  3261. else
  3262. {
  3263. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3264. {
  3265. if(hi2c->EventCount == 0)
  3266. {
  3267. /* If Memory address size is 8Bit */
  3268. if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  3269. {
  3270. /* Send Memory Address */
  3271. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3272. hi2c->EventCount += 2;
  3273. }
  3274. /* If Memory address size is 16Bit */
  3275. else
  3276. {
  3277. /* Send MSB of Memory Address */
  3278. hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
  3279. hi2c->EventCount++;
  3280. }
  3281. }
  3282. else if(hi2c->EventCount == 1)
  3283. {
  3284. /* Send LSB of Memory Address */
  3285. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3286. hi2c->EventCount++;
  3287. }
  3288. else if(hi2c->EventCount == 2)
  3289. {
  3290. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3291. {
  3292. /* Generate Restart */
  3293. hi2c->Instance->CR1 |= I2C_CR1_START;
  3294. }
  3295. else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3296. {
  3297. /* Write data to DR */
  3298. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3299. hi2c->XferCount--;
  3300. }
  3301. }
  3302. }
  3303. else
  3304. {
  3305. /* Write data to DR */
  3306. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3307. hi2c->XferCount--;
  3308. }
  3309. }
  3310. }
  3311. return HAL_OK;
  3312. }
  3313. /**
  3314. * @brief Handle BTF flag for Master transmitter
  3315. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3316. * the configuration information for I2C module
  3317. * @retval HAL status
  3318. */
  3319. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3320. {
  3321. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3322. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3323. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3324. {
  3325. if(hi2c->XferCount != 0U)
  3326. {
  3327. /* Write data to DR */
  3328. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3329. hi2c->XferCount--;
  3330. }
  3331. else
  3332. {
  3333. /* Call TxCpltCallback() directly if no stop mode is set */
  3334. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3335. {
  3336. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3337. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3338. hi2c->Mode = HAL_I2C_MODE_NONE;
  3339. hi2c->State = HAL_I2C_STATE_READY;
  3340. HAL_I2C_MasterTxCpltCallback(hi2c);
  3341. }
  3342. else /* Generate Stop condition then Call TxCpltCallback() */
  3343. {
  3344. /* Disable EVT, BUF and ERR interrupt */
  3345. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3346. /* Generate Stop */
  3347. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3348. hi2c->PreviousState = I2C_STATE_NONE;
  3349. hi2c->State = HAL_I2C_STATE_READY;
  3350. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3351. {
  3352. hi2c->Mode = HAL_I2C_MODE_NONE;
  3353. HAL_I2C_MemTxCpltCallback(hi2c);
  3354. }
  3355. else
  3356. {
  3357. hi2c->Mode = HAL_I2C_MODE_NONE;
  3358. HAL_I2C_MasterTxCpltCallback(hi2c);
  3359. }
  3360. }
  3361. }
  3362. }
  3363. return HAL_OK;
  3364. }
  3365. /**
  3366. * @brief Handle RXNE flag for Master
  3367. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3368. * the configuration information for I2C module
  3369. * @retval HAL status
  3370. */
  3371. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3372. {
  3373. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3374. {
  3375. uint32_t tmp = 0U;
  3376. tmp = hi2c->XferCount;
  3377. if(tmp > 3U)
  3378. {
  3379. /* Read data from DR */
  3380. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3381. hi2c->XferCount--;
  3382. }
  3383. else if((tmp == 2U) || (tmp == 3U))
  3384. {
  3385. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3386. {
  3387. /* Disable Acknowledge */
  3388. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3389. /* Enable Pos */
  3390. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3391. }
  3392. else
  3393. {
  3394. /* Enable Acknowledge */
  3395. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3396. }
  3397. /* Disable BUF interrupt */
  3398. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3399. }
  3400. else
  3401. {
  3402. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3403. {
  3404. /* Disable Acknowledge */
  3405. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3406. }
  3407. else
  3408. {
  3409. /* Enable Acknowledge */
  3410. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3411. }
  3412. /* Disable EVT, BUF and ERR interrupt */
  3413. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3414. /* Read data from DR */
  3415. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3416. hi2c->XferCount--;
  3417. hi2c->State = HAL_I2C_STATE_READY;
  3418. hi2c->PreviousState = I2C_STATE_NONE;
  3419. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3420. {
  3421. hi2c->Mode = HAL_I2C_MODE_NONE;
  3422. HAL_I2C_MemRxCpltCallback(hi2c);
  3423. }
  3424. else
  3425. {
  3426. hi2c->Mode = HAL_I2C_MODE_NONE;
  3427. HAL_I2C_MasterRxCpltCallback(hi2c);
  3428. }
  3429. }
  3430. }
  3431. return HAL_OK;
  3432. }
  3433. /**
  3434. * @brief Handle BTF flag for Master receiver
  3435. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3436. * the configuration information for I2C module
  3437. * @retval HAL status
  3438. */
  3439. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
  3440. {
  3441. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3442. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3443. if(hi2c->XferCount == 3U)
  3444. {
  3445. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3446. {
  3447. /* Disable Acknowledge */
  3448. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3449. }
  3450. /* Read data from DR */
  3451. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3452. hi2c->XferCount--;
  3453. }
  3454. else if(hi2c->XferCount == 2U)
  3455. {
  3456. /* Prepare next transfer or stop current transfer */
  3457. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3458. {
  3459. if(CurrentXferOptions != I2C_NEXT_FRAME)
  3460. {
  3461. /* Disable Acknowledge */
  3462. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3463. }
  3464. else
  3465. {
  3466. /* Enable Acknowledge */
  3467. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3468. }
  3469. /* Disable EVT and ERR interrupt */
  3470. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3471. }
  3472. else
  3473. {
  3474. /* Disable EVT and ERR interrupt */
  3475. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3476. /* Generate Stop */
  3477. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3478. }
  3479. /* Read data from DR */
  3480. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3481. hi2c->XferCount--;
  3482. /* Read data from DR */
  3483. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3484. hi2c->XferCount--;
  3485. hi2c->State = HAL_I2C_STATE_READY;
  3486. hi2c->PreviousState = I2C_STATE_NONE;
  3487. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3488. {
  3489. hi2c->Mode = HAL_I2C_MODE_NONE;
  3490. HAL_I2C_MemRxCpltCallback(hi2c);
  3491. }
  3492. else
  3493. {
  3494. hi2c->Mode = HAL_I2C_MODE_NONE;
  3495. HAL_I2C_MasterRxCpltCallback(hi2c);
  3496. }
  3497. }
  3498. else
  3499. {
  3500. /* Read data from DR */
  3501. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3502. hi2c->XferCount--;
  3503. }
  3504. return HAL_OK;
  3505. }
  3506. /**
  3507. * @brief Handle SB flag for Master
  3508. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3509. * the configuration information for I2C module
  3510. * @retval HAL status
  3511. */
  3512. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
  3513. {
  3514. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3515. {
  3516. if(hi2c->EventCount == 0U)
  3517. {
  3518. /* Send slave address */
  3519. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3520. }
  3521. else
  3522. {
  3523. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3524. }
  3525. }
  3526. else
  3527. {
  3528. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  3529. {
  3530. /* Send slave 7 Bits address */
  3531. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3532. {
  3533. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3534. }
  3535. else
  3536. {
  3537. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3538. }
  3539. }
  3540. else
  3541. {
  3542. if(hi2c->EventCount == 0U)
  3543. {
  3544. /* Send header of slave address */
  3545. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
  3546. }
  3547. else if(hi2c->EventCount == 1U)
  3548. {
  3549. /* Send header of slave address */
  3550. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
  3551. }
  3552. }
  3553. }
  3554. return HAL_OK;
  3555. }
  3556. /**
  3557. * @brief Handle ADD10 flag for Master
  3558. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3559. * the configuration information for I2C module
  3560. * @retval HAL status
  3561. */
  3562. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
  3563. {
  3564. /* Send slave address */
  3565. hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
  3566. return HAL_OK;
  3567. }
  3568. /**
  3569. * @brief Handle ADDR flag for Master
  3570. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3571. * the configuration information for I2C module
  3572. * @retval HAL status
  3573. */
  3574. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
  3575. {
  3576. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3577. uint32_t CurrentMode = hi2c->Mode;
  3578. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3579. uint32_t Prev_State = hi2c->PreviousState;
  3580. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3581. {
  3582. if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
  3583. {
  3584. /* Clear ADDR flag */
  3585. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3586. }
  3587. else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
  3588. {
  3589. /* Clear ADDR flag */
  3590. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3591. /* Generate Restart */
  3592. hi2c->Instance->CR1 |= I2C_CR1_START;
  3593. hi2c->EventCount++;
  3594. }
  3595. else
  3596. {
  3597. if(hi2c->XferCount == 0U)
  3598. {
  3599. /* Clear ADDR flag */
  3600. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3601. /* Generate Stop */
  3602. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3603. }
  3604. else if(hi2c->XferCount == 1U)
  3605. {
  3606. if(CurrentXferOptions == I2C_NO_OPTION_FRAME)
  3607. {
  3608. /* Disable Acknowledge */
  3609. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3610. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3611. {
  3612. /* Disable Acknowledge */
  3613. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3614. /* Clear ADDR flag */
  3615. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3616. }
  3617. else
  3618. {
  3619. /* Clear ADDR flag */
  3620. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3621. /* Generate Stop */
  3622. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3623. }
  3624. }
  3625. /* Prepare next transfer or stop current transfer */
  3626. else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
  3627. && (Prev_State != I2C_STATE_MASTER_BUSY_RX))
  3628. {
  3629. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3630. {
  3631. /* Disable Acknowledge */
  3632. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3633. }
  3634. else
  3635. {
  3636. /* Enable Acknowledge */
  3637. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3638. }
  3639. /* Clear ADDR flag */
  3640. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3641. }
  3642. else
  3643. {
  3644. /* Disable Acknowledge */
  3645. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3646. /* Clear ADDR flag */
  3647. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3648. /* Generate Stop */
  3649. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3650. }
  3651. }
  3652. else if(hi2c->XferCount == 2U)
  3653. {
  3654. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3655. {
  3656. /* Enable Pos */
  3657. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3658. /* Clear ADDR flag */
  3659. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3660. /* Disable Acknowledge */
  3661. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3662. }
  3663. else
  3664. {
  3665. /* Enable Acknowledge */
  3666. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3667. /* Clear ADDR flag */
  3668. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3669. }
  3670. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3671. {
  3672. /* Enable Last DMA bit */
  3673. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  3674. }
  3675. }
  3676. else
  3677. {
  3678. /* Enable Acknowledge */
  3679. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3680. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3681. {
  3682. /* Enable Last DMA bit */
  3683. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  3684. }
  3685. /* Clear ADDR flag */
  3686. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3687. }
  3688. /* Reset Event counter */
  3689. hi2c->EventCount = 0U;
  3690. }
  3691. }
  3692. else
  3693. {
  3694. /* Clear ADDR flag */
  3695. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3696. }
  3697. return HAL_OK;
  3698. }
  3699. /**
  3700. * @brief Handle TXE flag for Slave
  3701. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3702. * the configuration information for I2C module
  3703. * @retval HAL status
  3704. */
  3705. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3706. {
  3707. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3708. uint32_t CurrentState = hi2c->State;
  3709. if(hi2c->XferCount != 0U)
  3710. {
  3711. /* Write data to DR */
  3712. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3713. hi2c->XferCount--;
  3714. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3715. {
  3716. /* Last Byte is received, disable Interrupt */
  3717. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3718. /* Set state at HAL_I2C_STATE_LISTEN */
  3719. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3720. hi2c->State = HAL_I2C_STATE_LISTEN;
  3721. /* Call the Tx complete callback to inform upper layer of the end of receive process */
  3722. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3723. }
  3724. }
  3725. return HAL_OK;
  3726. }
  3727. /**
  3728. * @brief Handle BTF flag for Slave transmitter
  3729. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3730. * the configuration information for I2C module
  3731. * @retval HAL status
  3732. */
  3733. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3734. {
  3735. if(hi2c->XferCount != 0U)
  3736. {
  3737. /* Write data to DR */
  3738. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3739. hi2c->XferCount--;
  3740. }
  3741. return HAL_OK;
  3742. }
  3743. /**
  3744. * @brief Handle RXNE flag for Slave
  3745. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3746. * the configuration information for I2C module
  3747. * @retval HAL status
  3748. */
  3749. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3750. {
  3751. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3752. uint32_t CurrentState = hi2c->State;
  3753. if(hi2c->XferCount != 0U)
  3754. {
  3755. /* Read data from DR */
  3756. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3757. hi2c->XferCount--;
  3758. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3759. {
  3760. /* Last Byte is received, disable Interrupt */
  3761. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3762. /* Set state at HAL_I2C_STATE_LISTEN */
  3763. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  3764. hi2c->State = HAL_I2C_STATE_LISTEN;
  3765. /* Call the Rx complete callback to inform upper layer of the end of receive process */
  3766. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3767. }
  3768. }
  3769. return HAL_OK;
  3770. }
  3771. /**
  3772. * @brief Handle BTF flag for Slave receiver
  3773. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3774. * the configuration information for I2C module
  3775. * @retval HAL status
  3776. */
  3777. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
  3778. {
  3779. if(hi2c->XferCount != 0U)
  3780. {
  3781. /* Read data from DR */
  3782. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3783. hi2c->XferCount--;
  3784. }
  3785. return HAL_OK;
  3786. }
  3787. /**
  3788. * @brief Handle ADD flag for Slave
  3789. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3790. * the configuration information for I2C module
  3791. * @retval HAL status
  3792. */
  3793. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
  3794. {
  3795. uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
  3796. uint16_t SlaveAddrCode = 0U;
  3797. /* Transfer Direction requested by Master */
  3798. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
  3799. {
  3800. TransferDirection = I2C_DIRECTION_TRANSMIT;
  3801. }
  3802. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
  3803. {
  3804. SlaveAddrCode = hi2c->Init.OwnAddress1;
  3805. }
  3806. else
  3807. {
  3808. SlaveAddrCode = hi2c->Init.OwnAddress2;
  3809. }
  3810. /* Call Slave Addr callback */
  3811. HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  3812. return HAL_OK;
  3813. }
  3814. /**
  3815. * @brief Handle STOPF flag for Slave
  3816. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3817. * the configuration information for I2C module
  3818. * @retval HAL status
  3819. */
  3820. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
  3821. {
  3822. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3823. uint32_t CurrentState = hi2c->State;
  3824. /* Disable EVT, BUF and ERR interrupt */
  3825. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3826. /* Clear STOPF flag */
  3827. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  3828. /* Disable Acknowledge */
  3829. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3830. /* If a DMA is ongoing, Update handle size context */
  3831. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3832. {
  3833. if((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3834. {
  3835. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
  3836. }
  3837. else
  3838. {
  3839. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
  3840. }
  3841. }
  3842. /* All data are not transferred, so set error code accordingly */
  3843. if(hi2c->XferCount != 0U)
  3844. {
  3845. /* Store Last receive data if any */
  3846. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  3847. {
  3848. /* Read data from DR */
  3849. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3850. hi2c->XferCount--;
  3851. }
  3852. /* Store Last receive data if any */
  3853. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3854. {
  3855. /* Read data from DR */
  3856. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3857. hi2c->XferCount--;
  3858. }
  3859. /* Set ErrorCode corresponding to a Non-Acknowledge */
  3860. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  3861. }
  3862. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  3863. {
  3864. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3865. I2C_ITError(hi2c);
  3866. }
  3867. else
  3868. {
  3869. if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \
  3870. (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3871. {
  3872. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3873. hi2c->PreviousState = I2C_STATE_NONE;
  3874. hi2c->State = HAL_I2C_STATE_READY;
  3875. hi2c->Mode = HAL_I2C_MODE_NONE;
  3876. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3877. HAL_I2C_ListenCpltCallback(hi2c);
  3878. }
  3879. else
  3880. {
  3881. if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
  3882. {
  3883. hi2c->PreviousState = I2C_STATE_NONE;
  3884. hi2c->State = HAL_I2C_STATE_READY;
  3885. hi2c->Mode = HAL_I2C_MODE_NONE;
  3886. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3887. }
  3888. }
  3889. }
  3890. return HAL_OK;
  3891. }
  3892. /**
  3893. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3894. * the configuration information for I2C module
  3895. * @retval HAL status
  3896. */
  3897. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
  3898. {
  3899. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3900. uint32_t CurrentState = hi2c->State;
  3901. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3902. if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
  3903. (CurrentState == HAL_I2C_STATE_LISTEN))
  3904. {
  3905. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3906. /* Disable EVT, BUF and ERR interrupt */
  3907. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3908. /* Clear AF flag */
  3909. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3910. /* Disable Acknowledge */
  3911. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3912. hi2c->PreviousState = I2C_STATE_NONE;
  3913. hi2c->State = HAL_I2C_STATE_READY;
  3914. hi2c->Mode = HAL_I2C_MODE_NONE;
  3915. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3916. HAL_I2C_ListenCpltCallback(hi2c);
  3917. }
  3918. else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
  3919. {
  3920. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3921. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3922. hi2c->State = HAL_I2C_STATE_READY;
  3923. hi2c->Mode = HAL_I2C_MODE_NONE;
  3924. /* Disable EVT, BUF and ERR interrupt */
  3925. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3926. /* Clear AF flag */
  3927. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3928. /* Disable Acknowledge */
  3929. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3930. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3931. }
  3932. else
  3933. {
  3934. /* Clear AF flag only */
  3935. /* State Listen, but XferOptions == FIRST or NEXT */
  3936. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3937. }
  3938. return HAL_OK;
  3939. }
  3940. /**
  3941. * @brief I2C interrupts error process
  3942. * @param hi2c I2C handle.
  3943. * @retval None
  3944. */
  3945. static void I2C_ITError(I2C_HandleTypeDef *hi2c)
  3946. {
  3947. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3948. uint32_t CurrentState = hi2c->State;
  3949. if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3950. {
  3951. /* keep HAL_I2C_STATE_LISTEN */
  3952. hi2c->PreviousState = I2C_STATE_NONE;
  3953. hi2c->State = HAL_I2C_STATE_LISTEN;
  3954. }
  3955. else
  3956. {
  3957. /* If state is an abort treatment on going, don't change state */
  3958. /* This change will be do later */
  3959. if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
  3960. {
  3961. hi2c->State = HAL_I2C_STATE_READY;
  3962. }
  3963. hi2c->PreviousState = I2C_STATE_NONE;
  3964. hi2c->Mode = HAL_I2C_MODE_NONE;
  3965. }
  3966. /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
  3967. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  3968. /* Abort DMA transfer */
  3969. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3970. {
  3971. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  3972. if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
  3973. {
  3974. /* Set the DMA Abort callback :
  3975. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3976. hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  3977. if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  3978. {
  3979. /* Disable I2C peripheral to prevent dummy data in buffer */
  3980. __HAL_I2C_DISABLE(hi2c);
  3981. hi2c->State = HAL_I2C_STATE_READY;
  3982. /* Call Directly XferAbortCallback function in case of error */
  3983. hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  3984. }
  3985. }
  3986. else
  3987. {
  3988. /* Set the DMA Abort callback :
  3989. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3990. hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  3991. if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  3992. {
  3993. /* Store Last receive data if any */
  3994. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3995. {
  3996. /* Read data from DR */
  3997. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3998. }
  3999. /* Disable I2C peripheral to prevent dummy data in buffer */
  4000. __HAL_I2C_DISABLE(hi2c);
  4001. hi2c->State = HAL_I2C_STATE_READY;
  4002. /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
  4003. hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  4004. }
  4005. }
  4006. }
  4007. else if(hi2c->State == HAL_I2C_STATE_ABORT)
  4008. {
  4009. hi2c->State = HAL_I2C_STATE_READY;
  4010. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4011. /* Store Last receive data if any */
  4012. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  4013. {
  4014. /* Read data from DR */
  4015. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  4016. }
  4017. /* Disable I2C peripheral to prevent dummy data in buffer */
  4018. __HAL_I2C_DISABLE(hi2c);
  4019. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4020. HAL_I2C_AbortCpltCallback(hi2c);
  4021. }
  4022. else
  4023. {
  4024. /* Store Last receive data if any */
  4025. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  4026. {
  4027. /* Read data from DR */
  4028. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  4029. }
  4030. /* Call user error callback */
  4031. HAL_I2C_ErrorCallback(hi2c);
  4032. }
  4033. /* STOP Flag is not set after a NACK reception */
  4034. /* So may inform upper layer that listen phase is stopped */
  4035. /* during NACK error treatment */
  4036. if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
  4037. {
  4038. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  4039. hi2c->PreviousState = I2C_STATE_NONE;
  4040. hi2c->State = HAL_I2C_STATE_READY;
  4041. hi2c->Mode = HAL_I2C_MODE_NONE;
  4042. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  4043. HAL_I2C_ListenCpltCallback(hi2c);
  4044. }
  4045. }
  4046. /**
  4047. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4048. * the configuration information for I2C module
  4049. * @param DevAddress Target device address: The device 7 bits address value
  4050. * in datasheet must be shift at right before call interface
  4051. * @param Timeout Timeout duration
  4052. * @param Tickstart Tick start value
  4053. * @retval HAL status
  4054. */
  4055. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  4056. {
  4057. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4058. uint32_t CurrentXferOptions = hi2c->XferOptions;
  4059. /* Generate Start condition if first transfer */
  4060. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  4061. {
  4062. /* Generate Start */
  4063. hi2c->Instance->CR1 |= I2C_CR1_START;
  4064. }
  4065. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
  4066. {
  4067. /* Generate ReStart */
  4068. hi2c->Instance->CR1 |= I2C_CR1_START;
  4069. }
  4070. /* Wait until SB flag is set */
  4071. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4072. {
  4073. return HAL_TIMEOUT;
  4074. }
  4075. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  4076. {
  4077. /* Send slave address */
  4078. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4079. }
  4080. else
  4081. {
  4082. /* Send header of slave address */
  4083. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  4084. /* Wait until ADD10 flag is set */
  4085. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  4086. {
  4087. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4088. {
  4089. return HAL_ERROR;
  4090. }
  4091. else
  4092. {
  4093. return HAL_TIMEOUT;
  4094. }
  4095. }
  4096. /* Send slave address */
  4097. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  4098. }
  4099. /* Wait until ADDR flag is set */
  4100. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4101. {
  4102. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4103. {
  4104. return HAL_ERROR;
  4105. }
  4106. else
  4107. {
  4108. return HAL_TIMEOUT;
  4109. }
  4110. }
  4111. return HAL_OK;
  4112. }
  4113. /**
  4114. * @brief Master sends target device address for read request.
  4115. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4116. * the configuration information for I2C module
  4117. * @param DevAddress Target device address: The device 7 bits address value
  4118. * in datasheet must be shift at right before call interface
  4119. * @param Timeout Timeout duration
  4120. * @param Tickstart Tick start value
  4121. * @retval HAL status
  4122. */
  4123. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  4124. {
  4125. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4126. uint32_t CurrentXferOptions = hi2c->XferOptions;
  4127. /* Enable Acknowledge */
  4128. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  4129. /* Generate Start condition if first transfer */
  4130. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  4131. {
  4132. /* Generate Start */
  4133. hi2c->Instance->CR1 |= I2C_CR1_START;
  4134. }
  4135. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  4136. {
  4137. /* Generate ReStart */
  4138. hi2c->Instance->CR1 |= I2C_CR1_START;
  4139. }
  4140. /* Wait until SB flag is set */
  4141. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4142. {
  4143. return HAL_TIMEOUT;
  4144. }
  4145. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  4146. {
  4147. /* Send slave address */
  4148. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4149. }
  4150. else
  4151. {
  4152. /* Send header of slave address */
  4153. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  4154. /* Wait until ADD10 flag is set */
  4155. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  4156. {
  4157. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4158. {
  4159. return HAL_ERROR;
  4160. }
  4161. else
  4162. {
  4163. return HAL_TIMEOUT;
  4164. }
  4165. }
  4166. /* Send slave address */
  4167. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  4168. /* Wait until ADDR flag is set */
  4169. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4170. {
  4171. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4172. {
  4173. return HAL_ERROR;
  4174. }
  4175. else
  4176. {
  4177. return HAL_TIMEOUT;
  4178. }
  4179. }
  4180. /* Clear ADDR flag */
  4181. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4182. /* Generate Restart */
  4183. hi2c->Instance->CR1 |= I2C_CR1_START;
  4184. /* Wait until SB flag is set */
  4185. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4186. {
  4187. return HAL_TIMEOUT;
  4188. }
  4189. /* Send header of slave address */
  4190. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
  4191. }
  4192. /* Wait until ADDR flag is set */
  4193. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4194. {
  4195. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4196. {
  4197. return HAL_ERROR;
  4198. }
  4199. else
  4200. {
  4201. return HAL_TIMEOUT;
  4202. }
  4203. }
  4204. return HAL_OK;
  4205. }
  4206. /**
  4207. * @brief Master sends target device address followed by internal memory address for write request.
  4208. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4209. * the configuration information for I2C module
  4210. * @param DevAddress Target device address
  4211. * @param MemAddress Internal memory address
  4212. * @param MemAddSize Size of internal memory address
  4213. * @param Timeout Timeout duration
  4214. * @param Tickstart Tick start value
  4215. * @retval HAL status
  4216. */
  4217. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4218. {
  4219. /* Generate Start */
  4220. hi2c->Instance->CR1 |= I2C_CR1_START;
  4221. /* Wait until SB flag is set */
  4222. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4223. {
  4224. return HAL_TIMEOUT;
  4225. }
  4226. /* Send slave address */
  4227. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4228. /* Wait until ADDR flag is set */
  4229. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4230. {
  4231. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4232. {
  4233. return HAL_ERROR;
  4234. }
  4235. else
  4236. {
  4237. return HAL_TIMEOUT;
  4238. }
  4239. }
  4240. /* Clear ADDR flag */
  4241. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4242. /* Wait until TXE flag is set */
  4243. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4244. {
  4245. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4246. {
  4247. /* Generate Stop */
  4248. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4249. return HAL_ERROR;
  4250. }
  4251. else
  4252. {
  4253. return HAL_TIMEOUT;
  4254. }
  4255. }
  4256. /* If Memory address size is 8Bit */
  4257. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4258. {
  4259. /* Send Memory Address */
  4260. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4261. }
  4262. /* If Memory address size is 16Bit */
  4263. else
  4264. {
  4265. /* Send MSB of Memory Address */
  4266. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4267. /* Wait until TXE flag is set */
  4268. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4269. {
  4270. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4271. {
  4272. /* Generate Stop */
  4273. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4274. return HAL_ERROR;
  4275. }
  4276. else
  4277. {
  4278. return HAL_TIMEOUT;
  4279. }
  4280. }
  4281. /* Send LSB of Memory Address */
  4282. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4283. }
  4284. return HAL_OK;
  4285. }
  4286. /**
  4287. * @brief Master sends target device address followed by internal memory address for read request.
  4288. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4289. * the configuration information for I2C module
  4290. * @param DevAddress Target device address
  4291. * @param MemAddress Internal memory address
  4292. * @param MemAddSize Size of internal memory address
  4293. * @param Timeout Timeout duration
  4294. * @param Tickstart Tick start value
  4295. * @retval HAL status
  4296. */
  4297. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4298. {
  4299. /* Enable Acknowledge */
  4300. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  4301. /* Generate Start */
  4302. hi2c->Instance->CR1 |= I2C_CR1_START;
  4303. /* Wait until SB flag is set */
  4304. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4305. {
  4306. return HAL_TIMEOUT;
  4307. }
  4308. /* Send slave address */
  4309. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4310. /* Wait until ADDR flag is set */
  4311. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4312. {
  4313. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4314. {
  4315. return HAL_ERROR;
  4316. }
  4317. else
  4318. {
  4319. return HAL_TIMEOUT;
  4320. }
  4321. }
  4322. /* Clear ADDR flag */
  4323. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4324. /* Wait until TXE flag is set */
  4325. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4326. {
  4327. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4328. {
  4329. /* Generate Stop */
  4330. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4331. return HAL_ERROR;
  4332. }
  4333. else
  4334. {
  4335. return HAL_TIMEOUT;
  4336. }
  4337. }
  4338. /* If Memory address size is 8Bit */
  4339. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4340. {
  4341. /* Send Memory Address */
  4342. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4343. }
  4344. /* If Memory address size is 16Bit */
  4345. else
  4346. {
  4347. /* Send MSB of Memory Address */
  4348. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4349. /* Wait until TXE flag is set */
  4350. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4351. {
  4352. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4353. {
  4354. /* Generate Stop */
  4355. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4356. return HAL_ERROR;
  4357. }
  4358. else
  4359. {
  4360. return HAL_TIMEOUT;
  4361. }
  4362. }
  4363. /* Send LSB of Memory Address */
  4364. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4365. }
  4366. /* Wait until TXE flag is set */
  4367. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4368. {
  4369. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4370. {
  4371. /* Generate Stop */
  4372. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4373. return HAL_ERROR;
  4374. }
  4375. else
  4376. {
  4377. return HAL_TIMEOUT;
  4378. }
  4379. }
  4380. /* Generate Restart */
  4381. hi2c->Instance->CR1 |= I2C_CR1_START;
  4382. /* Wait until SB flag is set */
  4383. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4384. {
  4385. return HAL_TIMEOUT;
  4386. }
  4387. /* Send slave address */
  4388. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4389. /* Wait until ADDR flag is set */
  4390. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4391. {
  4392. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4393. {
  4394. return HAL_ERROR;
  4395. }
  4396. else
  4397. {
  4398. return HAL_TIMEOUT;
  4399. }
  4400. }
  4401. return HAL_OK;
  4402. }
  4403. /**
  4404. * @brief DMA I2C process complete callback.
  4405. * @param hdma DMA handle
  4406. * @retval None
  4407. */
  4408. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
  4409. {
  4410. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4411. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4412. uint32_t CurrentState = hi2c->State;
  4413. uint32_t CurrentMode = hi2c->Mode;
  4414. if((CurrentState == HAL_I2C_STATE_BUSY_TX) || ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
  4415. {
  4416. /* Disable DMA Request */
  4417. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4418. hi2c->XferCount = 0U;
  4419. /* Enable EVT and ERR interrupt */
  4420. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4421. }
  4422. else
  4423. {
  4424. /* Disable Acknowledge */
  4425. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4426. /* Generate Stop */
  4427. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4428. /* Disable Last DMA */
  4429. hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
  4430. /* Disable DMA Request */
  4431. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4432. hi2c->XferCount = 0U;
  4433. /* Check if Errors has been detected during transfer */
  4434. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  4435. {
  4436. HAL_I2C_ErrorCallback(hi2c);
  4437. }
  4438. else
  4439. {
  4440. hi2c->State = HAL_I2C_STATE_READY;
  4441. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  4442. {
  4443. hi2c->Mode = HAL_I2C_MODE_NONE;
  4444. HAL_I2C_MemRxCpltCallback(hi2c);
  4445. }
  4446. else
  4447. {
  4448. hi2c->Mode = HAL_I2C_MODE_NONE;
  4449. HAL_I2C_MasterRxCpltCallback(hi2c);
  4450. }
  4451. }
  4452. }
  4453. }
  4454. /**
  4455. * @brief DMA I2C communication error callback.
  4456. * @param hdma DMA handle
  4457. * @retval None
  4458. */
  4459. static void I2C_DMAError(DMA_HandleTypeDef *hdma)
  4460. {
  4461. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4462. /* Disable Acknowledge */
  4463. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4464. hi2c->XferCount = 0U;
  4465. hi2c->State = HAL_I2C_STATE_READY;
  4466. hi2c->Mode = HAL_I2C_MODE_NONE;
  4467. hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4468. HAL_I2C_ErrorCallback(hi2c);
  4469. }
  4470. /**
  4471. * @brief DMA I2C communication abort callback
  4472. * (To be called at end of DMA Abort procedure).
  4473. * @param hdma: DMA handle.
  4474. * @retval None
  4475. */
  4476. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
  4477. {
  4478. I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  4479. /* Disable Acknowledge */
  4480. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4481. hi2c->XferCount = 0U;
  4482. /* Reset XferAbortCallback */
  4483. hi2c->hdmatx->XferAbortCallback = NULL;
  4484. hi2c->hdmarx->XferAbortCallback = NULL;
  4485. /* Check if come from abort from user */
  4486. if(hi2c->State == HAL_I2C_STATE_ABORT)
  4487. {
  4488. hi2c->State = HAL_I2C_STATE_READY;
  4489. hi2c->Mode = HAL_I2C_MODE_NONE;
  4490. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4491. /* Disable I2C peripheral to prevent dummy data in buffer */
  4492. __HAL_I2C_DISABLE(hi2c);
  4493. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4494. HAL_I2C_AbortCpltCallback(hi2c);
  4495. }
  4496. else
  4497. {
  4498. hi2c->State = HAL_I2C_STATE_READY;
  4499. hi2c->Mode = HAL_I2C_MODE_NONE;
  4500. /* Disable I2C peripheral to prevent dummy data in buffer */
  4501. __HAL_I2C_DISABLE(hi2c);
  4502. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4503. HAL_I2C_ErrorCallback(hi2c);
  4504. }
  4505. }
  4506. /**
  4507. * @brief This function handles I2C Communication Timeout.
  4508. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4509. * the configuration information for I2C module
  4510. * @param Flag specifies the I2C flag to check.
  4511. * @param Status The new Flag status (SET or RESET).
  4512. * @param Timeout Timeout duration
  4513. * @param Tickstart Tick start value
  4514. * @retval HAL status
  4515. */
  4516. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
  4517. {
  4518. /* Wait until flag is set */
  4519. while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
  4520. {
  4521. /* Check for the Timeout */
  4522. if(Timeout != HAL_MAX_DELAY)
  4523. {
  4524. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4525. {
  4526. hi2c->PreviousState = I2C_STATE_NONE;
  4527. hi2c->State= HAL_I2C_STATE_READY;
  4528. hi2c->Mode = HAL_I2C_MODE_NONE;
  4529. /* Process Unlocked */
  4530. __HAL_UNLOCK(hi2c);
  4531. return HAL_TIMEOUT;
  4532. }
  4533. }
  4534. }
  4535. return HAL_OK;
  4536. }
  4537. /**
  4538. * @brief This function handles I2C Communication Timeout for Master addressing phase.
  4539. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4540. * the configuration information for I2C module
  4541. * @param Flag specifies the I2C flag to check.
  4542. * @param Timeout Timeout duration
  4543. * @param Tickstart Tick start value
  4544. * @retval HAL status
  4545. */
  4546. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
  4547. {
  4548. while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  4549. {
  4550. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4551. {
  4552. /* Generate Stop */
  4553. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4554. /* Clear AF Flag */
  4555. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4556. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4557. hi2c->PreviousState = I2C_STATE_NONE;
  4558. hi2c->State= HAL_I2C_STATE_READY;
  4559. /* Process Unlocked */
  4560. __HAL_UNLOCK(hi2c);
  4561. return HAL_ERROR;
  4562. }
  4563. /* Check for the Timeout */
  4564. if(Timeout != HAL_MAX_DELAY)
  4565. {
  4566. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4567. {
  4568. hi2c->PreviousState = I2C_STATE_NONE;
  4569. hi2c->State= HAL_I2C_STATE_READY;
  4570. /* Process Unlocked */
  4571. __HAL_UNLOCK(hi2c);
  4572. return HAL_TIMEOUT;
  4573. }
  4574. }
  4575. }
  4576. return HAL_OK;
  4577. }
  4578. /**
  4579. * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
  4580. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4581. * the configuration information for the specified I2C.
  4582. * @param Timeout Timeout duration
  4583. * @param Tickstart Tick start value
  4584. * @retval HAL status
  4585. */
  4586. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4587. {
  4588. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  4589. {
  4590. /* Check if a NACK is detected */
  4591. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4592. {
  4593. return HAL_ERROR;
  4594. }
  4595. /* Check for the Timeout */
  4596. if(Timeout != HAL_MAX_DELAY)
  4597. {
  4598. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4599. {
  4600. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4601. hi2c->PreviousState = I2C_STATE_NONE;
  4602. hi2c->State= HAL_I2C_STATE_READY;
  4603. /* Process Unlocked */
  4604. __HAL_UNLOCK(hi2c);
  4605. return HAL_TIMEOUT;
  4606. }
  4607. }
  4608. }
  4609. return HAL_OK;
  4610. }
  4611. /**
  4612. * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
  4613. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4614. * the configuration information for the specified I2C.
  4615. * @param Timeout Timeout duration
  4616. * @param Tickstart Tick start value
  4617. * @retval HAL status
  4618. */
  4619. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4620. {
  4621. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  4622. {
  4623. /* Check if a NACK is detected */
  4624. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4625. {
  4626. return HAL_ERROR;
  4627. }
  4628. /* Check for the Timeout */
  4629. if(Timeout != HAL_MAX_DELAY)
  4630. {
  4631. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4632. {
  4633. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4634. hi2c->PreviousState = I2C_STATE_NONE;
  4635. hi2c->State= HAL_I2C_STATE_READY;
  4636. /* Process Unlocked */
  4637. __HAL_UNLOCK(hi2c);
  4638. return HAL_TIMEOUT;
  4639. }
  4640. }
  4641. }
  4642. return HAL_OK;
  4643. }
  4644. /**
  4645. * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
  4646. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4647. * the configuration information for the specified I2C.
  4648. * @param Timeout Timeout duration
  4649. * @param Tickstart Tick start value
  4650. * @retval HAL status
  4651. */
  4652. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4653. {
  4654. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
  4655. {
  4656. /* Check if a NACK is detected */
  4657. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4658. {
  4659. return HAL_ERROR;
  4660. }
  4661. /* Check for the Timeout */
  4662. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4663. {
  4664. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4665. hi2c->PreviousState = I2C_STATE_NONE;
  4666. hi2c->State= HAL_I2C_STATE_READY;
  4667. /* Process Unlocked */
  4668. __HAL_UNLOCK(hi2c);
  4669. return HAL_TIMEOUT;
  4670. }
  4671. }
  4672. return HAL_OK;
  4673. }
  4674. /**
  4675. * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
  4676. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4677. * the configuration information for the specified I2C.
  4678. * @param Timeout Timeout duration
  4679. * @param Tickstart Tick start value
  4680. * @retval HAL status
  4681. */
  4682. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4683. {
  4684. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  4685. {
  4686. /* Check if a STOPF is detected */
  4687. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  4688. {
  4689. /* Clear STOP Flag */
  4690. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  4691. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4692. hi2c->PreviousState = I2C_STATE_NONE;
  4693. hi2c->State= HAL_I2C_STATE_READY;
  4694. /* Process Unlocked */
  4695. __HAL_UNLOCK(hi2c);
  4696. return HAL_ERROR;
  4697. }
  4698. /* Check for the Timeout */
  4699. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4700. {
  4701. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4702. hi2c->State= HAL_I2C_STATE_READY;
  4703. /* Process Unlocked */
  4704. __HAL_UNLOCK(hi2c);
  4705. return HAL_TIMEOUT;
  4706. }
  4707. }
  4708. return HAL_OK;
  4709. }
  4710. /**
  4711. * @brief This function handles Acknowledge failed detection during an I2C Communication.
  4712. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4713. * the configuration information for the specified I2C.
  4714. * @retval HAL status
  4715. */
  4716. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  4717. {
  4718. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4719. {
  4720. /* Clear NACKF Flag */
  4721. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4722. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4723. hi2c->PreviousState = I2C_STATE_NONE;
  4724. hi2c->State= HAL_I2C_STATE_READY;
  4725. /* Process Unlocked */
  4726. __HAL_UNLOCK(hi2c);
  4727. return HAL_ERROR;
  4728. }
  4729. return HAL_OK;
  4730. }
  4731. /**
  4732. * @}
  4733. */
  4734. #endif /* HAL_I2C_MODULE_ENABLED */
  4735. /**
  4736. * @}
  4737. */
  4738. /**
  4739. * @}
  4740. */
  4741. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/