stm32f1xx_ll_i2c.c 8.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239
  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_ll_i2c.c
  4. * @author MCD Application Team
  5. * @version V1.1.1
  6. * @date 12-May-2017
  7. * @brief I2C LL module driver.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. #if defined(USE_FULL_LL_DRIVER)
  38. /* Includes ------------------------------------------------------------------*/
  39. #include "stm32f1xx_ll_i2c.h"
  40. #include "stm32f1xx_ll_bus.h"
  41. #include "stm32f1xx_ll_rcc.h"
  42. #ifdef USE_FULL_ASSERT
  43. #include "stm32_assert.h"
  44. #else
  45. #define assert_param(expr) ((void)0U)
  46. #endif
  47. /** @addtogroup STM32F1xx_LL_Driver
  48. * @{
  49. */
  50. #if defined (I2C1) || defined (I2C2)
  51. /** @defgroup I2C_LL I2C
  52. * @{
  53. */
  54. /* Private types -------------------------------------------------------------*/
  55. /* Private variables ---------------------------------------------------------*/
  56. /* Private constants ---------------------------------------------------------*/
  57. /* Private macros ------------------------------------------------------------*/
  58. /** @addtogroup I2C_LL_Private_Macros
  59. * @{
  60. */
  61. #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
  62. ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
  63. ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
  64. ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
  65. #define IS_I2C_CLOCK_SPEED(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= LL_I2C_MAX_SPEED_FAST))
  66. #define IS_I2C_DUTY_CYCLE(__VALUE__) (((__VALUE__) == LL_I2C_DUTYCYCLE_2) || \
  67. ((__VALUE__) == LL_I2C_DUTYCYCLE_16_9))
  68. #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU)
  69. #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
  70. ((__VALUE__) == LL_I2C_NACK))
  71. #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
  72. ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
  73. /**
  74. * @}
  75. */
  76. /* Private function prototypes -----------------------------------------------*/
  77. /* Exported functions --------------------------------------------------------*/
  78. /** @addtogroup I2C_LL_Exported_Functions
  79. * @{
  80. */
  81. /** @addtogroup I2C_LL_EF_Init
  82. * @{
  83. */
  84. /**
  85. * @brief De-initialize the I2C registers to their default reset values.
  86. * @param I2Cx I2C Instance.
  87. * @retval An ErrorStatus enumeration value:
  88. * - SUCCESS: I2C registers are de-initialized
  89. * - ERROR: I2C registers are not de-initialized
  90. */
  91. uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx)
  92. {
  93. ErrorStatus status = SUCCESS;
  94. /* Check the I2C Instance I2Cx */
  95. assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
  96. if (I2Cx == I2C1)
  97. {
  98. /* Force reset of I2C clock */
  99. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
  100. /* Release reset of I2C clock */
  101. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
  102. }
  103. #if defined(I2C2)
  104. else if (I2Cx == I2C2)
  105. {
  106. /* Force reset of I2C clock */
  107. LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
  108. /* Release reset of I2C clock */
  109. LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
  110. }
  111. #endif /* I2C2 */
  112. else
  113. {
  114. status = ERROR;
  115. }
  116. return status;
  117. }
  118. /**
  119. * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
  120. * @param I2Cx I2C Instance.
  121. * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
  122. * @retval An ErrorStatus enumeration value:
  123. * - SUCCESS: I2C registers are initialized
  124. * - ERROR: Not applicable
  125. */
  126. uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
  127. {
  128. LL_RCC_ClocksTypeDef rcc_clocks;
  129. /* Check the I2C Instance I2Cx */
  130. assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
  131. /* Check the I2C parameters from I2C_InitStruct */
  132. assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
  133. assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->ClockSpeed));
  134. assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->DutyCycle));
  135. assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
  136. assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
  137. assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
  138. /* Disable the selected I2Cx Peripheral */
  139. LL_I2C_Disable(I2Cx);
  140. /* Retrieve Clock frequencies */
  141. LL_RCC_GetSystemClocksFreq(&rcc_clocks);
  142. /*---------------------------- I2Cx SCL Clock Speed Configuration ------------
  143. * Configure the SCL speed :
  144. * - ClockSpeed: I2C_CR2_FREQ[5:0], I2C_TRISE_TRISE[5:0], I2C_CCR_FS,
  145. * and I2C_CCR_CCR[11:0] bits
  146. * - DutyCycle: I2C_CCR_DUTY[7:0] bits
  147. */
  148. LL_I2C_ConfigSpeed(I2Cx, rcc_clocks.PCLK1_Frequency, I2C_InitStruct->ClockSpeed, I2C_InitStruct->DutyCycle);
  149. /*---------------------------- I2Cx OAR1 Configuration -----------------------
  150. * Disable, Configure and Enable I2Cx device own address 1 with parameters :
  151. * - OwnAddress1: I2C_OAR1_ADD[9:8], I2C_OAR1_ADD[7:1] and I2C_OAR1_ADD0 bits
  152. * - OwnAddrSize: I2C_OAR1_ADDMODE bit
  153. */
  154. LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
  155. /*---------------------------- I2Cx MODE Configuration -----------------------
  156. * Configure I2Cx peripheral mode with parameter :
  157. * - PeripheralMode: I2C_CR1_SMBUS, I2C_CR1_SMBTYPE and I2C_CR1_ENARP bits
  158. */
  159. LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
  160. /* Enable the selected I2Cx Peripheral */
  161. LL_I2C_Enable(I2Cx);
  162. /*---------------------------- I2Cx CR2 Configuration ------------------------
  163. * Configure the ACKnowledge or Non ACKnowledge condition
  164. * after the address receive match code or next received byte with parameter :
  165. * - TypeAcknowledge: I2C_CR2_NACK bit
  166. */
  167. LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
  168. return SUCCESS;
  169. }
  170. /**
  171. * @brief Set each @ref LL_I2C_InitTypeDef field to default value.
  172. * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
  173. * @retval None
  174. */
  175. void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
  176. {
  177. /* Set I2C_InitStruct fields to default values */
  178. I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
  179. I2C_InitStruct->ClockSpeed = 5000U;
  180. I2C_InitStruct->DutyCycle = LL_I2C_DUTYCYCLE_2;
  181. I2C_InitStruct->OwnAddress1 = 0U;
  182. I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
  183. I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
  184. }
  185. /**
  186. * @}
  187. */
  188. /**
  189. * @}
  190. */
  191. /**
  192. * @}
  193. */
  194. #endif /* I2C1 || I2C2 */
  195. /**
  196. * @}
  197. */
  198. #endif /* USE_FULL_LL_DRIVER */
  199. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/