stm32f4xx_hal_dma2d.h 24 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_dma2d.h
  4. * @author MCD Application Team
  5. * @version V1.4.3
  6. * @date 11-December-2015
  7. * @brief Header file of DMA2D HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F4xx_HAL_DMA2D_H
  39. #define __STM32F4xx_HAL_DMA2D_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
  44. defined(STM32F469xx) || defined(STM32F479xx)
  45. /* Includes ------------------------------------------------------------------*/
  46. #include "stm32f4xx_hal_def.h"
  47. /** @addtogroup STM32F4xx_HAL_Driver
  48. * @{
  49. */
  50. /** @defgroup DMA2D DMA2D
  51. * @brief DMA2D HAL module driver
  52. * @{
  53. */
  54. /* Exported types ------------------------------------------------------------*/
  55. /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
  56. * @{
  57. */
  58. #define MAX_DMA2D_LAYER 2
  59. /**
  60. * @brief DMA2D color Structure definition
  61. */
  62. typedef struct
  63. {
  64. uint32_t Blue; /*!< Configures the blue value.
  65. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
  66. uint32_t Green; /*!< Configures the green value.
  67. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
  68. uint32_t Red; /*!< Configures the red value.
  69. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
  70. } DMA2D_ColorTypeDef;
  71. /**
  72. * @brief DMA2D CLUT Structure definition
  73. */
  74. typedef struct
  75. {
  76. uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
  77. uint32_t CLUTColorMode; /*!< configures the DMA2D CLUT color mode.
  78. This parameter can be one value of @ref DMA2D_CLUT_CM */
  79. uint32_t Size; /*!< configures the DMA2D CLUT size.
  80. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
  81. } DMA2D_CLUTCfgTypeDef;
  82. /**
  83. * @brief DMA2D Init structure definition
  84. */
  85. typedef struct
  86. {
  87. uint32_t Mode; /*!< configures the DMA2D transfer mode.
  88. This parameter can be one value of @ref DMA2D_Mode */
  89. uint32_t ColorMode; /*!< configures the color format of the output image.
  90. This parameter can be one value of @ref DMA2D_Color_Mode */
  91. uint32_t OutputOffset; /*!< Specifies the Offset value.
  92. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
  93. } DMA2D_InitTypeDef;
  94. /**
  95. * @brief DMA2D Layer structure definition
  96. */
  97. typedef struct
  98. {
  99. uint32_t InputOffset; /*!< configures the DMA2D foreground offset.
  100. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
  101. uint32_t InputColorMode; /*!< configures the DMA2D foreground color mode .
  102. This parameter can be one value of @ref DMA2D_Input_Color_Mode */
  103. uint32_t AlphaMode; /*!< configures the DMA2D foreground alpha mode.
  104. This parameter can be one value of @ref DMA2D_ALPHA_MODE */
  105. uint32_t InputAlpha; /*!< Specifies the DMA2D foreground alpha value and color value in case of A8 or A4 color mode.
  106. This parameter must be a number between Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF
  107. in case of A8 or A4 color mode (ARGB).
  108. Otherwise, This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
  109. } DMA2D_LayerCfgTypeDef;
  110. /**
  111. * @brief HAL DMA2D State structures definition
  112. */
  113. typedef enum
  114. {
  115. HAL_DMA2D_STATE_RESET = 0x00, /*!< DMA2D not yet initialized or disabled */
  116. HAL_DMA2D_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
  117. HAL_DMA2D_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
  118. HAL_DMA2D_STATE_TIMEOUT = 0x03, /*!< Timeout state */
  119. HAL_DMA2D_STATE_ERROR = 0x04, /*!< DMA2D state error */
  120. HAL_DMA2D_STATE_SUSPEND = 0x05 /*!< DMA2D process is suspended */
  121. }HAL_DMA2D_StateTypeDef;
  122. /**
  123. * @brief DMA2D handle Structure definition
  124. */
  125. typedef struct __DMA2D_HandleTypeDef
  126. {
  127. DMA2D_TypeDef *Instance; /*!< DMA2D Register base address */
  128. DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters */
  129. void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback */
  130. void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback */
  131. DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
  132. HAL_LockTypeDef Lock; /*!< DMA2D Lock */
  133. __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state */
  134. __IO uint32_t ErrorCode; /*!< DMA2D Error code */
  135. } DMA2D_HandleTypeDef;
  136. /**
  137. * @}
  138. */
  139. /* Exported constants --------------------------------------------------------*/
  140. /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
  141. * @{
  142. */
  143. /** @defgroup DMA2D_Error_Code DMA2D Error Code
  144. * @{
  145. */
  146. #define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
  147. #define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
  148. #define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002) /*!< Configuration error */
  149. #define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
  150. /**
  151. * @}
  152. */
  153. /** @defgroup DMA2D_Mode DMA2D Mode
  154. * @{
  155. */
  156. #define DMA2D_M2M ((uint32_t)0x00000000) /*!< DMA2D memory to memory transfer mode */
  157. #define DMA2D_M2M_PFC ((uint32_t)0x00010000) /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  158. #define DMA2D_M2M_BLEND ((uint32_t)0x00020000) /*!< DMA2D memory to memory with blending transfer mode */
  159. #define DMA2D_R2M ((uint32_t)0x00030000) /*!< DMA2D register to memory transfer mode */
  160. /**
  161. * @}
  162. */
  163. /** @defgroup DMA2D_Color_Mode DMA2D Color Mode
  164. * @{
  165. */
  166. #define DMA2D_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D color mode */
  167. #define DMA2D_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D color mode */
  168. #define DMA2D_RGB565 ((uint32_t)0x00000002) /*!< RGB565 DMA2D color mode */
  169. #define DMA2D_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 DMA2D color mode */
  170. #define DMA2D_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 DMA2D color mode */
  171. /**
  172. * @}
  173. */
  174. /** @defgroup DMA2D_COLOR_VALUE DMA2D COLOR VALUE
  175. * @{
  176. */
  177. #define COLOR_VALUE ((uint32_t)0x000000FF) /*!< color value mask */
  178. /**
  179. * @}
  180. */
  181. /** @defgroup DMA2D_SIZE DMA2D SIZE
  182. * @{
  183. */
  184. #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16) /*!< DMA2D pixel per line */
  185. #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of line */
  186. /**
  187. * @}
  188. */
  189. /** @defgroup DMA2D_Offset DMA2D Offset
  190. * @{
  191. */
  192. #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
  193. /**
  194. * @}
  195. */
  196. /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
  197. * @{
  198. */
  199. #define CM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 color mode */
  200. #define CM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 color mode */
  201. #define CM_RGB565 ((uint32_t)0x00000002) /*!< RGB565 color mode */
  202. #define CM_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 color mode */
  203. #define CM_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 color mode */
  204. #define CM_L8 ((uint32_t)0x00000005) /*!< L8 color mode */
  205. #define CM_AL44 ((uint32_t)0x00000006) /*!< AL44 color mode */
  206. #define CM_AL88 ((uint32_t)0x00000007) /*!< AL88 color mode */
  207. #define CM_L4 ((uint32_t)0x00000008) /*!< L4 color mode */
  208. #define CM_A8 ((uint32_t)0x00000009) /*!< A8 color mode */
  209. #define CM_A4 ((uint32_t)0x0000000A) /*!< A4 color mode */
  210. /**
  211. * @}
  212. */
  213. /** @defgroup DMA2D_ALPHA_MODE DMA2D ALPHA MODE
  214. * @{
  215. */
  216. #define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000) /*!< No modification of the alpha channel value */
  217. #define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001) /*!< Replace original alpha channel value by programmed alpha value */
  218. #define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002) /*!< Replace original alpha channel value by programmed alpha value
  219. with original alpha channel value */
  220. /**
  221. * @}
  222. */
  223. /** @defgroup DMA2D_CLUT_CM DMA2D CLUT CM
  224. * @{
  225. */
  226. #define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D C-LUT color mode */
  227. #define DMA2D_CCM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D C-LUT color mode */
  228. /**
  229. * @}
  230. */
  231. /** @defgroup DMA2D_Size_Clut DMA2D Size Clut
  232. * @{
  233. */
  234. #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /*!< DMA2D C-LUT size */
  235. /**
  236. * @}
  237. */
  238. /** @defgroup DMA2D_DeadTime DMA2D DeadTime
  239. * @{
  240. */
  241. #define LINE_WATERMARK DMA2D_LWR_LW
  242. /**
  243. * @}
  244. */
  245. /** @defgroup DMA2D_Interrupts DMA2D Interrupts
  246. * @{
  247. */
  248. #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  249. #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< C-LUT Transfer Complete Interrupt */
  250. #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< C-LUT Access Error Interrupt */
  251. #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  252. #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  253. #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  254. /**
  255. * @}
  256. */
  257. /** @defgroup DMA2D_Flag DMA2D Flag
  258. * @{
  259. */
  260. #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  261. #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< C-LUT Transfer Complete Interrupt Flag */
  262. #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< C-LUT Access Error Interrupt Flag */
  263. #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  264. #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  265. #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  266. /**
  267. * @}
  268. */
  269. /**
  270. * @}
  271. */
  272. /* Exported macro ------------------------------------------------------------*/
  273. /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
  274. * @{
  275. */
  276. /** @brief Reset DMA2D handle state
  277. * @param __HANDLE__: specifies the DMA2D handle.
  278. * @retval None
  279. */
  280. #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
  281. /**
  282. * @brief Enable the DMA2D.
  283. * @param __HANDLE__: DMA2D handle
  284. * @retval None.
  285. */
  286. #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
  287. /**
  288. * @brief Disable the DMA2D.
  289. * @param __HANDLE__: DMA2D handle
  290. * @retval None.
  291. */
  292. #define __HAL_DMA2D_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA2D_CR_START)
  293. /* Interrupt & Flag management */
  294. /**
  295. * @brief Get the DMA2D pending flags.
  296. * @param __HANDLE__: DMA2D handle
  297. * @param __FLAG__: Get the specified flag.
  298. * This parameter can be any combination of the following values:
  299. * @arg DMA2D_FLAG_CE: Configuration error flag
  300. * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
  301. * @arg DMA2D_FLAG_CAE: C-LUT access error flag
  302. * @arg DMA2D_FLAG_TW: Transfer Watermark flag
  303. * @arg DMA2D_FLAG_TC: Transfer complete flag
  304. * @arg DMA2D_FLAG_TE: Transfer error flag
  305. * @retval The state of FLAG.
  306. */
  307. #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
  308. /**
  309. * @brief Clears the DMA2D pending flags.
  310. * @param __HANDLE__: DMA2D handle
  311. * @param __FLAG__: specifies the flag to clear.
  312. * This parameter can be any combination of the following values:
  313. * @arg DMA2D_FLAG_CE: Configuration error flag
  314. * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
  315. * @arg DMA2D_FLAG_CAE: C-LUT access error flag
  316. * @arg DMA2D_FLAG_TW: Transfer Watermark flag
  317. * @arg DMA2D_FLAG_TC: Transfer complete flag
  318. * @arg DMA2D_FLAG_TE: Transfer error flag
  319. * @retval None
  320. */
  321. #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
  322. /**
  323. * @brief Enables the specified DMA2D interrupts.
  324. * @param __HANDLE__: DMA2D handle
  325. * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
  326. * This parameter can be any combination of the following values:
  327. * @arg DMA2D_IT_CE: Configuration error interrupt mask
  328. * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
  329. * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
  330. * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
  331. * @arg DMA2D_IT_TC: Transfer complete interrupt mask
  332. * @arg DMA2D_IT_TE: Transfer error interrupt mask
  333. * @retval None
  334. */
  335. #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
  336. /**
  337. * @brief Disables the specified DMA2D interrupts.
  338. * @param __HANDLE__: DMA2D handle
  339. * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
  340. * This parameter can be any combination of the following values:
  341. * @arg DMA2D_IT_CE: Configuration error interrupt mask
  342. * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
  343. * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
  344. * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
  345. * @arg DMA2D_IT_TC: Transfer complete interrupt mask
  346. * @arg DMA2D_IT_TE: Transfer error interrupt mask
  347. * @retval None
  348. */
  349. #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
  350. /**
  351. * @brief Checks whether the specified DMA2D interrupt has occurred or not.
  352. * @param __HANDLE__: DMA2D handle
  353. * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
  354. * This parameter can be one of the following values:
  355. * @arg DMA2D_IT_CE: Configuration error interrupt mask
  356. * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
  357. * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
  358. * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
  359. * @arg DMA2D_IT_TC: Transfer complete interrupt mask
  360. * @arg DMA2D_IT_TE: Transfer error interrupt mask
  361. * @retval The state of INTERRUPT.
  362. */
  363. #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
  364. /**
  365. * @}
  366. */
  367. /* Exported functions --------------------------------------------------------*/
  368. /** @defgroup DMA2D_Exported_Functions DMA2D Exported Functions
  369. * @{
  370. */
  371. /* Initialization and de-initialization functions *******************************/
  372. HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
  373. HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
  374. void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
  375. void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
  376. /* IO operation functions *******************************************************/
  377. HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  378. HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  379. HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  380. HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  381. HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
  382. HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
  383. HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
  384. HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
  385. void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
  386. /* Peripheral Control functions *************************************************/
  387. HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
  388. HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
  389. HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
  390. HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
  391. HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
  392. /* Peripheral State functions ***************************************************/
  393. HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
  394. uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
  395. /**
  396. * @}
  397. */
  398. /* Private types -------------------------------------------------------------*/
  399. /** @defgroup DMA2D_Private_Types DMA2D Private Types
  400. * @{
  401. */
  402. /**
  403. * @}
  404. */
  405. /* Private defines -------------------------------------------------------------*/
  406. /** @defgroup DMA2D_Private_Defines DMA2D Private Defines
  407. * @{
  408. */
  409. /**
  410. * @}
  411. */
  412. /* Private variables ---------------------------------------------------------*/
  413. /** @defgroup DMA2D_Private_Variables DMA2D Private Variables
  414. * @{
  415. */
  416. /**
  417. * @}
  418. */
  419. /* Private constants ---------------------------------------------------------*/
  420. /** @defgroup DMA2D_Private_Constants DMA2D Private Constants
  421. * @{
  422. */
  423. /**
  424. * @}
  425. */
  426. /* Private macros ------------------------------------------------------------*/
  427. /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
  428. * @{
  429. */
  430. #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
  431. #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
  432. ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
  433. #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
  434. ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
  435. ((MODE_ARGB) == DMA2D_ARGB4444))
  436. #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= COLOR_VALUE)
  437. #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
  438. #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
  439. #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
  440. #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == CM_ARGB8888) || ((INPUT_CM) == CM_RGB888) || \
  441. ((INPUT_CM) == CM_RGB565) || ((INPUT_CM) == CM_ARGB1555) || \
  442. ((INPUT_CM) == CM_ARGB4444) || ((INPUT_CM) == CM_L8) || \
  443. ((INPUT_CM) == CM_AL44) || ((INPUT_CM) == CM_AL88) || \
  444. ((INPUT_CM) == CM_L4) || ((INPUT_CM) == CM_A8) || \
  445. ((INPUT_CM) == CM_A4))
  446. #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
  447. ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
  448. ((AlphaMode) == DMA2D_COMBINE_ALPHA))
  449. #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
  450. #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
  451. #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
  452. /**
  453. * @}
  454. */
  455. /* Private functions prototypes ---------------------------------------------------------*/
  456. /** @defgroup DMA2D_Private_Functions_Prototypes DMA2D Private Functions Prototypes
  457. * @{
  458. */
  459. /**
  460. * @}
  461. */
  462. /* Private functions ---------------------------------------------------------*/
  463. /** @defgroup DMA2D_Private_Functions DMA2D Private Functions
  464. * @{
  465. */
  466. /**
  467. * @}
  468. */
  469. /**
  470. * @}
  471. */
  472. /**
  473. * @}
  474. */
  475. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  476. #ifdef __cplusplus
  477. }
  478. #endif
  479. #endif /* __STM32F4xx_HAL_DMA2D_H */
  480. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/