stm32f4xx_hal_adc.c 48 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_adc.c
  4. * @author MCD Application Team
  5. * @version V1.4.3
  6. * @date 11-December-2015
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Analog to Digital Convertor (ADC) peripheral:
  9. * + Initialization and de-initialization functions
  10. * + IO operation functions
  11. * + State and errors functions
  12. *
  13. @verbatim
  14. ==============================================================================
  15. ##### ADC Peripheral features #####
  16. ==============================================================================
  17. [..]
  18. (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution.
  19. (#) Interrupt generation at the end of conversion, end of injected conversion,
  20. and in case of analog watchdog or overrun events
  21. (#) Single and continuous conversion modes.
  22. (#) Scan mode for automatic conversion of channel 0 to channel x.
  23. (#) Data alignment with in-built data coherency.
  24. (#) Channel-wise programmable sampling time.
  25. (#) External trigger option with configurable polarity for both regular and
  26. injected conversion.
  27. (#) Dual/Triple mode (on devices with 2 ADCs or more).
  28. (#) Configurable DMA data storage in Dual/Triple ADC mode.
  29. (#) Configurable delay between conversions in Dual/Triple interleaved mode.
  30. (#) ADC conversion type (refer to the datasheets).
  31. (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
  32. slower speed.
  33. (#) ADC input range: VREF(minus) = VIN = VREF(plus).
  34. (#) DMA request generation during regular channel conversion.
  35. ##### How to use this driver #####
  36. ==============================================================================
  37. [..]
  38. (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
  39. (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
  40. (##) ADC pins configuration
  41. (+++) Enable the clock for the ADC GPIOs using the following function:
  42. __HAL_RCC_GPIOx_CLK_ENABLE()
  43. (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
  44. (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
  45. (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
  46. (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
  47. (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
  48. (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
  49. (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
  50. (+++) Configure and enable two DMA streams stream for managing data
  51. transfer from peripheral to memory (output stream)
  52. (+++) Associate the initialized DMA handle to the CRYP DMA handle
  53. using __HAL_LINKDMA()
  54. (+++) Configure the priority and enable the NVIC for the transfer complete
  55. interrupt on the two DMA Streams. The output stream should have higher
  56. priority than the input stream.
  57. *** Configuration of ADC, groups regular/injected, channels parameters ***
  58. ==============================================================================
  59. [..]
  60. (#) Configure the ADC parameters (resolution, data alignment, ...)
  61. and regular group parameters (conversion trigger, sequencer, ...)
  62. using function HAL_ADC_Init().
  63. (#) Configure the channels for regular group parameters (channel number,
  64. channel rank into sequencer, ..., into regular group)
  65. using function HAL_ADC_ConfigChannel().
  66. (#) Optionally, configure the injected group parameters (conversion trigger,
  67. sequencer, ..., of injected group)
  68. and the channels for injected group parameters (channel number,
  69. channel rank into sequencer, ..., into injected group)
  70. using function HAL_ADCEx_InjectedConfigChannel().
  71. (#) Optionally, configure the analog watchdog parameters (channels
  72. monitored, thresholds, ...) using function HAL_ADC_AnalogWDGConfig().
  73. (#) Optionally, for devices with several ADC instances: configure the
  74. multimode parameters using function HAL_ADCEx_MultiModeConfigChannel().
  75. *** Execution of ADC conversions ***
  76. ==============================================================================
  77. [..]
  78. (#) ADC driver can be used among three modes: polling, interruption,
  79. transfer by DMA.
  80. *** Polling mode IO operation ***
  81. =================================
  82. [..]
  83. (+) Start the ADC peripheral using HAL_ADC_Start()
  84. (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
  85. user can specify the value of timeout according to his end application
  86. (+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
  87. (+) Stop the ADC peripheral using HAL_ADC_Stop()
  88. *** Interrupt mode IO operation ***
  89. ===================================
  90. [..]
  91. (+) Start the ADC peripheral using HAL_ADC_Start_IT()
  92. (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
  93. (+) At ADC end of conversion HAL_ADC_ConvCpltCallback() function is executed and user can
  94. add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
  95. (+) In case of ADC Error, HAL_ADC_ErrorCallback() function is executed and user can
  96. add his own code by customization of function pointer HAL_ADC_ErrorCallback
  97. (+) Stop the ADC peripheral using HAL_ADC_Stop_IT()
  98. *** DMA mode IO operation ***
  99. ==============================
  100. [..]
  101. (+) Start the ADC peripheral using HAL_ADC_Start_DMA(), at this stage the user specify the length
  102. of data to be transferred at each end of conversion
  103. (+) At The end of data transfer by HAL_ADC_ConvCpltCallback() function is executed and user can
  104. add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
  105. (+) In case of transfer Error, HAL_ADC_ErrorCallback() function is executed and user can
  106. add his own code by customization of function pointer HAL_ADC_ErrorCallback
  107. (+) Stop the ADC peripheral using HAL_ADC_Stop_DMA()
  108. *** ADC HAL driver macros list ***
  109. =============================================
  110. [..]
  111. Below the list of most used macros in ADC HAL driver.
  112. (+) __HAL_ADC_ENABLE : Enable the ADC peripheral
  113. (+) __HAL_ADC_DISABLE : Disable the ADC peripheral
  114. (+) __HAL_ADC_ENABLE_IT: Enable the ADC end of conversion interrupt
  115. (+) __HAL_ADC_DISABLE_IT: Disable the ADC end of conversion interrupt
  116. (+) __HAL_ADC_GET_IT_SOURCE: Check if the specified ADC interrupt source is enabled or disabled
  117. (+) __HAL_ADC_CLEAR_FLAG: Clear the ADC's pending flags
  118. (+) __HAL_ADC_GET_FLAG: Get the selected ADC's flag status
  119. (+) ADC_GET_RESOLUTION: Return resolution bits in CR1 register
  120. [..]
  121. (@) You can refer to the ADC HAL driver header file for more useful macros
  122. *** Deinitialization of ADC ***
  123. ==============================================================================
  124. [..]
  125. (#) Disable the ADC interface
  126. (++) ADC clock can be hard reset and disabled at RCC top level.
  127. (++) Hard reset of ADC peripherals
  128. using macro __HAL_RCC_ADC_FORCE_RESET(), __HAL_RCC_ADC_RELEASE_RESET().
  129. (++) ADC clock disable using the equivalent macro/functions as configuration step.
  130. (+++) Example:
  131. Into HAL_ADC_MspDeInit() (recommended code location) or with
  132. other device clock parameters configuration:
  133. (+++) HAL_RCC_GetOscConfig(&RCC_OscInitStructure);
  134. (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  135. (+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
  136. (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
  137. (#) ADC pins configuration
  138. (++) Disable the clock for the ADC GPIOs using macro __HAL_RCC_GPIOx_CLK_DISABLE()
  139. (#) Optionally, in case of usage of ADC with interruptions:
  140. (++) Disable the NVIC for ADC using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
  141. (#) Optionally, in case of usage of DMA:
  142. (++) Deinitialize the DMA using function HAL_DMA_DeInit().
  143. (++) Disable the NVIC for DMA using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
  144. @endverbatim
  145. ******************************************************************************
  146. * @attention
  147. *
  148. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  149. *
  150. * Redistribution and use in source and binary forms, with or without modification,
  151. * are permitted provided that the following conditions are met:
  152. * 1. Redistributions of source code must retain the above copyright notice,
  153. * this list of conditions and the following disclaimer.
  154. * 2. Redistributions in binary form must reproduce the above copyright notice,
  155. * this list of conditions and the following disclaimer in the documentation
  156. * and/or other materials provided with the distribution.
  157. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  158. * may be used to endorse or promote products derived from this software
  159. * without specific prior written permission.
  160. *
  161. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  162. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  163. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  164. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  165. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  166. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  167. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  168. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  169. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  170. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  171. *
  172. ******************************************************************************
  173. */
  174. /* Includes ------------------------------------------------------------------*/
  175. #include "stm32f4xx_hal.h"
  176. /** @addtogroup STM32F4xx_HAL_Driver
  177. * @{
  178. */
  179. /** @defgroup ADC ADC
  180. * @brief ADC driver modules
  181. * @{
  182. */
  183. #ifdef HAL_ADC_MODULE_ENABLED
  184. /* Private typedef -----------------------------------------------------------*/
  185. /* Private define ------------------------------------------------------------*/
  186. /* Private macro -------------------------------------------------------------*/
  187. /* Private variables ---------------------------------------------------------*/
  188. /** @addtogroup ADC_Private_Functions
  189. * @{
  190. */
  191. /* Private function prototypes -----------------------------------------------*/
  192. static void ADC_Init(ADC_HandleTypeDef* hadc);
  193. static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
  194. static void ADC_DMAError(DMA_HandleTypeDef *hdma);
  195. static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
  196. /**
  197. * @}
  198. */
  199. /* Exported functions --------------------------------------------------------*/
  200. /** @defgroup ADC_Exported_Functions ADC Exported Functions
  201. * @{
  202. */
  203. /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
  204. * @brief Initialization and Configuration functions
  205. *
  206. @verbatim
  207. ===============================================================================
  208. ##### Initialization and de-initialization functions #####
  209. ===============================================================================
  210. [..] This section provides functions allowing to:
  211. (+) Initialize and configure the ADC.
  212. (+) De-initialize the ADC.
  213. @endverbatim
  214. * @{
  215. */
  216. /**
  217. * @brief Initializes the ADCx peripheral according to the specified parameters
  218. * in the ADC_InitStruct and initializes the ADC MSP.
  219. *
  220. * @note This function is used to configure the global features of the ADC (
  221. * ClockPrescaler, Resolution, Data Alignment and number of conversion), however,
  222. * the rest of the configuration parameters are specific to the regular
  223. * channels group (scan mode activation, continuous mode activation,
  224. * External trigger source and edge, DMA continuous request after the
  225. * last transfer and End of conversion selection).
  226. *
  227. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  228. * the configuration information for the specified ADC.
  229. * @retval HAL status
  230. */
  231. HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
  232. {
  233. /* Check ADC handle */
  234. if(hadc == NULL)
  235. {
  236. return HAL_ERROR;
  237. }
  238. /* Check the parameters */
  239. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  240. assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
  241. assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
  242. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ScanConvMode));
  243. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  244. assert_param(IS_ADC_EXT_TRIG(hadc->Init.ExternalTrigConv));
  245. assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
  246. assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
  247. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
  248. assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
  249. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
  250. if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
  251. {
  252. assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
  253. }
  254. if(hadc->State == HAL_ADC_STATE_RESET)
  255. {
  256. /* Allocate lock resource and initialize it */
  257. hadc->Lock = HAL_UNLOCKED;
  258. /* Init the low level hardware */
  259. HAL_ADC_MspInit(hadc);
  260. }
  261. /* Initialize the ADC state */
  262. hadc->State = HAL_ADC_STATE_BUSY;
  263. /* Set ADC parameters */
  264. ADC_Init(hadc);
  265. /* Set ADC error code to none */
  266. hadc->ErrorCode = HAL_ADC_ERROR_NONE;
  267. /* Initialize the ADC state */
  268. hadc->State = HAL_ADC_STATE_READY;
  269. /* Release Lock */
  270. __HAL_UNLOCK(hadc);
  271. /* Return function status */
  272. return HAL_OK;
  273. }
  274. /**
  275. * @brief Deinitializes the ADCx peripheral registers to their default reset values.
  276. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  277. * the configuration information for the specified ADC.
  278. * @retval HAL status
  279. */
  280. HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
  281. {
  282. /* Check ADC handle */
  283. if(hadc == NULL)
  284. {
  285. return HAL_ERROR;
  286. }
  287. /* Check the parameters */
  288. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  289. /* Change ADC state */
  290. hadc->State = HAL_ADC_STATE_BUSY;
  291. /* DeInit the low level hardware */
  292. HAL_ADC_MspDeInit(hadc);
  293. /* Set ADC error code to none */
  294. hadc->ErrorCode = HAL_ADC_ERROR_NONE;
  295. /* Change ADC state */
  296. hadc->State = HAL_ADC_STATE_RESET;
  297. /* Return function status */
  298. return HAL_OK;
  299. }
  300. /**
  301. * @brief Initializes the ADC MSP.
  302. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  303. * the configuration information for the specified ADC.
  304. * @retval None
  305. */
  306. __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
  307. {
  308. /* Prevent unused argument(s) compilation warning */
  309. UNUSED(hadc);
  310. /* NOTE : This function Should not be modified, when the callback is needed,
  311. the HAL_ADC_MspInit could be implemented in the user file
  312. */
  313. }
  314. /**
  315. * @brief DeInitializes the ADC MSP.
  316. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  317. * the configuration information for the specified ADC.
  318. * @retval None
  319. */
  320. __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
  321. {
  322. /* Prevent unused argument(s) compilation warning */
  323. UNUSED(hadc);
  324. /* NOTE : This function Should not be modified, when the callback is needed,
  325. the HAL_ADC_MspDeInit could be implemented in the user file
  326. */
  327. }
  328. /**
  329. * @}
  330. */
  331. /** @defgroup ADC_Exported_Functions_Group2 IO operation functions
  332. * @brief IO operation functions
  333. *
  334. @verbatim
  335. ===============================================================================
  336. ##### IO operation functions #####
  337. ===============================================================================
  338. [..] This section provides functions allowing to:
  339. (+) Start conversion of regular channel.
  340. (+) Stop conversion of regular channel.
  341. (+) Start conversion of regular channel and enable interrupt.
  342. (+) Stop conversion of regular channel and disable interrupt.
  343. (+) Start conversion of regular channel and enable DMA transfer.
  344. (+) Stop conversion of regular channel and disable DMA transfer.
  345. (+) Handle ADC interrupt request.
  346. @endverbatim
  347. * @{
  348. */
  349. /**
  350. * @brief Enables ADC and starts conversion of the regular channels.
  351. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  352. * the configuration information for the specified ADC.
  353. * @retval HAL status
  354. */
  355. HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
  356. {
  357. __IO uint32_t counter = 0;
  358. /* Check the parameters */
  359. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  360. assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
  361. /* Process locked */
  362. __HAL_LOCK(hadc);
  363. /* Check if an injected conversion is ongoing */
  364. if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
  365. {
  366. /* Change ADC state */
  367. hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
  368. }
  369. else
  370. {
  371. /* Change ADC state */
  372. hadc->State = HAL_ADC_STATE_BUSY_REG;
  373. }
  374. /* Check if ADC peripheral is disabled in order to enable it and wait during
  375. Tstab time the ADC's stabilization */
  376. if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
  377. {
  378. /* Enable the Peripheral */
  379. __HAL_ADC_ENABLE(hadc);
  380. /* Delay for ADC stabilization time */
  381. /* Compute number of CPU cycles to wait for */
  382. counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
  383. while(counter != 0)
  384. {
  385. counter--;
  386. }
  387. }
  388. /* Process unlocked */
  389. __HAL_UNLOCK(hadc);
  390. /* Check if Multimode enabled */
  391. if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
  392. {
  393. /* if no external trigger present enable software conversion of regular channels */
  394. if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
  395. {
  396. /* Enable the selected ADC software conversion for regular group */
  397. hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
  398. }
  399. }
  400. else
  401. {
  402. /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
  403. if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
  404. {
  405. /* Enable the selected ADC software conversion for regular group */
  406. hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
  407. }
  408. }
  409. /* Return function status */
  410. return HAL_OK;
  411. }
  412. /**
  413. * @brief Disables ADC and stop conversion of regular channels.
  414. *
  415. * @note Caution: This function will stop also injected channels.
  416. *
  417. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  418. * the configuration information for the specified ADC.
  419. *
  420. * @retval HAL status.
  421. */
  422. HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
  423. {
  424. /* Disable the Peripheral */
  425. __HAL_ADC_DISABLE(hadc);
  426. /* Change ADC state */
  427. hadc->State = HAL_ADC_STATE_READY;
  428. /* Return function status */
  429. return HAL_OK;
  430. }
  431. /**
  432. * @brief Poll for regular conversion complete
  433. * @note ADC conversion flags EOS (end of sequence) and EOC (end of
  434. * conversion) are cleared by this function.
  435. * @note This function cannot be used in a particular setup: ADC configured
  436. * in DMA mode and polling for end of each conversion (ADC init
  437. * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
  438. * In this case, DMA resets the flag EOC and polling cannot be
  439. * performed on each conversion. Nevertheless, polling can still
  440. * be performed on the complete sequence.
  441. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  442. * the configuration information for the specified ADC.
  443. * @param Timeout: Timeout value in millisecond.
  444. * @retval HAL status
  445. */
  446. HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
  447. {
  448. uint32_t tickstart = 0;
  449. /* Verification that ADC configuration is compliant with polling for */
  450. /* each conversion: */
  451. /* Particular case is ADC configured in DMA mode and ADC sequencer with */
  452. /* several ranks and polling for end of each conversion. */
  453. /* For code simplicity sake, this particular case is generalized to */
  454. /* ADC configured in DMA mode and polling for end of each conversion. */
  455. if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
  456. HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA) )
  457. {
  458. /* Update ADC state machine to error */
  459. hadc->State = HAL_ADC_STATE_ERROR;
  460. /* Process unlocked */
  461. __HAL_UNLOCK(hadc);
  462. return HAL_ERROR;
  463. }
  464. /* Get tick */
  465. tickstart = HAL_GetTick();
  466. /* Check End of conversion flag */
  467. while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
  468. {
  469. /* Check for the Timeout */
  470. if(Timeout != HAL_MAX_DELAY)
  471. {
  472. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  473. {
  474. hadc->State= HAL_ADC_STATE_TIMEOUT;
  475. /* Process unlocked */
  476. __HAL_UNLOCK(hadc);
  477. return HAL_TIMEOUT;
  478. }
  479. }
  480. }
  481. /* Check if an injected conversion is ready */
  482. if(hadc->State == HAL_ADC_STATE_EOC_INJ)
  483. {
  484. /* Change ADC state */
  485. hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
  486. }
  487. else
  488. {
  489. /* Change ADC state */
  490. hadc->State = HAL_ADC_STATE_EOC_REG;
  491. }
  492. /* Return ADC state */
  493. return HAL_OK;
  494. }
  495. /**
  496. * @brief Poll for conversion event
  497. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  498. * the configuration information for the specified ADC.
  499. * @param EventType: the ADC event type.
  500. * This parameter can be one of the following values:
  501. * @arg ADC_AWD_EVENT: ADC Analog watch Dog event.
  502. * @arg ADC_OVR_EVENT: ADC Overrun event.
  503. * @param Timeout: Timeout value in millisecond.
  504. * @retval HAL status
  505. */
  506. HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
  507. {
  508. uint32_t tickstart = 0;
  509. /* Check the parameters */
  510. assert_param(IS_ADC_EVENT_TYPE(EventType));
  511. /* Get tick */
  512. tickstart = HAL_GetTick();
  513. /* Check selected event flag */
  514. while(!(__HAL_ADC_GET_FLAG(hadc,EventType)))
  515. {
  516. /* Check for the Timeout */
  517. if(Timeout != HAL_MAX_DELAY)
  518. {
  519. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  520. {
  521. hadc->State= HAL_ADC_STATE_TIMEOUT;
  522. /* Process unlocked */
  523. __HAL_UNLOCK(hadc);
  524. return HAL_TIMEOUT;
  525. }
  526. }
  527. }
  528. /* Check analog watchdog flag */
  529. if(EventType == ADC_AWD_EVENT)
  530. {
  531. /* Change ADC state */
  532. hadc->State = HAL_ADC_STATE_AWD;
  533. /* Clear the ADCx's analog watchdog flag */
  534. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
  535. }
  536. else
  537. {
  538. /* Change ADC state */
  539. hadc->State = HAL_ADC_STATE_ERROR;
  540. /* Clear the ADCx's Overrun flag */
  541. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
  542. }
  543. /* Return ADC state */
  544. return HAL_OK;
  545. }
  546. /**
  547. * @brief Enables the interrupt and starts ADC conversion of regular channels.
  548. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  549. * the configuration information for the specified ADC.
  550. * @retval HAL status.
  551. */
  552. HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
  553. {
  554. __IO uint32_t counter = 0;
  555. /* Check the parameters */
  556. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  557. assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
  558. /* Process locked */
  559. __HAL_LOCK(hadc);
  560. /* Check if an injected conversion is ongoing */
  561. if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
  562. {
  563. /* Change ADC state */
  564. hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
  565. }
  566. else
  567. {
  568. /* Change ADC state */
  569. hadc->State = HAL_ADC_STATE_BUSY_REG;
  570. }
  571. /* Set ADC error code to none */
  572. hadc->ErrorCode = HAL_ADC_ERROR_NONE;
  573. /* Check if ADC peripheral is disabled in order to enable it and wait during
  574. Tstab time the ADC's stabilization */
  575. if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
  576. {
  577. /* Enable the Peripheral */
  578. __HAL_ADC_ENABLE(hadc);
  579. /* Delay for ADC stabilization time */
  580. /* Compute number of CPU cycles to wait for */
  581. counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
  582. while(counter != 0)
  583. {
  584. counter--;
  585. }
  586. }
  587. /* Enable the ADC overrun interrupt */
  588. __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
  589. /* Enable the ADC end of conversion interrupt for regular group */
  590. __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC);
  591. /* Process unlocked */
  592. __HAL_UNLOCK(hadc);
  593. /* Check if Multimode enabled */
  594. if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
  595. {
  596. /* if no external trigger present enable software conversion of regular channels */
  597. if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
  598. {
  599. /* Enable the selected ADC software conversion for regular group */
  600. hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
  601. }
  602. }
  603. else
  604. {
  605. /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
  606. if((hadc->Instance == (ADC_TypeDef*)0x40012000) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
  607. {
  608. /* Enable the selected ADC software conversion for regular group */
  609. hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
  610. }
  611. }
  612. /* Return function status */
  613. return HAL_OK;
  614. }
  615. /**
  616. * @brief Disables the interrupt and stop ADC conversion of regular channels.
  617. *
  618. * @note Caution: This function will stop also injected channels.
  619. *
  620. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  621. * the configuration information for the specified ADC.
  622. * @retval HAL status.
  623. */
  624. HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
  625. {
  626. /* Disable the ADC end of conversion interrupt for regular group */
  627. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
  628. /* Disable the ADC end of conversion interrupt for injected group */
  629. __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE);
  630. /* Enable the Peripheral */
  631. __HAL_ADC_DISABLE(hadc);
  632. /* Change ADC state */
  633. hadc->State = HAL_ADC_STATE_READY;
  634. /* Return function status */
  635. return HAL_OK;
  636. }
  637. /**
  638. * @brief Handles ADC interrupt request
  639. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  640. * the configuration information for the specified ADC.
  641. * @retval None
  642. */
  643. void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
  644. {
  645. uint32_t tmp1 = 0, tmp2 = 0;
  646. /* Check the parameters */
  647. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  648. assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
  649. assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
  650. tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC);
  651. tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC);
  652. /* Check End of conversion flag for regular channels */
  653. if(tmp1 && tmp2)
  654. {
  655. /* Check if an injected conversion is ready */
  656. if(hadc->State == HAL_ADC_STATE_EOC_INJ)
  657. {
  658. /* Change ADC state */
  659. hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
  660. }
  661. else
  662. {
  663. /* Change ADC state */
  664. hadc->State = HAL_ADC_STATE_EOC_REG;
  665. }
  666. if((hadc->Init.ContinuousConvMode == DISABLE) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
  667. {
  668. if(hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
  669. {
  670. /* DISABLE the ADC end of conversion interrupt for regular group */
  671. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
  672. /* DISABLE the ADC overrun interrupt */
  673. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
  674. }
  675. else
  676. {
  677. if (hadc->NbrOfCurrentConversionRank == 0)
  678. {
  679. hadc->NbrOfCurrentConversionRank = hadc->Init.NbrOfConversion;
  680. }
  681. /* Decrement the number of conversion when an interrupt occurs */
  682. hadc->NbrOfCurrentConversionRank--;
  683. /* Check if all conversions are finished */
  684. if(hadc->NbrOfCurrentConversionRank == 0)
  685. {
  686. /* DISABLE the ADC end of conversion interrupt for regular group */
  687. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
  688. /* DISABLE the ADC overrun interrupt */
  689. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
  690. }
  691. }
  692. }
  693. /* Conversion complete callback */
  694. HAL_ADC_ConvCpltCallback(hadc);
  695. /* Clear the ADCx flag for regular end of conversion */
  696. __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_EOC);
  697. }
  698. tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC);
  699. tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC);
  700. /* Check End of conversion flag for injected channels */
  701. if(tmp1 && tmp2)
  702. {
  703. /* Check if a regular conversion is ready */
  704. if(hadc->State == HAL_ADC_STATE_EOC_REG)
  705. {
  706. /* Change ADC state */
  707. hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
  708. }
  709. else
  710. {
  711. /* Change ADC state */
  712. hadc->State = HAL_ADC_STATE_EOC_INJ;
  713. }
  714. tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
  715. tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
  716. if(((hadc->Init.ContinuousConvMode == DISABLE) || tmp1) && tmp2)
  717. {
  718. /* DISABLE the ADC end of conversion interrupt for injected group */
  719. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
  720. }
  721. /* Conversion complete callback */
  722. HAL_ADCEx_InjectedConvCpltCallback(hadc);
  723. /* Clear the ADCx flag for injected end of conversion */
  724. __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC);
  725. }
  726. tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD);
  727. tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD);
  728. /* Check Analog watchdog flag */
  729. if(tmp1 && tmp2)
  730. {
  731. /* Change ADC state */
  732. hadc->State = HAL_ADC_STATE_AWD;
  733. /* Clear the ADCx's Analog watchdog flag */
  734. __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_AWD);
  735. /* Level out of window callback */
  736. HAL_ADC_LevelOutOfWindowCallback(hadc);
  737. }
  738. tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR);
  739. tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR);
  740. /* Check Overrun flag */
  741. if(tmp1 && tmp2)
  742. {
  743. /* Change ADC state to overrun state */
  744. hadc->State = HAL_ADC_STATE_ERROR;
  745. /* Set ADC error code to overrun */
  746. hadc->ErrorCode |= HAL_ADC_ERROR_OVR;
  747. /* Clear the Overrun flag */
  748. __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_OVR);
  749. /* Error callback */
  750. HAL_ADC_ErrorCallback(hadc);
  751. }
  752. }
  753. /**
  754. * @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral
  755. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  756. * the configuration information for the specified ADC.
  757. * @param pData: The destination Buffer address.
  758. * @param Length: The length of data to be transferred from ADC peripheral to memory.
  759. * @retval HAL status
  760. */
  761. HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
  762. {
  763. __IO uint32_t counter = 0;
  764. /* Check the parameters */
  765. assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  766. assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
  767. /* Process locked */
  768. __HAL_LOCK(hadc);
  769. /* Enable ADC overrun interrupt */
  770. __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
  771. /* Enable ADC DMA mode */
  772. hadc->Instance->CR2 |= ADC_CR2_DMA;
  773. /* Set the DMA transfer complete callback */
  774. hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
  775. /* Set the DMA half transfer complete callback */
  776. hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
  777. /* Set the DMA error callback */
  778. hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
  779. /* Enable the DMA Stream */
  780. HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
  781. /* Change ADC state */
  782. hadc->State = HAL_ADC_STATE_BUSY_REG;
  783. /* Process unlocked */
  784. __HAL_UNLOCK(hadc);
  785. /* Check if ADC peripheral is disabled in order to enable it and wait during
  786. Tstab time the ADC's stabilization */
  787. if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
  788. {
  789. /* Enable the Peripheral */
  790. __HAL_ADC_ENABLE(hadc);
  791. /* Delay for ADC stabilization time */
  792. /* Compute number of CPU cycles to wait for */
  793. counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
  794. while(counter != 0)
  795. {
  796. counter--;
  797. }
  798. }
  799. /* if no external trigger present enable software conversion of regular channels */
  800. if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
  801. {
  802. /* Enable the selected ADC software conversion for regular group */
  803. hadc->Instance->CR2 |= ADC_CR2_SWSTART;
  804. }
  805. /* Return function status */
  806. return HAL_OK;
  807. }
  808. /**
  809. * @brief Disables ADC DMA (Single-ADC mode) and disables ADC peripheral
  810. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  811. * the configuration information for the specified ADC.
  812. * @retval HAL status
  813. */
  814. HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
  815. {
  816. /* Disable the Peripheral */
  817. __HAL_ADC_DISABLE(hadc);
  818. /* Disable ADC overrun interrupt */
  819. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
  820. /* Disable the selected ADC DMA mode */
  821. hadc->Instance->CR2 &= ~ADC_CR2_DMA;
  822. /* Disable the ADC DMA Stream */
  823. HAL_DMA_Abort(hadc->DMA_Handle);
  824. /* Change ADC state */
  825. hadc->State = HAL_ADC_STATE_READY;
  826. /* Return function status */
  827. return HAL_OK;
  828. }
  829. /**
  830. * @brief Gets the converted value from data register of regular channel.
  831. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  832. * the configuration information for the specified ADC.
  833. * @retval Converted value
  834. */
  835. uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
  836. {
  837. /* Return the selected ADC converted value */
  838. return hadc->Instance->DR;
  839. }
  840. /**
  841. * @brief Regular conversion complete callback in non blocking mode
  842. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  843. * the configuration information for the specified ADC.
  844. * @retval None
  845. */
  846. __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
  847. {
  848. /* Prevent unused argument(s) compilation warning */
  849. UNUSED(hadc);
  850. /* NOTE : This function Should not be modified, when the callback is needed,
  851. the HAL_ADC_ConvCpltCallback could be implemented in the user file
  852. */
  853. }
  854. /**
  855. * @brief Regular conversion half DMA transfer callback in non blocking mode
  856. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  857. * the configuration information for the specified ADC.
  858. * @retval None
  859. */
  860. __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
  861. {
  862. /* Prevent unused argument(s) compilation warning */
  863. UNUSED(hadc);
  864. /* NOTE : This function Should not be modified, when the callback is needed,
  865. the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file
  866. */
  867. }
  868. /**
  869. * @brief Analog watchdog callback in non blocking mode
  870. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  871. * the configuration information for the specified ADC.
  872. * @retval None
  873. */
  874. __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
  875. {
  876. /* Prevent unused argument(s) compilation warning */
  877. UNUSED(hadc);
  878. /* NOTE : This function Should not be modified, when the callback is needed,
  879. the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file
  880. */
  881. }
  882. /**
  883. * @brief Error ADC callback.
  884. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  885. * the configuration information for the specified ADC.
  886. * @retval None
  887. */
  888. __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
  889. {
  890. /* Prevent unused argument(s) compilation warning */
  891. UNUSED(hadc);
  892. /* NOTE : This function Should not be modified, when the callback is needed,
  893. the HAL_ADC_ErrorCallback could be implemented in the user file
  894. */
  895. }
  896. /**
  897. * @}
  898. */
  899. /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
  900. * @brief Peripheral Control functions
  901. *
  902. @verbatim
  903. ===============================================================================
  904. ##### Peripheral Control functions #####
  905. ===============================================================================
  906. [..] This section provides functions allowing to:
  907. (+) Configure regular channels.
  908. (+) Configure injected channels.
  909. (+) Configure multimode.
  910. (+) Configure the analog watch dog.
  911. @endverbatim
  912. * @{
  913. */
  914. /**
  915. * @brief Configures for the selected ADC regular channel its corresponding
  916. * rank in the sequencer and its sample time.
  917. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  918. * the configuration information for the specified ADC.
  919. * @param sConfig: ADC configuration structure.
  920. * @retval HAL status
  921. */
  922. HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
  923. {
  924. __IO uint32_t counter = 0;
  925. /* Check the parameters */
  926. assert_param(IS_ADC_CHANNEL(sConfig->Channel));
  927. assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
  928. assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
  929. /* Process locked */
  930. __HAL_LOCK(hadc);
  931. /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
  932. if (sConfig->Channel > ADC_CHANNEL_9)
  933. {
  934. /* Clear the old sample time */
  935. hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
  936. /* Set the new sample time */
  937. hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
  938. }
  939. else /* ADC_Channel include in ADC_Channel_[0..9] */
  940. {
  941. /* Clear the old sample time */
  942. hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
  943. /* Set the new sample time */
  944. hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
  945. }
  946. /* For Rank 1 to 6 */
  947. if (sConfig->Rank < 7)
  948. {
  949. /* Clear the old SQx bits for the selected rank */
  950. hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
  951. /* Set the SQx bits for the selected rank */
  952. hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
  953. }
  954. /* For Rank 7 to 12 */
  955. else if (sConfig->Rank < 13)
  956. {
  957. /* Clear the old SQx bits for the selected rank */
  958. hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
  959. /* Set the SQx bits for the selected rank */
  960. hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
  961. }
  962. /* For Rank 13 to 16 */
  963. else
  964. {
  965. /* Clear the old SQx bits for the selected rank */
  966. hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
  967. /* Set the SQx bits for the selected rank */
  968. hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
  969. }
  970. /* if ADC1 Channel_18 is selected enable VBAT Channel */
  971. if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
  972. {
  973. /* Enable the VBAT channel*/
  974. ADC->CCR |= ADC_CCR_VBATE;
  975. }
  976. /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
  977. if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT)))
  978. {
  979. /* Enable the TSVREFE channel*/
  980. ADC->CCR |= ADC_CCR_TSVREFE;
  981. if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
  982. {
  983. /* Delay for temperature sensor stabilization time */
  984. /* Compute number of CPU cycles to wait for */
  985. counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
  986. while(counter != 0)
  987. {
  988. counter--;
  989. }
  990. }
  991. }
  992. /* Process unlocked */
  993. __HAL_UNLOCK(hadc);
  994. /* Return function status */
  995. return HAL_OK;
  996. }
  997. /**
  998. * @brief Configures the analog watchdog.
  999. * @note Analog watchdog thresholds can be modified while ADC conversion is on going.
  1000. * In this case, some constraints must be taken into account: the programmed threshold
  1001. * values are effective from the next ADC EOC (end of unitary conversion).
  1002. * Considering that registers write delay may happen due to bus activity, this might cause
  1003. * an uncertainty on the effective timing of the new programmed threshold values.
  1004. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  1005. * the configuration information for the specified ADC.
  1006. * @param AnalogWDGConfig : pointer to an ADC_AnalogWDGConfTypeDef structure
  1007. * that contains the configuration information of ADC analog watchdog.
  1008. * @retval HAL status
  1009. */
  1010. HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
  1011. {
  1012. #ifdef USE_FULL_ASSERT
  1013. uint32_t tmp = 0;
  1014. #endif /* USE_FULL_ASSERT */
  1015. /* Check the parameters */
  1016. assert_param(IS_ADC_ANALOG_WATCHDOG(AnalogWDGConfig->WatchdogMode));
  1017. assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
  1018. assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
  1019. #ifdef USE_FULL_ASSERT
  1020. tmp = ADC_GET_RESOLUTION(hadc);
  1021. assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->HighThreshold));
  1022. assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->LowThreshold));
  1023. #endif /* USE_FULL_ASSERT */
  1024. /* Process locked */
  1025. __HAL_LOCK(hadc);
  1026. if(AnalogWDGConfig->ITMode == ENABLE)
  1027. {
  1028. /* Enable the ADC Analog watchdog interrupt */
  1029. __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
  1030. }
  1031. else
  1032. {
  1033. /* Disable the ADC Analog watchdog interrupt */
  1034. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
  1035. }
  1036. /* Clear AWDEN, JAWDEN and AWDSGL bits */
  1037. hadc->Instance->CR1 &= ~(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN | ADC_CR1_AWDEN);
  1038. /* Set the analog watchdog enable mode */
  1039. hadc->Instance->CR1 |= AnalogWDGConfig->WatchdogMode;
  1040. /* Set the high threshold */
  1041. hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
  1042. /* Set the low threshold */
  1043. hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
  1044. /* Clear the Analog watchdog channel select bits */
  1045. hadc->Instance->CR1 &= ~ADC_CR1_AWDCH;
  1046. /* Set the Analog watchdog channel */
  1047. hadc->Instance->CR1 |= (uint32_t)((uint16_t)(AnalogWDGConfig->Channel));
  1048. /* Process unlocked */
  1049. __HAL_UNLOCK(hadc);
  1050. /* Return function status */
  1051. return HAL_OK;
  1052. }
  1053. /**
  1054. * @}
  1055. */
  1056. /** @defgroup ADC_Exported_Functions_Group4 ADC Peripheral State functions
  1057. * @brief ADC Peripheral State functions
  1058. *
  1059. @verbatim
  1060. ===============================================================================
  1061. ##### Peripheral State and errors functions #####
  1062. ===============================================================================
  1063. [..]
  1064. This subsection provides functions allowing to
  1065. (+) Check the ADC state
  1066. (+) Check the ADC Error
  1067. @endverbatim
  1068. * @{
  1069. */
  1070. /**
  1071. * @brief return the ADC state
  1072. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  1073. * the configuration information for the specified ADC.
  1074. * @retval HAL state
  1075. */
  1076. HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
  1077. {
  1078. /* Return ADC state */
  1079. return hadc->State;
  1080. }
  1081. /**
  1082. * @brief Return the ADC error code
  1083. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  1084. * the configuration information for the specified ADC.
  1085. * @retval ADC Error Code
  1086. */
  1087. uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
  1088. {
  1089. return hadc->ErrorCode;
  1090. }
  1091. /**
  1092. * @}
  1093. */
  1094. /** @addtogroup ADC_Private_Functions
  1095. * @{
  1096. */
  1097. /**
  1098. * @brief Initializes the ADCx peripheral according to the specified parameters
  1099. * in the ADC_InitStruct without initializing the ADC MSP.
  1100. * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
  1101. * the configuration information for the specified ADC.
  1102. * @retval None
  1103. */
  1104. static void ADC_Init(ADC_HandleTypeDef* hadc)
  1105. {
  1106. /* Set ADC parameters */
  1107. /* Set the ADC clock prescaler */
  1108. ADC->CCR &= ~(ADC_CCR_ADCPRE);
  1109. ADC->CCR |= hadc->Init.ClockPrescaler;
  1110. /* Set ADC scan mode */
  1111. hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
  1112. hadc->Instance->CR1 |= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
  1113. /* Set ADC resolution */
  1114. hadc->Instance->CR1 &= ~(ADC_CR1_RES);
  1115. hadc->Instance->CR1 |= hadc->Init.Resolution;
  1116. /* Set ADC data alignment */
  1117. hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
  1118. hadc->Instance->CR2 |= hadc->Init.DataAlign;
  1119. /* Enable external trigger if trigger selection is different of software */
  1120. /* start. */
  1121. /* Note: This configuration keeps the hardware feature of parameter */
  1122. /* ExternalTrigConvEdge "trigger edge none" equivalent to */
  1123. /* software start. */
  1124. if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
  1125. {
  1126. /* Select external trigger to start conversion */
  1127. hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
  1128. hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv;
  1129. /* Select external trigger polarity */
  1130. hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
  1131. hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge;
  1132. }
  1133. else
  1134. {
  1135. /* Reset the external trigger */
  1136. hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
  1137. hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
  1138. }
  1139. /* Enable or disable ADC continuous conversion mode */
  1140. hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
  1141. hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode);
  1142. if(hadc->Init.DiscontinuousConvMode != DISABLE)
  1143. {
  1144. assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
  1145. /* Enable the selected ADC regular discontinuous mode */
  1146. hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN;
  1147. /* Set the number of channels to be converted in discontinuous mode */
  1148. hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
  1149. hadc->Instance->CR1 |= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
  1150. }
  1151. else
  1152. {
  1153. /* Disable the selected ADC regular discontinuous mode */
  1154. hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
  1155. }
  1156. /* Set ADC number of conversion */
  1157. hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
  1158. hadc->Instance->SQR1 |= ADC_SQR1(hadc->Init.NbrOfConversion);
  1159. /* Enable or disable ADC DMA continuous request */
  1160. hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
  1161. hadc->Instance->CR2 |= ADC_CR2_DMAContReq(hadc->Init.DMAContinuousRequests);
  1162. /* Enable or disable ADC end of conversion selection */
  1163. hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
  1164. hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
  1165. }
  1166. /**
  1167. * @brief DMA transfer complete callback.
  1168. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1169. * the configuration information for the specified DMA module.
  1170. * @retval None
  1171. */
  1172. static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
  1173. {
  1174. ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1175. /* Check if an injected conversion is ready */
  1176. if(hadc->State == HAL_ADC_STATE_EOC_INJ)
  1177. {
  1178. /* Change ADC state */
  1179. hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
  1180. }
  1181. else
  1182. {
  1183. /* Change ADC state */
  1184. hadc->State = HAL_ADC_STATE_EOC_REG;
  1185. }
  1186. HAL_ADC_ConvCpltCallback(hadc);
  1187. }
  1188. /**
  1189. * @brief DMA half transfer complete callback.
  1190. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1191. * the configuration information for the specified DMA module.
  1192. * @retval None
  1193. */
  1194. static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
  1195. {
  1196. ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1197. /* Conversion complete callback */
  1198. HAL_ADC_ConvHalfCpltCallback(hadc);
  1199. }
  1200. /**
  1201. * @brief DMA error callback
  1202. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1203. * the configuration information for the specified DMA module.
  1204. * @retval None
  1205. */
  1206. static void ADC_DMAError(DMA_HandleTypeDef *hdma)
  1207. {
  1208. ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1209. hadc->State= HAL_ADC_STATE_ERROR;
  1210. /* Set ADC error code to DMA error */
  1211. hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
  1212. HAL_ADC_ErrorCallback(hadc);
  1213. }
  1214. /**
  1215. * @}
  1216. */
  1217. /**
  1218. * @}
  1219. */
  1220. #endif /* HAL_ADC_MODULE_ENABLED */
  1221. /**
  1222. * @}
  1223. */
  1224. /**
  1225. * @}
  1226. */
  1227. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/