stm32f4xx_hal_can.c 44 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_can.c
  4. * @author MCD Application Team
  5. * @version V1.4.3
  6. * @date 11-December-2015
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Controller Area Network (CAN) peripheral:
  9. * + Initialization and de-initialization functions
  10. * + IO operation functions
  11. * + Peripheral Control functions
  12. * + Peripheral State and Error functions
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### How to use this driver #####
  17. ==============================================================================
  18. [..]
  19. (#) Enable the CAN controller interface clock using
  20. __HAL_RCC_CAN1_CLK_ENABLE() for CAN1 and __HAL_RCC_CAN2_CLK_ENABLE() for CAN2
  21. -@- In case you are using CAN2 only, you have to enable the CAN1 clock.
  22. (#) CAN pins configuration
  23. (++) Enable the clock for the CAN GPIOs using the following function:
  24. __GPIOx_CLK_ENABLE()
  25. (++) Connect and configure the involved CAN pins to AF9 using the
  26. following function HAL_GPIO_Init()
  27. (#) Initialize and configure the CAN using CAN_Init() function.
  28. (#) Transmit the desired CAN frame using HAL_CAN_Transmit() function.
  29. (#) Receive a CAN frame using HAL_CAN_Receive() function.
  30. *** Polling mode IO operation ***
  31. =================================
  32. [..]
  33. (+) Start the CAN peripheral transmission and wait the end of this operation
  34. using HAL_CAN_Transmit(), at this stage user can specify the value of timeout
  35. according to his end application
  36. (+) Start the CAN peripheral reception and wait the end of this operation
  37. using HAL_CAN_Receive(), at this stage user can specify the value of timeout
  38. according to his end application
  39. *** Interrupt mode IO operation ***
  40. ===================================
  41. [..]
  42. (+) Start the CAN peripheral transmission using HAL_CAN_Transmit_IT()
  43. (+) Start the CAN peripheral reception using HAL_CAN_Receive_IT()
  44. (+) Use HAL_CAN_IRQHandler() called under the used CAN Interrupt subroutine
  45. (+) At CAN end of transmission HAL_CAN_TxCpltCallback() function is executed and user can
  46. add his own code by customization of function pointer HAL_CAN_TxCpltCallback
  47. (+) In case of CAN Error, HAL_CAN_ErrorCallback() function is executed and user can
  48. add his own code by customization of function pointer HAL_CAN_ErrorCallback
  49. *** CAN HAL driver macros list ***
  50. =============================================
  51. [..]
  52. Below the list of most used macros in CAN HAL driver.
  53. (+) __HAL_CAN_ENABLE_IT: Enable the specified CAN interrupts
  54. (+) __HAL_CAN_DISABLE_IT: Disable the specified CAN interrupts
  55. (+) __HAL_CAN_GET_IT_SOURCE: Check if the specified CAN interrupt source is enabled or disabled
  56. (+) __HAL_CAN_CLEAR_FLAG: Clear the CAN's pending flags
  57. (+) __HAL_CAN_GET_FLAG: Get the selected CAN's flag status
  58. [..]
  59. (@) You can refer to the CAN HAL driver header file for more useful macros
  60. @endverbatim
  61. ******************************************************************************
  62. * @attention
  63. *
  64. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  65. *
  66. * Redistribution and use in source and binary forms, with or without modification,
  67. * are permitted provided that the following conditions are met:
  68. * 1. Redistributions of source code must retain the above copyright notice,
  69. * this list of conditions and the following disclaimer.
  70. * 2. Redistributions in binary form must reproduce the above copyright notice,
  71. * this list of conditions and the following disclaimer in the documentation
  72. * and/or other materials provided with the distribution.
  73. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  74. * may be used to endorse or promote products derived from this software
  75. * without specific prior written permission.
  76. *
  77. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  78. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  79. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  80. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  81. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  82. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  83. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  84. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  85. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  86. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  87. *
  88. ******************************************************************************
  89. */
  90. /* Includes ------------------------------------------------------------------*/
  91. #include "stm32f4xx_hal.h"
  92. /** @addtogroup STM32F4xx_HAL_Driver
  93. * @{
  94. */
  95. /** @defgroup CAN CAN
  96. * @brief CAN driver modules
  97. * @{
  98. */
  99. #ifdef HAL_CAN_MODULE_ENABLED
  100. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
  101. defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
  102. defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
  103. /* Private typedef -----------------------------------------------------------*/
  104. /* Private define ------------------------------------------------------------*/
  105. /** @addtogroup CAN_Private_Constants
  106. * @{
  107. */
  108. #define CAN_TIMEOUT_VALUE 10
  109. /**
  110. * @}
  111. */
  112. /* Private macro -------------------------------------------------------------*/
  113. /* Private variables ---------------------------------------------------------*/
  114. /* Private function prototypes -----------------------------------------------*/
  115. /** @addtogroup CAN_Private_Functions
  116. * @{
  117. */
  118. static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber);
  119. static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan);
  120. /**
  121. * @}
  122. */
  123. /* Exported functions --------------------------------------------------------*/
  124. /** @defgroup CAN_Exported_Functions CAN Exported Functions
  125. * @{
  126. */
  127. /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
  128. * @brief Initialization and Configuration functions
  129. *
  130. @verbatim
  131. ==============================================================================
  132. ##### Initialization and de-initialization functions #####
  133. ==============================================================================
  134. [..] This section provides functions allowing to:
  135. (+) Initialize and configure the CAN.
  136. (+) De-initialize the CAN.
  137. @endverbatim
  138. * @{
  139. */
  140. /**
  141. * @brief Initializes the CAN peripheral according to the specified
  142. * parameters in the CAN_InitStruct.
  143. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  144. * the configuration information for the specified CAN.
  145. * @retval HAL status
  146. */
  147. HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
  148. {
  149. uint32_t InitStatus = 3;
  150. uint32_t tickstart = 0;
  151. /* Check CAN handle */
  152. if(hcan == NULL)
  153. {
  154. return HAL_ERROR;
  155. }
  156. /* Check the parameters */
  157. assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
  158. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TTCM));
  159. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ABOM));
  160. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AWUM));
  161. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.NART));
  162. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.RFLM));
  163. assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TXFP));
  164. assert_param(IS_CAN_MODE(hcan->Init.Mode));
  165. assert_param(IS_CAN_SJW(hcan->Init.SJW));
  166. assert_param(IS_CAN_BS1(hcan->Init.BS1));
  167. assert_param(IS_CAN_BS2(hcan->Init.BS2));
  168. assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
  169. if(hcan->State == HAL_CAN_STATE_RESET)
  170. {
  171. /* Allocate lock resource and initialize it */
  172. hcan->Lock = HAL_UNLOCKED;
  173. /* Init the low level hardware */
  174. HAL_CAN_MspInit(hcan);
  175. }
  176. /* Initialize the CAN state*/
  177. hcan->State = HAL_CAN_STATE_BUSY;
  178. /* Exit from sleep mode */
  179. hcan->Instance->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
  180. /* Request initialisation */
  181. hcan->Instance->MCR |= CAN_MCR_INRQ ;
  182. /* Get tick */
  183. tickstart = HAL_GetTick();
  184. /* Wait the acknowledge */
  185. while((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
  186. {
  187. if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
  188. {
  189. hcan->State= HAL_CAN_STATE_TIMEOUT;
  190. /* Process unlocked */
  191. __HAL_UNLOCK(hcan);
  192. return HAL_TIMEOUT;
  193. }
  194. }
  195. /* Check acknowledge */
  196. if ((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
  197. {
  198. InitStatus = CAN_INITSTATUS_FAILED;
  199. }
  200. else
  201. {
  202. /* Set the time triggered communication mode */
  203. if (hcan->Init.TTCM == ENABLE)
  204. {
  205. hcan->Instance->MCR |= CAN_MCR_TTCM;
  206. }
  207. else
  208. {
  209. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TTCM;
  210. }
  211. /* Set the automatic bus-off management */
  212. if (hcan->Init.ABOM == ENABLE)
  213. {
  214. hcan->Instance->MCR |= CAN_MCR_ABOM;
  215. }
  216. else
  217. {
  218. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_ABOM;
  219. }
  220. /* Set the automatic wake-up mode */
  221. if (hcan->Init.AWUM == ENABLE)
  222. {
  223. hcan->Instance->MCR |= CAN_MCR_AWUM;
  224. }
  225. else
  226. {
  227. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_AWUM;
  228. }
  229. /* Set the no automatic retransmission */
  230. if (hcan->Init.NART == ENABLE)
  231. {
  232. hcan->Instance->MCR |= CAN_MCR_NART;
  233. }
  234. else
  235. {
  236. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_NART;
  237. }
  238. /* Set the receive FIFO locked mode */
  239. if (hcan->Init.RFLM == ENABLE)
  240. {
  241. hcan->Instance->MCR |= CAN_MCR_RFLM;
  242. }
  243. else
  244. {
  245. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_RFLM;
  246. }
  247. /* Set the transmit FIFO priority */
  248. if (hcan->Init.TXFP == ENABLE)
  249. {
  250. hcan->Instance->MCR |= CAN_MCR_TXFP;
  251. }
  252. else
  253. {
  254. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TXFP;
  255. }
  256. /* Set the bit timing register */
  257. hcan->Instance->BTR = (uint32_t)((uint32_t)hcan->Init.Mode) | \
  258. ((uint32_t)hcan->Init.SJW) | \
  259. ((uint32_t)hcan->Init.BS1) | \
  260. ((uint32_t)hcan->Init.BS2) | \
  261. ((uint32_t)hcan->Init.Prescaler - 1);
  262. /* Request leave initialisation */
  263. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_INRQ;
  264. /* Get tick */
  265. tickstart = HAL_GetTick();
  266. /* Wait the acknowledge */
  267. while((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
  268. {
  269. if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
  270. {
  271. hcan->State= HAL_CAN_STATE_TIMEOUT;
  272. /* Process unlocked */
  273. __HAL_UNLOCK(hcan);
  274. return HAL_TIMEOUT;
  275. }
  276. }
  277. /* Check acknowledged */
  278. if ((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
  279. {
  280. InitStatus = CAN_INITSTATUS_FAILED;
  281. }
  282. else
  283. {
  284. InitStatus = CAN_INITSTATUS_SUCCESS;
  285. }
  286. }
  287. if(InitStatus == CAN_INITSTATUS_SUCCESS)
  288. {
  289. /* Set CAN error code to none */
  290. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  291. /* Initialize the CAN state */
  292. hcan->State = HAL_CAN_STATE_READY;
  293. /* Return function status */
  294. return HAL_OK;
  295. }
  296. else
  297. {
  298. /* Initialize the CAN state */
  299. hcan->State = HAL_CAN_STATE_ERROR;
  300. /* Return function status */
  301. return HAL_ERROR;
  302. }
  303. }
  304. /**
  305. * @brief Configures the CAN reception filter according to the specified
  306. * parameters in the CAN_FilterInitStruct.
  307. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  308. * the configuration information for the specified CAN.
  309. * @param sFilterConfig: pointer to a CAN_FilterConfTypeDef structure that
  310. * contains the filter configuration information.
  311. * @retval None
  312. */
  313. HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig)
  314. {
  315. uint32_t filternbrbitpos = 0;
  316. /* Check the parameters */
  317. assert_param(IS_CAN_FILTER_NUMBER(sFilterConfig->FilterNumber));
  318. assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));
  319. assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));
  320. assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));
  321. assert_param(IS_FUNCTIONAL_STATE(sFilterConfig->FilterActivation));
  322. assert_param(IS_CAN_BANKNUMBER(sFilterConfig->BankNumber));
  323. filternbrbitpos = ((uint32_t)1) << sFilterConfig->FilterNumber;
  324. /* Initialisation mode for the filter */
  325. CAN1->FMR |= (uint32_t)CAN_FMR_FINIT;
  326. /* Select the start slave bank */
  327. CAN1->FMR &= ~((uint32_t)CAN_FMR_CAN2SB);
  328. CAN1->FMR |= (uint32_t)(sFilterConfig->BankNumber << 8);
  329. /* Filter Deactivation */
  330. CAN1->FA1R &= ~(uint32_t)filternbrbitpos;
  331. /* Filter Scale */
  332. if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT)
  333. {
  334. /* 16-bit scale for the filter */
  335. CAN1->FS1R &= ~(uint32_t)filternbrbitpos;
  336. /* First 16-bit identifier and First 16-bit mask */
  337. /* Or First 16-bit identifier and Second 16-bit identifier */
  338. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
  339. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16) |
  340. (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);
  341. /* Second 16-bit identifier and Second 16-bit mask */
  342. /* Or Third 16-bit identifier and Fourth 16-bit identifier */
  343. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
  344. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |
  345. (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh);
  346. }
  347. if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT)
  348. {
  349. /* 32-bit scale for the filter */
  350. CAN1->FS1R |= filternbrbitpos;
  351. /* 32-bit identifier or First 32-bit identifier */
  352. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
  353. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh) << 16) |
  354. (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);
  355. /* 32-bit mask or Second 32-bit identifier */
  356. CAN1->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
  357. ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |
  358. (0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow);
  359. }
  360. /* Filter Mode */
  361. if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK)
  362. {
  363. /*Id/Mask mode for the filter*/
  364. CAN1->FM1R &= ~(uint32_t)filternbrbitpos;
  365. }
  366. else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
  367. {
  368. /*Identifier list mode for the filter*/
  369. CAN1->FM1R |= (uint32_t)filternbrbitpos;
  370. }
  371. /* Filter FIFO assignment */
  372. if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0)
  373. {
  374. /* FIFO 0 assignation for the filter */
  375. CAN1->FFA1R &= ~(uint32_t)filternbrbitpos;
  376. }
  377. if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO1)
  378. {
  379. /* FIFO 1 assignation for the filter */
  380. CAN1->FFA1R |= (uint32_t)filternbrbitpos;
  381. }
  382. /* Filter activation */
  383. if (sFilterConfig->FilterActivation == ENABLE)
  384. {
  385. CAN1->FA1R |= filternbrbitpos;
  386. }
  387. /* Leave the initialisation mode for the filter */
  388. CAN1->FMR &= ~((uint32_t)CAN_FMR_FINIT);
  389. /* Return function status */
  390. return HAL_OK;
  391. }
  392. /**
  393. * @brief Deinitializes the CANx peripheral registers to their default reset values.
  394. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  395. * the configuration information for the specified CAN.
  396. * @retval HAL status
  397. */
  398. HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
  399. {
  400. /* Check CAN handle */
  401. if(hcan == NULL)
  402. {
  403. return HAL_ERROR;
  404. }
  405. /* Check the parameters */
  406. assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
  407. /* Change CAN state */
  408. hcan->State = HAL_CAN_STATE_BUSY;
  409. /* DeInit the low level hardware */
  410. HAL_CAN_MspDeInit(hcan);
  411. /* Change CAN state */
  412. hcan->State = HAL_CAN_STATE_RESET;
  413. /* Release Lock */
  414. __HAL_UNLOCK(hcan);
  415. /* Return function status */
  416. return HAL_OK;
  417. }
  418. /**
  419. * @brief Initializes the CAN MSP.
  420. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  421. * the configuration information for the specified CAN.
  422. * @retval None
  423. */
  424. __weak void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
  425. {
  426. /* Prevent unused argument(s) compilation warning */
  427. UNUSED(hcan);
  428. /* NOTE : This function Should not be modified, when the callback is needed,
  429. the HAL_CAN_MspInit could be implemented in the user file
  430. */
  431. }
  432. /**
  433. * @brief DeInitializes the CAN MSP.
  434. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  435. * the configuration information for the specified CAN.
  436. * @retval None
  437. */
  438. __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
  439. {
  440. /* Prevent unused argument(s) compilation warning */
  441. UNUSED(hcan);
  442. /* NOTE : This function Should not be modified, when the callback is needed,
  443. the HAL_CAN_MspDeInit could be implemented in the user file
  444. */
  445. }
  446. /**
  447. * @}
  448. */
  449. /** @defgroup CAN_Exported_Functions_Group2 IO operation functions
  450. * @brief IO operation functions
  451. *
  452. @verbatim
  453. ==============================================================================
  454. ##### IO operation functions #####
  455. ==============================================================================
  456. [..] This section provides functions allowing to:
  457. (+) Transmit a CAN frame message.
  458. (+) Receive a CAN frame message.
  459. (+) Enter CAN peripheral in sleep mode.
  460. (+) Wake up the CAN peripheral from sleep mode.
  461. @endverbatim
  462. * @{
  463. */
  464. /**
  465. * @brief Initiates and transmits a CAN frame message.
  466. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  467. * the configuration information for the specified CAN.
  468. * @param Timeout: Specify Timeout value
  469. * @retval HAL status
  470. */
  471. HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef* hcan, uint32_t Timeout)
  472. {
  473. uint32_t transmitmailbox = 5;
  474. uint32_t tickstart = 0;
  475. /* Check the parameters */
  476. assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
  477. assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
  478. assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
  479. /* Process locked */
  480. __HAL_LOCK(hcan);
  481. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  482. {
  483. /* Change CAN state */
  484. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  485. }
  486. else
  487. {
  488. /* Change CAN state */
  489. hcan->State = HAL_CAN_STATE_BUSY_TX;
  490. }
  491. /* Select one empty transmit mailbox */
  492. if ((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
  493. {
  494. transmitmailbox = 0;
  495. }
  496. else if ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
  497. {
  498. transmitmailbox = 1;
  499. }
  500. else if ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
  501. {
  502. transmitmailbox = 2;
  503. }
  504. else
  505. {
  506. transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
  507. }
  508. if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX)
  509. {
  510. /* Set up the Id */
  511. hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
  512. if (hcan->pTxMsg->IDE == CAN_ID_STD)
  513. {
  514. assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
  515. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \
  516. hcan->pTxMsg->RTR);
  517. }
  518. else
  519. {
  520. assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
  521. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \
  522. hcan->pTxMsg->IDE | \
  523. hcan->pTxMsg->RTR);
  524. }
  525. /* Set up the DLC */
  526. hcan->pTxMsg->DLC &= (uint8_t)0x0000000F;
  527. hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
  528. hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
  529. /* Set up the data field */
  530. hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) |
  531. ((uint32_t)hcan->pTxMsg->Data[2] << 16) |
  532. ((uint32_t)hcan->pTxMsg->Data[1] << 8) |
  533. ((uint32_t)hcan->pTxMsg->Data[0]));
  534. hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) |
  535. ((uint32_t)hcan->pTxMsg->Data[6] << 16) |
  536. ((uint32_t)hcan->pTxMsg->Data[5] << 8) |
  537. ((uint32_t)hcan->pTxMsg->Data[4]));
  538. /* Request transmission */
  539. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
  540. /* Get tick */
  541. tickstart = HAL_GetTick();
  542. /* Check End of transmission flag */
  543. while(!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox)))
  544. {
  545. /* Check for the Timeout */
  546. if(Timeout != HAL_MAX_DELAY)
  547. {
  548. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  549. {
  550. hcan->State = HAL_CAN_STATE_TIMEOUT;
  551. /* Process unlocked */
  552. __HAL_UNLOCK(hcan);
  553. return HAL_TIMEOUT;
  554. }
  555. }
  556. }
  557. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  558. {
  559. /* Change CAN state */
  560. hcan->State = HAL_CAN_STATE_BUSY_RX;
  561. /* Process unlocked */
  562. __HAL_UNLOCK(hcan);
  563. }
  564. else
  565. {
  566. /* Change CAN state */
  567. hcan->State = HAL_CAN_STATE_READY;
  568. /* Process unlocked */
  569. __HAL_UNLOCK(hcan);
  570. }
  571. /* Return function status */
  572. return HAL_OK;
  573. }
  574. else
  575. {
  576. /* Change CAN state */
  577. hcan->State = HAL_CAN_STATE_ERROR;
  578. /* Process unlocked */
  579. __HAL_UNLOCK(hcan);
  580. /* Return function status */
  581. return HAL_ERROR;
  582. }
  583. }
  584. /**
  585. * @brief Initiates and transmits a CAN frame message.
  586. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  587. * the configuration information for the specified CAN.
  588. * @retval HAL status
  589. */
  590. HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
  591. {
  592. uint32_t transmitmailbox = 5;
  593. uint32_t tmp = 0;
  594. /* Check the parameters */
  595. assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
  596. assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
  597. assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
  598. tmp = hcan->State;
  599. if((tmp == HAL_CAN_STATE_READY) || (tmp == HAL_CAN_STATE_BUSY_RX))
  600. {
  601. /* Process Locked */
  602. __HAL_LOCK(hcan);
  603. /* Select one empty transmit mailbox */
  604. if((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
  605. {
  606. transmitmailbox = 0;
  607. }
  608. else if((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
  609. {
  610. transmitmailbox = 1;
  611. }
  612. else if((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
  613. {
  614. transmitmailbox = 2;
  615. }
  616. else
  617. {
  618. transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
  619. }
  620. if(transmitmailbox != CAN_TXSTATUS_NOMAILBOX)
  621. {
  622. /* Set up the Id */
  623. hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
  624. if(hcan->pTxMsg->IDE == CAN_ID_STD)
  625. {
  626. assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
  627. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \
  628. hcan->pTxMsg->RTR);
  629. }
  630. else
  631. {
  632. assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
  633. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \
  634. hcan->pTxMsg->IDE | \
  635. hcan->pTxMsg->RTR);
  636. }
  637. /* Set up the DLC */
  638. hcan->pTxMsg->DLC &= (uint8_t)0x0000000F;
  639. hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
  640. hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
  641. /* Set up the data field */
  642. hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) |
  643. ((uint32_t)hcan->pTxMsg->Data[2] << 16) |
  644. ((uint32_t)hcan->pTxMsg->Data[1] << 8) |
  645. ((uint32_t)hcan->pTxMsg->Data[0]));
  646. hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) |
  647. ((uint32_t)hcan->pTxMsg->Data[6] << 16) |
  648. ((uint32_t)hcan->pTxMsg->Data[5] << 8) |
  649. ((uint32_t)hcan->pTxMsg->Data[4]));
  650. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  651. {
  652. /* Change CAN state */
  653. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  654. }
  655. else
  656. {
  657. /* Change CAN state */
  658. hcan->State = HAL_CAN_STATE_BUSY_TX;
  659. }
  660. /* Set CAN error code to none */
  661. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  662. /* Process Unlocked */
  663. __HAL_UNLOCK(hcan);
  664. /* Enable Error warning Interrupt */
  665. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG);
  666. /* Enable Error passive Interrupt */
  667. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EPV);
  668. /* Enable Bus-off Interrupt */
  669. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_BOF);
  670. /* Enable Last error code Interrupt */
  671. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_LEC);
  672. /* Enable Error Interrupt */
  673. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_ERR);
  674. /* Enable Transmit mailbox empty Interrupt */
  675. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_TME);
  676. /* Request transmission */
  677. hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
  678. }
  679. }
  680. else
  681. {
  682. return HAL_BUSY;
  683. }
  684. return HAL_OK;
  685. }
  686. /**
  687. * @brief Receives a correct CAN frame.
  688. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  689. * the configuration information for the specified CAN.
  690. * @param FIFONumber: FIFO Number value
  691. * @param Timeout: Specify Timeout value
  692. * @retval HAL status
  693. */
  694. HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef* hcan, uint8_t FIFONumber, uint32_t Timeout)
  695. {
  696. uint32_t tickstart = 0;
  697. /* Check the parameters */
  698. assert_param(IS_CAN_FIFO(FIFONumber));
  699. /* Process locked */
  700. __HAL_LOCK(hcan);
  701. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  702. {
  703. /* Change CAN state */
  704. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  705. }
  706. else
  707. {
  708. /* Change CAN state */
  709. hcan->State = HAL_CAN_STATE_BUSY_RX;
  710. }
  711. /* Get tick */
  712. tickstart = HAL_GetTick();
  713. /* Check pending message */
  714. while(__HAL_CAN_MSG_PENDING(hcan, FIFONumber) == 0)
  715. {
  716. /* Check for the Timeout */
  717. if(Timeout != HAL_MAX_DELAY)
  718. {
  719. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  720. {
  721. hcan->State = HAL_CAN_STATE_TIMEOUT;
  722. /* Process unlocked */
  723. __HAL_UNLOCK(hcan);
  724. return HAL_TIMEOUT;
  725. }
  726. }
  727. }
  728. /* Get the Id */
  729. hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  730. if (hcan->pRxMsg->IDE == CAN_ID_STD)
  731. {
  732. hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21);
  733. }
  734. else
  735. {
  736. hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3);
  737. }
  738. hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  739. /* Get the DLC */
  740. hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
  741. /* Get the FMI */
  742. hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8);
  743. /* Get the data field */
  744. hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
  745. hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8);
  746. hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16);
  747. hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24);
  748. hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
  749. hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8);
  750. hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16);
  751. hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24);
  752. /* Release the FIFO */
  753. if(FIFONumber == CAN_FIFO0)
  754. {
  755. /* Release FIFO0 */
  756. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
  757. }
  758. else /* FIFONumber == CAN_FIFO1 */
  759. {
  760. /* Release FIFO1 */
  761. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
  762. }
  763. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  764. {
  765. /* Change CAN state */
  766. hcan->State = HAL_CAN_STATE_BUSY_TX;
  767. /* Process unlocked */
  768. __HAL_UNLOCK(hcan);
  769. }
  770. else
  771. {
  772. /* Change CAN state */
  773. hcan->State = HAL_CAN_STATE_READY;
  774. /* Process unlocked */
  775. __HAL_UNLOCK(hcan);
  776. }
  777. /* Return function status */
  778. return HAL_OK;
  779. }
  780. /**
  781. * @brief Receives a correct CAN frame.
  782. * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
  783. * the configuration information for the specified CAN.
  784. * @param FIFONumber: Specify the FIFO number
  785. * @retval HAL status
  786. */
  787. HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
  788. {
  789. uint32_t tmp = 0;
  790. /* Check the parameters */
  791. assert_param(IS_CAN_FIFO(FIFONumber));
  792. tmp = hcan->State;
  793. if((tmp == HAL_CAN_STATE_READY) || (tmp == HAL_CAN_STATE_BUSY_TX))
  794. {
  795. /* Process locked */
  796. __HAL_LOCK(hcan);
  797. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  798. {
  799. /* Change CAN state */
  800. hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
  801. }
  802. else
  803. {
  804. /* Change CAN state */
  805. hcan->State = HAL_CAN_STATE_BUSY_RX;
  806. }
  807. /* Set CAN error code to none */
  808. hcan->ErrorCode = HAL_CAN_ERROR_NONE;
  809. /* Enable Error warning Interrupt */
  810. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG);
  811. /* Enable Error passive Interrupt */
  812. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EPV);
  813. /* Enable Bus-off Interrupt */
  814. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_BOF);
  815. /* Enable Last error code Interrupt */
  816. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_LEC);
  817. /* Enable Error Interrupt */
  818. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_ERR);
  819. /* Process unlocked */
  820. __HAL_UNLOCK(hcan);
  821. if(FIFONumber == CAN_FIFO0)
  822. {
  823. /* Enable FIFO 0 message pending Interrupt */
  824. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP0);
  825. }
  826. else
  827. {
  828. /* Enable FIFO 1 message pending Interrupt */
  829. __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP1);
  830. }
  831. }
  832. else
  833. {
  834. return HAL_BUSY;
  835. }
  836. /* Return function status */
  837. return HAL_OK;
  838. }
  839. /**
  840. * @brief Enters the Sleep (low power) mode.
  841. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  842. * the configuration information for the specified CAN.
  843. * @retval HAL status.
  844. */
  845. HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef* hcan)
  846. {
  847. uint32_t tickstart = 0;
  848. /* Process locked */
  849. __HAL_LOCK(hcan);
  850. /* Change CAN state */
  851. hcan->State = HAL_CAN_STATE_BUSY;
  852. /* Request Sleep mode */
  853. hcan->Instance->MCR = (((hcan->Instance->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
  854. /* Sleep mode status */
  855. if ((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
  856. {
  857. /* Process unlocked */
  858. __HAL_UNLOCK(hcan);
  859. /* Return function status */
  860. return HAL_ERROR;
  861. }
  862. /* Get tick */
  863. tickstart = HAL_GetTick();
  864. /* Wait the acknowledge */
  865. while((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
  866. {
  867. if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
  868. {
  869. hcan->State = HAL_CAN_STATE_TIMEOUT;
  870. /* Process unlocked */
  871. __HAL_UNLOCK(hcan);
  872. return HAL_TIMEOUT;
  873. }
  874. }
  875. /* Change CAN state */
  876. hcan->State = HAL_CAN_STATE_READY;
  877. /* Process unlocked */
  878. __HAL_UNLOCK(hcan);
  879. /* Return function status */
  880. return HAL_OK;
  881. }
  882. /**
  883. * @brief Wakes up the CAN peripheral from sleep mode, after that the CAN peripheral
  884. * is in the normal mode.
  885. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  886. * the configuration information for the specified CAN.
  887. * @retval HAL status.
  888. */
  889. HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef* hcan)
  890. {
  891. uint32_t tickstart = 0;
  892. /* Process locked */
  893. __HAL_LOCK(hcan);
  894. /* Change CAN state */
  895. hcan->State = HAL_CAN_STATE_BUSY;
  896. /* Wake up request */
  897. hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
  898. /* Get tick */
  899. tickstart = HAL_GetTick();
  900. /* Sleep mode status */
  901. while((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
  902. {
  903. if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
  904. {
  905. hcan->State= HAL_CAN_STATE_TIMEOUT;
  906. /* Process unlocked */
  907. __HAL_UNLOCK(hcan);
  908. return HAL_TIMEOUT;
  909. }
  910. }
  911. if((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
  912. {
  913. /* Process unlocked */
  914. __HAL_UNLOCK(hcan);
  915. /* Return function status */
  916. return HAL_ERROR;
  917. }
  918. /* Change CAN state */
  919. hcan->State = HAL_CAN_STATE_READY;
  920. /* Process unlocked */
  921. __HAL_UNLOCK(hcan);
  922. /* Return function status */
  923. return HAL_OK;
  924. }
  925. /**
  926. * @brief Handles CAN interrupt request
  927. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  928. * the configuration information for the specified CAN.
  929. * @retval None
  930. */
  931. void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan)
  932. {
  933. uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
  934. /* Check End of transmission flag */
  935. if(__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_TME))
  936. {
  937. tmp1 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0);
  938. tmp2 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1);
  939. tmp3 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2);
  940. if(tmp1 || tmp2 || tmp3)
  941. {
  942. /* Call transmit function */
  943. CAN_Transmit_IT(hcan);
  944. }
  945. }
  946. tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0);
  947. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0);
  948. /* Check End of reception flag for FIFO0 */
  949. if((tmp1 != 0) && tmp2)
  950. {
  951. /* Call receive function */
  952. CAN_Receive_IT(hcan, CAN_FIFO0);
  953. }
  954. tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1);
  955. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1);
  956. /* Check End of reception flag for FIFO1 */
  957. if((tmp1 != 0) && tmp2)
  958. {
  959. /* Call receive function */
  960. CAN_Receive_IT(hcan, CAN_FIFO1);
  961. }
  962. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EWG);
  963. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EWG);
  964. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  965. /* Check Error Warning Flag */
  966. if(tmp1 && tmp2 && tmp3)
  967. {
  968. /* Set CAN error code to EWG error */
  969. hcan->ErrorCode |= HAL_CAN_ERROR_EWG;
  970. }
  971. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EPV);
  972. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EPV);
  973. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  974. /* Check Error Passive Flag */
  975. if(tmp1 && tmp2 && tmp3)
  976. {
  977. /* Set CAN error code to EPV error */
  978. hcan->ErrorCode |= HAL_CAN_ERROR_EPV;
  979. }
  980. tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_BOF);
  981. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_BOF);
  982. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  983. /* Check Bus-Off Flag */
  984. if(tmp1 && tmp2 && tmp3)
  985. {
  986. /* Set CAN error code to BOF error */
  987. hcan->ErrorCode |= HAL_CAN_ERROR_BOF;
  988. }
  989. tmp1 = HAL_IS_BIT_CLR(hcan->Instance->ESR, CAN_ESR_LEC);
  990. tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_LEC);
  991. tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
  992. /* Check Last error code Flag */
  993. if((!tmp1) && tmp2 && tmp3)
  994. {
  995. tmp1 = (hcan->Instance->ESR) & CAN_ESR_LEC;
  996. switch(tmp1)
  997. {
  998. case(CAN_ESR_LEC_0):
  999. /* Set CAN error code to STF error */
  1000. hcan->ErrorCode |= HAL_CAN_ERROR_STF;
  1001. break;
  1002. case(CAN_ESR_LEC_1):
  1003. /* Set CAN error code to FOR error */
  1004. hcan->ErrorCode |= HAL_CAN_ERROR_FOR;
  1005. break;
  1006. case(CAN_ESR_LEC_1 | CAN_ESR_LEC_0):
  1007. /* Set CAN error code to ACK error */
  1008. hcan->ErrorCode |= HAL_CAN_ERROR_ACK;
  1009. break;
  1010. case(CAN_ESR_LEC_2):
  1011. /* Set CAN error code to BR error */
  1012. hcan->ErrorCode |= HAL_CAN_ERROR_BR;
  1013. break;
  1014. case(CAN_ESR_LEC_2 | CAN_ESR_LEC_0):
  1015. /* Set CAN error code to BD error */
  1016. hcan->ErrorCode |= HAL_CAN_ERROR_BD;
  1017. break;
  1018. case(CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
  1019. /* Set CAN error code to CRC error */
  1020. hcan->ErrorCode |= HAL_CAN_ERROR_CRC;
  1021. break;
  1022. default:
  1023. break;
  1024. }
  1025. /* Clear Last error code Flag */
  1026. hcan->Instance->ESR &= ~(CAN_ESR_LEC);
  1027. }
  1028. /* Call the Error call Back in case of Errors */
  1029. if(hcan->ErrorCode != HAL_CAN_ERROR_NONE)
  1030. {
  1031. /* Clear ERRI Flag */
  1032. hcan->Instance->MSR = CAN_MSR_ERRI;
  1033. /* Set the CAN state ready to be able to start again the process */
  1034. hcan->State = HAL_CAN_STATE_READY;
  1035. /* Call Error callback function */
  1036. HAL_CAN_ErrorCallback(hcan);
  1037. }
  1038. }
  1039. /**
  1040. * @brief Transmission complete callback in non blocking mode
  1041. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1042. * the configuration information for the specified CAN.
  1043. * @retval None
  1044. */
  1045. __weak void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan)
  1046. {
  1047. /* Prevent unused argument(s) compilation warning */
  1048. UNUSED(hcan);
  1049. /* NOTE : This function Should not be modified, when the callback is needed,
  1050. the HAL_CAN_TxCpltCallback could be implemented in the user file
  1051. */
  1052. }
  1053. /**
  1054. * @brief Transmission complete callback in non blocking mode
  1055. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1056. * the configuration information for the specified CAN.
  1057. * @retval None
  1058. */
  1059. __weak void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan)
  1060. {
  1061. /* Prevent unused argument(s) compilation warning */
  1062. UNUSED(hcan);
  1063. /* NOTE : This function Should not be modified, when the callback is needed,
  1064. the HAL_CAN_RxCpltCallback could be implemented in the user file
  1065. */
  1066. }
  1067. /**
  1068. * @brief Error CAN callback.
  1069. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1070. * the configuration information for the specified CAN.
  1071. * @retval None
  1072. */
  1073. __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
  1074. {
  1075. /* Prevent unused argument(s) compilation warning */
  1076. UNUSED(hcan);
  1077. /* NOTE : This function Should not be modified, when the callback is needed,
  1078. the HAL_CAN_ErrorCallback could be implemented in the user file
  1079. */
  1080. }
  1081. /**
  1082. * @}
  1083. */
  1084. /** @defgroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
  1085. * @brief CAN Peripheral State functions
  1086. *
  1087. @verbatim
  1088. ==============================================================================
  1089. ##### Peripheral State and Error functions #####
  1090. ==============================================================================
  1091. [..]
  1092. This subsection provides functions allowing to :
  1093. (+) Check the CAN state.
  1094. (+) Check CAN Errors detected during interrupt process
  1095. @endverbatim
  1096. * @{
  1097. */
  1098. /**
  1099. * @brief return the CAN state
  1100. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1101. * the configuration information for the specified CAN.
  1102. * @retval HAL state
  1103. */
  1104. HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan)
  1105. {
  1106. /* Return CAN state */
  1107. return hcan->State;
  1108. }
  1109. /**
  1110. * @brief Return the CAN error code
  1111. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1112. * the configuration information for the specified CAN.
  1113. * @retval CAN Error Code
  1114. */
  1115. uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan)
  1116. {
  1117. return hcan->ErrorCode;
  1118. }
  1119. /**
  1120. * @}
  1121. */
  1122. /**
  1123. * @brief Initiates and transmits a CAN frame message.
  1124. * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
  1125. * the configuration information for the specified CAN.
  1126. * @retval HAL status
  1127. */
  1128. static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
  1129. {
  1130. /* Disable Transmit mailbox empty Interrupt */
  1131. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_TME);
  1132. if(hcan->State == HAL_CAN_STATE_BUSY_TX)
  1133. {
  1134. /* Disable Error warning Interrupt */
  1135. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG);
  1136. /* Disable Error passive Interrupt */
  1137. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EPV);
  1138. /* Disable Bus-off Interrupt */
  1139. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_BOF);
  1140. /* Disable Last error code Interrupt */
  1141. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_LEC);
  1142. /* Disable Error Interrupt */
  1143. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_ERR);
  1144. }
  1145. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  1146. {
  1147. /* Change CAN state */
  1148. hcan->State = HAL_CAN_STATE_BUSY_RX;
  1149. }
  1150. else
  1151. {
  1152. /* Change CAN state */
  1153. hcan->State = HAL_CAN_STATE_READY;
  1154. }
  1155. /* Transmission complete callback */
  1156. HAL_CAN_TxCpltCallback(hcan);
  1157. return HAL_OK;
  1158. }
  1159. /**
  1160. * @brief Receives a correct CAN frame.
  1161. * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
  1162. * the configuration information for the specified CAN.
  1163. * @param FIFONumber: Specify the FIFO number
  1164. * @retval HAL status
  1165. * @retval None
  1166. */
  1167. static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
  1168. {
  1169. /* Get the Id */
  1170. hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  1171. if (hcan->pRxMsg->IDE == CAN_ID_STD)
  1172. {
  1173. hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21);
  1174. }
  1175. else
  1176. {
  1177. hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3);
  1178. }
  1179. hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
  1180. /* Get the DLC */
  1181. hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
  1182. /* Get the FMI */
  1183. hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8);
  1184. /* Get the data field */
  1185. hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
  1186. hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8);
  1187. hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16);
  1188. hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24);
  1189. hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
  1190. hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8);
  1191. hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16);
  1192. hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24);
  1193. /* Release the FIFO */
  1194. /* Release FIFO0 */
  1195. if (FIFONumber == CAN_FIFO0)
  1196. {
  1197. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
  1198. /* Disable FIFO 0 message pending Interrupt */
  1199. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP0);
  1200. }
  1201. /* Release FIFO1 */
  1202. else /* FIFONumber == CAN_FIFO1 */
  1203. {
  1204. __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
  1205. /* Disable FIFO 1 message pending Interrupt */
  1206. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP1);
  1207. }
  1208. if(hcan->State == HAL_CAN_STATE_BUSY_RX)
  1209. {
  1210. /* Disable Error warning Interrupt */
  1211. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG);
  1212. /* Disable Error passive Interrupt */
  1213. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EPV);
  1214. /* Disable Bus-off Interrupt */
  1215. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_BOF);
  1216. /* Disable Last error code Interrupt */
  1217. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_LEC);
  1218. /* Disable Error Interrupt */
  1219. __HAL_CAN_DISABLE_IT(hcan, CAN_IT_ERR);
  1220. }
  1221. if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
  1222. {
  1223. /* Disable CAN state */
  1224. hcan->State = HAL_CAN_STATE_BUSY_TX;
  1225. }
  1226. else
  1227. {
  1228. /* Change CAN state */
  1229. hcan->State = HAL_CAN_STATE_READY;
  1230. }
  1231. /* Receive complete callback */
  1232. HAL_CAN_RxCpltCallback(hcan);
  1233. /* Return function status */
  1234. return HAL_OK;
  1235. }
  1236. /**
  1237. * @}
  1238. */
  1239. #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
  1240. STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
  1241. #endif /* HAL_CAN_MODULE_ENABLED */
  1242. /**
  1243. * @}
  1244. */
  1245. /**
  1246. * @}
  1247. */
  1248. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/