stm32f4xx_hal_dma2d.c 41 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_dma2d.c
  4. * @author MCD Application Team
  5. * @version V1.4.3
  6. * @date 11-December-2015
  7. * @brief DMA2D HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the DMA2D peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral Control functions
  13. * + Peripheral State and Errors functions
  14. *
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. (#) Program the required configuration through following parameters:
  21. the Transfer Mode, the output color mode and the output offset using
  22. HAL_DMA2D_Init() function.
  23. (#) Program the required configuration through following parameters:
  24. the input color mode, the input color, input alpha value, alpha mode
  25. and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
  26. or/and background layer.
  27. *** Polling mode IO operation ***
  28. =================================
  29. [..]
  30. (+) Configure the pdata, Destination and data length and Enable
  31. the transfer using HAL_DMA2D_Start()
  32. (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
  33. user can specify the value of timeout according to his end application.
  34. *** Interrupt mode IO operation ***
  35. ===================================
  36. [..]
  37. (#) Configure the pdata, Destination and data length and Enable
  38. the transfer using HAL_DMA2D_Start_IT()
  39. (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
  40. (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
  41. add his own function by customization of function pointer XferCpltCallback and
  42. XferErrorCallback (i.e a member of DMA2D handle structure).
  43. -@- In Register-to-Memory transfer mode, the pdata parameter is the register
  44. color, in Memory-to-memory or memory-to-memory with pixel format
  45. conversion the pdata is the source address.
  46. -@- Configure the foreground source address, the background source address,
  47. the Destination and data length and Enable the transfer using
  48. HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
  49. in interrupt mode.
  50. -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
  51. are used if the memory to memory with blending transfer mode is selected.
  52. (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
  53. HAL_DMA2D_EnableCLUT() functions.
  54. (#) Optionally, configure and enable LineInterrupt using the following function:
  55. HAL_DMA2D_ProgramLineEvent().
  56. (#) The transfer can be suspended, continued and aborted using the following
  57. functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
  58. (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
  59. *** DMA2D HAL driver macros list ***
  60. =============================================
  61. [..]
  62. Below the list of most used macros in DMA2D HAL driver :
  63. (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
  64. (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
  65. (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
  66. (+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
  67. (+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
  68. (+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
  69. (+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
  70. [..]
  71. (@) You can refer to the DMA2D HAL driver header file for more useful macros
  72. @endverbatim
  73. ******************************************************************************
  74. * @attention
  75. *
  76. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  77. *
  78. * Redistribution and use in source and binary forms, with or without modification,
  79. * are permitted provided that the following conditions are met:
  80. * 1. Redistributions of source code must retain the above copyright notice,
  81. * this list of conditions and the following disclaimer.
  82. * 2. Redistributions in binary form must reproduce the above copyright notice,
  83. * this list of conditions and the following disclaimer in the documentation
  84. * and/or other materials provided with the distribution.
  85. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  86. * may be used to endorse or promote products derived from this software
  87. * without specific prior written permission.
  88. *
  89. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  90. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  91. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  92. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  93. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  94. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  95. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  96. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  97. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  98. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  99. *
  100. ******************************************************************************
  101. */
  102. /* Includes ------------------------------------------------------------------*/
  103. #include "stm32f4xx_hal.h"
  104. /** @addtogroup STM32F4xx_HAL_Driver
  105. * @{
  106. */
  107. /** @addtogroup DMA2D
  108. * @brief DMA2D HAL module driver
  109. * @{
  110. */
  111. #ifdef HAL_DMA2D_MODULE_ENABLED
  112. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  113. /* Private types -------------------------------------------------------------*/
  114. /* Private define ------------------------------------------------------------*/
  115. /** @addtogroup DMA2D_Private_Defines
  116. * @{
  117. */
  118. #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
  119. #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
  120. /**
  121. * @}
  122. */
  123. /* Private variables ---------------------------------------------------------*/
  124. /* Private constants ---------------------------------------------------------*/
  125. /* Private macro -------------------------------------------------------------*/
  126. /* Private function prototypes -----------------------------------------------*/
  127. /** @addtogroup DMA2D_Private_Functions_Prototypes
  128. * @{
  129. */
  130. static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  131. /**
  132. * @}
  133. */
  134. /* Private functions ---------------------------------------------------------*/
  135. /* Exported functions --------------------------------------------------------*/
  136. /** @addtogroup DMA2D_Exported_Functions
  137. * @{
  138. */
  139. /** @defgroup DMA2D_Group1 Initialization and Configuration functions
  140. * @brief Initialization and Configuration functions
  141. *
  142. @verbatim
  143. ===============================================================================
  144. ##### Initialization and Configuration functions #####
  145. ===============================================================================
  146. [..] This section provides functions allowing to:
  147. (+) Initialize and configure the DMA2D
  148. (+) De-initialize the DMA2D
  149. @endverbatim
  150. * @{
  151. */
  152. /**
  153. * @brief Initializes the DMA2D according to the specified
  154. * parameters in the DMA2D_InitTypeDef and create the associated handle.
  155. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  156. * the configuration information for the DMA2D.
  157. * @retval HAL status
  158. */
  159. HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
  160. {
  161. uint32_t tmp = 0;
  162. /* Check the DMA2D peripheral state */
  163. if(hdma2d == NULL)
  164. {
  165. return HAL_ERROR;
  166. }
  167. /* Check the parameters */
  168. assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
  169. assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
  170. assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
  171. assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
  172. if(hdma2d->State == HAL_DMA2D_STATE_RESET)
  173. {
  174. /* Allocate lock resource and initialize it */
  175. hdma2d->Lock = HAL_UNLOCKED;
  176. /* Init the low level hardware */
  177. HAL_DMA2D_MspInit(hdma2d);
  178. }
  179. /* Change DMA2D peripheral state */
  180. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  181. /* DMA2D CR register configuration -------------------------------------------*/
  182. /* Get the CR register value */
  183. tmp = hdma2d->Instance->CR;
  184. /* Clear Mode bits */
  185. tmp &= (uint32_t)~DMA2D_CR_MODE;
  186. /* Prepare the value to be wrote to the CR register */
  187. tmp |= hdma2d->Init.Mode;
  188. /* Write to DMA2D CR register */
  189. hdma2d->Instance->CR = tmp;
  190. /* DMA2D OPFCCR register configuration ---------------------------------------*/
  191. /* Get the OPFCCR register value */
  192. tmp = hdma2d->Instance->OPFCCR;
  193. /* Clear Color Mode bits */
  194. tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
  195. /* Prepare the value to be wrote to the OPFCCR register */
  196. tmp |= hdma2d->Init.ColorMode;
  197. /* Write to DMA2D OPFCCR register */
  198. hdma2d->Instance->OPFCCR = tmp;
  199. /* DMA2D OOR register configuration ------------------------------------------*/
  200. /* Get the OOR register value */
  201. tmp = hdma2d->Instance->OOR;
  202. /* Clear Offset bits */
  203. tmp &= (uint32_t)~DMA2D_OOR_LO;
  204. /* Prepare the value to be wrote to the OOR register */
  205. tmp |= hdma2d->Init.OutputOffset;
  206. /* Write to DMA2D OOR register */
  207. hdma2d->Instance->OOR = tmp;
  208. /* Update error code */
  209. hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
  210. /* Initialize the DMA2D state*/
  211. hdma2d->State = HAL_DMA2D_STATE_READY;
  212. return HAL_OK;
  213. }
  214. /**
  215. * @brief Deinitializes the DMA2D peripheral registers to their default reset
  216. * values.
  217. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  218. * the configuration information for the DMA2D.
  219. * @retval None
  220. */
  221. HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
  222. {
  223. /* Check the DMA2D peripheral state */
  224. if(hdma2d == NULL)
  225. {
  226. return HAL_ERROR;
  227. }
  228. /* DeInit the low level hardware */
  229. HAL_DMA2D_MspDeInit(hdma2d);
  230. /* Update error code */
  231. hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
  232. /* Initialize the DMA2D state*/
  233. hdma2d->State = HAL_DMA2D_STATE_RESET;
  234. /* Release Lock */
  235. __HAL_UNLOCK(hdma2d);
  236. return HAL_OK;
  237. }
  238. /**
  239. * @brief Initializes the DMA2D MSP.
  240. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  241. * the configuration information for the DMA2D.
  242. * @retval None
  243. */
  244. __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
  245. {
  246. /* Prevent unused argument(s) compilation warning */
  247. UNUSED(hdma2d);
  248. /* NOTE : This function Should not be modified, when the callback is needed,
  249. the HAL_DMA2D_MspInit could be implemented in the user file
  250. */
  251. }
  252. /**
  253. * @brief DeInitializes the DMA2D MSP.
  254. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  255. * the configuration information for the DMA2D.
  256. * @retval None
  257. */
  258. __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
  259. {
  260. /* Prevent unused argument(s) compilation warning */
  261. UNUSED(hdma2d);
  262. /* NOTE : This function Should not be modified, when the callback is needed,
  263. the HAL_DMA2D_MspDeInit could be implemented in the user file
  264. */
  265. }
  266. /**
  267. * @}
  268. */
  269. /** @defgroup DMA2D_Group2 IO operation functions
  270. * @brief IO operation functions
  271. *
  272. @verbatim
  273. ===============================================================================
  274. ##### IO operation functions #####
  275. ===============================================================================
  276. [..] This section provides functions allowing to:
  277. (+) Configure the pdata, destination address and data size and
  278. Start DMA2D transfer.
  279. (+) Configure the source for foreground and background, destination address
  280. and data size and Start MultiBuffer DMA2D transfer.
  281. (+) Configure the pdata, destination address and data size and
  282. Start DMA2D transfer with interrupt.
  283. (+) Configure the source for foreground and background, destination address
  284. and data size and Start MultiBuffer DMA2D transfer with interrupt.
  285. (+) Abort DMA2D transfer.
  286. (+) Suspend DMA2D transfer.
  287. (+) Continue DMA2D transfer.
  288. (+) Poll for transfer complete.
  289. (+) handle DMA2D interrupt request.
  290. @endverbatim
  291. * @{
  292. */
  293. /**
  294. * @brief Start the DMA2D Transfer.
  295. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  296. * the configuration information for the DMA2D.
  297. * @param pdata: Configure the source memory Buffer address if
  298. * the memory to memory or memory to memory with pixel format
  299. * conversion DMA2D mode is selected, and configure
  300. * the color value if register to memory DMA2D mode is selected.
  301. * @param DstAddress: The destination memory Buffer address.
  302. * @param Width: The width of data to be transferred from source to destination.
  303. * @param Height: The height of data to be transferred from source to destination.
  304. * @retval HAL status
  305. */
  306. HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  307. {
  308. /* Process locked */
  309. __HAL_LOCK(hdma2d);
  310. /* Change DMA2D peripheral state */
  311. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  312. /* Check the parameters */
  313. assert_param(IS_DMA2D_LINE(Height));
  314. assert_param(IS_DMA2D_PIXEL(Width));
  315. /* Disable the Peripheral */
  316. __HAL_DMA2D_DISABLE(hdma2d);
  317. /* Configure the source, destination address and the data size */
  318. DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
  319. /* Enable the Peripheral */
  320. __HAL_DMA2D_ENABLE(hdma2d);
  321. return HAL_OK;
  322. }
  323. /**
  324. * @brief Start the DMA2D Transfer with interrupt enabled.
  325. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  326. * the configuration information for the DMA2D.
  327. * @param pdata: Configure the source memory Buffer address if
  328. * the memory to memory or memory to memory with pixel format
  329. * conversion DMA2D mode is selected, and configure
  330. * the color value if register to memory DMA2D mode is selected.
  331. * @param DstAddress: The destination memory Buffer address.
  332. * @param Width: The width of data to be transferred from source to destination.
  333. * @param Height: The height of data to be transferred from source to destination.
  334. * @retval HAL status
  335. */
  336. HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  337. {
  338. /* Process locked */
  339. __HAL_LOCK(hdma2d);
  340. /* Change DMA2D peripheral state */
  341. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  342. /* Check the parameters */
  343. assert_param(IS_DMA2D_LINE(Height));
  344. assert_param(IS_DMA2D_PIXEL(Width));
  345. /* Disable the Peripheral */
  346. __HAL_DMA2D_DISABLE(hdma2d);
  347. /* Configure the source, destination address and the data size */
  348. DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
  349. /* Enable the transfer complete interrupt */
  350. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
  351. /* Enable the transfer Error interrupt */
  352. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
  353. /* Enable the Peripheral */
  354. __HAL_DMA2D_ENABLE(hdma2d);
  355. /* Enable the configuration error interrupt */
  356. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
  357. return HAL_OK;
  358. }
  359. /**
  360. * @brief Start the multi-source DMA2D Transfer.
  361. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  362. * the configuration information for the DMA2D.
  363. * @param SrcAddress1: The source memory Buffer address of the foreground layer.
  364. * @param SrcAddress2: The source memory Buffer address of the background layer.
  365. * @param DstAddress: The destination memory Buffer address
  366. * @param Width: The width of data to be transferred from source to destination.
  367. * @param Height: The height of data to be transferred from source to destination.
  368. * @retval HAL status
  369. */
  370. HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  371. {
  372. /* Process locked */
  373. __HAL_LOCK(hdma2d);
  374. /* Change DMA2D peripheral state */
  375. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  376. /* Check the parameters */
  377. assert_param(IS_DMA2D_LINE(Height));
  378. assert_param(IS_DMA2D_PIXEL(Width));
  379. /* Disable the Peripheral */
  380. __HAL_DMA2D_DISABLE(hdma2d);
  381. /* Configure DMA2D Stream source2 address */
  382. hdma2d->Instance->BGMAR = SrcAddress2;
  383. /* Configure the source, destination address and the data size */
  384. DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
  385. /* Enable the Peripheral */
  386. __HAL_DMA2D_ENABLE(hdma2d);
  387. return HAL_OK;
  388. }
  389. /**
  390. * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
  391. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  392. * the configuration information for the DMA2D.
  393. * @param SrcAddress1: The source memory Buffer address of the foreground layer.
  394. * @param SrcAddress2: The source memory Buffer address of the background layer.
  395. * @param DstAddress: The destination memory Buffer address.
  396. * @param Width: The width of data to be transferred from source to destination.
  397. * @param Height: The height of data to be transferred from source to destination.
  398. * @retval HAL status
  399. */
  400. HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  401. {
  402. /* Process locked */
  403. __HAL_LOCK(hdma2d);
  404. /* Change DMA2D peripheral state */
  405. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  406. /* Check the parameters */
  407. assert_param(IS_DMA2D_LINE(Height));
  408. assert_param(IS_DMA2D_PIXEL(Width));
  409. /* Disable the Peripheral */
  410. __HAL_DMA2D_DISABLE(hdma2d);
  411. /* Configure DMA2D Stream source2 address */
  412. hdma2d->Instance->BGMAR = SrcAddress2;
  413. /* Configure the source, destination address and the data size */
  414. DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
  415. /* Enable the configuration error interrupt */
  416. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
  417. /* Enable the transfer complete interrupt */
  418. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
  419. /* Enable the transfer Error interrupt */
  420. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
  421. /* Enable the Peripheral */
  422. __HAL_DMA2D_ENABLE(hdma2d);
  423. return HAL_OK;
  424. }
  425. /**
  426. * @brief Abort the DMA2D Transfer.
  427. * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
  428. * the configuration information for the DMA2D.
  429. * @retval HAL status
  430. */
  431. HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
  432. {
  433. uint32_t tickstart = 0;
  434. /* Disable the DMA2D */
  435. __HAL_DMA2D_DISABLE(hdma2d);
  436. /* Get tick */
  437. tickstart = HAL_GetTick();
  438. /* Check if the DMA2D is effectively disabled */
  439. while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
  440. {
  441. if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
  442. {
  443. /* Update error code */
  444. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  445. /* Change the DMA2D state */
  446. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  447. /* Process Unlocked */
  448. __HAL_UNLOCK(hdma2d);
  449. return HAL_TIMEOUT;
  450. }
  451. }
  452. /* Process Unlocked */
  453. __HAL_UNLOCK(hdma2d);
  454. /* Change the DMA2D state*/
  455. hdma2d->State = HAL_DMA2D_STATE_READY;
  456. return HAL_OK;
  457. }
  458. /**
  459. * @brief Suspend the DMA2D Transfer.
  460. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  461. * the configuration information for the DMA2D.
  462. * @retval HAL status
  463. */
  464. HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
  465. {
  466. uint32_t tickstart = 0;
  467. /* Suspend the DMA2D transfer */
  468. hdma2d->Instance->CR |= DMA2D_CR_SUSP;
  469. /* Get tick */
  470. tickstart = HAL_GetTick();
  471. /* Check if the DMA2D is effectively suspended */
  472. while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
  473. {
  474. if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
  475. {
  476. /* Update error code */
  477. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  478. /* Change the DMA2D state */
  479. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  480. return HAL_TIMEOUT;
  481. }
  482. }
  483. /* Change the DMA2D state*/
  484. hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
  485. return HAL_OK;
  486. }
  487. /**
  488. * @brief Resume the DMA2D Transfer.
  489. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  490. * the configuration information for the DMA2D.
  491. * @retval HAL status
  492. */
  493. HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
  494. {
  495. /* Resume the DMA2D transfer */
  496. hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
  497. /* Change the DMA2D state*/
  498. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  499. return HAL_OK;
  500. }
  501. /**
  502. * @brief Polling for transfer complete or CLUT loading.
  503. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  504. * the configuration information for the DMA2D.
  505. * @param Timeout: Timeout duration
  506. * @retval HAL status
  507. */
  508. HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
  509. {
  510. uint32_t tmp, tmp1;
  511. uint32_t tickstart = 0;
  512. /* Polling for DMA2D transfer */
  513. if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
  514. {
  515. /* Get tick */
  516. tickstart = HAL_GetTick();
  517. while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
  518. {
  519. tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
  520. tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
  521. if((tmp != RESET) || (tmp1 != RESET))
  522. {
  523. /* Clear the transfer and configuration error flags */
  524. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
  525. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
  526. /* Change DMA2D state */
  527. hdma2d->State= HAL_DMA2D_STATE_ERROR;
  528. /* Process unlocked */
  529. __HAL_UNLOCK(hdma2d);
  530. return HAL_ERROR;
  531. }
  532. /* Check for the Timeout */
  533. if(Timeout != HAL_MAX_DELAY)
  534. {
  535. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  536. {
  537. /* Process unlocked */
  538. __HAL_UNLOCK(hdma2d);
  539. /* Update error code */
  540. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  541. /* Change the DMA2D state */
  542. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  543. return HAL_TIMEOUT;
  544. }
  545. }
  546. }
  547. }
  548. /* Polling for CLUT loading */
  549. if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
  550. {
  551. /* Get tick */
  552. tickstart = HAL_GetTick();
  553. while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
  554. {
  555. if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
  556. {
  557. /* Clear the transfer and configuration error flags */
  558. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
  559. /* Change DMA2D state */
  560. hdma2d->State= HAL_DMA2D_STATE_ERROR;
  561. return HAL_ERROR;
  562. }
  563. /* Check for the Timeout */
  564. if(Timeout != HAL_MAX_DELAY)
  565. {
  566. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  567. {
  568. /* Update error code */
  569. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  570. /* Change the DMA2D state */
  571. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  572. return HAL_TIMEOUT;
  573. }
  574. }
  575. }
  576. }
  577. /* Clear the transfer complete flag */
  578. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
  579. /* Clear the CLUT loading flag */
  580. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
  581. /* Change DMA2D state */
  582. hdma2d->State = HAL_DMA2D_STATE_READY;
  583. /* Process unlocked */
  584. __HAL_UNLOCK(hdma2d);
  585. return HAL_OK;
  586. }
  587. /**
  588. * @brief Handles DMA2D interrupt request.
  589. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  590. * the configuration information for the DMA2D.
  591. * @retval HAL status
  592. */
  593. void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
  594. {
  595. /* Transfer Error Interrupt management ***************************************/
  596. if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
  597. {
  598. if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
  599. {
  600. /* Disable the transfer Error interrupt */
  601. __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
  602. /* Update error code */
  603. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
  604. /* Clear the transfer error flag */
  605. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
  606. /* Change DMA2D state */
  607. hdma2d->State = HAL_DMA2D_STATE_ERROR;
  608. /* Process Unlocked */
  609. __HAL_UNLOCK(hdma2d);
  610. if(hdma2d->XferErrorCallback != NULL)
  611. {
  612. /* Transfer error Callback */
  613. hdma2d->XferErrorCallback(hdma2d);
  614. }
  615. }
  616. }
  617. /* Configuration Error Interrupt management **********************************/
  618. if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
  619. {
  620. if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
  621. {
  622. /* Disable the Configuration Error interrupt */
  623. __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
  624. /* Clear the Configuration error flag */
  625. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
  626. /* Update error code */
  627. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
  628. /* Change DMA2D state */
  629. hdma2d->State = HAL_DMA2D_STATE_ERROR;
  630. /* Process Unlocked */
  631. __HAL_UNLOCK(hdma2d);
  632. if(hdma2d->XferErrorCallback != NULL)
  633. {
  634. /* Transfer error Callback */
  635. hdma2d->XferErrorCallback(hdma2d);
  636. }
  637. }
  638. }
  639. /* Transfer Complete Interrupt management ************************************/
  640. if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
  641. {
  642. if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
  643. {
  644. /* Disable the transfer complete interrupt */
  645. __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
  646. /* Clear the transfer complete flag */
  647. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
  648. /* Update error code */
  649. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
  650. /* Change DMA2D state */
  651. hdma2d->State = HAL_DMA2D_STATE_READY;
  652. /* Process Unlocked */
  653. __HAL_UNLOCK(hdma2d);
  654. if(hdma2d->XferCpltCallback != NULL)
  655. {
  656. /* Transfer complete Callback */
  657. hdma2d->XferCpltCallback(hdma2d);
  658. }
  659. }
  660. }
  661. }
  662. /**
  663. * @}
  664. */
  665. /** @defgroup DMA2D_Group3 Peripheral Control functions
  666. * @brief Peripheral Control functions
  667. *
  668. @verbatim
  669. ===============================================================================
  670. ##### Peripheral Control functions #####
  671. ===============================================================================
  672. [..] This section provides functions allowing to:
  673. (+) Configure the DMA2D foreground or/and background parameters.
  674. (+) Configure the DMA2D CLUT transfer.
  675. (+) Enable DMA2D CLUT.
  676. (+) Disable DMA2D CLUT.
  677. (+) Configure the line watermark
  678. @endverbatim
  679. * @{
  680. */
  681. /**
  682. * @brief Configure the DMA2D Layer according to the specified
  683. * parameters in the DMA2D_InitTypeDef and create the associated handle.
  684. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  685. * the configuration information for the DMA2D.
  686. * @param LayerIdx: DMA2D Layer index.
  687. * This parameter can be one of the following values:
  688. * 0(background) / 1(foreground)
  689. * @retval HAL status
  690. */
  691. HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
  692. {
  693. DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
  694. uint32_t tmp = 0;
  695. /* Process locked */
  696. __HAL_LOCK(hdma2d);
  697. /* Change DMA2D peripheral state */
  698. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  699. /* Check the parameters */
  700. assert_param(IS_DMA2D_LAYER(LayerIdx));
  701. assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
  702. if(hdma2d->Init.Mode != DMA2D_R2M)
  703. {
  704. assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
  705. if(hdma2d->Init.Mode != DMA2D_M2M)
  706. {
  707. assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
  708. }
  709. }
  710. /* Configure the background DMA2D layer */
  711. if(LayerIdx == 0)
  712. {
  713. /* DMA2D BGPFCR register configuration -----------------------------------*/
  714. /* Get the BGPFCCR register value */
  715. tmp = hdma2d->Instance->BGPFCCR;
  716. /* Clear Input color mode, alpha value and alpha mode bits */
  717. tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
  718. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  719. {
  720. /* Prepare the value to be wrote to the BGPFCCR register */
  721. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
  722. }
  723. else
  724. {
  725. /* Prepare the value to be wrote to the BGPFCCR register */
  726. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
  727. }
  728. /* Write to DMA2D BGPFCCR register */
  729. hdma2d->Instance->BGPFCCR = tmp;
  730. /* DMA2D BGOR register configuration -------------------------------------*/
  731. /* Get the BGOR register value */
  732. tmp = hdma2d->Instance->BGOR;
  733. /* Clear colors bits */
  734. tmp &= (uint32_t)~DMA2D_BGOR_LO;
  735. /* Prepare the value to be wrote to the BGOR register */
  736. tmp |= pLayerCfg->InputOffset;
  737. /* Write to DMA2D BGOR register */
  738. hdma2d->Instance->BGOR = tmp;
  739. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  740. {
  741. /* Prepare the value to be wrote to the BGCOLR register */
  742. tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
  743. /* Write to DMA2D BGCOLR register */
  744. hdma2d->Instance->BGCOLR = tmp;
  745. }
  746. }
  747. /* Configure the foreground DMA2D layer */
  748. else
  749. {
  750. /* DMA2D FGPFCR register configuration -----------------------------------*/
  751. /* Get the FGPFCCR register value */
  752. tmp = hdma2d->Instance->FGPFCCR;
  753. /* Clear Input color mode, alpha value and alpha mode bits */
  754. tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
  755. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  756. {
  757. /* Prepare the value to be wrote to the FGPFCCR register */
  758. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
  759. }
  760. else
  761. {
  762. /* Prepare the value to be wrote to the FGPFCCR register */
  763. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
  764. }
  765. /* Write to DMA2D FGPFCCR register */
  766. hdma2d->Instance->FGPFCCR = tmp;
  767. /* DMA2D FGOR register configuration -------------------------------------*/
  768. /* Get the FGOR register value */
  769. tmp = hdma2d->Instance->FGOR;
  770. /* Clear colors bits */
  771. tmp &= (uint32_t)~DMA2D_FGOR_LO;
  772. /* Prepare the value to be wrote to the FGOR register */
  773. tmp |= pLayerCfg->InputOffset;
  774. /* Write to DMA2D FGOR register */
  775. hdma2d->Instance->FGOR = tmp;
  776. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  777. {
  778. /* Prepare the value to be wrote to the FGCOLR register */
  779. tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
  780. /* Write to DMA2D FGCOLR register */
  781. hdma2d->Instance->FGCOLR = tmp;
  782. }
  783. }
  784. /* Initialize the DMA2D state*/
  785. hdma2d->State = HAL_DMA2D_STATE_READY;
  786. /* Process unlocked */
  787. __HAL_UNLOCK(hdma2d);
  788. return HAL_OK;
  789. }
  790. /**
  791. * @brief Configure the DMA2D CLUT Transfer.
  792. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  793. * the configuration information for the DMA2D.
  794. * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
  795. * the configuration information for the color look up table.
  796. * @param LayerIdx: DMA2D Layer index.
  797. * This parameter can be one of the following values:
  798. * 0(background) / 1(foreground)
  799. * @retval HAL status
  800. */
  801. HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
  802. {
  803. uint32_t tmp = 0, tmp1 = 0;
  804. /* Check the parameters */
  805. assert_param(IS_DMA2D_LAYER(LayerIdx));
  806. assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
  807. assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
  808. /* Configure the CLUT of the background DMA2D layer */
  809. if(LayerIdx == 0)
  810. {
  811. /* Get the BGCMAR register value */
  812. tmp = hdma2d->Instance->BGCMAR;
  813. /* Clear CLUT address bits */
  814. tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
  815. /* Prepare the value to be wrote to the BGCMAR register */
  816. tmp |= (uint32_t)CLUTCfg.pCLUT;
  817. /* Write to DMA2D BGCMAR register */
  818. hdma2d->Instance->BGCMAR = tmp;
  819. /* Get the BGPFCCR register value */
  820. tmp = hdma2d->Instance->BGPFCCR;
  821. /* Clear CLUT size and CLUT address bits */
  822. tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
  823. /* Get the CLUT size */
  824. tmp1 = CLUTCfg.Size << 16;
  825. /* Prepare the value to be wrote to the BGPFCCR register */
  826. tmp |= (CLUTCfg.CLUTColorMode | tmp1);
  827. /* Write to DMA2D BGPFCCR register */
  828. hdma2d->Instance->BGPFCCR = tmp;
  829. }
  830. /* Configure the CLUT of the foreground DMA2D layer */
  831. else
  832. {
  833. /* Get the FGCMAR register value */
  834. tmp = hdma2d->Instance->FGCMAR;
  835. /* Clear CLUT address bits */
  836. tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
  837. /* Prepare the value to be wrote to the FGCMAR register */
  838. tmp |= (uint32_t)CLUTCfg.pCLUT;
  839. /* Write to DMA2D FGCMAR register */
  840. hdma2d->Instance->FGCMAR = tmp;
  841. /* Get the FGPFCCR register value */
  842. tmp = hdma2d->Instance->FGPFCCR;
  843. /* Clear CLUT size and CLUT address bits */
  844. tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
  845. /* Get the CLUT size */
  846. tmp1 = CLUTCfg.Size << 8;
  847. /* Prepare the value to be wrote to the FGPFCCR register */
  848. tmp |= (CLUTCfg.CLUTColorMode | tmp1);
  849. /* Write to DMA2D FGPFCCR register */
  850. hdma2d->Instance->FGPFCCR = tmp;
  851. }
  852. return HAL_OK;
  853. }
  854. /**
  855. * @brief Enable the DMA2D CLUT Transfer.
  856. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  857. * the configuration information for the DMA2D.
  858. * @param LayerIdx: DMA2D Layer index.
  859. * This parameter can be one of the following values:
  860. * 0(background) / 1(foreground)
  861. * @retval HAL status
  862. */
  863. HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
  864. {
  865. /* Check the parameters */
  866. assert_param(IS_DMA2D_LAYER(LayerIdx));
  867. if(LayerIdx == 0)
  868. {
  869. /* Enable the CLUT loading for the background */
  870. hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
  871. }
  872. else
  873. {
  874. /* Enable the CLUT loading for the foreground */
  875. hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
  876. }
  877. return HAL_OK;
  878. }
  879. /**
  880. * @brief Disable the DMA2D CLUT Transfer.
  881. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  882. * the configuration information for the DMA2D.
  883. * @param LayerIdx: DMA2D Layer index.
  884. * This parameter can be one of the following values:
  885. * 0(background) / 1(foreground)
  886. * @retval HAL status
  887. */
  888. HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
  889. {
  890. /* Check the parameters */
  891. assert_param(IS_DMA2D_LAYER(LayerIdx));
  892. if(LayerIdx == 0)
  893. {
  894. /* Disable the CLUT loading for the background */
  895. hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
  896. }
  897. else
  898. {
  899. /* Disable the CLUT loading for the foreground */
  900. hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
  901. }
  902. return HAL_OK;
  903. }
  904. /**
  905. * @brief Define the configuration of the line watermark .
  906. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  907. * the configuration information for the DMA2D.
  908. * @param Line: Line Watermark configuration.
  909. * @retval HAL status
  910. */
  911. HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
  912. {
  913. /* Process locked */
  914. __HAL_LOCK(hdma2d);
  915. /* Change DMA2D peripheral state */
  916. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  917. /* Check the parameters */
  918. assert_param(IS_DMA2D_LineWatermark(Line));
  919. /* Sets the Line watermark configuration */
  920. DMA2D->LWR = (uint32_t)Line;
  921. /* Initialize the DMA2D state*/
  922. hdma2d->State = HAL_DMA2D_STATE_READY;
  923. /* Process unlocked */
  924. __HAL_UNLOCK(hdma2d);
  925. return HAL_OK;
  926. }
  927. /**
  928. * @}
  929. */
  930. /** @defgroup DMA2D_Group4 Peripheral State functions
  931. * @brief Peripheral State functions
  932. *
  933. @verbatim
  934. ===============================================================================
  935. ##### Peripheral State and Errors functions #####
  936. ===============================================================================
  937. [..]
  938. This subsection provides functions allowing to :
  939. (+) Check the DMA2D state
  940. (+) Get error code
  941. @endverbatim
  942. * @{
  943. */
  944. /**
  945. * @brief Return the DMA2D state
  946. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  947. * the configuration information for the DMA2D.
  948. * @retval HAL state
  949. */
  950. HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
  951. {
  952. return hdma2d->State;
  953. }
  954. /**
  955. * @brief Return the DMA2D error code
  956. * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
  957. * the configuration information for DMA2D.
  958. * @retval DMA2D Error Code
  959. */
  960. uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
  961. {
  962. return hdma2d->ErrorCode;
  963. }
  964. /**
  965. * @}
  966. */
  967. /**
  968. * @brief Set the DMA2D Transfer parameter.
  969. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  970. * the configuration information for the specified DMA2D.
  971. * @param pdata: The source memory Buffer address
  972. * @param DstAddress: The destination memory Buffer address
  973. * @param Width: The width of data to be transferred from source to destination.
  974. * @param Height: The height of data to be transferred from source to destination.
  975. * @retval HAL status
  976. */
  977. static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  978. {
  979. uint32_t tmp = 0;
  980. uint32_t tmp1 = 0;
  981. uint32_t tmp2 = 0;
  982. uint32_t tmp3 = 0;
  983. uint32_t tmp4 = 0;
  984. tmp = Width << 16;
  985. /* Configure DMA2D data size */
  986. hdma2d->Instance->NLR = (Height | tmp);
  987. /* Configure DMA2D destination address */
  988. hdma2d->Instance->OMAR = DstAddress;
  989. /* Register to memory DMA2D mode selected */
  990. if (hdma2d->Init.Mode == DMA2D_R2M)
  991. {
  992. tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
  993. tmp2 = pdata & DMA2D_OCOLR_RED_1;
  994. tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
  995. tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
  996. /* Prepare the value to be wrote to the OCOLR register according to the color mode */
  997. if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
  998. {
  999. tmp = (tmp3 | tmp2 | tmp1| tmp4);
  1000. }
  1001. else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
  1002. {
  1003. tmp = (tmp3 | tmp2 | tmp4);
  1004. }
  1005. else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
  1006. {
  1007. tmp2 = (tmp2 >> 19);
  1008. tmp3 = (tmp3 >> 10);
  1009. tmp4 = (tmp4 >> 3 );
  1010. tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
  1011. }
  1012. else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
  1013. {
  1014. tmp1 = (tmp1 >> 31);
  1015. tmp2 = (tmp2 >> 19);
  1016. tmp3 = (tmp3 >> 11);
  1017. tmp4 = (tmp4 >> 3 );
  1018. tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
  1019. }
  1020. else /* DMA2D_CMode = DMA2D_ARGB4444 */
  1021. {
  1022. tmp1 = (tmp1 >> 28);
  1023. tmp2 = (tmp2 >> 20);
  1024. tmp3 = (tmp3 >> 12);
  1025. tmp4 = (tmp4 >> 4 );
  1026. tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
  1027. }
  1028. /* Write to DMA2D OCOLR register */
  1029. hdma2d->Instance->OCOLR = tmp;
  1030. }
  1031. else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
  1032. {
  1033. /* Configure DMA2D source address */
  1034. hdma2d->Instance->FGMAR = pdata;
  1035. }
  1036. }
  1037. /**
  1038. * @}
  1039. */
  1040. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  1041. #endif /* HAL_DMA2D_MODULE_ENABLED */
  1042. /**
  1043. * @}
  1044. */
  1045. /**
  1046. * @}
  1047. */
  1048. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/