stm32h7xx_hal_dma2d.h 29 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_dma2d.h
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 21-April-2017
  7. * @brief Header file of DMA2D HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32H7xx_HAL_DMA2D_H
  39. #define __STM32H7xx_HAL_DMA2D_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32h7xx_hal_def.h"
  45. /** @addtogroup STM32H7xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup DMA2D DMA2D
  49. * @brief DMA2D HAL module driver
  50. * @{
  51. */
  52. /* Exported types ------------------------------------------------------------*/
  53. /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
  54. * @{
  55. */
  56. #define MAX_DMA2D_LAYER 2U /*!< DMA2D maximum number of layers */
  57. /**
  58. * @brief DMA2D color Structure definition
  59. */
  60. typedef struct
  61. {
  62. uint32_t Blue; /*!< Configures the blue value.
  63. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
  64. uint32_t Green; /*!< Configures the green value.
  65. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
  66. uint32_t Red; /*!< Configures the red value.
  67. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
  68. } DMA2D_ColorTypeDef;
  69. /**
  70. * @brief DMA2D CLUT Structure definition
  71. */
  72. typedef struct
  73. {
  74. uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
  75. uint32_t CLUTColorMode; /*!< Configures the DMA2D CLUT color mode.
  76. This parameter can be one value of @ref DMA2D_CLUT_CM. */
  77. uint32_t Size; /*!< Configures the DMA2D CLUT size.
  78. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
  79. } DMA2D_CLUTCfgTypeDef;
  80. /**
  81. * @brief DMA2D Init structure definition
  82. */
  83. typedef struct
  84. {
  85. uint32_t Mode; /*!< Configures the DMA2D transfer mode.
  86. This parameter can be one value of @ref DMA2D_Mode. */
  87. uint32_t ColorMode; /*!< Configures the color format of the output image.
  88. This parameter can be one value of @ref DMA2D_Output_Color_Mode. */
  89. uint32_t OutputOffset; /*!< Specifies the Offset value.
  90. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
  91. uint32_t AlphaInverted; /*!< Select regular or inverted alpha value for the output pixel format converter.
  92. This parameter can be one value of @ref DMA2D_Alpha_Inverted */
  93. uint32_t RedBlueSwap; /*!< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR)
  94. for the output pixel format converter.
  95. This parameter can be one value of @ref DMA2D_RB_Swap. */
  96. } DMA2D_InitTypeDef;
  97. /**
  98. * @brief DMA2D Layer structure definition
  99. */
  100. typedef struct
  101. {
  102. uint32_t InputOffset; /*!< Configures the DMA2D foreground or background offset.
  103. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
  104. uint32_t InputColorMode; /*!< Configures the DMA2D foreground or background color mode.
  105. This parameter can be one value of @ref DMA2D_Input_Color_Mode. */
  106. uint32_t AlphaMode; /*!< Configures the DMA2D foreground or background alpha mode.
  107. This parameter can be one value of @ref DMA2D_Alpha_Mode. */
  108. uint32_t InputAlpha; /*!< Specifies the DMA2D foreground or background alpha value and color value in case of A8 or A4 color mode.
  109. This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF except for the color modes detailed below.
  110. @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between
  111. Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF where
  112. - InputAlpha[24:31] is the alpha value ALPHA[0:7]
  113. - InputAlpha[16:23] is the red value RED[0:7]
  114. - InputAlpha[8:15] is the green value GREEN[0:7]
  115. - InputAlpha[0:7] is the blue value BLUE[0:7]. */
  116. uint32_t AlphaInverted; /*!< Select regular or inverted alpha value.
  117. This parameter can be one value of @ref DMA2D_Alpha_Inverted.*/
  118. uint32_t RedBlueSwap; /*!< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR).
  119. This parameter can be one value of @ref DMA2D_RB_Swap. */
  120. uint32_t ChromaSubSampling; /*!< Configure the chroma sub-sampling mode for the YCbCr color mode
  121. This parameter can be one value of @ref DMA2D_Chroma_Sub_Sampling */
  122. } DMA2D_LayerCfgTypeDef;
  123. /**
  124. * @brief HAL DMA2D State structures definition
  125. */
  126. typedef enum
  127. {
  128. HAL_DMA2D_STATE_RESET = 0x00U, /*!< DMA2D not yet initialized or disabled */
  129. HAL_DMA2D_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
  130. HAL_DMA2D_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
  131. HAL_DMA2D_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
  132. HAL_DMA2D_STATE_ERROR = 0x04U, /*!< DMA2D state error */
  133. HAL_DMA2D_STATE_SUSPEND = 0x05U /*!< DMA2D process is suspended */
  134. }HAL_DMA2D_StateTypeDef;
  135. /**
  136. * @brief DMA2D handle Structure definition
  137. */
  138. typedef struct __DMA2D_HandleTypeDef
  139. {
  140. DMA2D_TypeDef *Instance; /*!< DMA2D register base address. */
  141. DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters. */
  142. void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback. */
  143. void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback. */
  144. DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
  145. HAL_LockTypeDef Lock; /*!< DMA2D lock. */
  146. __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state. */
  147. __IO uint32_t ErrorCode; /*!< DMA2D error code. */
  148. } DMA2D_HandleTypeDef;
  149. /**
  150. * @}
  151. */
  152. /* Exported constants --------------------------------------------------------*/
  153. /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
  154. * @{
  155. */
  156. /** @defgroup DMA2D_Error_Code DMA2D Error Code
  157. * @{
  158. */
  159. #define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
  160. #define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001U) /*!< Transfer error */
  161. #define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002U) /*!< Configuration error */
  162. #define HAL_DMA2D_ERROR_CAE ((uint32_t)0x00000004U) /*!< CLUT access error */
  163. #define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */
  164. /**
  165. * @}
  166. */
  167. /** @defgroup DMA2D_Mode DMA2D Mode
  168. * @{
  169. */
  170. #define DMA2D_M2M ((uint32_t)0x00000000U) /*!< DMA2D memory to memory transfer mode */
  171. #define DMA2D_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  172. #define DMA2D_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  173. #define DMA2D_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  174. /**
  175. * @}
  176. */
  177. /** @defgroup DMA2D_Output_Color_Mode DMA2D Output Color Mode
  178. * @{
  179. */
  180. #define DMA2D_OUTPUT_ARGB8888 ((uint32_t)0x00000000U) /*!< ARGB8888 DMA2D color mode */
  181. #define DMA2D_OUTPUT_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 DMA2D color mode */
  182. #define DMA2D_OUTPUT_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 DMA2D color mode */
  183. #define DMA2D_OUTPUT_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 DMA2D color mode */
  184. #define DMA2D_OUTPUT_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 DMA2D color mode */
  185. /**
  186. * @}
  187. */
  188. /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
  189. * @{
  190. */
  191. #define DMA2D_INPUT_ARGB8888 ((uint32_t)0x00000000U) /*!< ARGB8888 color mode */
  192. #define DMA2D_INPUT_RGB888 ((uint32_t)0x00000001U) /*!< RGB888 color mode */
  193. #define DMA2D_INPUT_RGB565 ((uint32_t)0x00000002U) /*!< RGB565 color mode */
  194. #define DMA2D_INPUT_ARGB1555 ((uint32_t)0x00000003U) /*!< ARGB1555 color mode */
  195. #define DMA2D_INPUT_ARGB4444 ((uint32_t)0x00000004U) /*!< ARGB4444 color mode */
  196. #define DMA2D_INPUT_L8 ((uint32_t)0x00000005U) /*!< L8 color mode */
  197. #define DMA2D_INPUT_AL44 ((uint32_t)0x00000006U) /*!< AL44 color mode */
  198. #define DMA2D_INPUT_AL88 ((uint32_t)0x00000007U) /*!< AL88 color mode */
  199. #define DMA2D_INPUT_L4 ((uint32_t)0x00000008U) /*!< L4 color mode */
  200. #define DMA2D_INPUT_A8 ((uint32_t)0x00000009U) /*!< A8 color mode */
  201. #define DMA2D_INPUT_A4 ((uint32_t)0x0000000AU) /*!< A4 color mode */
  202. #define DMA2D_INPUT_YCBCR ((uint32_t)0x0000000BU) /*!< YCbCr color mode */
  203. /**
  204. * @}
  205. */
  206. /** @defgroup DMA2D_Alpha_Mode DMA2D Alpha Mode
  207. * @{
  208. */
  209. #define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000U) /*!< No modification of the alpha channel value */
  210. #define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001U) /*!< Replace original alpha channel value by programmed alpha value */
  211. #define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002U) /*!< Replace original alpha channel value by programmed alpha value
  212. with original alpha channel value */
  213. /**
  214. * @}
  215. */
  216. /** @defgroup DMA2D_Alpha_Inverted DMA2D ALPHA Inversion
  217. * @{
  218. */
  219. #define DMA2D_REGULAR_ALPHA ((uint32_t)0x00000000U) /*!< No modification of the alpha channel value */
  220. #define DMA2D_INVERTED_ALPHA ((uint32_t)0x00000001U) /*!< Invert the alpha channel value */
  221. /**
  222. * @}
  223. */
  224. /** @defgroup DMA2D_RB_Swap DMA2D Red and Blue Swap
  225. * @{
  226. */
  227. #define DMA2D_RB_REGULAR ((uint32_t)0x00000000U) /*!< Select regular mode (RGB or ARGB) */
  228. #define DMA2D_RB_SWAP ((uint32_t)0x00000001U) /*!< Select swap mode (BGR or ABGR) */
  229. /**
  230. * @}
  231. */
  232. /** @defgroup DMA2D_Chroma_Sub_Sampling DMA2D Chroma Sub Sampling
  233. * @{
  234. */
  235. #define DMA2D_NO_CSS ((uint32_t)0x00000000) /*!< No chroma sub-sampling 4:4:4 */
  236. #define DMA2D_CSS_422 ((uint32_t)0x00000001) /*!< chroma sub-sampling 4:2:2 */
  237. #define DMA2D_CSS_420 ((uint32_t)0x00000002) /*!< chroma sub-sampling 4:2:0 */
  238. /**
  239. * @}
  240. */
  241. /** @defgroup DMA2D_CLUT_CM DMA2D CLUT Color Mode
  242. * @{
  243. */
  244. #define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000U) /*!< ARGB8888 DMA2D CLUT color mode */
  245. #define DMA2D_CCM_RGB888 ((uint32_t)0x00000001U) /*!< RGB888 DMA2D CLUT color mode */
  246. /**
  247. * @}
  248. */
  249. /** @defgroup DMA2D_Interrupts DMA2D Interrupts
  250. * @{
  251. */
  252. #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  253. #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  254. #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  255. #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  256. #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  257. #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  258. /**
  259. * @}
  260. */
  261. /** @defgroup DMA2D_Flags DMA2D Flags
  262. * @{
  263. */
  264. #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  265. #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  266. #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  267. #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  268. #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  269. #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  270. /**
  271. * @}
  272. */
  273. /** @defgroup DMA2D_Aliases DMA2D API Aliases
  274. * @{
  275. */
  276. #define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort for compatibility with legacy code */
  277. /**
  278. * @}
  279. */
  280. /**
  281. * @}
  282. */
  283. /* Exported macros ------------------------------------------------------------*/
  284. /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
  285. * @{
  286. */
  287. /** @brief Reset DMA2D handle state
  288. * @param __HANDLE__: specifies the DMA2D handle.
  289. * @retval None
  290. */
  291. #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
  292. /**
  293. * @brief Enable the DMA2D.
  294. * @param __HANDLE__: DMA2D handle
  295. * @retval None.
  296. */
  297. #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
  298. /* Interrupt & Flag management */
  299. /**
  300. * @brief Get the DMA2D pending flags.
  301. * @param __HANDLE__: DMA2D handle
  302. * @param __FLAG__: flag to check.
  303. * This parameter can be any combination of the following values:
  304. * @arg DMA2D_FLAG_CE: Configuration error flag
  305. * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
  306. * @arg DMA2D_FLAG_CAE: CLUT access error flag
  307. * @arg DMA2D_FLAG_TW: Transfer Watermark flag
  308. * @arg DMA2D_FLAG_TC: Transfer complete flag
  309. * @arg DMA2D_FLAG_TE: Transfer error flag
  310. * @retval The state of FLAG.
  311. */
  312. #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
  313. /**
  314. * @brief Clear the DMA2D pending flags.
  315. * @param __HANDLE__: DMA2D handle
  316. * @param __FLAG__: specifies the flag to clear.
  317. * This parameter can be any combination of the following values:
  318. * @arg DMA2D_FLAG_CE: Configuration error flag
  319. * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
  320. * @arg DMA2D_FLAG_CAE: CLUT access error flag
  321. * @arg DMA2D_FLAG_TW: Transfer Watermark flag
  322. * @arg DMA2D_FLAG_TC: Transfer complete flag
  323. * @arg DMA2D_FLAG_TE: Transfer error flag
  324. * @retval None
  325. */
  326. #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
  327. /**
  328. * @brief Enable the specified DMA2D interrupts.
  329. * @param __HANDLE__: DMA2D handle
  330. * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
  331. * This parameter can be any combination of the following values:
  332. * @arg DMA2D_IT_CE: Configuration error interrupt mask
  333. * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
  334. * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
  335. * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
  336. * @arg DMA2D_IT_TC: Transfer complete interrupt mask
  337. * @arg DMA2D_IT_TE: Transfer error interrupt mask
  338. * @retval None
  339. */
  340. #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
  341. /**
  342. * @brief Disable the specified DMA2D interrupts.
  343. * @param __HANDLE__: DMA2D handle
  344. * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
  345. * This parameter can be any combination of the following values:
  346. * @arg DMA2D_IT_CE: Configuration error interrupt mask
  347. * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
  348. * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
  349. * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
  350. * @arg DMA2D_IT_TC: Transfer complete interrupt mask
  351. * @arg DMA2D_IT_TE: Transfer error interrupt mask
  352. * @retval None
  353. */
  354. #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
  355. /**
  356. * @brief Check whether the specified DMA2D interrupt source is enabled or not.
  357. * @param __HANDLE__: DMA2D handle
  358. * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
  359. * This parameter can be one of the following values:
  360. * @arg DMA2D_IT_CE: Configuration error interrupt mask
  361. * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
  362. * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
  363. * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
  364. * @arg DMA2D_IT_TC: Transfer complete interrupt mask
  365. * @arg DMA2D_IT_TE: Transfer error interrupt mask
  366. * @retval The state of INTERRUPT source.
  367. */
  368. #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
  369. /**
  370. * @}
  371. */
  372. /* Exported functions --------------------------------------------------------*/
  373. /** @addtogroup DMA2D_Exported_Functions DMA2D Exported Functions
  374. * @{
  375. */
  376. /** @addtogroup DMA2D_Exported_Functions_Group1 Initialization and de-initialization functions
  377. * @{
  378. */
  379. /* Initialization and de-initialization functions *******************************/
  380. HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
  381. HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
  382. void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
  383. void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
  384. /**
  385. * @}
  386. */
  387. /** @addtogroup DMA2D_Exported_Functions_Group2 IO operation functions
  388. * @{
  389. */
  390. /* IO operation functions *******************************************************/
  391. HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  392. HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  393. HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  394. HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  395. HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
  396. HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
  397. HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
  398. HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
  399. HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
  400. HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
  401. HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
  402. HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
  403. HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
  404. HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
  405. void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
  406. void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d);
  407. void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d);
  408. /**
  409. * @}
  410. */
  411. /** @addtogroup DMA2D_Exported_Functions_Group3 Peripheral Control functions
  412. * @{
  413. */
  414. /* Peripheral Control functions *************************************************/
  415. HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
  416. HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
  417. HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
  418. HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d);
  419. HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d);
  420. HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime);
  421. /**
  422. * @}
  423. */
  424. /** @addtogroup DMA2D_Exported_Functions_Group4 Peripheral State and Error functions
  425. * @{
  426. */
  427. /* Peripheral State functions ***************************************************/
  428. HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
  429. uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
  430. /**
  431. * @}
  432. */
  433. /**
  434. * @}
  435. */
  436. /* Private constants ---------------------------------------------------------*/
  437. /** @addtogroup DMA2D_Private_Constants DMA2D Private Constants
  438. * @{
  439. */
  440. /** @defgroup DMA2D_Maximum_Line_WaterMark DMA2D Maximum Line Watermark
  441. * @{
  442. */
  443. #define DMA2D_LINE_WATERMARK_MAX DMA2D_LWR_LW /*!< DMA2D maximum line watermark */
  444. /**
  445. * @}
  446. */
  447. /** @defgroup DMA2D_Color_Value DMA2D Color Value
  448. * @{
  449. */
  450. #define DMA2D_COLOR_VALUE ((uint32_t)0x000000FFU) /*!< Color value mask */
  451. /**
  452. * @}
  453. */
  454. /** @defgroup DMA2D_Offset DMA2D Offset
  455. * @{
  456. */
  457. #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< maximum Line Offset */
  458. /**
  459. * @}
  460. */
  461. /** @defgroup DMA2D_Size DMA2D Size
  462. * @{
  463. */
  464. #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16U) /*!< DMA2D maximum number of pixels per line */
  465. #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D maximum number of lines */
  466. /**
  467. * @}
  468. */
  469. /** @defgroup DMA2D_CLUT_Size DMA2D CLUT Size
  470. * @{
  471. */
  472. #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /*!< DMA2D maximum CLUT size */
  473. /**
  474. * @}
  475. */
  476. /**
  477. * @}
  478. */
  479. /* Private macros ------------------------------------------------------------*/
  480. /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
  481. * @{
  482. */
  483. #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
  484. #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
  485. ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
  486. #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || ((MODE_ARGB) == DMA2D_OUTPUT_RGB888) || \
  487. ((MODE_ARGB) == DMA2D_OUTPUT_RGB565) || ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \
  488. ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444))
  489. #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= DMA2D_COLOR_VALUE)
  490. #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
  491. #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
  492. #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
  493. #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || ((INPUT_CM) == DMA2D_INPUT_RGB888) || \
  494. ((INPUT_CM) == DMA2D_INPUT_RGB565) || ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \
  495. ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || ((INPUT_CM) == DMA2D_INPUT_L8) || \
  496. ((INPUT_CM) == DMA2D_INPUT_AL44) || ((INPUT_CM) == DMA2D_INPUT_AL88) || \
  497. ((INPUT_CM) == DMA2D_INPUT_L4) || ((INPUT_CM) == DMA2D_INPUT_A8) || \
  498. ((INPUT_CM) == DMA2D_INPUT_A4) || ((INPUT_CM) == DMA2D_INPUT_YCBCR))
  499. #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
  500. ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
  501. ((AlphaMode) == DMA2D_COMBINE_ALPHA))
  502. #define IS_DMA2D_ALPHA_INVERTED(Alpha_Inverted) (((Alpha_Inverted) == DMA2D_REGULAR_ALPHA) || \
  503. ((Alpha_Inverted) == DMA2D_INVERTED_ALPHA))
  504. #define IS_DMA2D_RB_SWAP(RB_Swap) (((RB_Swap) == DMA2D_RB_REGULAR) || \
  505. ((RB_Swap) == DMA2D_RB_SWAP))
  506. #define IS_DMA2D_CHROMA_SUB_SAMPLING (CSS) (((CSS) == DMA2D_NO_CSS) || \
  507. ((CSS) == DMA2D_CSS_422) || \
  508. ((CSS) == DMA2D_CSS_420))
  509. #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
  510. #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
  511. #define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX)
  512. #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
  513. ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
  514. ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
  515. #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
  516. ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
  517. ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
  518. /**
  519. * @}
  520. */
  521. /**
  522. * @}
  523. */
  524. /**
  525. * @}
  526. */
  527. #ifdef __cplusplus
  528. }
  529. #endif
  530. #endif /* __STM32H7xx_HAL_DMA2D_H */
  531. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/