stm32h7xx_hal.c 32 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal.c
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 21-April-2017
  7. * @brief HAL module driver.
  8. * This is the common part of the HAL initialization
  9. *
  10. @verbatim
  11. ==============================================================================
  12. ##### How to use this driver #####
  13. ==============================================================================
  14. [..]
  15. The common HAL driver contains a set of generic and common APIs that can be
  16. used by the PPP peripheral drivers and the user to start using the HAL.
  17. [..]
  18. The HAL contains two APIs' categories:
  19. (+) Common HAL APIs
  20. (+) Services HAL APIs
  21. @endverbatim
  22. ******************************************************************************
  23. * @attention
  24. *
  25. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  26. *
  27. * Redistribution and use in source and binary forms, with or without modification,
  28. * are permitted provided that the following conditions are met:
  29. * 1. Redistributions of source code must retain the above copyright notice,
  30. * this list of conditions and the following disclaimer.
  31. * 2. Redistributions in binary form must reproduce the above copyright notice,
  32. * this list of conditions and the following disclaimer in the documentation
  33. * and/or other materials provided with the distribution.
  34. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  35. * may be used to endorse or promote products derived from this software
  36. * without specific prior written permission.
  37. *
  38. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  39. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  40. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  41. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  42. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  43. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  44. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  45. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  46. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  47. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  48. *
  49. ******************************************************************************
  50. */
  51. /* Includes ------------------------------------------------------------------*/
  52. #include "stm32h7xx_hal.h"
  53. /** @addtogroup STM32H7xx_HAL_Driver
  54. * @{
  55. */
  56. /** @defgroup HAL HAL
  57. * @brief HAL module driver.
  58. * @{
  59. */
  60. /* Private typedef -----------------------------------------------------------*/
  61. /* Private define ------------------------------------------------------------*/
  62. /**
  63. * @brief STM32H7xx HAL Driver version number V1.0.0
  64. */
  65. #define __STM32H7xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
  66. #define __STM32H7xx_HAL_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */
  67. #define __STM32H7xx_HAL_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
  68. #define __STM32H7xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
  69. #define __STM32H7xx_HAL_VERSION ((__STM32H7xx_HAL_VERSION_MAIN << 24)\
  70. |(__STM32H7xx_HAL_VERSION_SUB1 << 16)\
  71. |(__STM32H7xx_HAL_VERSION_SUB2 << 8 )\
  72. |(__STM32H7xx_HAL_VERSION_RC))
  73. #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
  74. #define VREFBUF_TIMEOUT_VALUE (uint32_t)10 /* 10 ms */
  75. /* Private macro -------------------------------------------------------------*/
  76. /* Private variables ---------------------------------------------------------*/
  77. __IO uint32_t uwTick;
  78. /* Private function prototypes -----------------------------------------------*/
  79. /* Private functions ---------------------------------------------------------*/
  80. /** @defgroup HAL_Private_Functions HAL Private Functions
  81. * @{
  82. */
  83. /** @defgroup HAL_Group1 Initialization and de-initialization Functions
  84. * @brief Initialization and de-initialization functions
  85. *
  86. @verbatim
  87. ===============================================================================
  88. ##### Initialization and de-initialization functions #####
  89. ===============================================================================
  90. [..] This section provides functions allowing to:
  91. (+) Initializes the Flash interface the NVIC allocation and initial clock
  92. configuration. It initializes the systick also when timeout is needed
  93. and the backup domain when enabled.
  94. (+) de-Initializes common part of the HAL
  95. (+) Configure The time base source to have 1ms time base with a dedicated
  96. Tick interrupt priority.
  97. (++) Systick timer is used by default as source of time base, but user
  98. can eventually implement his proper time base source (a general purpose
  99. timer for example or other time source), keeping in mind that Time base
  100. duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
  101. handled in milliseconds basis.
  102. (++) Time base configuration function (HAL_InitTick ()) is called automatically
  103. at the beginning of the program after reset by HAL_Init() or at any time
  104. when clock is configured, by HAL_RCC_ClockConfig().
  105. (++) Source of time base is configured to generate interrupts at regular
  106. time intervals. Care must be taken if HAL_Delay() is called from a
  107. peripheral ISR process, the Tick interrupt line must have higher priority
  108. (numerically lower) than the peripheral interrupt. Otherwise the caller
  109. ISR process will be blocked.
  110. (++) functions affecting time base configurations are declared as __weak
  111. to make override possible in case of other implementations in user file.
  112. @endverbatim
  113. * @{
  114. */
  115. /**
  116. * @brief This function is used to initialize the HAL Library; it must be the first
  117. * instruction to be executed in the main program (before to call any other
  118. * HAL function), it performs the following:
  119. * Configures the SysTick to generate an interrupt each 1 millisecond,
  120. * which is clocked by the HSI (at this stage, the clock is not yet
  121. * configured and thus the system is running from the internal HSI at 16 MHz).
  122. * Set NVIC Group Priority to 4.
  123. * Calls the HAL_MspInit() callback function defined in user file
  124. * "stm32h7xx_hal_msp.c" to do the global low level hardware initialization
  125. *
  126. * @note SysTick is used as time base for the HAL_Delay() function, the application
  127. * need to ensure that the SysTick time base is always set to 1 millisecond
  128. * to have correct HAL operation.
  129. * @retval HAL status
  130. */
  131. HAL_StatusTypeDef HAL_Init(void)
  132. {
  133. /* Set Interrupt Group Priority */
  134. HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
  135. /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
  136. HAL_InitTick(TICK_INT_PRIORITY);
  137. /* Init the low level hardware */
  138. HAL_MspInit();
  139. /* Return function status */
  140. return HAL_OK;
  141. }
  142. /**
  143. * @brief This function de-Initializes common part of the HAL and stops the systick.
  144. * This function is optional.
  145. * @retval HAL status
  146. */
  147. HAL_StatusTypeDef HAL_DeInit(void)
  148. {
  149. /* Reset of all peripherals */
  150. __HAL_RCC_AHB3_FORCE_RESET();
  151. __HAL_RCC_AHB3_RELEASE_RESET();
  152. __HAL_RCC_AHB1_FORCE_RESET();
  153. __HAL_RCC_AHB1_RELEASE_RESET();
  154. __HAL_RCC_AHB2_FORCE_RESET();
  155. __HAL_RCC_AHB2_RELEASE_RESET();
  156. __HAL_RCC_AHB4_FORCE_RESET();
  157. __HAL_RCC_AHB4_RELEASE_RESET();
  158. __HAL_RCC_APB3_FORCE_RESET();
  159. __HAL_RCC_APB3_RELEASE_RESET();
  160. __HAL_RCC_APB1L_FORCE_RESET();
  161. __HAL_RCC_APB1L_RELEASE_RESET();
  162. __HAL_RCC_APB1H_FORCE_RESET();
  163. __HAL_RCC_APB1H_RELEASE_RESET();
  164. __HAL_RCC_APB2_FORCE_RESET();
  165. __HAL_RCC_APB2_RELEASE_RESET();
  166. __HAL_RCC_APB4_FORCE_RESET();
  167. __HAL_RCC_APB4_RELEASE_RESET();
  168. /* De-Init the low level hardware */
  169. HAL_MspDeInit();
  170. /* Return function status */
  171. return HAL_OK;
  172. }
  173. /**
  174. * @brief Initializes the MSP.
  175. * @retval None
  176. */
  177. __weak void HAL_MspInit(void)
  178. {
  179. /* NOTE : This function Should not be modified, when the callback is needed,
  180. the HAL_MspInit could be implemented in the user file
  181. */
  182. }
  183. /**
  184. * @brief DeInitializes the MSP.
  185. * @retval None
  186. */
  187. __weak void HAL_MspDeInit(void)
  188. {
  189. /* NOTE : This function Should not be modified, when the callback is needed,
  190. the HAL_MspDeInit could be implemented in the user file
  191. */
  192. }
  193. /**
  194. * @brief This function configures the source of the time base.
  195. * The time source is configured to have 1ms time base with a dedicated
  196. * Tick interrupt priority.
  197. * @note This function is called automatically at the beginning of program after
  198. * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
  199. * @note In the default implementation, SysTick timer is the source of time base.
  200. * It is used to generate interrupts at regular time intervals.
  201. * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
  202. * The the SysTick interrupt must have higher priority (numerically lower)
  203. * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
  204. * The function is declared as __weak to be overwritten in case of other
  205. * implementation in user file.
  206. * @param TickPriority: Tick interrupt priority.
  207. * @retval HAL status
  208. */
  209. __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
  210. {
  211. /*Configure the SysTick to have interrupt in 1ms time basis*/
  212. HAL_SYSTICK_Config(SystemCoreClock/1000);
  213. /*Configure the SysTick IRQ priority */
  214. HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
  215. /* Return function status */
  216. return HAL_OK;
  217. }
  218. /**
  219. * @}
  220. */
  221. /** @defgroup HAL_Group2 HAL Control functions
  222. * @brief HAL Control functions
  223. *
  224. @verbatim
  225. ===============================================================================
  226. ##### HAL Control functions #####
  227. ===============================================================================
  228. [..] This section provides functions allowing to:
  229. (+) Provide a tick value in millisecond
  230. (+) Provide a blocking delay in millisecond
  231. (+) Suspend the time base source interrupt
  232. (+) Resume the time base source interrupt
  233. (+) Get the HAL API driver version
  234. (+) Get the device identifier
  235. (+) Get the device revision identifier
  236. (+) Enable/Disable Debug module during SLEEP mode
  237. (+) Enable/Disable Debug module during STOP mode
  238. (+) Enable/Disable Debug module during STANDBY mode
  239. @endverbatim
  240. * @{
  241. */
  242. /**
  243. * @brief This function is called to increment a global variable "uwTick"
  244. * used as application time base.
  245. * @note In the default implementation, this variable is incremented each 1ms
  246. * in Systick ISR.
  247. * @note This function is declared as __weak to be overwritten in case of other
  248. * implementations in user file.
  249. * @retval None
  250. */
  251. __weak void HAL_IncTick(void)
  252. {
  253. uwTick++;
  254. }
  255. /**
  256. * @brief Provides a tick value in millisecond.
  257. * @note This function is declared as __weak to be overwritten in case of other
  258. * implementations in user file.
  259. * @retval tick value
  260. */
  261. __weak uint32_t HAL_GetTick(void)
  262. {
  263. return uwTick;
  264. }
  265. /**
  266. * @brief This function provides accurate delay (in milliseconds) based
  267. * on variable incremented.
  268. * @note In the default implementation , SysTick timer is the source of time base.
  269. * It is used to generate interrupts at regular time intervals where uwTick
  270. * is incremented.
  271. * @note ThiS function is declared as __weak to be overwritten in case of other
  272. * implementations in user file.
  273. * @param Delay: specifies the delay time length, in milliseconds.
  274. * @retval None
  275. */
  276. __weak void HAL_Delay(__IO uint32_t Delay)
  277. {
  278. uint32_t tickstart = 0;
  279. tickstart = HAL_GetTick();
  280. while((HAL_GetTick() - tickstart) < Delay)
  281. {
  282. }
  283. }
  284. /**
  285. * @brief Suspend Tick increment.
  286. * @note In the default implementation , SysTick timer is the source of time base. It is
  287. * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
  288. * is called, the the SysTick interrupt will be disabled and so Tick increment
  289. * is suspended.
  290. * @note This function is declared as __weak to be overwritten in case of other
  291. * implementations in user file.
  292. * @retval None
  293. */
  294. __weak void HAL_SuspendTick(void)
  295. {
  296. /* Disable SysTick Interrupt */
  297. SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
  298. }
  299. /**
  300. * @brief Resume Tick increment.
  301. * @note In the default implementation , SysTick timer is the source of time base. It is
  302. * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
  303. * is called, the the SysTick interrupt will be enabled and so Tick increment
  304. * is resumed.
  305. * @note This function is declared as __weak to be overwritten in case of other
  306. * implementations in user file.
  307. * @retval None
  308. */
  309. __weak void HAL_ResumeTick(void)
  310. {
  311. /* Enable SysTick Interrupt */
  312. SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
  313. }
  314. /**
  315. * @brief Returns the HAL revision
  316. * @retval version : 0xXYZR (8bits for each decimal, R for RC)
  317. */
  318. uint32_t HAL_GetHalVersion(void)
  319. {
  320. return __STM32H7xx_HAL_VERSION;
  321. }
  322. /**
  323. * @brief Returns the device revision identifier.
  324. * @retval Device revision identifier
  325. */
  326. uint32_t HAL_GetREVID(void)
  327. {
  328. return((DBGMCU->IDCODE) >> 16);
  329. }
  330. /**
  331. * @brief Returns the device identifier.
  332. * @retval Device identifier
  333. */
  334. uint32_t HAL_GetDEVID(void)
  335. {
  336. return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
  337. }
  338. /**
  339. * @brief Configure the internal voltage reference buffer voltage scale.
  340. * @param VoltageScaling specifies the output voltage to achieve
  341. * This parameter can be one of the following values:
  342. * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE0: VREF_OUT1 around 2.048 V.
  343. * This requires VDDA equal to or higher than 2.4 V.
  344. * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE1: VREF_OUT2 around 2.5 V.
  345. * This requires VDDA equal to or higher than 2.8 V.
  346. * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE2: VREF_OUT3 around 1.5 V.
  347. * This requires VDDA equal to or higher than 1.8 V.
  348. * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE3: VREF_OUT4 around 1.8 V.
  349. * This requires VDDA equal to or higher than 2.1 V.
  350. * @retval None
  351. */
  352. void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)
  353. {
  354. /* Check the parameters */
  355. assert_param(IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(VoltageScaling));
  356. MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, VoltageScaling);
  357. }
  358. /**
  359. * @brief Configure the internal voltage reference buffer high impedance mode.
  360. * @param Mode specifies the high impedance mode
  361. * This parameter can be one of the following values:
  362. * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE: VREF+ pin is internally connect to VREFINT output.
  363. * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE: VREF+ pin is high impedance.
  364. * @retval None
  365. */
  366. void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
  367. {
  368. /* Check the parameters */
  369. assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode));
  370. MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode);
  371. }
  372. /**
  373. * @brief Tune the Internal Voltage Reference buffer (VREFBUF).
  374. * @retval None
  375. */
  376. void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)
  377. {
  378. /* Check the parameters */
  379. assert_param(IS_SYSCFG_VREFBUF_TRIMMING(TrimmingValue));
  380. MODIFY_REG(VREFBUF->CCR, VREFBUF_CCR_TRIM, TrimmingValue);
  381. }
  382. /**
  383. * @brief Enable the Internal Voltage Reference buffer (VREFBUF).
  384. * @retval HAL_OK/HAL_TIMEOUT
  385. */
  386. HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void)
  387. {
  388. uint32_t tickstart = 0;
  389. SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
  390. /* Get Start Tick*/
  391. tickstart = HAL_GetTick();
  392. /* Wait for VRR bit */
  393. while(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == RESET)
  394. {
  395. if((HAL_GetTick() - tickstart) > VREFBUF_TIMEOUT_VALUE)
  396. {
  397. return HAL_TIMEOUT;
  398. }
  399. }
  400. return HAL_OK;
  401. }
  402. /**
  403. * @brief Disable the Internal Voltage Reference buffer (VREFBUF).
  404. *
  405. * @retval None
  406. */
  407. void HAL_SYSCFG_DisableVREFBUF(void)
  408. {
  409. CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
  410. }
  411. /**
  412. * @brief Ethernet PHY Interface Selection either MII or RMII
  413. * @param SYSCFG_ETHInterface: Selects the Ethernet PHY interface
  414. * This parameter can be one of the following values:
  415. * @arg SYSCFG_ETH_MII : Select the Media Independent Interface
  416. * @arg SYSCFG_ETH_RMII: Select the Reduced Media Independent Interface
  417. * @retval None
  418. */
  419. void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface)
  420. {
  421. /* Check the parameter */
  422. assert_param(IS_SYSCFG_ETHERNET_CONFIG(SYSCFG_ETHInterface));
  423. MODIFY_REG(SYSCFG->PMCR, SYCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface));
  424. }
  425. /**
  426. * @brief Analog Switch control for dual analog pads.
  427. * @param SYSCFG_AnalogSwitch: Selects the analog pad
  428. * This parameter can be one or a combination of the following values:
  429. * @arg SYSCFG_SWITCH_PA0 : Select PA0 analog switch
  430. * @arg SYSCFG_SWITCH_PA1: Select PA1 analog switch
  431. * @arg SYSCFG_SWITCH_PC2 : Select PC2 analog switch
  432. * @arg SYSCFG_SWITCH_PC3: Select PC3 analog switch
  433. * @param SYSCFG_SwitchState: Open or Close the analog switch between dual pads (PXn and PXn_C)
  434. * This parameter can be one or a combination of the following values:
  435. * @arg SYSCFG_SWITCH_PA0_OPEN
  436. * @arg SYSCFG_SWITCH_PA0_CLOSE
  437. * @arg SYSCFG_SWITCH_PA1_OPEN
  438. * @arg SYSCFG_SWITCH_PA1_CLOSE
  439. * @arg SYSCFG_SWITCH_PC2_OPEN
  440. * @arg SYSCFG_SWITCH_PC2_CLOSE
  441. * @arg SYSCFG_SWITCH_PC3_OPEN
  442. * @arg SYSCFG_SWITCH_PC3_CLOSE
  443. * @retval None
  444. */
  445. void HAL_SYSCFG_AnalogSwitchConfig(uint32_t SYSCFG_AnalogSwitch , uint32_t SYSCFG_SwitchState )
  446. {
  447. /* Check the parameter */
  448. assert_param(IS_SYSCFG_ANALOG_SWITCH(SYSCFG_AnalogSwitch));
  449. assert_param(IS_SYSCFG_SWITCH_STATE(SYSCFG_SwitchState));
  450. MODIFY_REG(SYSCFG->PMCR, (uint32_t) SYSCFG_AnalogSwitch, (uint32_t)(SYSCFG_SwitchState));
  451. }
  452. /**
  453. * @brief Enables the booster to reduce the total harmonic distortion of the analog
  454. * switch when the supply voltage is lower than 2.7 V.
  455. * @note Activating the booster allows to guaranty the analog switch AC performance
  456. * when the supply voltage is below 2.7 V: in this case, the analog switch
  457. * performance is the same on the full voltage range
  458. * @retval None
  459. */
  460. void HAL_SYSCFG_EnableBOOST(void)
  461. {
  462. SET_BIT(SYSCFG->PMCR, SYSCFG_PMCR_BOOSTEN) ;
  463. }
  464. /**
  465. * @brief Disables the booster
  466. * @note Activating the booster allows to guaranty the analog switch AC performance
  467. * when the supply voltage is below 2.7 V: in this case, the analog switch
  468. * performance is the same on the full voltage range
  469. * @retval None
  470. */
  471. void HAL_SYSCFG_DisableBOOST(void)
  472. {
  473. CLEAR_BIT(SYSCFG->PMCR, SYSCFG_PMCR_BOOSTEN) ;
  474. }
  475. /**
  476. * @brief BootCM7 address 0 configuration
  477. * @param BootRegister :Specifies the Boot Address register (Address0 or Address1)
  478. * This parameter can be one of the following values:
  479. * @arg SYSCFG_BOOT_ADDR0 : Select the boot address0
  480. * @arg SYSCFG_BOOT_ADDR1: Select the boot address1
  481. * @param BootAddress :Specifies the CM7 Boot Address to be loaded in Address0 or Address1
  482. * @retval None
  483. */
  484. void HAL_SYSCFG_CM7BootAddConfig(uint32_t BootRegister, uint32_t BootAddress)
  485. {
  486. /* Check the parameters */
  487. assert_param(IS_SYSCFG_BOOT_REGISTER(BootRegister));
  488. assert_param(IS_SYSCFG_BOOT_ADDRESS(BootAddress));
  489. if ( BootRegister == SYSCFG_BOOT_ADDR0 )
  490. {
  491. /* Configure CM7 BOOT ADD0 */
  492. MODIFY_REG(SYSCFG->UR2, SYSCFG_UR2_BOOT_ADD0, ((BootAddress >> 16) << POSITION_VAL(SYSCFG_UR2_BOOT_ADD0)));
  493. }
  494. else
  495. {
  496. /* Configure CM7 BOOT ADD1 */
  497. MODIFY_REG(SYSCFG->UR3, SYSCFG_UR3_BOOT_ADD1, (BootAddress >> 16));
  498. }
  499. }
  500. /**
  501. * @brief Enables the I/O Compensation Cell.
  502. * @note The I/O compensation cell can be used only when the device supply
  503. * voltage ranges from 2.4 to 3.6 V.
  504. * @retval None
  505. */
  506. void HAL_EnableCompensationCell(void)
  507. {
  508. SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN) ;
  509. }
  510. /**
  511. * @brief Power-down the I/O Compensation Cell.
  512. * @note The I/O compensation cell can be used only when the device supply
  513. * voltage ranges from 2.4 to 3.6 V.
  514. * @retval None
  515. */
  516. void HAL_DisableCompensationCell(void)
  517. {
  518. CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN) ;
  519. }
  520. /**
  521. * @brief To Enable optimize the I/O speed when the product voltage is low.
  522. * @note This bit is active only if PRODUCT_BELOW_25V user option bit is set. It must be
  523. * used only if the product supply voltage is below 2.5 V. Setting this bit when VDD is
  524. * higher than 2.5 V might be destructive.
  525. * @retval None
  526. */
  527. void HAL_SYSCFG_EnableIOSpeedOptimize(void)
  528. {
  529. SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV) ;
  530. }
  531. /**
  532. * @brief To Disable optimize the I/O speed when the product voltage is low.
  533. * @note This bit is active only if PRODUCT_BELOW_25V user option bit is set. It must be
  534. * used only if the product supply voltage is below 2.5 V. Setting this bit when VDD is
  535. * higher than 2.5 V might be destructive.
  536. * @retval None
  537. */
  538. void HAL_SYSCFG_DisableIOSpeedOptimize(void)
  539. {
  540. CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV) ;
  541. }
  542. /**
  543. * @brief Code selection for the I/O Compensation cell
  544. * @param SYSCFG_CompCode: Selects the code to be applied for the I/O compensation cell
  545. * This parameter can be one of the following values:
  546. * @arg SYSCFG_CELL_CODE : Select Code from the cell (available in the SYSCFG_CCVR)
  547. * @arg SYSCFG_REGISTER_CODE: Select Code from the SYSCFG compensation cell code register (SYSCFG_CCCR)
  548. * @retval None
  549. */
  550. void HAL_SYSCFG_CompensationCodeSelect(uint32_t SYSCFG_CompCode)
  551. {
  552. /* Check the parameter */
  553. assert_param(IS_SYSCFG_CODE_SELECT(SYSCFG_CompCode));
  554. MODIFY_REG(SYSCFG->CCCSR, SYSCFG_CCCSR_CS, (uint32_t)(SYSCFG_CompCode));
  555. }
  556. /**
  557. * @brief Code selection for the I/O Compensation cell
  558. * @param SYSCFG_PMOSCode: PMOS compensation code
  559. * This code is applied to the I/O compensation cell when the CS bit of the
  560. * SYSCFG_CMPCR is set
  561. * @param SYSCFG_NMOSCode: NMOS compensation code
  562. * This code is applied to the I/O compensation cell when the CS bit of the
  563. * SYSCFG_CMPCR is set
  564. * @retval None
  565. */
  566. void HAL_SYSCFG_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode )
  567. {
  568. /* Check the parameter */
  569. assert_param(IS_SYSCFG_CODE_CONFIG(SYSCFG_PMOSCode));
  570. assert_param(IS_SYSCFG_CODE_CONFIG(SYSCFG_NMOSCode));
  571. MODIFY_REG(SYSCFG->CCCR, SYSCFG_CCCR_NCC|SYSCFG_CCCR_PCC, (((uint32_t)(SYSCFG_PMOSCode)<< 4)|(uint32_t)(SYSCFG_NMOSCode)) );
  572. }
  573. /**
  574. * @brief Enable the Debug Module during Domain1 SLEEP mode
  575. * @retval None
  576. */
  577. void HAL_EnableDBGSleepMode(void)
  578. {
  579. SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEPD1);
  580. }
  581. /**
  582. * @brief Disable the Debug Module during Domain1 SLEEP mode
  583. * @retval None
  584. */
  585. void HAL_DisableDBGSleepMode(void)
  586. {
  587. CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEPD1);
  588. }
  589. /**
  590. * @brief Enable the Debug Module during Domain1 STOP mode
  591. * @retval None
  592. */
  593. void HAL_EnableDBGStopMode(void)
  594. {
  595. SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOPD1);
  596. }
  597. /**
  598. * @brief Disable the Debug Module during Domain1 STOP mode
  599. * @retval None
  600. */
  601. void HAL_DisableDBGStopMode(void)
  602. {
  603. CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOPD1);
  604. }
  605. /**
  606. * @brief Enable the Debug Module during Domain1 STANDBY mode
  607. * @retval None
  608. */
  609. void HAL_EnableDBGStandbyMode(void)
  610. {
  611. SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBYD1);
  612. }
  613. /**
  614. * @brief Disable the Debug Module during Domain1 STANDBY mode
  615. * @retval None
  616. */
  617. void HAL_DisableDBGStandbyMode(void)
  618. {
  619. CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBYD1);
  620. }
  621. /**
  622. * @brief Enable the Debug Module during Domain3 STOP mode
  623. * @retval None
  624. */
  625. void HAL_EnableDomain3DBGStopMode(void)
  626. {
  627. SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOPD3);
  628. }
  629. /**
  630. * @brief Disable the Debug Module during Domain3 STOP mode
  631. * @retval None
  632. */
  633. void HAL_DisableDomain3DBGStopMode(void)
  634. {
  635. CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOPD3);
  636. }
  637. /**
  638. * @brief Enable the Debug Module during Domain3 STANDBY mode
  639. * @retval None
  640. */
  641. void HAL_EnableDomain3DBGStandbyMode(void)
  642. {
  643. SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBYD3);
  644. }
  645. /**
  646. * @brief Disable the Debug Module during Domain3 STANDBY mode
  647. * @retval None
  648. */
  649. void HAL_DisableDomain3DBGStandbyMode(void)
  650. {
  651. CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBYD3);
  652. }
  653. /**
  654. * @brief Set the FMC Memory Mapping Swapping config.
  655. * @param BankMapConfig: Defines the FMC Bank mapping configuration. This parameter can be
  656. FMC_SWAPBMAP_DISABLE, FMC_SWAPBMAP_SDRAM_SRAM, FMC_SWAPBMAP_SDRAMB2
  657. * @retval HAL state
  658. */
  659. void HAL_SetFMCMemorySwappingConfig(uint32_t BankMapConfig)
  660. {
  661. /* Check the parameter */
  662. assert_param(IS_FMC_SWAPBMAP_MODE(BankMapConfig));
  663. MODIFY_REG(FMC_Bank1->BTCR[0], FMC_BCR1_BMAP, BankMapConfig);
  664. }
  665. /**
  666. * @brief Get FMC Bank mapping mode.
  667. * @retval The FMC Bank mapping mode. This parameter can be
  668. FMC_SWAPBMAP_DISABLE, FMC_SWAPBMAP_SDRAM_SRAM, FMC_SWAPBMAP_SDRAMB2
  669. */
  670. uint32_t HAL_GetFMCMemorySwappingConfig(void)
  671. {
  672. return READ_BIT(FMC_Bank1->BTCR[0], FMC_BCR1_BMAP);
  673. }
  674. /**
  675. * @brief Configure the EXTI input event line edge
  676. * @note No edge configuration for direct lines but for configurable lines:(EXTI_LINE0..EXTI_LINE21),
  677. * EXTI_LINE49,EXTI_LINE51,EXTI_LINE85 and EXTI_LINE86.
  678. * @param EXTI_Line: Specifies the EXTI LINE, it can be one of the following values,
  679. * (EXTI_LINE0....EXTI_LINE87)excluding :line45,line46 and line77 to line84 which are reserved
  680. * @param EXTI_Edge: Specifies EXTI line Edge used.
  681. * This parameter can be one of the following values :
  682. * @arg EXTI_RISING_EDGE : Configurable line, with Rising edge trigger detection
  683. * @arg EXTI_FALLING_EDGE: Configurable line, with Falling edge trigger detection
  684. * @retval None
  685. */
  686. void HAL_EXTI_EdgeConfig(uint32_t EXTI_Line , uint32_t EXTI_Edge )
  687. {
  688. /* Check the parameter */
  689. assert_param(IS_EXTI_CONFIG_LINE(EXTI_Line));
  690. assert_param(IS_EXTI_EDGE_LINE(EXTI_Edge));
  691. /* Clear Rising Falling edge configuration */
  692. CLEAR_BIT(*(__IO uint32_t *) (((uint32_t) &(EXTI->FTSR1)) + ((EXTI_Line >> 5 ) * 0x20)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  693. CLEAR_BIT( *(__IO uint32_t *) (((uint32_t) &(EXTI->RTSR1)) + ((EXTI_Line >> 5 ) * 0x20)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  694. if( (EXTI_Edge & EXTI_RISING_EDGE) == EXTI_RISING_EDGE)
  695. {
  696. SET_BIT( *(__IO uint32_t *) (((uint32_t) &(EXTI->RTSR1)) + ((EXTI_Line >> 5 ) * 0x20)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  697. }
  698. if( (EXTI_Edge & EXTI_FALLING_EDGE) == EXTI_FALLING_EDGE)
  699. {
  700. SET_BIT(*(__IO uint32_t *) (((uint32_t) &(EXTI->FTSR1)) + ((EXTI_Line >> 5 ) * 0x20)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  701. }
  702. }
  703. /**
  704. * @brief Generates a Software interrupt on selected EXTI line.
  705. * @param EXTI_Line: Specifies the EXTI LINE, it can be one of the following values,
  706. * (EXTI_LINE0..EXTI_LINE21),EXTI_LINE49,EXTI_LINE51,EXTI_LINE85 and EXTI_LINE86.
  707. * @retval None
  708. */
  709. void HAL_EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
  710. {
  711. /* Check the parameters */
  712. assert_param(IS_EXTI_CONFIG_LINE(EXTI_Line));
  713. SET_BIT(*(__IO uint32_t *) (((uint32_t) &(EXTI->SWIER1)) + ((EXTI_Line >> 5 ) * 0x20)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  714. }
  715. /**
  716. * @brief Clears the EXTI's line pending flags for Domain D1
  717. * @param EXTI_Line: Specifies the EXTI LINE, it can be one of the following values,
  718. * (EXTI_LINE0....EXTI_LINE87)excluding :line45,line46 and line77 to line84 which are reserved
  719. * @retval None
  720. */
  721. void HAL_EXTI_D1_ClearFlag(uint32_t EXTI_Line)
  722. {
  723. /* Check the parameters */
  724. assert_param(IS_EXTI_D1_LINE(EXTI_Line));
  725. SET_BIT(*(__IO uint32_t *) (((uint32_t) &(EXTI_D1->PR1)) + ((EXTI_Line >> 5 ) * 0x10)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  726. }
  727. /**
  728. * @brief Configure the EXTI input event line for Domain D1
  729. * @param EXTI_Line: Specifies the EXTI LINE, it can be one of the following values,
  730. * (EXTI_LINE0 to EXTI_LINE87)excluding :line45,line46 and line77 to line84 which are reserved
  731. * @param EXTI_Mode: Specifies which EXTI line is used as interrupt or an event.
  732. * This parameter can be one or a combination of the following values :
  733. * @arg EXTI_MODE_IT : Interrupt Mode selected
  734. * @arg EXTI_MODE_EVT : Event Mode selected
  735. * @param EXTI_LineCmd controls (Enable/Disable) the EXTI line.
  736. * @retval None
  737. */
  738. void HAL_EXTI_D1_EventInputConfig(uint32_t EXTI_Line , uint32_t EXTI_Mode, uint32_t EXTI_LineCmd )
  739. {
  740. /* Check the parameter */
  741. assert_param(IS_EXTI_D1_LINE(EXTI_Line));
  742. assert_param(IS_EXTI_MODE_LINE(EXTI_Mode));
  743. if( (EXTI_Mode & EXTI_MODE_IT) == EXTI_MODE_IT)
  744. {
  745. if( EXTI_LineCmd == DISABLE)
  746. {
  747. /* Clear EXTI line configuration */
  748. CLEAR_BIT(*(__IO uint32_t *) (((uint32_t) &(EXTI_D1->IMR1)) + ((EXTI_Line >> 5 ) * 0x10)),(uint32_t)(1 << (EXTI_Line & 0x1F)) );
  749. }
  750. else
  751. {
  752. SET_BIT(*(__IO uint32_t *) (((uint32_t) &(EXTI_D1->IMR1)) + ((EXTI_Line >> 5 ) * 0x10)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  753. }
  754. }
  755. if( (EXTI_Mode & EXTI_MODE_EVT) == EXTI_MODE_EVT)
  756. {
  757. if( EXTI_LineCmd == DISABLE)
  758. {
  759. /* Clear EXTI line configuration */
  760. CLEAR_BIT( *(__IO uint32_t *) (((uint32_t) &(EXTI_D1->EMR1)) + ((EXTI_Line >> 5 ) * 0x10)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  761. }
  762. else
  763. {
  764. SET_BIT( *(__IO uint32_t *) (((uint32_t) &(EXTI_D1->EMR1)) + ((EXTI_Line >> 5 ) * 0x10)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  765. }
  766. }
  767. }
  768. /**
  769. * @brief Configure the EXTI input event line for Domain D3
  770. * @param EXTI_Line: Specifies the EXTI LINE, it can be one of the following values,
  771. * (EXTI_LINE0 to EXTI_LINE15),(EXTI_LINE19 to EXTI_LINE21),EXTI_LINE25, EXTI_LINE34,
  772. * EXTI_LINE35,EXTI_LINE41,(EXTI_LINE48 to EXTI_LINE53)
  773. * @param EXTI_LineCmd controls (Enable/Disable) the EXTI line.
  774. * @param EXTI_ClearSrc: Specifies the clear source of D3 pending event.
  775. * This parameter can be one of the following values :
  776. * @arg BDMA_CH6_CLEAR : BDMA ch6 event selected as D3 domain pendclear source
  777. * @arg BDMA_CH7_CLEAR : BDMA ch7 event selected as D3 domain pendclear source
  778. * @arg LPTIM4_OUT_CLEAR : LPTIM4 out selected as D3 domain pendclear source
  779. * @arg LPTIM5_OUT_CLEAR : LPTIM5 out selected as D3 domain pendclear source
  780. * @retval None
  781. */
  782. void HAL_EXTI_D3_EventInputConfig(uint32_t EXTI_Line, uint32_t EXTI_LineCmd , uint32_t EXTI_ClearSrc )
  783. {
  784. /* Check the parameter */
  785. assert_param(IS_EXTI_D3_LINE(EXTI_Line));
  786. assert_param(IS_EXTI_D3_CLEAR(EXTI_ClearSrc));
  787. if( EXTI_LineCmd == DISABLE)
  788. {
  789. /* Clear EXTI line configuration */
  790. CLEAR_BIT(*(__IO uint32_t *) (((uint32_t) &(EXTI->D3PMR1)) + ((EXTI_Line >> 5 ) * 0x20)),(uint32_t)(1 << (EXTI_Line & 0x1F)) );
  791. }
  792. else
  793. {
  794. SET_BIT(*(__IO uint32_t *) (((uint32_t) &(EXTI->D3PMR1)) +((EXTI_Line >> 5 ) * 0x20)), (uint32_t)(1 << (EXTI_Line & 0x1F)));
  795. }
  796. if ( (EXTI_Line>>4)%2 ==0)
  797. {
  798. MODIFY_REG(*(__IO uint32_t *) (((uint32_t) &(EXTI->D3PCR1L)) + ((EXTI_Line >> 5 ) * 0x20)), \
  799. (uint32_t)(3 << ((EXTI_Line*2) & 0x1F)), (uint32_t)(EXTI_ClearSrc << ((EXTI_Line*2) & 0x1F))) ;
  800. }
  801. else
  802. {
  803. MODIFY_REG(*(__IO uint32_t *) (((uint32_t) &(EXTI->D3PCR1H)) + ((EXTI_Line >> 5 ) * 0x20)), \
  804. (uint32_t)(3 << ((EXTI_Line*2) & 0x1F)), (uint32_t)(EXTI_ClearSrc << ((EXTI_Line*2) & 0x1F))) ;
  805. }
  806. }
  807. /**
  808. * @}
  809. */
  810. /**
  811. * @}
  812. */
  813. /**
  814. * @}
  815. */
  816. /**
  817. * @}
  818. */
  819. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/