stm32h7xx_hal_cec.c 22 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_cec.c
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 21-April-2017
  7. * @brief CEC HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the High Definition Multimedia Interface
  10. * Consumer Electronics Control Peripheral (CEC).
  11. * + Initialization and de-initialization function
  12. * + IO operation function
  13. * + Peripheral Control function
  14. *
  15. *
  16. @verbatim
  17. ===============================================================================
  18. ##### How to use this driver #####
  19. ===============================================================================
  20. [..]
  21. The CEC HAL driver can be used as follow:
  22. (#) Declare a CEC_HandleTypeDef handle structure.
  23. (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
  24. (##) Enable the CEC interface clock.
  25. (##) CEC pins configuration:
  26. (+++) Enable the clock for the CEC GPIOs.
  27. (+++) Configure these CEC pins as alternate function pull-up.
  28. (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
  29. and HAL_CEC_Receive_IT() APIs):
  30. (+++) Configure the CEC interrupt priority.
  31. (+++) Enable the NVIC CEC IRQ handle.
  32. (+++) The specific CEC interrupts (Transmission complete interrupt,
  33. RXNE interrupt and Error Interrupts) will be managed using the macros
  34. __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
  35. and receive process.
  36. (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
  37. in case of Bit Rising Error, Error-Bit generation conditions, device logical
  38. address and Listen mode in the hcec Init structure.
  39. (#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
  40. [..]
  41. (@) This API (HAL_CEC_Init()) configures also the low level Hardware (GPIO, CLOCK, CORTEX...etc)
  42. by calling the customed HAL_CEC_MspInit() API.
  43. @endverbatim
  44. ******************************************************************************
  45. * @attention
  46. *
  47. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  48. *
  49. * Redistribution and use in source and binary forms, with or without modification,
  50. * are permitted provided that the following conditions are met:
  51. * 1. Redistributions of source code must retain the above copyright notice,
  52. * this list of conditions and the following disclaimer.
  53. * 2. Redistributions in binary form must reproduce the above copyright notice,
  54. * this list of conditions and the following disclaimer in the documentation
  55. * and/or other materials provided with the distribution.
  56. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  57. * may be used to endorse or promote products derived from this software
  58. * without specific prior written permission.
  59. *
  60. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  61. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  62. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  63. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  64. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  65. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  66. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  67. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  68. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  69. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  70. *
  71. ******************************************************************************
  72. */
  73. /* Includes ------------------------------------------------------------------*/
  74. #include "stm32h7xx_hal.h"
  75. /** @addtogroup STM32H7xx_HAL_Driver
  76. * @{
  77. */
  78. /** @defgroup CEC CEC
  79. * @brief HAL CEC module driver
  80. * @{
  81. */
  82. #ifdef HAL_CEC_MODULE_ENABLED
  83. /* Private typedef -----------------------------------------------------------*/
  84. /* Private define ------------------------------------------------------------*/
  85. /** @defgroup CEC_Private_Constants CEC Private Constants
  86. * @{
  87. */
  88. /**
  89. * @}
  90. */
  91. /* Private macro -------------------------------------------------------------*/
  92. /* Private variables ---------------------------------------------------------*/
  93. /* Private function prototypes -----------------------------------------------*/
  94. /** @defgroup CEC_Private_Functions CEC Private Functions
  95. * @{
  96. */
  97. /**
  98. * @}
  99. */
  100. /* Exported functions ---------------------------------------------------------*/
  101. /** @defgroup CEC_Exported_Functions CEC Exported Functions
  102. * @{
  103. */
  104. /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
  105. * @brief Initialization and Configuration functions
  106. *
  107. @verbatim
  108. ===============================================================================
  109. ##### Initialization and Configuration functions #####
  110. ===============================================================================
  111. [..]
  112. This subsection provides a set of functions allowing to initialize the CEC
  113. (+) The following parameters need to be configured:
  114. (++) SignalFreeTime
  115. (++) Tolerance
  116. (++) BRERxStop (RX stopped or not upon Bit Rising Error)
  117. (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error)
  118. (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error)
  119. (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
  120. (++) SignalFreeTimeOption (SFT Timer start definition)
  121. (++) OwnAddress (CEC device address)
  122. (++) ListenMode
  123. @endverbatim
  124. * @{
  125. */
  126. /**
  127. * @brief Initializes the CEC mode according to the specified
  128. * parameters in the CEC_InitTypeDef and creates the associated handle.
  129. * @param hcec: CEC handle
  130. * @retval HAL status
  131. */
  132. HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
  133. {
  134. /* Check the CEC handle allocation */
  135. if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL))
  136. {
  137. return HAL_ERROR;
  138. }
  139. /* Check the parameters */
  140. assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
  141. assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
  142. assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
  143. assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
  144. assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
  145. assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
  146. assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
  147. assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
  148. assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
  149. assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
  150. if(hcec->gState == HAL_CEC_STATE_RESET)
  151. {
  152. /* Allocate lock resource and initialize it */
  153. hcec->Lock = HAL_UNLOCKED;
  154. /* Init the low level hardware : GPIO, CLOCK */
  155. HAL_CEC_MspInit(hcec);
  156. }
  157. hcec->gState = HAL_CEC_STATE_BUSY;
  158. /* Disable the Peripheral */
  159. __HAL_CEC_DISABLE(hcec);
  160. /* Write to CEC Control Register */
  161. hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\
  162. hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\
  163. hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\
  164. hcec->Init.ListenMode;
  165. /* Enable the following CEC Transmission/Reception interrupts as
  166. * well as the following CEC Transmission/Reception Errors interrupts
  167. * Rx Byte Received IT
  168. * End of Reception IT
  169. * Rx overrun
  170. * Rx bit rising error
  171. * Rx short bit period error
  172. * Rx long bit period error
  173. * Rx missing acknowledge
  174. * Tx Byte Request IT
  175. * End of Transmission IT
  176. * Tx Missing Acknowledge IT
  177. * Tx-Error IT
  178. * Tx-Buffer Underrun IT
  179. * Tx arbitration lost */
  180. __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
  181. /* Enable the CEC Peripheral */
  182. __HAL_CEC_ENABLE(hcec);
  183. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  184. hcec->gState = HAL_CEC_STATE_READY;
  185. hcec->RxState = HAL_CEC_STATE_READY;
  186. return HAL_OK;
  187. }
  188. /**
  189. * @brief DeInitializes the CEC peripheral
  190. * @param hcec: CEC handle
  191. * @retval HAL status
  192. */
  193. HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
  194. {
  195. /* Check the CEC handle allocation */
  196. if(hcec == NULL)
  197. {
  198. return HAL_ERROR;
  199. }
  200. /* Check the parameters */
  201. assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
  202. hcec->gState = HAL_CEC_STATE_BUSY;
  203. /* DeInit the low level hardware */
  204. HAL_CEC_MspDeInit(hcec);
  205. /* Disable the Peripheral */
  206. __HAL_CEC_DISABLE(hcec);
  207. /* Clear Flags */
  208. __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR);
  209. /* Disable the following CEC Transmission/Reception interrupts as
  210. * well as the following CEC Transmission/Reception Errors interrupts
  211. * Rx Byte Received IT
  212. * End of Reception IT
  213. * Rx overrun
  214. * Rx bit rising error
  215. * Rx short bit period error
  216. * Rx long bit period error
  217. * Rx missing acknowledge
  218. * Tx Byte Request IT
  219. * End of Transmission IT
  220. * Tx Missing Acknowledge IT
  221. * Tx-Error IT
  222. * Tx-Buffer Underrun IT
  223. * Tx arbitration lost */
  224. __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
  225. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  226. hcec->gState = HAL_CEC_STATE_RESET;
  227. hcec->RxState = HAL_CEC_STATE_RESET;
  228. /* Process Unlock */
  229. __HAL_UNLOCK(hcec);
  230. return HAL_OK;
  231. }
  232. /**
  233. * @brief Initializes the Own Address of the CEC device
  234. * @param hcec: CEC handle
  235. * @param CEC_OwnAddress: The CEC own address.
  236. * @retval HAL status
  237. */
  238. HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
  239. {
  240. /* Check the parameters */
  241. assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
  242. if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
  243. {
  244. /* Process Locked */
  245. __HAL_LOCK(hcec);
  246. hcec->gState = HAL_CEC_STATE_BUSY;
  247. /* Disable the Peripheral */
  248. __HAL_CEC_DISABLE(hcec);
  249. if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
  250. {
  251. hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16);
  252. }
  253. else
  254. {
  255. hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
  256. }
  257. hcec->gState = HAL_CEC_STATE_READY;
  258. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  259. /* Process Unlocked */
  260. __HAL_UNLOCK(hcec);
  261. /* Enable the Peripheral */
  262. __HAL_CEC_ENABLE(hcec);
  263. return HAL_OK;
  264. }
  265. else
  266. {
  267. return HAL_BUSY;
  268. }
  269. }
  270. /**
  271. * @brief CEC MSP Init
  272. * @param hcec: CEC handle
  273. * @retval None
  274. */
  275. __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
  276. {
  277. /* Prevent unused argument(s) compilation warning */
  278. UNUSED(hcec);
  279. /* NOTE : This function should not be modified, when the callback is needed,
  280. the HAL_CEC_MspInit can be implemented in the user file
  281. */
  282. }
  283. /**
  284. * @brief CEC MSP DeInit
  285. * @param hcec: CEC handle
  286. * @retval None
  287. */
  288. __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
  289. {
  290. /* Prevent unused argument(s) compilation warning */
  291. UNUSED(hcec);
  292. /* NOTE : This function should not be modified, when the callback is needed,
  293. the HAL_CEC_MspDeInit can be implemented in the user file
  294. */
  295. }
  296. /**
  297. * @}
  298. */
  299. /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
  300. * @brief CEC Transmit/Receive functions
  301. *
  302. @verbatim
  303. ===============================================================================
  304. ##### IO operation functions #####
  305. ===============================================================================
  306. This subsection provides a set of functions allowing to manage the CEC data transfers.
  307. (#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
  308. logical addresses (4-bit long addresses, 0xF for broadcast messages destination)
  309. (#) The communication is performed using Interrupts.
  310. These API's return the HAL status.
  311. The end of the data processing will be indicated through the
  312. dedicated CEC IRQ when using Interrupt mode.
  313. The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
  314. will be executed respectively at the end of the transmit or Receive process
  315. The HAL_CEC_ErrorCallback() user callback will be executed when a communication
  316. error is detected
  317. (#) API's with Interrupt are :
  318. (+) HAL_CEC_Transmit_IT()
  319. (+) HAL_CEC_IRQHandler()
  320. (#) A set of User Callbacks are provided:
  321. (+) HAL_CEC_TxCpltCallback()
  322. (+) HAL_CEC_RxCpltCallback()
  323. (+) HAL_CEC_ErrorCallback()
  324. @endverbatim
  325. * @{
  326. */
  327. /**
  328. * @brief Send data in interrupt mode
  329. * @param hcec: CEC handle
  330. * @param InitiatorAddress: Initiator address
  331. * @param DestinationAddress: destination logical address
  332. * @param pData: pointer to input byte data buffer
  333. * @param Size: amount of data to be sent in bytes (without counting the header).
  334. * 0 means only the header is sent (ping operation).
  335. * Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
  336. * @retval HAL status
  337. */
  338. HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress,uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
  339. {
  340. /* if the IP isn't already busy and if there is no previous transmission
  341. already pending due to arbitration lost */
  342. if (hcec->gState == HAL_CEC_STATE_READY)
  343. {
  344. if((pData == NULL ) && (Size > 0))
  345. {
  346. return HAL_ERROR;
  347. }
  348. assert_param(IS_CEC_ADDRESS(DestinationAddress));
  349. assert_param(IS_CEC_ADDRESS(InitiatorAddress));
  350. assert_param(IS_CEC_MSGSIZE(Size));
  351. /* Process Locked */
  352. __HAL_LOCK(hcec);
  353. hcec->pTxBuffPtr = pData;
  354. hcec->gState = HAL_CEC_STATE_BUSY_TX;
  355. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  356. /* initialize the number of bytes to send,
  357. * 0 means only one header is sent (ping operation) */
  358. hcec->TxXferCount = Size;
  359. /* in case of no payload (Size = 0), sender is only pinging the system;
  360. Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
  361. if (Size == 0)
  362. {
  363. __HAL_CEC_LAST_BYTE_TX_SET(hcec);
  364. }
  365. /* send header block */
  366. hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress);
  367. /* Set TX Start of Message (TXSOM) bit */
  368. __HAL_CEC_FIRST_BYTE_TX_SET(hcec);
  369. /* Process Unlocked */
  370. __HAL_UNLOCK(hcec);
  371. return HAL_OK;
  372. }
  373. else
  374. {
  375. return HAL_BUSY;
  376. }
  377. }
  378. /**
  379. * @brief Get size of the received frame.
  380. * @param hcec: CEC handle
  381. * @retval Frame size
  382. */
  383. uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
  384. {
  385. return hcec->RxXferSize;
  386. }
  387. /**
  388. * @brief Change Rx Buffer.
  389. * @param hcec: CEC handle
  390. * @param Rxbuffer: Rx Buffer
  391. * @note This function can be called only inside the HAL_CEC_RxCpltCallback()
  392. * @retval Frame size
  393. */
  394. void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer)
  395. {
  396. hcec->Init.RxBuffer = Rxbuffer;
  397. }
  398. /**
  399. * @brief This function handles CEC interrupt requests.
  400. * @param hcec: CEC handle
  401. * @retval None
  402. */
  403. void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
  404. {
  405. /* save interrupts register for further error or interrupts handling purposes */
  406. uint32_t reg = 0;
  407. reg = hcec->Instance->ISR;
  408. /*----------------------- Arbitration Lost Management ----------------------*/
  409. /* CEC TX arbitration error interrupt occurred -----------------------------*/
  410. if((reg & CEC_FLAG_ARBLST) != RESET)
  411. {
  412. hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
  413. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
  414. }
  415. /*------------------------------ Rx Management -----------------------------*/
  416. /* CEC RX byte received interrupt -----------------------------------------*/
  417. if((reg & CEC_FLAG_RXBR) != RESET)
  418. {
  419. /* reception is starting */
  420. hcec->RxState = HAL_CEC_STATE_BUSY_RX;
  421. hcec->RxXferSize++;
  422. /* read received byte */
  423. *hcec->Init.RxBuffer++ = hcec->Instance->RXDR;
  424. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
  425. }
  426. /* CEC RX end received interrupt ------------------------------------------*/
  427. if((reg & CEC_FLAG_RXEND) != RESET)
  428. {
  429. /* clear IT */
  430. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
  431. /* Rx process is completed, restore hcec->RxState to Ready */
  432. hcec->RxState = HAL_CEC_STATE_READY;
  433. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  434. hcec->Init.RxBuffer-=hcec->RxXferSize;
  435. HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
  436. hcec->RxXferSize = 0;
  437. }
  438. /*------------------------------ Tx Management -----------------------------*/
  439. /* CEC TX byte request interrupt -------------------------------------------*/
  440. if((reg & CEC_FLAG_TXBR) != RESET)
  441. {
  442. if (hcec->TxXferCount == 0)
  443. {
  444. /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
  445. __HAL_CEC_LAST_BYTE_TX_SET(hcec);
  446. hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
  447. }
  448. else
  449. {
  450. hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
  451. hcec->TxXferCount--;
  452. }
  453. /* clear Tx-Byte request flag */
  454. __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR);
  455. }
  456. /* CEC TX end interrupt ----------------------------------------------------*/
  457. if((reg & CEC_FLAG_TXEND) != RESET)
  458. {
  459. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
  460. /* Tx process is ended, restore hcec->gState to Ready */
  461. hcec->gState = HAL_CEC_STATE_READY;
  462. /* Call the Process Unlocked before calling the Tx call back API to give the
  463. possibility to start again the Transmission under the Tx call back API */
  464. __HAL_UNLOCK(hcec);
  465. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  466. HAL_CEC_TxCpltCallback(hcec);
  467. }
  468. /*------------------------- Rx/Tx Error Management -------------------------*/
  469. if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0)
  470. {
  471. hcec->ErrorCode = reg;
  472. __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE);
  473. if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET)
  474. {
  475. hcec->Init.RxBuffer-=hcec->RxXferSize;
  476. hcec->RxXferSize = 0;
  477. hcec->RxState = HAL_CEC_STATE_READY;
  478. }
  479. else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET))
  480. {
  481. /* Set the CEC state ready to be able to start again the process */
  482. hcec->gState = HAL_CEC_STATE_READY;
  483. }
  484. /* Error Call Back */
  485. HAL_CEC_ErrorCallback(hcec);
  486. }
  487. }
  488. /**
  489. * @brief Tx Transfer completed callback
  490. * @param hcec: CEC handle
  491. * @retval None
  492. */
  493. __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
  494. {
  495. /* Prevent unused argument(s) compilation warning */
  496. UNUSED(hcec);
  497. /* NOTE : This function should not be modified, when the callback is needed,
  498. the HAL_CEC_TxCpltCallback can be implemented in the user file
  499. */
  500. }
  501. /**
  502. * @brief Rx Transfer completed callback
  503. * @param hcec: CEC handle
  504. * @param RxFrameSize: Size of frame
  505. * @retval None
  506. */
  507. __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
  508. {
  509. /* Prevent unused argument(s) compilation warning */
  510. UNUSED(hcec);
  511. UNUSED(RxFrameSize);
  512. /* NOTE : This function should not be modified, when the callback is needed,
  513. the HAL_CEC_RxCpltCallback can be implemented in the user file
  514. */
  515. }
  516. /**
  517. * @brief CEC error callbacks
  518. * @param hcec: CEC handle
  519. * @retval None
  520. */
  521. __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
  522. {
  523. /* Prevent unused argument(s) compilation warning */
  524. UNUSED(hcec);
  525. /* NOTE : This function should not be modified, when the callback is needed,
  526. the HAL_CEC_ErrorCallback can be implemented in the user file
  527. */
  528. }
  529. /**
  530. * @}
  531. */
  532. /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function
  533. * @brief CEC control functions
  534. *
  535. @verbatim
  536. ===============================================================================
  537. ##### Peripheral Control function #####
  538. ===============================================================================
  539. [..]
  540. This subsection provides a set of functions allowing to control the CEC.
  541. (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
  542. (+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
  543. @endverbatim
  544. * @{
  545. */
  546. /**
  547. * @brief return the CEC state
  548. * @param hcec: pointer to a CEC_HandleTypeDef structure that contains
  549. * the configuration information for the specified CEC module.
  550. * @retval HAL state
  551. */
  552. HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
  553. {
  554. uint32_t temp1= 0x00U, temp2 = 0x00U;
  555. temp1 = hcec->gState;
  556. temp2 = hcec->RxState;
  557. return (HAL_CEC_StateTypeDef)(temp1 | temp2);
  558. }
  559. /**
  560. * @brief Return the CEC error code
  561. * @param hcec : pointer to a CEC_HandleTypeDef structure that contains
  562. * the configuration information for the specified CEC.
  563. * @retval CEC Error Code
  564. */
  565. uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
  566. {
  567. return hcec->ErrorCode;
  568. }
  569. /**
  570. * @}
  571. */
  572. /**
  573. * @}
  574. */
  575. #endif /* HAL_CEC_MODULE_ENABLED */
  576. /**
  577. * @}
  578. */
  579. /**
  580. * @}
  581. */
  582. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/