stm32h7xx_hal_dac.c 40 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_dac.c
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 21-April-2017
  7. * @brief DAC HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the Digital to Analog Converter (DAC) peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral Control functions
  13. * + Peripheral State and Errors functions
  14. *
  15. *
  16. @verbatim
  17. ==============================================================================
  18. ##### DAC Peripheral features #####
  19. ==============================================================================
  20. [..]
  21. *** DAC Channels ***
  22. ====================
  23. [..]
  24. STM32H7 devices integrate two 12-bit Digital Analog Converters.
  25. The 2 converters (i.e. channel1 & channel2) can be used independently or simultaneously (dual mode):
  26. (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
  27. peripherals (ex. OPAMPs, comparators).
  28. (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
  29. peripherals (ex. OPAMPs, comparators).
  30. *** DAC Triggers ***
  31. ====================
  32. [..]
  33. Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
  34. and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
  35. [..]
  36. Digital to Analog conversion can be triggered by:
  37. (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
  38. The used pin (GPIOx_PIN_9) must be configured in input mode.
  39. (#) Timers TRGO:TIM1,TIM2,TIM4, TIM5, TIM6, TIM7,TIM8 and TIM15
  40. (DAC_TRIGGER_T1_TRGO, DAC_TRIGGER_T2_TRGO...)
  41. (#) Timers TRGO: HRTIM1,LPTIM1,LPTIM2
  42. (DAC_TRIGGER_HR1_TRGO1,DAC_TRIGGER_HR1_TRGO2,DAC_TRIGGER_LP1_OUT,DAC_TRIGGER_LP2_OUT)
  43. (#) Software using DAC_TRIGGER_SOFTWARE
  44. *** DAC Buffer mode feature ***
  45. ===============================
  46. [..]
  47. Each DAC channel integrates an output buffer that can be used to
  48. reduce the output impedance, and to drive external loads directly
  49. without having to add an external operational amplifier.
  50. To enable, the output buffer use
  51. sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
  52. [..]
  53. (@) Refer to the device datasheet for more details about output
  54. impedance value with and without output buffer.
  55. *** DAC connect feature ***
  56. ===============================
  57. [..]
  58. Each DAC channel can be connected internally.
  59. To connect, use
  60. sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
  61. *** GPIO configurations guidelines ***
  62. ====================================
  63. [..]
  64. When a DAC channel is used (ex channel1 on PA4) and the other is not
  65. (ex channel2 on PA5 is configured in Analog and disabled).
  66. Channel1 may disturb channel2 as coupling effect.
  67. Note that there is no coupling on channel2 as soon as channel2 is turned on.
  68. Coupling on adjacent channel could be avoided as follows:
  69. when unused PA5 is configured as INPUT PULL-UP or DOWN.
  70. PA5 is configured in ANALOG just before it is turned on.
  71. *** DAC Sample and Hold feature ***
  72. ===================================
  73. [..]
  74. For each converter, 2 modes are supported: normal mode and
  75. "sample and hold" mode (i.e. low power mode).
  76. In the sample and hold mode, the DAC core converts data, then holds the
  77. converted voltage on a capacitor. When not converting, the DAC cores and
  78. buffer are completely turned off between samples and the DAC output is
  79. tri-stated, therefore reducing the overall power consumption. A new
  80. stabilization period is needed before each new conversion.
  81. [..]
  82. The sample and hold allow setting internal or external voltage @
  83. low power consumption cost (output value can be at any given rate either
  84. by CPU or DMA).
  85. [..]
  86. The Sample and hold block and registers uses either LSI & run in
  87. several power modes: run mode, sleep mode & stop mode.
  88. To enable Sample and Hold mode ,enable LSI using HAL_RCC_OscConfig with
  89. RCC_OSCILLATORTYPE_LSI & RCC_LSI_ON parameters.
  90. Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE
  91. & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
  92. DAC_HoldTime & DAC_RefreshTime.
  93. *** DAC calibration feature ***
  94. ===================================
  95. [..]
  96. (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
  97. (++) Calibration aims at correcting some offset of output buffer.
  98. (++) The DAC uses either factory calibration settings OR user defined
  99. calibration (trimming) settings (i.e. trimming mode).
  100. (++) The user defined settings can be figured out using self calibration
  101. handled by HAL_DACEx_SelfCalibrate.
  102. (++) HAL_DACEx_SelfCalibrate:
  103. (+++) Runs automatically the calibration.
  104. (+++) Enables the user trimming mode
  105. (+++) Updates a structure with trimming values with fresh calibration
  106. results.
  107. The user may store the calibration results for larger
  108. (ex monitoring the trimming as a function of temperature
  109. for instance)
  110. *** DAC wave generation feature ***
  111. ===================================
  112. [..]
  113. Both DAC channels can be used to generate:
  114. (#) Noise wave
  115. (#) Triangle wave
  116. *** DAC data format ***
  117. =======================
  118. [..]
  119. The DAC data format can be:
  120. (#) 8-bit right alignment using DAC_ALIGN_8B_R
  121. (#) 12-bit left alignment using DAC_ALIGN_12B_L
  122. (#) 12-bit right alignment using DAC_ALIGN_12B_R
  123. *** DAC data value to voltage correspondence ***
  124. ================================================
  125. [..]
  126. The analog output voltage on each DAC channel pin is determined
  127. by the following equation:
  128. [..]
  129. DAC_OUTx = VREF+ * DOR / 4095
  130. (+) with DOR is the Data Output Register
  131. [..]
  132. VREF+ is the input voltage reference (refer to the device datasheet)
  133. [..]
  134. e.g. To set DAC_OUT1 to 0.7V:
  135. (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
  136. *** DMA requests ***
  137. =====================
  138. [..]
  139. A DMA request can be generated when an external trigger (but not
  140. a software trigger) occurs if DMA requests are enabled using
  141. HAL_DAC_Start_DMA().
  142. DMA requests are mapped as following:
  143. (#) DAC channel1: mapped on DMA_REQUEST_DAC1
  144. (#) DAC channel2: mapped on DMA_REQUEST_DAC2
  145. [..]
  146. -@- For Dual mode and specific signal (Triangle and noise) generation please
  147. refer to Extended Features Driver description
  148. ##### How to use this driver #####
  149. ==============================================================================
  150. [..]
  151. (+) DAC APB clock must be enabled to get write access to DAC
  152. registers using HAL_DAC_Init()
  153. (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
  154. (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
  155. (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
  156. *** Calibration mode IO operation ***
  157. ======================================
  158. [..]
  159. (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
  160. (+) Run the calibration using HAL_DACEx_SelfCalibrate()
  161. (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
  162. *** Polling mode IO operation ***
  163. =================================
  164. [..]
  165. (+) Start the DAC peripheral using HAL_DAC_Start()
  166. (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
  167. (+) Stop the DAC peripheral using HAL_DAC_Stop()
  168. *** DMA mode IO operation ***
  169. ==============================
  170. [..]
  171. (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
  172. of data to be transferred at each end of conversion.
  173. (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2()
  174. function is executed and user can add his own code by customization of function pointer
  175. HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2().
  176. (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2()
  177. function is executed and user can add his own code by customization of function pointer
  178. HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2().
  179. (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
  180. add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1.
  181. (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
  182. HAL_DAC_DMAUnderrunCallbackCh1()or HAL_DACEx_DMAUnderrunCallbackCh2()
  183. function is executed and user can add his own code by customization of function pointer
  184. HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()and
  185. add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1().
  186. (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
  187. *** DAC HAL driver macros list ***
  188. =============================================
  189. [..]
  190. Below the list of most used macros in DAC HAL driver.
  191. (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
  192. (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
  193. (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
  194. (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
  195. [..]
  196. (@) You can refer to the DAC HAL driver header file for more useful macros
  197. @endverbatim
  198. ******************************************************************************
  199. * @attention
  200. *
  201. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  202. *
  203. * Redistribution and use in source and binary forms, with or without modification,
  204. * are permitted provided that the following conditions are met:
  205. * 1. Redistributions of source code must retain the above copyright notice,
  206. * this list of conditions and the following disclaimer.
  207. * 2. Redistributions in binary form must reproduce the above copyright notice,
  208. * this list of conditions and the following disclaimer in the documentation
  209. * and/or other materials provided with the distribution.
  210. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  211. * may be used to endorse or promote products derived from this software
  212. * without specific prior written permission.
  213. *
  214. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  215. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  216. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  217. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  218. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  219. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  220. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  221. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  222. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  223. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  224. *
  225. ******************************************************************************
  226. */
  227. /* Includes ------------------------------------------------------------------*/
  228. #include "stm32h7xx_hal.h"
  229. /** @addtogroup STM32H7xx_HAL_Driver
  230. * @{
  231. */
  232. /** @defgroup DAC DAC
  233. * @brief DAC driver modules
  234. * @{
  235. */
  236. #ifdef HAL_DAC_MODULE_ENABLED
  237. /* Private typedef -----------------------------------------------------------*/
  238. /* Private define ------------------------------------------------------------*/
  239. /* Private constants ---------------------------------------------------------*/
  240. /** @addtogroup DAC_Private_Constants DAC Private Constants
  241. * @{
  242. */
  243. #define TIMEOUT_DAC_CALIBCONFIG ((uint32_t)1) /* 1ms */
  244. /* Private macro -------------------------------------------------------------*/
  245. /* Private variables ---------------------------------------------------------*/
  246. /* Private function prototypes -----------------------------------------------*/
  247. /** @defgroup DAC_Private_Functions DAC Private Functions
  248. * @{
  249. */
  250. static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
  251. static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
  252. static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
  253. /**
  254. * @}
  255. */
  256. /* Exported functions ---------------------------------------------------------*/
  257. /** @defgroup DAC_Exported_Functions DAC Exported Functions
  258. * @{
  259. */
  260. /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
  261. * @brief Initialization and Configuration functions
  262. *
  263. @verbatim
  264. ==============================================================================
  265. ##### Initialization and de-initialization functions #####
  266. ==============================================================================
  267. [..] This section provides functions allowing to:
  268. (+) Initialize and configure the DAC.
  269. (+) De-initialize the DAC.
  270. @endverbatim
  271. * @{
  272. */
  273. /**
  274. * @brief Initialize the DAC peripheral according to the specified parameters
  275. * in the DAC_InitStruct and initialize the associated handle.
  276. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  277. * the configuration information for the specified DAC.
  278. * @retval HAL status
  279. */
  280. HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
  281. {
  282. /* Check DAC handle */
  283. if(hdac == NULL)
  284. {
  285. return HAL_ERROR;
  286. }
  287. /* Check the parameters */
  288. assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
  289. if(hdac->State == HAL_DAC_STATE_RESET)
  290. {
  291. /* Allocate lock resource and initialize it */
  292. hdac->Lock = HAL_UNLOCKED;
  293. /* Init the low level hardware */
  294. HAL_DAC_MspInit(hdac);
  295. }
  296. /* Initialize the DAC state*/
  297. hdac->State = HAL_DAC_STATE_BUSY;
  298. /* Set DAC error code to none */
  299. hdac->ErrorCode = HAL_DAC_ERROR_NONE;
  300. /* Initialize the DAC state*/
  301. hdac->State = HAL_DAC_STATE_READY;
  302. /* Return function status */
  303. return HAL_OK;
  304. }
  305. /**
  306. * @brief Deinitialize the DAC peripheral registers to their default reset values.
  307. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  308. * the configuration information for the specified DAC.
  309. * @retval HAL status
  310. */
  311. HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
  312. {
  313. /* Check DAC handle */
  314. if(hdac == NULL)
  315. {
  316. return HAL_ERROR;
  317. }
  318. /* Check the parameters */
  319. assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
  320. /* Change DAC state */
  321. hdac->State = HAL_DAC_STATE_BUSY;
  322. /* DeInit the low level hardware */
  323. HAL_DAC_MspDeInit(hdac);
  324. /* Set DAC error code to none */
  325. hdac->ErrorCode = HAL_DAC_ERROR_NONE;
  326. /* Change DAC state */
  327. hdac->State = HAL_DAC_STATE_RESET;
  328. /* Release Lock */
  329. __HAL_UNLOCK(hdac);
  330. /* Return function status */
  331. return HAL_OK;
  332. }
  333. /**
  334. * @brief Initialize the DAC MSP.
  335. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  336. * the configuration information for the specified DAC.
  337. * @retval None
  338. */
  339. __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
  340. {
  341. /* Prevent unused argument(s) compilation warning */
  342. UNUSED(hdac);
  343. /* NOTE : This function should not be modified, when the callback is needed,
  344. the HAL_DAC_MspInit could be implemented in the user file
  345. */
  346. }
  347. /**
  348. * @brief DeInitialize the DAC MSP.
  349. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  350. * the configuration information for the specified DAC.
  351. * @retval None
  352. */
  353. __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
  354. {
  355. /* Prevent unused argument(s) compilation warning */
  356. UNUSED(hdac);
  357. /* NOTE : This function should not be modified, when the callback is needed,
  358. the HAL_DAC_MspDeInit could be implemented in the user file
  359. */
  360. }
  361. /**
  362. * @}
  363. */
  364. /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
  365. * @brief IO operation functions
  366. *
  367. @verbatim
  368. ==============================================================================
  369. ##### IO operation functions #####
  370. ==============================================================================
  371. [..] This section provides functions allowing to:
  372. (+) Start conversion.
  373. (+) Stop conversion.
  374. (+) Start conversion and enable DMA transfer.
  375. (+) Stop conversion and disable DMA transfer.
  376. (+) Set the specified data holding register value for DAC channel.
  377. @endverbatim
  378. * @{
  379. */
  380. /**
  381. * @brief Enable DAC and start conversion of channel.
  382. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  383. * the configuration information for the specified DAC.
  384. * @param Channel: The selected DAC channel.
  385. * This parameter can be one of the following values:
  386. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  387. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  388. * @retval HAL status
  389. */
  390. HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
  391. {
  392. /* Check the parameters */
  393. assert_param(IS_DAC_CHANNEL(Channel));
  394. /* Process locked */
  395. __HAL_LOCK(hdac);
  396. /* Change DAC state */
  397. hdac->State = HAL_DAC_STATE_BUSY;
  398. /* Enable the Peripheral */
  399. __HAL_DAC_ENABLE(hdac, Channel);
  400. if(Channel == DAC_CHANNEL_1)
  401. {
  402. /* Check if software trigger enabled */
  403. if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_CR_TEN1)
  404. {
  405. /* Enable the selected DAC software conversion */
  406. SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
  407. }
  408. }
  409. else
  410. {
  411. /* Check if software trigger enabled */
  412. if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == DAC_CR_TEN2)
  413. {
  414. /* Enable the selected DAC software conversion*/
  415. SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
  416. }
  417. }
  418. /* Change DAC state */
  419. hdac->State = HAL_DAC_STATE_READY;
  420. /* Process unlocked */
  421. __HAL_UNLOCK(hdac);
  422. /* Return function status */
  423. return HAL_OK;
  424. }
  425. /**
  426. * @brief Disable DAC and stop conversion of channel.
  427. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  428. * the configuration information for the specified DAC.
  429. * @param Channel: The selected DAC channel.
  430. * This parameter can be one of the following values:
  431. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  432. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  433. * @retval HAL status
  434. */
  435. HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
  436. {
  437. /* Check the parameters */
  438. assert_param(IS_DAC_CHANNEL(Channel));
  439. /* Disable the Peripheral */
  440. __HAL_DAC_DISABLE(hdac, Channel);
  441. /* Change DAC state */
  442. hdac->State = HAL_DAC_STATE_READY;
  443. /* Return function status */
  444. return HAL_OK;
  445. }
  446. /**
  447. * @brief Enable DAC and start conversion of channel.
  448. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  449. * the configuration information for the specified DAC.
  450. * @param Channel: The selected DAC channel.
  451. * This parameter can be one of the following values:
  452. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  453. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  454. * @param pData: The destination peripheral Buffer address.
  455. * @param Length: The length of data to be transferred from memory to DAC peripheral
  456. * @param Alignment: Specifies the data alignment for DAC channel.
  457. * This parameter can be one of the following values:
  458. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  459. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  460. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  461. * @retval HAL status
  462. */
  463. HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
  464. {
  465. uint32_t tmpreg = 0;
  466. /* Check the parameters */
  467. assert_param(IS_DAC_CHANNEL(Channel));
  468. assert_param(IS_DAC_ALIGN(Alignment));
  469. /* Process locked */
  470. __HAL_LOCK(hdac);
  471. /* Change DAC state */
  472. hdac->State = HAL_DAC_STATE_BUSY;
  473. if(Channel == DAC_CHANNEL_1)
  474. {
  475. /* Set the DMA transfer complete callback for channel1 */
  476. hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
  477. /* Set the DMA half transfer complete callback for channel1 */
  478. hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
  479. /* Set the DMA error callback for channel1 */
  480. hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
  481. /* Enable the selected DAC channel1 DMA request */
  482. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  483. /* Case of use of channel 1 */
  484. switch(Alignment)
  485. {
  486. case DAC_ALIGN_12B_R:
  487. /* Get DHR12R1 address */
  488. tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
  489. break;
  490. case DAC_ALIGN_12B_L:
  491. /* Get DHR12L1 address */
  492. tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
  493. break;
  494. case DAC_ALIGN_8B_R:
  495. /* Get DHR8R1 address */
  496. tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
  497. break;
  498. default:
  499. break;
  500. }
  501. }
  502. else
  503. {
  504. /* Set the DMA transfer complete callback for channel2 */
  505. hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
  506. /* Set the DMA half transfer complete callback for channel2 */
  507. hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
  508. /* Set the DMA error callback for channel2 */
  509. hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
  510. /* Enable the selected DAC channel2 DMA request */
  511. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  512. /* Case of use of channel 2 */
  513. switch(Alignment)
  514. {
  515. case DAC_ALIGN_12B_R:
  516. /* Get DHR12R2 address */
  517. tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
  518. break;
  519. case DAC_ALIGN_12B_L:
  520. /* Get DHR12L2 address */
  521. tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
  522. break;
  523. case DAC_ALIGN_8B_R:
  524. /* Get DHR8R2 address */
  525. tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
  526. break;
  527. default:
  528. break;
  529. }
  530. }
  531. /* Enable the DMA Stream */
  532. if(Channel == DAC_CHANNEL_1)
  533. {
  534. /* Enable the DAC DMA underrun interrupt */
  535. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
  536. /* Enable the DMA Stream */
  537. HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
  538. }
  539. else
  540. {
  541. /* Enable the DAC DMA underrun interrupt */
  542. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
  543. /* Enable the DMA Stream */
  544. HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
  545. }
  546. /* Process Unlocked */
  547. __HAL_UNLOCK(hdac);
  548. /* Enable the Peripheral */
  549. __HAL_DAC_ENABLE(hdac, Channel);
  550. /* Return function status */
  551. return HAL_OK;
  552. }
  553. /**
  554. * @brief Disable DAC and stop conversion of channel.
  555. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  556. * the configuration information for the specified DAC.
  557. * @param Channel: The selected DAC channel.
  558. * This parameter can be one of the following values:
  559. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  560. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  561. * @retval HAL status
  562. */
  563. HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
  564. {
  565. HAL_StatusTypeDef status = HAL_OK;
  566. /* Check the parameters */
  567. assert_param(IS_DAC_CHANNEL(Channel));
  568. /* Disable the selected DAC channel DMA request */
  569. hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel);
  570. /* Disable the Peripheral */
  571. __HAL_DAC_DISABLE(hdac, Channel);
  572. /* Disable the DMA stream */
  573. /* Channel1 is used */
  574. if (Channel == DAC_CHANNEL_1)
  575. {
  576. /* Disable the DMA stream */
  577. status = HAL_DMA_Abort(hdac->DMA_Handle1);
  578. /* Disable the DAC DMA underrun interrupt */
  579. __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
  580. }
  581. else /* Channel2 is used for */
  582. {
  583. /* Disable the DMA stream */
  584. status = HAL_DMA_Abort(hdac->DMA_Handle2);
  585. /* Disable the DAC DMA underrun interrupt */
  586. __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
  587. }
  588. /* Check if DMA Channel effectively disabled */
  589. if (status != HAL_OK)
  590. {
  591. /* Update DAC state machine to error */
  592. hdac->State = HAL_DAC_STATE_ERROR;
  593. }
  594. else
  595. {
  596. /* Change DAC state */
  597. hdac->State = HAL_DAC_STATE_READY;
  598. }
  599. /* Return function status */
  600. return status;
  601. }
  602. /**
  603. * @brief Handle DAC interrupt request
  604. * This function uses the interruption of DMA
  605. * underrun.
  606. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  607. * the configuration information for the specified DAC.
  608. * @retval None
  609. */
  610. void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
  611. {
  612. if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
  613. {
  614. /* Check underrun flag of DAC channel 1 */
  615. if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
  616. {
  617. /* Change DAC state to error state */
  618. hdac->State = HAL_DAC_STATE_ERROR;
  619. /* Set DAC error code to chanel1 DMA underrun error */
  620. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
  621. /* Clear the underrun flag */
  622. __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
  623. /* Disable the selected DAC channel1 DMA request */
  624. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  625. /* Error callback */
  626. HAL_DAC_DMAUnderrunCallbackCh1(hdac);
  627. }
  628. }
  629. if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
  630. {
  631. /* Check underrun flag of DAC channel 1 */
  632. if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
  633. {
  634. /* Change DAC state to error state */
  635. hdac->State = HAL_DAC_STATE_ERROR;
  636. /* Set DAC error code to channel2 DMA underrun error */
  637. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
  638. /* Clear the underrun flag */
  639. __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
  640. /* Disable the selected DAC channel1 DMA request */
  641. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  642. /* Error callback */
  643. HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
  644. }
  645. }
  646. }
  647. /**
  648. * @brief Set the specified data holding register value for DAC channel.
  649. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  650. * the configuration information for the specified DAC.
  651. * @param Channel: The selected DAC channel.
  652. * This parameter can be one of the following values:
  653. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  654. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  655. * @param Alignment: Specifies the data alignment.
  656. * This parameter can be one of the following values:
  657. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  658. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  659. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  660. * @param Data: Data to be loaded in the selected data holding register.
  661. * @retval HAL status
  662. */
  663. HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
  664. {
  665. __IO uint32_t tmp = 0;
  666. /* Check the parameters */
  667. assert_param(IS_DAC_CHANNEL(Channel));
  668. assert_param(IS_DAC_ALIGN(Alignment));
  669. assert_param(IS_DAC_DATA(Data));
  670. tmp = (uint32_t)hdac->Instance;
  671. if(Channel == DAC_CHANNEL_1)
  672. {
  673. tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
  674. }
  675. else
  676. {
  677. tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
  678. }
  679. /* Set the DAC channel selected data holding register */
  680. *(__IO uint32_t *) tmp = Data;
  681. /* Return function status */
  682. return HAL_OK;
  683. }
  684. /**
  685. * @brief Conversion complete callback in non-blocking mode for Channel1
  686. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  687. * the configuration information for the specified DAC.
  688. * @retval None
  689. */
  690. __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
  691. {
  692. /* Prevent unused argument(s) compilation warning */
  693. UNUSED(hdac);
  694. /* NOTE : This function should not be modified, when the callback is needed,
  695. the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
  696. */
  697. }
  698. /**
  699. * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
  700. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  701. * the configuration information for the specified DAC.
  702. * @retval None
  703. */
  704. __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
  705. {
  706. /* Prevent unused argument(s) compilation warning */
  707. UNUSED(hdac);
  708. /* NOTE : This function should not be modified, when the callback is needed,
  709. the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
  710. */
  711. }
  712. /**
  713. * @brief Error DAC callback for Channel1.
  714. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  715. * the configuration information for the specified DAC.
  716. * @retval None
  717. */
  718. __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
  719. {
  720. /* Prevent unused argument(s) compilation warning */
  721. UNUSED(hdac);
  722. /* NOTE : This function should not be modified, when the callback is needed,
  723. the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
  724. */
  725. }
  726. /**
  727. * @brief DMA underrun DAC callback for channel1.
  728. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  729. * the configuration information for the specified DAC.
  730. * @retval None
  731. */
  732. __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
  733. {
  734. /* Prevent unused argument(s) compilation warning */
  735. UNUSED(hdac);
  736. /* NOTE : This function should not be modified, when the callback is needed,
  737. the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
  738. */
  739. }
  740. /**
  741. * @}
  742. */
  743. /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
  744. * @brief Peripheral Control functions
  745. *
  746. @verbatim
  747. ==============================================================================
  748. ##### Peripheral Control functions #####
  749. ==============================================================================
  750. [..] This section provides functions allowing to:
  751. (+) Configure channels.
  752. (+) Get result of conversion.
  753. @endverbatim
  754. * @{
  755. */
  756. /**
  757. * @brief Return the last data output value of the selected DAC channel.
  758. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  759. * the configuration information for the specified DAC.
  760. * @param Channel: The selected DAC channel.
  761. * This parameter can be one of the following values:
  762. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  763. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  764. * @retval The selected DAC channel data output value.
  765. */
  766. uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
  767. {
  768. /* Check the parameters */
  769. assert_param(IS_DAC_CHANNEL(Channel));
  770. /* Returns the DAC channel data output register value */
  771. if(Channel == DAC_CHANNEL_1)
  772. {
  773. return hdac->Instance->DOR1;
  774. }
  775. else
  776. {
  777. return hdac->Instance->DOR2;
  778. }
  779. }
  780. /**
  781. * @brief Configure the selected DAC channel.
  782. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  783. * the configuration information for the specified DAC.
  784. * @param sConfig: DAC configuration structure.
  785. * @param Channel: The selected DAC channel.
  786. * This parameter can be one of the following values:
  787. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  788. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  789. * @retval HAL status
  790. */
  791. HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
  792. {
  793. uint32_t tmpreg1 = 0, tmpreg2 = 0;
  794. uint32_t tickstart = 0;
  795. /* Check the DAC parameters */
  796. assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
  797. assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
  798. assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
  799. assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
  800. if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
  801. {
  802. assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
  803. }
  804. assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
  805. if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
  806. {
  807. assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
  808. assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
  809. assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
  810. }
  811. assert_param(IS_DAC_CHANNEL(Channel));
  812. /* Process locked */
  813. __HAL_LOCK(hdac);
  814. /* Change DAC state */
  815. hdac->State = HAL_DAC_STATE_BUSY;
  816. if(sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
  817. /* Sample on old configuration */
  818. {
  819. /* SampleTime */
  820. if (Channel == DAC_CHANNEL_1)
  821. {
  822. /* Get timeout */
  823. tickstart = HAL_GetTick();
  824. /* SHSR1 can be written when BWST1 equals RESET */
  825. while (((hdac->Instance->SR) & DAC_SR_BWST1)!= RESET)
  826. {
  827. /* Check for the Timeout */
  828. if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
  829. {
  830. /* Update error code */
  831. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
  832. /* Change the DMA state */
  833. hdac->State = HAL_DAC_STATE_TIMEOUT;
  834. return HAL_TIMEOUT;
  835. }
  836. }
  837. HAL_Delay(1);
  838. hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
  839. }
  840. else /* Channel 2 */
  841. {
  842. /* SHSR2 can be written when BWST2 equals RESET */
  843. while (((hdac->Instance->SR) & DAC_SR_BWST2)!= RESET)
  844. {
  845. /* Check for the Timeout */
  846. if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
  847. {
  848. /* Update error code */
  849. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
  850. /* Change the DMA state */
  851. hdac->State = HAL_DAC_STATE_TIMEOUT;
  852. return HAL_TIMEOUT;
  853. }
  854. }
  855. HAL_Delay(1);
  856. hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
  857. }
  858. /* HoldTime */
  859. hdac->Instance->SHHR = (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime)<<Channel;
  860. /* RefreshTime */
  861. hdac->Instance->SHRR = (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime)<<Channel;
  862. }
  863. if(sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
  864. /* USER TRIMMING */
  865. {
  866. /* Get the DAC CCR value */
  867. tmpreg1 = hdac->Instance->CCR;
  868. /* Clear trimming value */
  869. tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << Channel);
  870. /* Configure for the selected trimming offset */
  871. tmpreg2 = sConfig->DAC_TrimmingValue;
  872. /* Calculate CCR register value depending on DAC_Channel */
  873. tmpreg1 |= tmpreg2 << Channel;
  874. /* Write to DAC CCR */
  875. hdac->Instance->CCR = tmpreg1;
  876. }
  877. /* else factory trimming is used (factory setting are available at reset)*/
  878. /* SW Nothing has nothing to do */
  879. /* Get the DAC MCR value */
  880. tmpreg1 = hdac->Instance->MCR;
  881. /* Clear DAC_MCR_MODE2_0, DAC_MCR_MODE2_1 and DAC_MCR_MODE2_2 bits */
  882. tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << Channel);
  883. /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
  884. tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
  885. /* Calculate MCR register value depending on DAC_Channel */
  886. tmpreg1 |= tmpreg2 << Channel;
  887. /* Write to DAC MCR */
  888. hdac->Instance->MCR = tmpreg1;
  889. /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
  890. CLEAR_BIT (hdac->Instance->CR, DAC_CR_CEN1 << Channel);
  891. /* Get the DAC CR value */
  892. tmpreg1 = hdac->Instance->CR;
  893. /* Clear TENx, TSELx, WAVEx and MAMPx bits */
  894. tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << Channel);
  895. /* Configure for the selected DAC channel: trigger */
  896. /* Set TSELx and TENx bits according to DAC_Trigger value */
  897. tmpreg2 = (sConfig->DAC_Trigger);
  898. /* Calculate CR register value depending on DAC_Channel */
  899. tmpreg1 |= tmpreg2 << Channel;
  900. /* Write to DAC CR */
  901. hdac->Instance->CR = tmpreg1;
  902. /* Disable wave generation */
  903. hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
  904. /* Change DAC state */
  905. hdac->State = HAL_DAC_STATE_READY;
  906. /* Process unlocked */
  907. __HAL_UNLOCK(hdac);
  908. /* Return function status */
  909. return HAL_OK;
  910. }
  911. /**
  912. * @}
  913. */
  914. /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
  915. * @brief Peripheral State and Errors functions
  916. *
  917. @verbatim
  918. ==============================================================================
  919. ##### Peripheral State and Errors functions #####
  920. ==============================================================================
  921. [..]
  922. This subsection provides functions allowing to
  923. (+) Check the DAC state.
  924. (+) Check the DAC Errors.
  925. @endverbatim
  926. * @{
  927. */
  928. /**
  929. * @brief return the DAC handle state
  930. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  931. * the configuration information for the specified DAC.
  932. * @retval HAL state
  933. */
  934. HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
  935. {
  936. /* Return DAC handle state */
  937. return hdac->State;
  938. }
  939. /**
  940. * @brief Return the DAC error code
  941. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  942. * the configuration information for the specified DAC.
  943. * @retval DAC Error Code
  944. */
  945. uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
  946. {
  947. return hdac->ErrorCode;
  948. }
  949. /**
  950. * @}
  951. */
  952. /**
  953. * @}
  954. */
  955. /** @addtogroup DAC_Private_Functions
  956. * @{
  957. */
  958. /**
  959. * @brief DMA conversion complete callback.
  960. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  961. * the configuration information for the specified DMA module.
  962. * @retval None
  963. */
  964. static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
  965. {
  966. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  967. HAL_DAC_ConvCpltCallbackCh1(hdac);
  968. hdac->State= HAL_DAC_STATE_READY;
  969. }
  970. /**
  971. * @brief DMA half transfer complete callback.
  972. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  973. * the configuration information for the specified DMA module.
  974. * @retval None
  975. */
  976. static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
  977. {
  978. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  979. /* Conversion complete callback */
  980. HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
  981. }
  982. /**
  983. * @brief DMA error callback
  984. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  985. * the configuration information for the specified DMA module.
  986. * @retval None
  987. */
  988. static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
  989. {
  990. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  991. /* Set DAC error code to DMA error */
  992. hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
  993. HAL_DAC_ErrorCallbackCh1(hdac);
  994. hdac->State= HAL_DAC_STATE_READY;
  995. }
  996. /**
  997. * @}
  998. */
  999. /**
  1000. * @}
  1001. */
  1002. #endif /* HAL_DAC_MODULE_ENABLED */
  1003. /**
  1004. * @}
  1005. */
  1006. /**
  1007. * @}
  1008. */
  1009. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/