stm32h7xx_hal_hrtim.c 280 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838
  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_hrtim.c
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 21-April-2017
  7. * @brief HRTIM HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the High Resolution Timer (HRTIM) peripheral:
  10. * + HRTIM Initialization
  11. * + Timer Time Base Unit Configuration
  12. * + Simple Time Base Start/Stop
  13. * + Simple Time Base Start/Stop Interrupt
  14. * + Simple Time Base Start/Stop DMA Request
  15. * + Simple Output Compare/PWM Channel Configuration
  16. * + Simple Output Compare/PWM Channel Start/Stop Interrupt
  17. * + Simple Output Compare/PWM Channel Start/Stop DMA Request
  18. * + Simple Input Capture Channel Configuration
  19. * + Simple Input Capture Channel Start/Stop Interrupt
  20. * + Simple Input Capture Channel Start/Stop DMA Request
  21. * + Simple One Pulse Channel Configuration
  22. * + Simple One Pulse Channel Start/Stop Interrupt
  23. * + HRTIM External Synchronization Configuration
  24. * + HRTIM Burst Mode Controller Configuration
  25. * + HRTIM Burst Mode Controller Enabling
  26. * + HRTIM External Events Conditioning Configuration
  27. * + HRTIM Faults Conditioning Configuration
  28. * + HRTIM Faults Enabling
  29. * + HRTIM ADC trigger Configuration
  30. * + Waveform Timer Configuration
  31. * + Waveform Event Filtering Configuration
  32. * + Waveform Dead Time Insertion Configuration
  33. * + Waveform Chopper Mode Configuration
  34. * + Waveform Compare Unit Configuration
  35. * + Waveform Capture Unit Configuration
  36. * + Waveform Output Configuration
  37. * + Waveform Counter Start/Stop
  38. * + Waveform Counter Start/Stop Interrupt
  39. * + Waveform Counter Start/Stop DMA Request
  40. * + Waveform Output Enabling
  41. * + Waveform Output Level Set/Get
  42. * + Waveform Output State Get
  43. * + Waveform Burst DMA Operation Configuration
  44. * + Waveform Burst DMA Operation Start
  45. * + Waveform Timer Counter Software Reset
  46. * + Waveform Capture Software Trigger
  47. * + Waveform Burst Mode Controller Software Trigger
  48. * + Waveform Timer Pre-loadable Registers Update Enabling
  49. * + Waveform Timer Pre-loadable Registers Software Update
  50. * + Waveform Timer Delayed Protection Status Get
  51. * + Waveform Timer Burst Status Get
  52. * + Waveform Timer Push-Pull Status Get
  53. * + Peripheral State Get
  54. @verbatim
  55. ==============================================================================
  56. ##### Simple mode v.s. waveform mode #####
  57. ==============================================================================
  58. [..] The HRTIM HAL API is split into 2 categories:
  59. (#)Simple functions: these functions allow for using a HRTIM timer as a
  60. general purpose timer with high resolution capabilities.
  61. Following simple modes are proposed:
  62. (+)Output compare mode
  63. (+)PWM output mode
  64. (+)Input capture mode
  65. (+)One pulse mode
  66. HRTIM simple modes are managed through the set of functions named
  67. HAL_HRTIM_Simple<Function>. These functions are similar in name and usage
  68. to the one defined for the TIM peripheral. When a HRTIM timer operates in
  69. simple mode, only a very limited set of HRTIM features are used.
  70. (#)Waveform functions: These functions allow taking advantage of the HRTIM
  71. flexibility to produce numerous types of control signal. When a HRTIM timer
  72. operates in waveform mode, all the HRTIM features are accessible without
  73. any restriction. HRTIM waveform modes are managed through the set of
  74. functions named HAL_HRTIM_Waveform<Function>
  75. ==============================================================================
  76. ##### How to use this driver #####
  77. ==============================================================================
  78. [..]
  79. (#)Initialize the HRTIM low level resources by implementing the
  80. HAL_HRTIM_MspInit() function:
  81. (##)Enable the HRTIM clock source using __HRTIMx_CLK_ENABLE()
  82. (##)Connect HRTIM pins to MCU I/Os
  83. (+++) Enable the clock for the HRTIM GPIOs using the following
  84. function: __GPIOx_CLK_ENABLE()
  85. (+++) Configure these GPIO pins in Alternate Function mode using
  86. HAL_GPIO_Init()
  87. (##)When using DMA to control data transfer (e.g HAL_HRTIM_SimpleBaseStart_DMA())
  88. (+++)Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
  89. (+++)Initialize the DMA handle
  90. (+++)Associate the initialized DMA handle to the appropriate DMA
  91. handle of the HRTIM handle using __HAL_LINKDMA()
  92. (+++)Initialize the DMA channel using HAL_DMA_Init()
  93. (+++)Configure the priority and enable the NVIC for the transfer
  94. complete interrupt on the DMA channel using HAL_NVIC_SetPriority()
  95. and HAL_NVIC_EnableIRQ()
  96. (##)In case of using interrupt mode (e.g HAL_HRTIM_SimpleBaseStart_IT())
  97. (+++)Configure the priority and enable the NVIC for the concerned
  98. HRTIM interrupt using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
  99. (#)Initialize the HRTIM HAL using HAL_HRTIM_Init(). The HRTIM configuration
  100. structure (field of the HRTIM handle) specifies which global interrupt of
  101. whole HRTIM must be enabled (Burst mode period, System fault, Faults).
  102. It also contains the HRTIM external synchronization configuration. HRTIM
  103. can act as a master (generating a synchronization signal) or as a slave
  104. (waiting for a trigger to be synchronized).
  105. (#) Configure HRTIM resources shared by all HRTIM timers
  106. (##)Burst Mode Controller:
  107. (+++)HAL_HRTIM_BurstModeConfig(): configures the HRTIM burst mode
  108. controller: operating mode (continuous or -shot mode), clock
  109. (source, prescaler) , trigger(s), period, idle duration.
  110. (##)External Events Conditionning:
  111. (+++)HAL_HRTIM_EventConfig(): configures the conditioning of an
  112. external event channel: source, polarity, edge-sensitivity.
  113. External event can be used as triggers (timer reset, input
  114. capture, burst mode, ADC triggers, delayed protection, …)
  115. They can also be used to set or reset timer outputs. Up to
  116. 10 event channels are available.
  117. (+++)HAL_HRTIM_EventPrescalerConfig(): configures the external
  118. event sampling clock (used for digital filtering).
  119. (##)Fault Conditionning:
  120. (+++)HAL_HRTIM_FaultConfig(): configures the conditioning of a
  121. fault channel: source, polarity, edge-sensitivity. Fault
  122. channels are used to disable the outputs in case of an
  123. abnormal operation. Up to 5 fault channels are available.
  124. (+++)HAL_HRTIM_FaultPrescalerConfig(): configures the fault
  125. sampling clock (used for digital filtering).
  126. (+++)HAL_HRTIM_FaultModeCtl(): Enables or disables fault input(s)
  127. circuitry. By default all fault inputs are disabled.
  128. (##)ADC trigger:
  129. (+++)HAL_HRTIM_ADCTriggerConfig(): configures the source triggering
  130. the update of the ADC trigger register and the ADC trigger.
  131. 4 independent triggers are available to start both the regular
  132. and the injected sequencers of the 2 ADCs
  133. (#) Configure HRTIM timer time base using HAL_HRTIM_TimeBaseConfig(). This
  134. function must be called whatever the HRTIM timer operating mode is
  135. (simple v.s. waveform). It configures mainly:
  136. (##)The HRTIM timer counter operating mode (continuous, one shot)
  137. (##)The HRTIM timer clock prescaler
  138. (##)The HRTIM timer period
  139. (##)The HRTIM timer repetition counter
  140. (#) If the HRTIM timer operates in simple mode:
  141. (##)Simple time base: HAL_HRTIM_SimpleBaseStart(),HAL_HRTIM_SimpleBaseStop(),
  142. HAL_HRTIM_SimpleBaseStart_IT(),HAL_HRTIM_SimpleBaseStop_IT(),
  143. HAL_HRTIM_SimpleBaseStart_DMA(),HAL_HRTIM_SimpleBaseStop_DMA().
  144. (##)Simple output compare: HAL_HRTIM_SimpleOCChannelConfig(),
  145. HAL_HRTIM_SimpleOCStart(),HAL_HRTIM_SimpleOCStop(),
  146. HAL_HRTIM_SimpleOCStart_IT(),HAL_HRTIM_SimpleOCStop_IT(),
  147. HAL_HRTIM_SimpleOCStart_DMA(),HAL_HRTIM_SimpleOCStop_DMA(),
  148. (##)Simple PWM output: HAL_HRTIM_SimplePWMChannelConfig(),
  149. HAL_HRTIM_SimplePWMStart(),HAL_HRTIM_SimplePWMStop(),
  150. HAL_HRTIM_SimplePWMStart_IT(),HAL_HRTIM_SimplePWMStop_IT(),
  151. HAL_HRTIM_SimplePWMStart_DMA(),HAL_HRTIM_SimplePWMStop_DMA(),
  152. (##)Simple input capture: HAL_HRTIM_SimpleCaptureChannelConfig(),
  153. HAL_HRTIM_SimpleCaptureStart(),HAL_HRTIM_SimpleCaptureStop(),
  154. HAL_HRTIM_SimpleCaptureStart_IT(),HAL_HRTIM_SimpleCaptureStop_IT(),
  155. HAL_HRTIM_SimpleCaptureStart_DMA(),HAL_HRTIM_SimpleCaptureStop_DMA().
  156. (##)Simple one pulse: HAL_HRTIM_SimpleOnePulseChannelConfig(),
  157. HAL_HRTIM_SimpleOnePulseStart(),HAL_HRTIM_SimpleOnePulseStop(),
  158. HAL_HRTIM_SimpleOnePulseStart_IT(),HAL_HRTIM_SimpleOnePulseStop_It().
  159. (#) If the HRTIM timer operates in waveform mode:
  160. (##)Completes waveform timer configuration
  161. (+++)HAL_HRTIM_WaveformTimerConfig(): configuration of a HRTIM
  162. timer operating in wave form mode mainly consists in:
  163. - Enabling the HRTIM timer interrupts and DMA requests,
  164. - Enabling the half mode for the HRTIM timer,
  165. - Defining how the HRTIM timer reacts to external
  166. synchronization input,
  167. - Enabling the push-pull mode for the HRTIM timer,
  168. - Enabling the fault channels for the HRTIM timer,
  169. - Enabling the deadtime insertion for the HRTIM timer,
  170. - Setting the delayed protection mode for the HRTIM timer
  171. (source and outputs on which the delayed protection are applied),
  172. - Specifying the HRTIM timer update and reset triggers,
  173. - Specifying the HRTIM timer registers update policy (preload enabling, …).
  174. (+++)HAL_HRTIM_TimerEventFilteringConfig(): configures external
  175. event blanking and windowingcircuitry of a HRTIM timer:
  176. - Blanking: to mask external events during a defined
  177. time period
  178. - Windowing: to enable external events only during
  179. a defined time period
  180. (+++)HAL_HRTIM_DeadTimeConfig(): configures the deadtime insertion
  181. unit for a HRTIM timer. Allows to generate a couple of
  182. complementary signals from a single reference waveform,
  183. with programmable delays between active state.
  184. (+++)HAL_HRTIM_ChopperModeConfig(): configures the parameters of
  185. the high-frequency carrier signal added on top of the timing
  186. unit output. Chopper mode can be enabled or disabled for each
  187. timer output separately (see HAL_HRTIM_WaveformOutputConfig()).
  188. (+++)HAL_HRTIM_BurstDMAConfig(): configures the burst DMA burst
  189. controller. Allows having multiple HRTIM registers updated
  190. with a single DMA request. The burst DMA operation is started
  191. by calling HAL_HRTIM_BurstDMATransfer().
  192. (+++)HAL_HRTIM_WaveformCompareConfig():configures the compare unit
  193. of a HRTIM timer. This operation consists in setting the
  194. compare value and possibly specifying the auto delayed mode
  195. for compare units 2 and 4 (allows to have compare events
  196. generated relatively to capture events). Note that when auto
  197. delayed mode is needed, the capture unit associated to the
  198. compare unit must be configured separately.
  199. (+++)HAL_HRTIM_WaveformCaptureConfig(): configures the capture unit
  200. of a HRTIM timer. This operation consists in specifying the
  201. source(s) triggering the capture (timer register update event,
  202. external event, timer output set/reset event, other HRTIM
  203. timer related events).
  204. (+++)HAL_HRTIM_WaveformOutputConfig(): configuration HRTIM timer
  205. output manly consists in:
  206. - Setting the output polarity (active high or active low),
  207. - Defining the set/reset crossbar for the output,
  208. - Specifying the fault level (active or inactive) in IDLE
  209. and FAULT states.,
  210. (##)Set waveform timer output(s) level
  211. (+++)HAL_HRTIM_WaveformSetOutputLevel(): forces the output to its
  212. active or inactive level. For example, when deadtime insertion
  213. is enabled it is necessary to force the output level by software
  214. to have the outputs in a complementary state as soon as the RUN mode is entered.
  215. (##)Enable/Disable waveform timer output(s)
  216. (+++)HAL_HRTIM_WaveformOutputStart(),HAL_HRTIM_WaveformOutputStop().
  217. (##)Start/Stop waveform HRTIM timer(s).
  218. (+++)HAL_HRTIM_WaveformCounterStart(),HAL_HRTIM_WaveformCounterStop(),
  219. (+++)HAL_HRTIM_WaveformCounterStart_IT(),HAL_HRTIM_WaveformCounterStop_IT(),
  220. (+++)HAL_HRTIM_WaveformCounterStart()_DMA,HAL_HRTIM_WaveformCounterStop_DMA(),
  221. (##)Burst mode controller enabling:
  222. (+++)HAL_HRTIM_BurstModeCtl(): activates or de-activates the
  223. burst mode controller.
  224. (##)Some HRTIM operations can be triggered by software:
  225. (+++)HAL_HRTIM_BurstModeSoftwareTrigger(): calling this function
  226. trigs the burst operation.
  227. (+++)HAL_HRTIM_SoftwareCapture(): calling this function trigs the
  228. capture of the HRTIM timer counter.
  229. (+++)HAL_HRTIM_SoftwareUpdate(): calling this function trigs the
  230. update of the pre-loadable registers of the HRTIM timer ()
  231. (+++)HAL_HRTIM_SoftwareReset():calling this function resets the
  232. HRTIM timer counter.
  233. (##)Some functions can be used anytime to retrieve HRTIM timer related
  234. information
  235. (+++)HAL_HRTIM_GetCapturedValue(): returns actual value of the
  236. capture register of the designated capture unit.
  237. (+++)HAL_HRTIM_WaveformGetOutputLevel(): returns actual level
  238. (ACTIVE/INACTIVE) of the designated timer output.
  239. (+++)HAL_HRTIM_WaveformGetOutputState():returns actual state
  240. (IDLE/RUN/FAULT) of the designated timer output.
  241. (+++)HAL_HRTIM_GetDelayedProtectionStatus():returns actual level
  242. (ACTIVE/INACTIVE) of the designated output when the delayed
  243. protection was triggered.
  244. (+++)HAL_HRTIM_GetBurstStatus(): returns the actual status
  245. (ACTIVE/INACTIVE) of the burst mode controller.
  246. (+++)HAL_HRTIM_GetCurrentPushPullStatus(): when the push-pull mode
  247. is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
  248. the push-pull indicates on which output the signal is currently
  249. active (e.g signal applied on output 1 and output 2 forced
  250. inactive or vice versa).
  251. (+++)HAL_HRTIM_GetIdlePushPullStatus(): when the push-pull mode
  252. is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
  253. the idle push-pull status indicates during which period the
  254. delayed protection request occurred (e.g. protection occurred
  255. when the output 1 was active and output 2 forced inactive or
  256. vice versa).
  257. (##)Some functions can be used anytime to retrieve actual HRTIM status
  258. (+++)HAL_HRTIM_GetState(): returns actual HRTIM instance HAL state.
  259. @endverbatim
  260. ******************************************************************************
  261. * @attention
  262. *
  263. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  264. *
  265. * Redistribution and use in source and binary forms, with or without modification,
  266. * are permitted provided that the following conditions are met:
  267. * 1. Redistributions of source code must retain the above copyright notice,
  268. * this list of conditions and the following disclaimer.
  269. * 2. Redistributions in binary form must reproduce the above copyright notice,
  270. * this list of conditions and the following disclaimer in the documentation
  271. * and/or other materials provided with the distribution.
  272. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  273. * may be used to endorse or promote products derived from this software
  274. * without specific prior written permission.
  275. *
  276. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  277. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  278. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  279. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  280. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  281. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  282. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  283. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  284. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  285. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  286. *
  287. ******************************************************************************
  288. */
  289. /* Includes ------------------------------------------------------------------*/
  290. #include "stm32h7xx_hal.h"
  291. /** @addtogroup STM32H7xx_HAL_Driver
  292. * @{
  293. */
  294. #ifdef HAL_HRTIM_MODULE_ENABLED
  295. /** @defgroup HRTIM HRTIM
  296. * @brief HRTIM HAL module driver
  297. * @{
  298. */
  299. /* Private typedef -----------------------------------------------------------*/
  300. /* Private define ------------------------------------------------------------*/
  301. /** @defgroup HRTIM_Private_Defines HRTIM Private Define
  302. * @{
  303. */
  304. #define HRTIM_FLTR_FLTxEN (HRTIM_FLTR_FLT1EN |\
  305. HRTIM_FLTR_FLT2EN |\
  306. HRTIM_FLTR_FLT3EN |\
  307. HRTIM_FLTR_FLT4EN | \
  308. HRTIM_FLTR_FLT5EN)
  309. #define HRTIM_TIMCR_TIMUPDATETRIGGER (HRTIM_TIMUPDATETRIGGER_MASTER |\
  310. HRTIM_TIMUPDATETRIGGER_TIMER_A |\
  311. HRTIM_TIMUPDATETRIGGER_TIMER_B |\
  312. HRTIM_TIMUPDATETRIGGER_TIMER_C |\
  313. HRTIM_TIMUPDATETRIGGER_TIMER_D |\
  314. HRTIM_TIMUPDATETRIGGER_TIMER_E)
  315. /**
  316. * @}
  317. */
  318. /* Private macro -------------------------------------------------------------*/
  319. /* Private variables ---------------------------------------------------------*/
  320. /** @defgroup HRTIM_Private_Variables HRTIM Private Variables
  321. * @{
  322. */
  323. static uint32_t TimerIdxToTimerId[] =
  324. {
  325. HRTIM_TIMERID_TIMER_A,
  326. HRTIM_TIMERID_TIMER_B,
  327. HRTIM_TIMERID_TIMER_C,
  328. HRTIM_TIMERID_TIMER_D,
  329. HRTIM_TIMERID_TIMER_E,
  330. HRTIM_TIMERID_MASTER,
  331. };
  332. /**
  333. * @}
  334. */
  335. /* Private function prototypes -----------------------------------------------*/
  336. /** @defgroup HRTIM_Private_Functions HRTIM Private Functions
  337. * @{
  338. */
  339. static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
  340. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
  341. static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
  342. uint32_t TimerIdx,
  343. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
  344. static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  345. HRTIM_TimerCfgTypeDef * pTimerCfg);
  346. static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  347. uint32_t TimerIdx,
  348. HRTIM_TimerCfgTypeDef * pTimerCfg);
  349. static void HRTIM_CompareUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  350. uint32_t TimerIdx,
  351. uint32_t CompareUnit,
  352. HRTIM_CompareCfgTypeDef * pCompareCfg);
  353. static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  354. uint32_t TimerIdx,
  355. uint32_t CaptureUnit,
  356. uint32_t Event);
  357. static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
  358. uint32_t TimerIdx,
  359. uint32_t Output,
  360. HRTIM_OutputCfgTypeDef * pOutputCfg);
  361. static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
  362. uint32_t Event,
  363. HRTIM_EventCfgTypeDef * pEventCfg);
  364. static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
  365. uint32_t TimerIdx,
  366. uint32_t Event);
  367. static uint32_t HRTIM_GetITFromOCMode(HRTIM_HandleTypeDef * hhrtim,
  368. uint32_t TimerIdx,
  369. uint32_t OCChannel);
  370. static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim,
  371. uint32_t TimerIdx,
  372. uint32_t OCChannel);
  373. static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim,
  374. uint32_t TimerIdx);
  375. static uint32_t GetTimerIdxFromDMAHandle(DMA_HandleTypeDef *hdma);
  376. static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
  377. uint32_t TimerIdx);
  378. static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim);
  379. static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim);
  380. static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
  381. uint32_t TimerIdx);
  382. static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma);
  383. static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma);
  384. static void HRTIM_DMAError(DMA_HandleTypeDef *hdma);
  385. static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma);
  386. /**
  387. * @}
  388. */
  389. /* Exported functions ---------------------------------------------------------*/
  390. /** @defgroup HRTIM_Exported_Functions HRTIM Exported Functions
  391. * @{
  392. */
  393. /** @defgroup HRTIM_Exported_Functions_Group1 Initialization and de-initialization functions
  394. * @brief Initialization and Configuration functions
  395. *
  396. @verbatim
  397. ===============================================================================
  398. ##### Initialization and Time Base Configuration functions #####
  399. ===============================================================================
  400. [..] This section provides functions allowing to:
  401. (+) Initialize a HRTIM instance
  402. (+) De-initialize a HRTIM instance
  403. (+) Initialize the HRTIM MSP
  404. (+) De-initialize the HRTIM MSP
  405. (+) Configure the time base unit of a HRTIM timer
  406. @endverbatim
  407. * @{
  408. */
  409. /**
  410. * @brief Initializes a HRTIM instance
  411. * @param hhrtim: pointer to HAL HRTIM handle
  412. * @retval HAL status
  413. */
  414. HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
  415. {
  416. uint8_t timer_idx;
  417. uint32_t hrtim_mcr;
  418. /* Check the HRTIM handle allocation */
  419. if(hhrtim == NULL)
  420. {
  421. return HAL_ERROR;
  422. }
  423. /* Check the parameters */
  424. assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
  425. assert_param(IS_HRTIM_IT(hhrtim->Init.HRTIMInterruptResquests));
  426. /* Set the HRTIM state */
  427. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  428. /* Initialize the DMA handles */
  429. hhrtim->hdmaMaster = (DMA_HandleTypeDef *)NULL;
  430. hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)NULL;
  431. hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)NULL;
  432. hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)NULL;
  433. hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)NULL;
  434. hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)NULL;
  435. /* HRTIM output synchronization configuration (if required) */
  436. if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_MASTER) != RESET)
  437. {
  438. /* Check parameters */
  439. assert_param(IS_HRTIM_SYNCOUTPUTSOURCE(hhrtim->Init.SyncOutputSource));
  440. assert_param(IS_HRTIM_SYNCOUTPUTPOLARITY(hhrtim->Init.SyncOutputPolarity));
  441. /* The synchronization output initialization procedure must be done prior
  442. to the configuration of the MCU outputs (done within HAL_HRTIM_MspInit)
  443. */
  444. if (hhrtim->Instance == HRTIM1)
  445. {
  446. /* Enable the HRTIM peripheral clock */
  447. __HAL_RCC_HRTIM1_CLK_ENABLE();
  448. }
  449. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  450. /* Set the event to be sent on the synchronization output */
  451. hrtim_mcr &= ~(HRTIM_MCR_SYNC_SRC);
  452. hrtim_mcr |= (hhrtim->Init.SyncOutputSource & HRTIM_MCR_SYNC_SRC);
  453. /* Set the polarity of the synchronization output */
  454. hrtim_mcr &= ~(HRTIM_MCR_SYNC_OUT);
  455. hrtim_mcr |= (hhrtim->Init.SyncOutputPolarity & HRTIM_MCR_SYNC_OUT);
  456. /* Update the HRTIM registers */
  457. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  458. }
  459. /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  460. HAL_HRTIM_MspInit(hhrtim);
  461. /* HRTIM input synchronization configuration (if required) */
  462. if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_SLAVE) != RESET)
  463. {
  464. /* Check parameters */
  465. assert_param(IS_HRTIM_SYNCINPUTSOURCE(hhrtim->Init.SyncInputSource));
  466. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  467. /* Set the synchronization input source */
  468. hrtim_mcr &= ~(HRTIM_MCR_SYNC_IN);
  469. hrtim_mcr |= (hhrtim->Init.SyncInputSource & HRTIM_MCR_SYNC_IN);
  470. /* Update the HRTIM registers */
  471. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  472. }
  473. /* Initialize the HRTIM state*/
  474. hhrtim->State = HAL_HRTIM_STATE_READY;
  475. /* Initialize the lock status of the HRTIM HAL API */
  476. __HAL_UNLOCK(hhrtim);
  477. /* Tnitialize timer related parameters */
  478. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  479. timer_idx <= HRTIM_TIMERINDEX_MASTER ;
  480. timer_idx++)
  481. {
  482. hhrtim->TimerParam[timer_idx].CaptureTrigger1 = HRTIM_CAPTURETRIGGER_NONE;
  483. hhrtim->TimerParam[timer_idx].CaptureTrigger2 = HRTIM_CAPTURETRIGGER_NONE;
  484. hhrtim->TimerParam[timer_idx].InterruptRequests = HRTIM_IT_NONE;
  485. hhrtim->TimerParam[timer_idx].DMARequests = HRTIM_IT_NONE;
  486. hhrtim->TimerParam[timer_idx].DMASrcAddress = 0;
  487. hhrtim->TimerParam[timer_idx].DMASize = 0;
  488. }
  489. return HAL_OK;
  490. }
  491. /**
  492. * @brief De-initializes a HRTIM instance
  493. * @param hhrtim: pointer to HAL HRTIM handle
  494. * @retval HAL status
  495. */
  496. HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef * hhrtim)
  497. {
  498. /* Check the HRTIM handle allocation */
  499. if(hhrtim == NULL)
  500. {
  501. return HAL_ERROR;
  502. }
  503. /* Check the parameters */
  504. assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
  505. /* Set the HRTIM state */
  506. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  507. /* DeInit the low level hardware */
  508. HAL_HRTIM_MspDeInit(hhrtim);
  509. hhrtim->State = HAL_HRTIM_STATE_READY;
  510. return HAL_OK;
  511. }
  512. /**
  513. * @brief MSP initialization for a HRTIM instance
  514. * @param hhrtim: pointer to HAL HRTIM handle
  515. * @retval None
  516. */
  517. __weak void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef * hhrtim)
  518. {
  519. /* Prevent unused argument(s) compilation warning */
  520. UNUSED(hhrtim);
  521. /* NOTE: This function should not be modified, when the callback is needed,
  522. the HAL_HRTIM_MspInit could be implemented in the user file
  523. */
  524. }
  525. /**
  526. * @brief MSP initialization for a for a HRTIM instance
  527. * @param hhrtim: pointer to HAL HRTIM handle
  528. * @retval None
  529. */
  530. __weak void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef * hhrtim)
  531. {
  532. /* Prevent unused argument(s) compilation warning */
  533. UNUSED(hhrtim);
  534. /* NOTE: This function should not be modified, when the callback is needed,
  535. the HAL_HRTIM_MspDeInit could be implemented in the user file
  536. */
  537. }
  538. /**
  539. * @brief Configures the time base unit of a timer
  540. * @param hhrtim: pointer to HAL HRTIM handle
  541. * @param TimerIdx: Timer index
  542. * This parameter can be one of the following values:
  543. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  544. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  545. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  546. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  547. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  548. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  549. * @param pTimeBaseCfg: pointer to the time base configuration structure
  550. * @note This function must be called prior starting the timer
  551. * @note The time-base unit initialization parameters specify:
  552. * The timer counter operating mode (continuous, one shot),
  553. * The timer clock prescaler,
  554. * The timer period,
  555. * The timer repetition counter.
  556. * @retval HAL status
  557. */
  558. HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim,
  559. uint32_t TimerIdx,
  560. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
  561. {
  562. /* Check the parameters */
  563. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  564. assert_param(IS_HRTIM_PRESCALERRATIO(pTimeBaseCfg->PrescalerRatio));
  565. assert_param(IS_HRTIM_MODE(pTimeBaseCfg->Mode));
  566. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  567. {
  568. return HAL_BUSY;
  569. }
  570. /* Set the HRTIM state */
  571. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  572. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  573. {
  574. /* Configure master timer time base unit */
  575. HRTIM_MasterBase_Config(hhrtim, pTimeBaseCfg);
  576. }
  577. else
  578. {
  579. /* Configure timing unit time base unit */
  580. HRTIM_TimingUnitBase_Config(hhrtim, TimerIdx, pTimeBaseCfg);
  581. }
  582. /* Set HRTIM state */
  583. hhrtim->State = HAL_HRTIM_STATE_READY;
  584. return HAL_OK;
  585. }
  586. /**
  587. * @}
  588. */
  589. /** @defgroup HRTIM_Exported_Functions_Group2 Simple time base mode functions
  590. * @brief Simple time base mode functions.
  591. *
  592. @verbatim
  593. ===============================================================================
  594. ##### Simple time base mode functions #####
  595. ===============================================================================
  596. [..] This section provides functions allowing to:
  597. (+) Start simple time base
  598. (+) Stop simple time base
  599. (+) Start simple time base and enable interrupt
  600. (+) Stop simple time base and disable interrupt
  601. (+) Start simple time base and enable DMA transfer
  602. (+) Stop simple time base and disable DMA transfer
  603. -@- When a HRTIM timer operates in simple time base mode, the timer
  604. counter counts from 0 to the period value.
  605. @endverbatim
  606. * @{
  607. */
  608. /**
  609. * @brief Starts the counter of a timer operating in basic time base mode
  610. * @param hhrtim: pointer to HAL HRTIM handle
  611. * @param TimerIdx: Timer index
  612. * This parameter can be one of the following values:
  613. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  614. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  615. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  616. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  617. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  618. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  619. * @retval HAL status
  620. */
  621. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef * hhrtim,
  622. uint32_t TimerIdx)
  623. {
  624. /* Check the parameters */
  625. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  626. /* Process Locked */
  627. __HAL_LOCK(hhrtim);
  628. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  629. /* Enable the timer counter */
  630. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  631. hhrtim->State = HAL_HRTIM_STATE_READY;
  632. /* Process Unlocked */
  633. __HAL_UNLOCK(hhrtim);
  634. return HAL_OK;
  635. }
  636. /**
  637. * @brief Stops the counter of a timer operating in basic time base mode
  638. * @param hhrtim: pointer to HAL HRTIM handle
  639. * @param TimerIdx: Timer index
  640. * This parameter can be one of the following values:
  641. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  642. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  643. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  644. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  645. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  646. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  647. * @retval HAL status
  648. */
  649. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef * hhrtim,
  650. uint32_t TimerIdx)
  651. {
  652. /* Check the parameters */
  653. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  654. /* Process Locked */
  655. __HAL_LOCK(hhrtim);
  656. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  657. /* Disable the timer counter */
  658. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  659. hhrtim->State = HAL_HRTIM_STATE_READY;
  660. /* Process Unlocked */
  661. __HAL_UNLOCK(hhrtim);
  662. return HAL_OK;
  663. }
  664. /**
  665. * @brief Starts the counter of a timer operating in simple time base mode
  666. * (Timer repetition interrupt is enabled).
  667. * @param hhrtim: pointer to HAL HRTIM handle
  668. * @param TimerIdx: Timer index
  669. * This parameter can be one of the following values:
  670. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  671. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  672. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  673. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  674. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  675. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  676. * @retval HAL status
  677. */
  678. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef * hhrtim,
  679. uint32_t TimerIdx)
  680. {
  681. /* Check the parameters */
  682. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  683. /* Process Locked */
  684. __HAL_LOCK(hhrtim);
  685. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  686. /* Enable the repetition interrupt */
  687. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  688. {
  689. __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
  690. }
  691. else
  692. {
  693. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
  694. }
  695. /* Enable the timer counter */
  696. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  697. hhrtim->State = HAL_HRTIM_STATE_READY;
  698. /* Process Unlocked */
  699. __HAL_UNLOCK(hhrtim);
  700. return HAL_OK;
  701. }
  702. /**
  703. * @brief Stops the counter of a timer operating in simple time base mode
  704. * (Timer repetition interrupt is disabled).
  705. * @param hhrtim: pointer to HAL HRTIM handle
  706. * @param TimerIdx: Timer index
  707. * This parameter can be one of the following values:
  708. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  709. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  710. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  711. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  712. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  713. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  714. * @retval HAL status
  715. */
  716. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef * hhrtim,
  717. uint32_t TimerIdx)
  718. {
  719. /* Check the parameters */
  720. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  721. /* Process Locked */
  722. __HAL_LOCK(hhrtim);
  723. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  724. /* Disable the repetition interrupt */
  725. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  726. {
  727. __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
  728. }
  729. else
  730. {
  731. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
  732. }
  733. /* Disable the timer counter */
  734. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  735. hhrtim->State = HAL_HRTIM_STATE_READY;
  736. /* Process Unlocked */
  737. __HAL_UNLOCK(hhrtim);
  738. return HAL_OK;
  739. }
  740. /**
  741. * @brief Starts the counter of a timer operating in simple time base mode
  742. * (Timer repetition DMA request is enabled).
  743. * @param hhrtim: pointer to HAL HRTIM handle
  744. * @param TimerIdx: Timer index
  745. * This parameter can be one of the following values:
  746. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  747. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  748. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  749. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  750. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  751. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  752. * @param SrcAddr: DMA transfer source address
  753. * @param DestAddr: DMA transfer destination address
  754. * @param Length: The length of data items (data size) to be transferred
  755. * from source to destination
  756. */
  757. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  758. uint32_t TimerIdx,
  759. uint32_t SrcAddr,
  760. uint32_t DestAddr,
  761. uint32_t Length)
  762. {
  763. DMA_HandleTypeDef * hdma;
  764. /* Check the parameters */
  765. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  766. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  767. {
  768. return HAL_BUSY;
  769. }
  770. if(hhrtim->State == HAL_HRTIM_STATE_READY)
  771. {
  772. if((SrcAddr == 0 ) || (DestAddr == 0 ) || (Length == 0))
  773. {
  774. return HAL_ERROR;
  775. }
  776. else
  777. {
  778. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  779. }
  780. }
  781. /* Process Locked */
  782. __HAL_LOCK(hhrtim);
  783. /* Get the timer DMA handler */
  784. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  785. /* Set the DMA transfer completed callback */
  786. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  787. {
  788. hdma->XferCpltCallback = HRTIM_DMAMasterCplt;
  789. }
  790. else
  791. {
  792. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  793. }
  794. /* Set the DMA error callback */
  795. hdma->XferErrorCallback = HRTIM_DMAError ;
  796. /* Enable the DMA channel */
  797. HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
  798. /* Enable the timer repetition DMA request */
  799. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  800. {
  801. __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
  802. }
  803. else
  804. {
  805. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
  806. }
  807. /* Enable the timer counter */
  808. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  809. hhrtim->State = HAL_HRTIM_STATE_READY;
  810. /* Process Unlocked */
  811. __HAL_UNLOCK(hhrtim);
  812. return HAL_OK;
  813. }
  814. /**
  815. * @brief Stops the counter of a timer operating in simple time base mode
  816. * (Timer repetition DMA request is disabled).
  817. * @param hhrtim: pointer to HAL HRTIM handle
  818. * @param TimerIdx: Timer index
  819. * This parameter can be one of the following values:
  820. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  821. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  822. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  823. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  824. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  825. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  826. * @retval HAL status
  827. */
  828. HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  829. uint32_t TimerIdx)
  830. {
  831. DMA_HandleTypeDef * hdma;
  832. /* Check the parameters */
  833. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  834. /* Process Locked */
  835. __HAL_LOCK(hhrtim);
  836. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  837. {
  838. /* Disable the DMA */
  839. HAL_DMA_Abort(hhrtim->hdmaMaster);
  840. /* Disable the timer repetition DMA request */
  841. __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
  842. }
  843. else
  844. {
  845. /* Get the timer DMA handler */
  846. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  847. /* Disable the DMA */
  848. HAL_DMA_Abort(hdma);
  849. /* Disable the timer repetition DMA request */
  850. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
  851. }
  852. /* Disable the timer counter */
  853. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  854. hhrtim->State = HAL_HRTIM_STATE_READY;
  855. /* Process Unlocked */
  856. __HAL_UNLOCK(hhrtim);
  857. return HAL_OK;
  858. }
  859. /**
  860. * @}
  861. */
  862. /** @defgroup HRTIM_Exported_Functions_Group3 Simple output compare mode functions
  863. * @brief Simple output compare functions
  864. *
  865. @verbatim
  866. ===============================================================================
  867. ##### Simple output compare functions #####
  868. ===============================================================================
  869. [..] This section provides functions allowing to:
  870. (+) Configure simple output channel
  871. (+) Start simple output compare
  872. (+) Stop simple output compare
  873. (+) Start simple output compare and enable interrupt
  874. (+) Stop simple output compare and disable interrupt
  875. (+) Start simple output compare and enable DMA transfer
  876. (+) Stop simple output compare and disable DMA transfer
  877. -@- When a HRTIM timer operates in simple output compare mode
  878. the output level is set to a programmable value when a match
  879. is found between the compare register and the counter.
  880. Compare unit 1 is automatically associated to output 1
  881. Compare unit 2 is automatically associated to output 2
  882. @endverbatim
  883. * @{
  884. */
  885. /**
  886. * @brief Configures an output in simple output compare mode
  887. * @param hhrtim: pointer to HAL HRTIM handle
  888. * @param TimerIdx: Timer index
  889. * This parameter can be one of the following values:
  890. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  891. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  892. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  893. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  894. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  895. * @param OCChannel: Timer output
  896. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  897. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  898. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  899. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  900. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  901. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  902. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  903. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  904. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  905. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  906. * @param pSimpleOCChannelCfg: pointer to the simple output compare output configuration structure
  907. * @note When the timer operates in simple output compare mode:
  908. * Output 1 is implicitly controlled by the compare unit 1
  909. * Output 2 is implicitly controlled by the compare unit 2
  910. * Output Set/Reset crossbar is set according to the selected output compare mode:
  911. * Toggle: SETxyR = RSTxyR = CMPy
  912. * Active: SETxyR = CMPy, RSTxyR = 0
  913. * Inactive: SETxy =0, RSTxy = CMPy
  914. * @retval HAL status
  915. */
  916. HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  917. uint32_t TimerIdx,
  918. uint32_t OCChannel,
  919. HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg)
  920. {
  921. uint32_t CompareUnit = 0xFFFFFFFFU;
  922. HRTIM_CompareCfgTypeDef CompareCfg = {0};
  923. HRTIM_OutputCfgTypeDef OutputCfg = {0};
  924. /* Check parameters */
  925. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  926. assert_param(IS_HRTIM_BASICOCMODE(pSimpleOCChannelCfg->Mode));
  927. assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOCChannelCfg->Polarity));
  928. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOCChannelCfg->IdleLevel));
  929. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  930. {
  931. return HAL_BUSY;
  932. }
  933. /* Set HRTIM state */
  934. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  935. /* Configure timer compare unit */
  936. switch (OCChannel)
  937. {
  938. case HRTIM_OUTPUT_TA1:
  939. case HRTIM_OUTPUT_TB1:
  940. case HRTIM_OUTPUT_TC1:
  941. case HRTIM_OUTPUT_TD1:
  942. case HRTIM_OUTPUT_TE1:
  943. {
  944. CompareUnit = HRTIM_COMPAREUNIT_1;
  945. }
  946. break;
  947. case HRTIM_OUTPUT_TA2:
  948. case HRTIM_OUTPUT_TB2:
  949. case HRTIM_OUTPUT_TC2:
  950. case HRTIM_OUTPUT_TD2:
  951. case HRTIM_OUTPUT_TE2:
  952. {
  953. CompareUnit = HRTIM_COMPAREUNIT_2;
  954. }
  955. break;
  956. }
  957. CompareCfg.CompareValue = pSimpleOCChannelCfg->Pulse;
  958. CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
  959. CompareCfg.AutoDelayedTimeout = 0;
  960. HRTIM_CompareUnitConfig(hhrtim,
  961. TimerIdx,
  962. CompareUnit,
  963. &CompareCfg);
  964. /* Configure timer output */
  965. OutputCfg.Polarity = pSimpleOCChannelCfg->Polarity;
  966. OutputCfg.IdleLevel = pSimpleOCChannelCfg->IdleLevel;
  967. OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
  968. OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
  969. OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
  970. OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
  971. switch (pSimpleOCChannelCfg->Mode)
  972. {
  973. case HRTIM_BASICOCMODE_TOGGLE:
  974. {
  975. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  976. {
  977. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  978. }
  979. else
  980. {
  981. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  982. }
  983. OutputCfg.ResetSource = OutputCfg.SetSource;
  984. }
  985. break;
  986. case HRTIM_BASICOCMODE_ACTIVE:
  987. {
  988. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  989. {
  990. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  991. }
  992. else
  993. {
  994. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  995. }
  996. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
  997. }
  998. break;
  999. case HRTIM_BASICOCMODE_INACTIVE:
  1000. {
  1001. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  1002. {
  1003. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP1;
  1004. }
  1005. else
  1006. {
  1007. OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP2;
  1008. }
  1009. OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
  1010. }
  1011. break;
  1012. }
  1013. HRTIM_OutputConfig(hhrtim,
  1014. TimerIdx,
  1015. OCChannel,
  1016. &OutputCfg);
  1017. /* Set HRTIM state */
  1018. hhrtim->State = HAL_HRTIM_STATE_READY;
  1019. return HAL_OK;
  1020. }
  1021. /**
  1022. * @brief Starts the output compare signal generation on the designed timer output
  1023. * @param hhrtim: pointer to HAL HRTIM handle
  1024. * @param TimerIdx: Timer index
  1025. * This parameter can be one of the following values:
  1026. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1027. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1028. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1029. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1030. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1031. * @param OCChannel: Timer output
  1032. * This parameter can be one of the following values:
  1033. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1034. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1035. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1036. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1037. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1038. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1039. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1040. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1041. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1042. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1043. * @retval HAL status
  1044. */
  1045. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef * hhrtim,
  1046. uint32_t TimerIdx,
  1047. uint32_t OCChannel)
  1048. {
  1049. /* Check the parameters */
  1050. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1051. /* Process Locked */
  1052. __HAL_LOCK(hhrtim);
  1053. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1054. /* Enable the timer output */
  1055. hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
  1056. /* Enable the timer counter */
  1057. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1058. hhrtim->State = HAL_HRTIM_STATE_READY;
  1059. /* Process Unlocked */
  1060. __HAL_UNLOCK(hhrtim);
  1061. return HAL_OK;
  1062. }
  1063. /**
  1064. * @brief Stops the output compare signal generation on the designed timer output
  1065. * @param hhrtim: pointer to HAL HRTIM handle
  1066. * @param TimerIdx: Timer index
  1067. * This parameter can be one of the following values:
  1068. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1069. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1070. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1071. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1072. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1073. * @param OCChannel: Timer output
  1074. * This parameter can be one of the following values:
  1075. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1076. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1077. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1078. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1079. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1080. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1081. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1082. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1083. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1084. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1085. * @retval HAL status
  1086. */
  1087. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef * hhrtim,
  1088. uint32_t TimerIdx,
  1089. uint32_t OCChannel)
  1090. {
  1091. /* Check the parameters */
  1092. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1093. /* Process Locked */
  1094. __HAL_LOCK(hhrtim);
  1095. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1096. /* Disable the timer output */
  1097. hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
  1098. /* Disable the timer counter */
  1099. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1100. hhrtim->State = HAL_HRTIM_STATE_READY;
  1101. /* Process Unlocked */
  1102. __HAL_UNLOCK(hhrtim);
  1103. return HAL_OK;
  1104. }
  1105. /**
  1106. * @brief Starts the output compare signal generation on the designed timer output
  1107. * (Interrupt is enabled (see note note below)).
  1108. * @param hhrtim: pointer to HAL HRTIM handle
  1109. * @param TimerIdx: Timer index
  1110. * This parameter can be one of the following values:
  1111. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1112. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1113. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1114. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1115. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1116. * @param OCChannel: Timer output
  1117. * This parameter can be one of the following values:
  1118. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1119. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1120. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1121. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1122. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1123. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1124. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1125. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1126. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1127. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1128. * @note Interrupt enabling depends on the chosen output compare mode
  1129. * Output toggle: compare match interrupt is enabled
  1130. * Output set active: output set interrupt is enabled
  1131. * Output set inactive: output reset interrupt is enabled
  1132. * @retval HAL status
  1133. */
  1134. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef * hhrtim,
  1135. uint32_t TimerIdx,
  1136. uint32_t OCChannel)
  1137. {
  1138. uint32_t interrupt;
  1139. /* Check the parameters */
  1140. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1141. /* Process Locked */
  1142. __HAL_LOCK(hhrtim);
  1143. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1144. /* Get the interrupt to enable (depends on the output compare mode) */
  1145. interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
  1146. /* Enable the timer output */
  1147. hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
  1148. /* Enable the timer interrupt (depends on the output compare mode) */
  1149. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, interrupt);
  1150. /* Enable the timer counter */
  1151. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1152. hhrtim->State = HAL_HRTIM_STATE_READY;
  1153. /* Process Unlocked */
  1154. __HAL_UNLOCK(hhrtim);
  1155. return HAL_OK;
  1156. }
  1157. /**
  1158. * @brief Stops the output compare signal generation on the designed timer output
  1159. * (Interrupt is disabled).
  1160. * @param hhrtim: pointer to HAL HRTIM handle
  1161. * @param TimerIdx: Timer index
  1162. * This parameter can be one of the following values:
  1163. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1164. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1165. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1166. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1167. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1168. * @param OCChannel: Timer output
  1169. * This parameter can be one of the following values:
  1170. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1171. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1172. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1173. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1174. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1175. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1176. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1177. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1178. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1179. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1180. * @retval HAL status
  1181. */
  1182. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef * hhrtim,
  1183. uint32_t TimerIdx,
  1184. uint32_t OCChannel)
  1185. {
  1186. uint32_t interrupt;
  1187. /* Check the parameters */
  1188. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1189. /* Process Locked */
  1190. __HAL_LOCK(hhrtim);
  1191. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1192. /* Disable the timer output */
  1193. hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
  1194. /* Get the interrupt to disable (depends on the output compare mode) */
  1195. interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
  1196. /* Disable the timer interrupt */
  1197. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, interrupt);
  1198. /* Disable the timer counter */
  1199. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1200. hhrtim->State = HAL_HRTIM_STATE_READY;
  1201. /* Process Unlocked */
  1202. __HAL_UNLOCK(hhrtim);
  1203. return HAL_OK;
  1204. }
  1205. /**
  1206. * @brief Starts the output compare signal generation on the designed timer output
  1207. * (DMA request is enabled (see note below)).
  1208. * @param hhrtim: pointer to HAL HRTIM handle
  1209. * @param TimerIdx: Timer index
  1210. * This parameter can be one of the following values:
  1211. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1212. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1213. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1214. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1215. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1216. * @param OCChannel: Timer output
  1217. * This parameter can be one of the following values:
  1218. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1219. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1220. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1221. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1222. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1223. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1224. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1225. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1226. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1227. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1228. * @param SrcAddr: DMA transfer source address
  1229. * @param DestAddr: DMA transfer destination address
  1230. * @param Length: The length of data items (data size) to be transferred
  1231. * from source to destination
  1232. * @note DMA request enabling depends on the chosen output compare mode
  1233. * Output toggle: compare match DMA request is enabled
  1234. * Output set active: output set DMA request is enabled
  1235. * Output set inactive: output reset DMA request is enabled
  1236. * @retval HAL status
  1237. */
  1238. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  1239. uint32_t TimerIdx,
  1240. uint32_t OCChannel,
  1241. uint32_t SrcAddr,
  1242. uint32_t DestAddr,
  1243. uint32_t Length)
  1244. {
  1245. DMA_HandleTypeDef * hdma;
  1246. uint32_t dma_request;
  1247. /* Check the parameters */
  1248. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1249. if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
  1250. {
  1251. return HAL_BUSY;
  1252. }
  1253. if((hhrtim->State == HAL_HRTIM_STATE_READY))
  1254. {
  1255. if((SrcAddr == 0 ) || (DestAddr == 0 ) || (Length == 0))
  1256. {
  1257. return HAL_ERROR;
  1258. }
  1259. else
  1260. {
  1261. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1262. }
  1263. }
  1264. /* Process Locked */
  1265. __HAL_LOCK(hhrtim);
  1266. /* Enable the timer output */
  1267. hhrtim->Instance->sCommonRegs.OENR |= OCChannel;
  1268. /* Get the DMA request to enable */
  1269. dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
  1270. /* Get the timer DMA handler */
  1271. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1272. /* Set the DMA error callback */
  1273. hdma->XferErrorCallback = HRTIM_DMAError ;
  1274. /* Set the DMA transfer completed callback */
  1275. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  1276. /* Enable the DMA channel */
  1277. HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
  1278. /* Enable the timer DMA request */
  1279. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, dma_request);
  1280. /* Enable the timer counter */
  1281. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1282. hhrtim->State = HAL_HRTIM_STATE_READY;
  1283. /* Process Unlocked */
  1284. __HAL_UNLOCK(hhrtim);
  1285. return HAL_OK;
  1286. }
  1287. /**
  1288. * @brief Stops the output compare signal generation on the designed timer output
  1289. * (DMA request is disabled).
  1290. * @param hhrtim: pointer to HAL HRTIM handle
  1291. * @param TimerIdx: Timer index
  1292. * This parameter can be one of the following values:
  1293. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1294. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1295. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1296. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1297. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1298. * @param OCChannel: Timer output
  1299. * This parameter can be one of the following values:
  1300. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1301. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1302. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1303. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1304. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1305. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1306. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1307. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1308. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1309. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1310. * @retval HAL status
  1311. */
  1312. HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  1313. uint32_t TimerIdx,
  1314. uint32_t OCChannel)
  1315. {
  1316. DMA_HandleTypeDef * hdma;
  1317. uint32_t dma_request;
  1318. /* Check the parameters */
  1319. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
  1320. /* Process Locked */
  1321. __HAL_LOCK(hhrtim);
  1322. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1323. /* Disable the timer output */
  1324. hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;
  1325. /* Get the timer DMA handler */
  1326. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1327. /* Disable the DMA */
  1328. HAL_DMA_Abort(hdma);
  1329. /* Get the DMA request to disable */
  1330. dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
  1331. /* Disable the timer DMA request */
  1332. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, dma_request);
  1333. /* Disable the timer counter */
  1334. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1335. hhrtim->State = HAL_HRTIM_STATE_READY;
  1336. /* Process Unlocked */
  1337. __HAL_UNLOCK(hhrtim);
  1338. return HAL_OK;
  1339. }
  1340. /**
  1341. * @}
  1342. */
  1343. /** @defgroup HRTIM_Exported_Functions_Group4 Simple PWM output mode functions
  1344. * @brief Simple PWM output functions
  1345. @verbatim
  1346. ===============================================================================
  1347. ##### Simple PWM output functions #####
  1348. ===============================================================================
  1349. [..] This section provides functions allowing to:
  1350. (+) Configure simple PWM output channel
  1351. (+) Start simple PWM output
  1352. (+) Stop simple PWM output
  1353. (+) Start simple PWM output and enable interrupt
  1354. (+) Stop simple PWM output and disable interrupt
  1355. (+) Start simple PWM output and enable DMA transfer
  1356. (+) Stop simple PWM output and disable DMA transfer
  1357. -@- When a HRTIM timer operates in simple PWM output mode
  1358. the output level is set to a programmable value when a match is
  1359. found between the compare register and the counter and reset when
  1360. the timer period is reached. Duty cycle is determined by the
  1361. comparison value.
  1362. Compare unit 1 is automatically associated to output 1
  1363. Compare unit 2 is automatically associated to output 2
  1364. @endverbatim
  1365. * @{
  1366. */
  1367. /**
  1368. * @brief Configures an output in simple PWM mode
  1369. * @param hhrtim: pointer to HAL HRTIM handle
  1370. * @param TimerIdx: Timer index
  1371. * This parameter can be one of the following values:
  1372. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1373. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1374. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1375. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1376. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1377. * @param PWMChannel: Timer output
  1378. * This parameter can be one of the following values:
  1379. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1380. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1381. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1382. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1383. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1384. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1385. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1386. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1387. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1388. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1389. * @param pSimplePWMChannelCfg: pointer to the simple PWM output configuration structure
  1390. * @note When the timer operates in simple PWM output mode:
  1391. * Output 1 is implicitly controlled by the compare unit 1
  1392. * Output 2 is implicitly controlled by the compare unit 2
  1393. * Output Set/Reset crossbar is set as follows:
  1394. * Output 1: SETx1R = CMP1, RSTx1R = PER
  1395. * Output 2: SETx2R = CMP2, RST2R = PER
  1396. * @note When Simple PWM mode is used the registers preload mechanism is
  1397. * enabled (otherwise the behavior is not guaranteed).
  1398. * @retval HAL status
  1399. */
  1400. HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  1401. uint32_t TimerIdx,
  1402. uint32_t PWMChannel,
  1403. HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg)
  1404. {
  1405. uint32_t CompareUnit = 0xFFFFFFFFU;
  1406. HRTIM_CompareCfgTypeDef CompareCfg;
  1407. HRTIM_OutputCfgTypeDef OutputCfg;
  1408. uint32_t hrtim_timcr;
  1409. /* Check parameters */
  1410. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1411. assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimplePWMChannelCfg->Polarity));
  1412. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimplePWMChannelCfg->IdleLevel));
  1413. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  1414. {
  1415. return HAL_BUSY;
  1416. }
  1417. /* Process Locked */
  1418. __HAL_LOCK(hhrtim); hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1419. /* Configure timer compare unit */
  1420. switch (PWMChannel)
  1421. {
  1422. case HRTIM_OUTPUT_TA1:
  1423. case HRTIM_OUTPUT_TB1:
  1424. case HRTIM_OUTPUT_TC1:
  1425. case HRTIM_OUTPUT_TD1:
  1426. case HRTIM_OUTPUT_TE1:
  1427. {
  1428. CompareUnit = HRTIM_COMPAREUNIT_1;
  1429. }
  1430. break;
  1431. case HRTIM_OUTPUT_TA2:
  1432. case HRTIM_OUTPUT_TB2:
  1433. case HRTIM_OUTPUT_TC2:
  1434. case HRTIM_OUTPUT_TD2:
  1435. case HRTIM_OUTPUT_TE2:
  1436. {
  1437. CompareUnit = HRTIM_COMPAREUNIT_2;
  1438. }
  1439. break;
  1440. }
  1441. CompareCfg.CompareValue = pSimplePWMChannelCfg->Pulse;
  1442. CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
  1443. CompareCfg.AutoDelayedTimeout = 0;
  1444. HRTIM_CompareUnitConfig(hhrtim,
  1445. TimerIdx,
  1446. CompareUnit,
  1447. &CompareCfg);
  1448. /* Configure timer output */
  1449. OutputCfg.Polarity = pSimplePWMChannelCfg->Polarity;
  1450. OutputCfg.IdleLevel = pSimplePWMChannelCfg->IdleLevel;
  1451. OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
  1452. OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
  1453. OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
  1454. OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
  1455. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  1456. {
  1457. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  1458. }
  1459. else
  1460. {
  1461. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  1462. }
  1463. OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER;
  1464. HRTIM_OutputConfig(hhrtim,
  1465. TimerIdx,
  1466. PWMChannel,
  1467. &OutputCfg);
  1468. /* Enable the registers preload mechanism */
  1469. hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
  1470. hrtim_timcr |= HRTIM_TIMCR_PREEN;
  1471. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
  1472. hhrtim->State = HAL_HRTIM_STATE_READY;
  1473. /* Process Unlocked */
  1474. __HAL_UNLOCK(hhrtim);
  1475. return HAL_OK;
  1476. }
  1477. /**
  1478. * @brief Starts the PWM output signal generation on the designed timer output
  1479. * @param hhrtim: pointer to HAL HRTIM handle
  1480. * @param TimerIdx: Timer index
  1481. * This parameter can be one of the following values:
  1482. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1483. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1484. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1485. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1486. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1487. * @param PWMChannel: Timer output
  1488. * This parameter can be one of the following values:
  1489. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1490. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1491. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1492. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1493. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1494. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1495. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1496. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1497. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1498. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1499. * @retval HAL status
  1500. */
  1501. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef * hhrtim,
  1502. uint32_t TimerIdx,
  1503. uint32_t PWMChannel)
  1504. {
  1505. /* Check the parameters */
  1506. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1507. /* Process Locked */
  1508. __HAL_LOCK(hhrtim);
  1509. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1510. /* Enable the timer output */
  1511. hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
  1512. /* Enable the timer counter */
  1513. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1514. hhrtim->State = HAL_HRTIM_STATE_READY;
  1515. /* Process Unlocked */
  1516. __HAL_UNLOCK(hhrtim);
  1517. return HAL_OK;
  1518. }
  1519. /**
  1520. * @brief Stops the PWM output signal generation on the designed timer output
  1521. * @param hhrtim: pointer to HAL HRTIM handle
  1522. * @param TimerIdx: Timer index
  1523. * This parameter can be one of the following values:
  1524. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1525. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1526. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1527. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1528. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1529. * @param PWMChannel: Timer output
  1530. * This parameter can be one of the following values:
  1531. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1532. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1533. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1534. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1535. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1536. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1537. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1538. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1539. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1540. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1541. * @retval HAL status
  1542. */
  1543. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef * hhrtim,
  1544. uint32_t TimerIdx,
  1545. uint32_t PWMChannel)
  1546. {
  1547. /* Check the parameters */
  1548. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1549. /* Process Locked */
  1550. __HAL_LOCK(hhrtim);
  1551. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1552. /* Disable the timer output */
  1553. hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
  1554. /* Disable the timer counter */
  1555. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1556. hhrtim->State = HAL_HRTIM_STATE_READY;
  1557. /* Process Unlocked */
  1558. __HAL_UNLOCK(hhrtim);
  1559. return HAL_OK;
  1560. }
  1561. /**
  1562. * @brief Starts the PWM output signal generation on the designed timer output
  1563. * (The compare interrupt is enabled).
  1564. * @param hhrtim: pointer to HAL HRTIM handle
  1565. * @param TimerIdx: Timer index
  1566. * This parameter can be one of the following values:
  1567. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1568. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1569. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1570. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1571. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1572. * @param PWMChannel: Timer output
  1573. * This parameter can be one of the following values:
  1574. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1575. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1576. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1577. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1578. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1579. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1580. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1581. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1582. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1583. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1584. * @retval HAL status
  1585. */
  1586. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef * hhrtim,
  1587. uint32_t TimerIdx,
  1588. uint32_t PWMChannel)
  1589. {
  1590. /* Check the parameters */
  1591. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1592. /* Process Locked */
  1593. __HAL_LOCK(hhrtim);
  1594. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1595. /* Enable the timer output */
  1596. hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
  1597. /* Enable the timer interrupt (depends on the PWM output) */
  1598. switch (PWMChannel)
  1599. {
  1600. case HRTIM_OUTPUT_TA1:
  1601. case HRTIM_OUTPUT_TB1:
  1602. case HRTIM_OUTPUT_TC1:
  1603. case HRTIM_OUTPUT_TD1:
  1604. case HRTIM_OUTPUT_TE1:
  1605. {
  1606. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  1607. }
  1608. break;
  1609. case HRTIM_OUTPUT_TA2:
  1610. case HRTIM_OUTPUT_TB2:
  1611. case HRTIM_OUTPUT_TC2:
  1612. case HRTIM_OUTPUT_TD2:
  1613. case HRTIM_OUTPUT_TE2:
  1614. {
  1615. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  1616. }
  1617. break;
  1618. }
  1619. /* Enable the timer counter */
  1620. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1621. hhrtim->State = HAL_HRTIM_STATE_READY;
  1622. /* Process Unlocked */
  1623. __HAL_UNLOCK(hhrtim);
  1624. return HAL_OK;
  1625. }
  1626. /**
  1627. * @brief Stops the PWM output signal generation on the designed timer output
  1628. * (The compare interrupt is disabled).
  1629. * @param hhrtim: pointer to HAL HRTIM handle
  1630. * @param TimerIdx: Timer index
  1631. * This parameter can be one of the following values:
  1632. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1633. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1634. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1635. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1636. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1637. * @param PWMChannel: Timer output
  1638. * This parameter can be one of the following values:
  1639. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1640. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1641. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1642. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1643. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1644. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1645. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1646. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1647. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1648. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1649. * @retval HAL status
  1650. */
  1651. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef * hhrtim,
  1652. uint32_t TimerIdx,
  1653. uint32_t PWMChannel)
  1654. {
  1655. /* Check the parameters */
  1656. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1657. /* Process Locked */
  1658. __HAL_LOCK(hhrtim);
  1659. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1660. /* Disable the timer output */
  1661. hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
  1662. /* Disable the timer interrupt (depends on the PWM output) */
  1663. switch (PWMChannel)
  1664. {
  1665. case HRTIM_OUTPUT_TA1:
  1666. case HRTIM_OUTPUT_TB1:
  1667. case HRTIM_OUTPUT_TC1:
  1668. case HRTIM_OUTPUT_TD1:
  1669. case HRTIM_OUTPUT_TE1:
  1670. {
  1671. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  1672. }
  1673. break;
  1674. case HRTIM_OUTPUT_TA2:
  1675. case HRTIM_OUTPUT_TB2:
  1676. case HRTIM_OUTPUT_TC2:
  1677. case HRTIM_OUTPUT_TD2:
  1678. case HRTIM_OUTPUT_TE2:
  1679. {
  1680. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  1681. }
  1682. break;
  1683. }
  1684. /* Disable the timer counter */
  1685. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1686. hhrtim->State = HAL_HRTIM_STATE_READY;
  1687. /* Process Unlocked */
  1688. __HAL_UNLOCK(hhrtim);
  1689. return HAL_OK;
  1690. }
  1691. /**
  1692. * @brief Starts the PWM output signal generation on the designed timer output
  1693. * (The compare DMA request is enabled).
  1694. * @param hhrtim: pointer to HAL HRTIM handle
  1695. * @param TimerIdx: Timer index
  1696. * This parameter can be one of the following values:
  1697. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1698. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1699. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1700. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1701. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1702. * @param PWMChannel: Timer output
  1703. * This parameter can be one of the following values:
  1704. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1705. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1706. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1707. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1708. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1709. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1710. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1711. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1712. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1713. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1714. * @param SrcAddr: DMA transfer source address
  1715. * @param DestAddr: DMA transfer destination address
  1716. * @param Length: The length of data items (data size) to be transferred
  1717. * from source to destination
  1718. * @retval HAL status
  1719. */
  1720. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  1721. uint32_t TimerIdx,
  1722. uint32_t PWMChannel,
  1723. uint32_t SrcAddr,
  1724. uint32_t DestAddr,
  1725. uint32_t Length)
  1726. {
  1727. DMA_HandleTypeDef * hdma;
  1728. /* Check the parameters */
  1729. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1730. if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
  1731. {
  1732. return HAL_BUSY;
  1733. }
  1734. if((hhrtim->State == HAL_HRTIM_STATE_READY))
  1735. {
  1736. if((SrcAddr == 0 ) || (DestAddr == 0 ) || (Length == 0))
  1737. {
  1738. return HAL_ERROR;
  1739. }
  1740. else
  1741. {
  1742. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1743. }
  1744. }
  1745. /* Process Locked */
  1746. __HAL_LOCK(hhrtim);
  1747. /* Enable the timer output */
  1748. hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;
  1749. /* Get the timer DMA handler */
  1750. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1751. /* Set the DMA error callback */
  1752. hdma->XferErrorCallback = HRTIM_DMAError ;
  1753. /* Set the DMA transfer completed callback */
  1754. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  1755. /* Enable the DMA channel */
  1756. HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
  1757. /* Enable the timer DMA request */
  1758. switch (PWMChannel)
  1759. {
  1760. case HRTIM_OUTPUT_TA1:
  1761. case HRTIM_OUTPUT_TB1:
  1762. case HRTIM_OUTPUT_TC1:
  1763. case HRTIM_OUTPUT_TD1:
  1764. case HRTIM_OUTPUT_TE1:
  1765. {
  1766. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
  1767. }
  1768. break;
  1769. case HRTIM_OUTPUT_TA2:
  1770. case HRTIM_OUTPUT_TB2:
  1771. case HRTIM_OUTPUT_TC2:
  1772. case HRTIM_OUTPUT_TD2:
  1773. case HRTIM_OUTPUT_TE2:
  1774. {
  1775. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
  1776. }
  1777. break;
  1778. }
  1779. /* Enable the timer counter */
  1780. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1781. hhrtim->State = HAL_HRTIM_STATE_READY;
  1782. /* Process Unlocked */
  1783. __HAL_UNLOCK(hhrtim);
  1784. return HAL_OK;
  1785. }
  1786. /**
  1787. * @brief Stops the PWM output signal generation on the designed timer output
  1788. * (The compare DMA request is disabled).
  1789. * @param hhrtim: pointer to HAL HRTIM handle
  1790. * @param TimerIdx: Timer index
  1791. * This parameter can be one of the following values:
  1792. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1793. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1794. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1795. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1796. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1797. * @param PWMChannel: Timer output
  1798. * This parameter can be one of the following values:
  1799. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  1800. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  1801. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  1802. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  1803. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  1804. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  1805. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  1806. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  1807. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  1808. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  1809. * @retval HAL status
  1810. */
  1811. HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  1812. uint32_t TimerIdx,
  1813. uint32_t PWMChannel)
  1814. {
  1815. DMA_HandleTypeDef * hdma;
  1816. /* Check the parameters */
  1817. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
  1818. /* Process Locked */
  1819. __HAL_LOCK(hhrtim);
  1820. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1821. /* Disable the timer output */
  1822. hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;
  1823. /* Get the timer DMA handler */
  1824. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  1825. /* Disable the DMA */
  1826. HAL_DMA_Abort(hdma);
  1827. /* Disable the timer DMA request */
  1828. switch (PWMChannel)
  1829. {
  1830. case HRTIM_OUTPUT_TA1:
  1831. case HRTIM_OUTPUT_TB1:
  1832. case HRTIM_OUTPUT_TC1:
  1833. case HRTIM_OUTPUT_TD1:
  1834. case HRTIM_OUTPUT_TE1:
  1835. {
  1836. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
  1837. }
  1838. break;
  1839. case HRTIM_OUTPUT_TA2:
  1840. case HRTIM_OUTPUT_TB2:
  1841. case HRTIM_OUTPUT_TC2:
  1842. case HRTIM_OUTPUT_TD2:
  1843. case HRTIM_OUTPUT_TE2:
  1844. {
  1845. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
  1846. }
  1847. break;
  1848. }
  1849. /* Disable the timer counter */
  1850. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1851. hhrtim->State = HAL_HRTIM_STATE_READY;
  1852. /* Process Unlocked */
  1853. __HAL_UNLOCK(hhrtim);
  1854. return HAL_OK;
  1855. }
  1856. /**
  1857. * @}
  1858. */
  1859. /** @defgroup HRTIM_Exported_Functions_Group5 Simple input capture functions
  1860. * @brief Simple input capture functions
  1861. @verbatim
  1862. ===============================================================================
  1863. ##### Simple input capture functions #####
  1864. ===============================================================================
  1865. [..] This section provides functions allowing to:
  1866. (+) Configure simple input capture channel
  1867. (+) Start simple input capture
  1868. (+) Stop simple input capture
  1869. (+) Start simple input capture and enable interrupt
  1870. (+) Stop simple input capture and disable interrupt
  1871. (+) Start simple input capture and enable DMA transfer
  1872. (+) Stop simple input capture and disable DMA transfer
  1873. -@- When a HRTIM timer operates in simple input capture mode
  1874. the Capture Register (HRTIM_CPT1/2xR) is used to latch the
  1875. value of the timer counter counter after a transition detected
  1876. on a given external event input.
  1877. @endverbatim
  1878. * @{
  1879. */
  1880. /**
  1881. * @brief Configures a simple capture
  1882. * @param hhrtim: pointer to HAL HRTIM handle
  1883. * @param TimerIdx: Timer index
  1884. * This parameter can be one of the following values:
  1885. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1886. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1887. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1888. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1889. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1890. * @param CaptureChannel: Capture unit
  1891. * This parameter can be one of the following values:
  1892. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  1893. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  1894. * @param pSimpleCaptureChannelCfg: pointer to the simple capture configuration structure
  1895. * @note When the timer operates in simple capture mode the capture is trigerred
  1896. * by the designated external event and GPIO input is implicitly used as event source.
  1897. * The cature can be triggered by a rising edge, a falling edge or both
  1898. * edges on event channel.
  1899. * @retval HAL status
  1900. */
  1901. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  1902. uint32_t TimerIdx,
  1903. uint32_t CaptureChannel,
  1904. HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg)
  1905. {
  1906. HRTIM_EventCfgTypeDef EventCfg;
  1907. /* Check parameters */
  1908. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  1909. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  1910. assert_param(IS_HRTIM_EVENT(pSimpleCaptureChannelCfg->Event));
  1911. assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleCaptureChannelCfg->EventSensitivity,
  1912. pSimpleCaptureChannelCfg->EventPolarity));
  1913. assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleCaptureChannelCfg->EventSensitivity));
  1914. assert_param(IS_HRTIM_EVENTFILTER(pSimpleCaptureChannelCfg->Event,
  1915. pSimpleCaptureChannelCfg->EventFilter));
  1916. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  1917. {
  1918. return HAL_BUSY;
  1919. }
  1920. /* Process Locked */
  1921. __HAL_LOCK(hhrtim);
  1922. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1923. /* Configure external event channel */
  1924. EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
  1925. EventCfg.Filter = pSimpleCaptureChannelCfg->EventFilter;
  1926. EventCfg.Polarity = pSimpleCaptureChannelCfg->EventPolarity;
  1927. EventCfg.Sensitivity = pSimpleCaptureChannelCfg->EventSensitivity;
  1928. EventCfg.Source = HRTIM_EVENTSRC_1;
  1929. HRTIM_EventConfig(hhrtim,
  1930. pSimpleCaptureChannelCfg->Event,
  1931. &EventCfg);
  1932. /* Memorize capture trigger (will be configured when the capture is started */
  1933. HRTIM_CaptureUnitConfig(hhrtim,
  1934. TimerIdx,
  1935. CaptureChannel,
  1936. pSimpleCaptureChannelCfg->Event);
  1937. hhrtim->State = HAL_HRTIM_STATE_READY;
  1938. /* Process Unlocked */
  1939. __HAL_UNLOCK(hhrtim);
  1940. return HAL_OK;
  1941. }
  1942. /**
  1943. * @brief Enables a simple capture on the designed capture unit
  1944. * @param hhrtim: pointer to HAL HRTIM handle
  1945. * @param TimerIdx: Timer index
  1946. * This parameter can be one of the following values:
  1947. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1948. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1949. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  1950. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  1951. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  1952. * @param CaptureChannel: Timer output
  1953. * This parameter can be one of the following values:
  1954. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  1955. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  1956. * @retval HAL status
  1957. * @note The external event triggering the capture is available for all timing
  1958. * units. It can be used directly and is active as soon as the timing
  1959. * unit counter is enabled.
  1960. */
  1961. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef * hhrtim,
  1962. uint32_t TimerIdx,
  1963. uint32_t CaptureChannel)
  1964. {
  1965. /* Check the parameters */
  1966. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  1967. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  1968. /* Process Locked */
  1969. __HAL_LOCK(hhrtim);
  1970. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  1971. /* Set the capture unit trigger */
  1972. switch (CaptureChannel)
  1973. {
  1974. case HRTIM_CAPTUREUNIT_1:
  1975. {
  1976. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
  1977. }
  1978. break;
  1979. case HRTIM_CAPTUREUNIT_2:
  1980. {
  1981. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
  1982. }
  1983. break;
  1984. }
  1985. /* Enable the timer counter */
  1986. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  1987. hhrtim->State = HAL_HRTIM_STATE_READY;
  1988. /* Process Unlocked */
  1989. __HAL_UNLOCK(hhrtim);
  1990. return HAL_OK;
  1991. }
  1992. /**
  1993. * @brief Disables a simple capture on the designed capture unit
  1994. * @param hhrtim: pointer to HAL HRTIM handle
  1995. * @param TimerIdx: Timer index
  1996. * This parameter can be one of the following values:
  1997. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  1998. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  1999. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2000. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2001. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2002. * @param CaptureChannel: Timer output
  2003. * This parameter can be one of the following values:
  2004. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2005. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2006. * @retval HAL status
  2007. */
  2008. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef * hhrtim,
  2009. uint32_t TimerIdx,
  2010. uint32_t CaptureChannel)
  2011. {
  2012. /* Check the parameters */
  2013. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2014. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2015. /* Process Locked */
  2016. __HAL_LOCK(hhrtim);
  2017. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2018. /* Set the capture unit trigger */
  2019. switch (CaptureChannel)
  2020. {
  2021. case HRTIM_CAPTUREUNIT_1:
  2022. {
  2023. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
  2024. }
  2025. break;
  2026. case HRTIM_CAPTUREUNIT_2:
  2027. {
  2028. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
  2029. }
  2030. break;
  2031. }
  2032. /* Disable the timer counter */
  2033. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
  2034. (hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
  2035. {
  2036. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2037. }
  2038. hhrtim->State = HAL_HRTIM_STATE_READY;
  2039. /* Process Unlocked */
  2040. __HAL_UNLOCK(hhrtim);
  2041. return HAL_OK;
  2042. }
  2043. /**
  2044. * @brief Enables a basic capture on the designed capture unit
  2045. * (Capture interrupt is enabled).
  2046. * @param hhrtim: pointer to HAL HRTIM handle
  2047. * @param TimerIdx: Timer index
  2048. * This parameter can be one of the following values:
  2049. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2050. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2051. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2052. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2053. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2054. * @param CaptureChannel: Timer output
  2055. * This parameter can be one of the following values:
  2056. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2057. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2058. * @retval HAL status
  2059. */
  2060. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef * hhrtim,
  2061. uint32_t TimerIdx,
  2062. uint32_t CaptureChannel)
  2063. {
  2064. /* Check the parameters */
  2065. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2066. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2067. /* Process Locked */
  2068. __HAL_LOCK(hhrtim);
  2069. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2070. /* Set the capture unit trigger */
  2071. switch (CaptureChannel)
  2072. {
  2073. case HRTIM_CAPTUREUNIT_1:
  2074. {
  2075. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
  2076. /* Enable the capture unit 1 interrupt */
  2077. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
  2078. }
  2079. break;
  2080. case HRTIM_CAPTUREUNIT_2:
  2081. {
  2082. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
  2083. /* Enable the capture unit 2 interrupt */
  2084. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
  2085. }
  2086. break;
  2087. }
  2088. /* Enable the timer counter */
  2089. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2090. hhrtim->State = HAL_HRTIM_STATE_READY;
  2091. /* Process Unlocked */
  2092. __HAL_UNLOCK(hhrtim);
  2093. return HAL_OK;
  2094. }
  2095. /**
  2096. * @brief Disables a basic capture on the designed capture unit
  2097. * (Capture interrupt is disabled).
  2098. * @param hhrtim: pointer to HAL HRTIM handle
  2099. * @param TimerIdx: Timer index
  2100. * This parameter can be one of the following values:
  2101. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2102. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2103. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2104. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2105. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2106. * @param CaptureChannel: Timer output
  2107. * This parameter can be one of the following values:
  2108. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2109. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2110. * @retval HAL status
  2111. */
  2112. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef * hhrtim,
  2113. uint32_t TimerIdx,
  2114. uint32_t CaptureChannel)
  2115. {
  2116. /* Check the parameters */
  2117. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2118. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2119. /* Process Locked */
  2120. __HAL_LOCK(hhrtim);
  2121. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2122. /* Set the capture unit trigger */
  2123. switch (CaptureChannel)
  2124. {
  2125. case HRTIM_CAPTUREUNIT_1:
  2126. {
  2127. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
  2128. /* Disable the capture unit 1 interrupt */
  2129. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
  2130. }
  2131. break;
  2132. case HRTIM_CAPTUREUNIT_2:
  2133. {
  2134. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
  2135. /* Disable the capture unit 2 interrupt */
  2136. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
  2137. }
  2138. break;
  2139. }
  2140. /* Disable the timer counter */
  2141. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
  2142. (hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
  2143. {
  2144. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2145. }
  2146. hhrtim->State = HAL_HRTIM_STATE_READY;
  2147. /* Process Unlocked */
  2148. __HAL_UNLOCK(hhrtim);
  2149. return HAL_OK;
  2150. }
  2151. /**
  2152. * @brief Enables a basic capture on the designed capture unit
  2153. * (Capture DMA request is enabled).
  2154. * @param hhrtim: pointer to HAL HRTIM handle
  2155. * @param TimerIdx: Timer index
  2156. * This parameter can be one of the following values:
  2157. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2158. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2159. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2160. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2161. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2162. * @param CaptureChannel: Timer output
  2163. * This parameter can be one of the following values:
  2164. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2165. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2166. * @param SrcAddr: DMA transfer source address
  2167. * @param DestAddr: DMA transfer destination address
  2168. * @param Length: The length of data items (data size) to be transferred
  2169. * from source to destination
  2170. * @retval HAL status
  2171. */
  2172. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  2173. uint32_t TimerIdx,
  2174. uint32_t CaptureChannel,
  2175. uint32_t SrcAddr,
  2176. uint32_t DestAddr,
  2177. uint32_t Length)
  2178. {
  2179. DMA_HandleTypeDef * hdma;
  2180. /* Check the parameters */
  2181. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2182. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2183. /* Process Locked */
  2184. __HAL_LOCK(hhrtim);
  2185. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2186. /* Get the timer DMA handler */
  2187. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  2188. /* Set the DMA error callback */
  2189. hdma->XferErrorCallback = HRTIM_DMAError ;
  2190. /* Set the DMA transfer completed callback */
  2191. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  2192. /* Enable the DMA channel */
  2193. HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
  2194. switch (CaptureChannel)
  2195. {
  2196. case HRTIM_CAPTUREUNIT_1:
  2197. {
  2198. /* Set the capture unit trigger */
  2199. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
  2200. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
  2201. }
  2202. break;
  2203. case HRTIM_CAPTUREUNIT_2:
  2204. {
  2205. /* Set the capture unit trigger */
  2206. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
  2207. /* Enable the timer DMA request */
  2208. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
  2209. }
  2210. break;
  2211. }
  2212. /* Enable the timer counter */
  2213. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2214. hhrtim->State = HAL_HRTIM_STATE_READY;
  2215. /* Process Unlocked */
  2216. __HAL_UNLOCK(hhrtim);
  2217. return HAL_OK;
  2218. }
  2219. /**
  2220. * @brief Disables a basic capture on the designed capture unit
  2221. * (Capture DMA request is disabled).
  2222. * @param hhrtim: pointer to HAL HRTIM handle
  2223. * @param TimerIdx: Timer index
  2224. * This parameter can be one of the following values:
  2225. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2226. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2227. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2228. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2229. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2230. * @param CaptureChannel: Timer output
  2231. * This parameter can be one of the following values:
  2232. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  2233. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  2234. * @retval HAL status
  2235. */
  2236. HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  2237. uint32_t TimerIdx,
  2238. uint32_t CaptureChannel)
  2239. {
  2240. DMA_HandleTypeDef * hdma;
  2241. /* Check the parameters */
  2242. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  2243. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
  2244. /* Process Locked */
  2245. __HAL_LOCK(hhrtim);
  2246. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2247. /* Get the timer DMA handler */
  2248. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  2249. /* Disable the DMA */
  2250. HAL_DMA_Abort(hdma);
  2251. switch (CaptureChannel)
  2252. {
  2253. case HRTIM_CAPTUREUNIT_1:
  2254. {
  2255. /* Reset the capture unit trigger */
  2256. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
  2257. /* Disable the capture unit 1 DMA request */
  2258. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
  2259. }
  2260. break;
  2261. case HRTIM_CAPTUREUNIT_2:
  2262. {
  2263. /* Reset the capture unit trigger */
  2264. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
  2265. /* Disable the capture unit 2 DMA request */
  2266. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
  2267. }
  2268. break;
  2269. }
  2270. /* Disable the timer counter */
  2271. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
  2272. (hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
  2273. {
  2274. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2275. }
  2276. hhrtim->State = HAL_HRTIM_STATE_READY;
  2277. /* Process Unlocked */
  2278. __HAL_UNLOCK(hhrtim);
  2279. return HAL_OK;
  2280. }
  2281. /**
  2282. * @}
  2283. */
  2284. /** @defgroup HRTIM_Exported_Functions_Group6 Simple one pulse functions
  2285. * @brief Simple one pulse functions
  2286. @verbatim
  2287. ===============================================================================
  2288. ##### Simple one pulse functions #####
  2289. ===============================================================================
  2290. [..] This section provides functions allowing to:
  2291. (+) Configure one pulse channel
  2292. (+) Start one pulse generation
  2293. (+) Stop one pulse generation
  2294. (+) Start one pulse generation and enable interrupt
  2295. (+) Stop one pulse generation and disable interrupt
  2296. -@- When a HRTIM timer operates in simple one pulse mode
  2297. the timer counter is started in response to transition detected
  2298. on a given external event input to generate a pulse with a
  2299. programmable length after a programmable delay.
  2300. @endverbatim
  2301. * @{
  2302. */
  2303. /**
  2304. * @brief Configures an output simple one pulse mode
  2305. * @param hhrtim: pointer to HAL HRTIM handle
  2306. * @param TimerIdx: Timer index
  2307. * This parameter can be one of the following values:
  2308. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2309. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2310. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2311. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2312. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2313. * @param OnePulseChannel: Timer output
  2314. * This parameter can be one of the following values:
  2315. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2316. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2317. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2318. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2319. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2320. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2321. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2322. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2323. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2324. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2325. * @param pSimpleOnePulseChannelCfg: pointer to the basic one pulse output configuration structure
  2326. * @note When the timer operates in basic one pulse mode:
  2327. * the timer counter is implicitely started by the reset event,
  2328. * the reset of the timer counter is triggered by the designated external event
  2329. * GPIO input is implicitly used as event source,
  2330. * Output 1 is implicitly controlled by the compare unit 1,
  2331. * Output 2 is implicitly controlled by the compare unit 2.
  2332. * Output Set/Reset crossbar is set as follows:
  2333. * Output 1: SETx1R = CMP1, RSTx1R = PER
  2334. * Output 2: SETx2R = CMP2, RST2R = PER
  2335. * @retval HAL status
  2336. * @note If HAL_HRTIM_SimpleOnePulseChannelConfig is called for both timer
  2337. * outputs, the reset event related configuration data provided in the
  2338. * second call will override the reset event related configuration data
  2339. * provided in the first call.
  2340. */
  2341. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef * hhrtim,
  2342. uint32_t TimerIdx,
  2343. uint32_t OnePulseChannel,
  2344. HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg)
  2345. {
  2346. uint32_t CompareUnit = 0xFFFFFFFFU;
  2347. HRTIM_CompareCfgTypeDef CompareCfg;
  2348. HRTIM_OutputCfgTypeDef OutputCfg;
  2349. HRTIM_EventCfgTypeDef EventCfg;
  2350. /* Check parameters */
  2351. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2352. assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOnePulseChannelCfg->OutputPolarity));
  2353. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOnePulseChannelCfg->OutputIdleLevel));
  2354. assert_param(IS_HRTIM_EVENT(pSimpleOnePulseChannelCfg->Event));
  2355. assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleOnePulseChannelCfg->EventSensitivity,
  2356. pSimpleOnePulseChannelCfg->EventPolarity));
  2357. assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleOnePulseChannelCfg->EventSensitivity));
  2358. assert_param(IS_HRTIM_EVENTFILTER(pSimpleOnePulseChannelCfg->Event,
  2359. pSimpleOnePulseChannelCfg->EventFilter));
  2360. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2361. {
  2362. return HAL_BUSY;
  2363. }
  2364. /* Process Locked */
  2365. __HAL_LOCK(hhrtim);
  2366. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2367. /* Configure timer compare unit */
  2368. switch (OnePulseChannel)
  2369. {
  2370. case HRTIM_OUTPUT_TA1:
  2371. case HRTIM_OUTPUT_TB1:
  2372. case HRTIM_OUTPUT_TC1:
  2373. case HRTIM_OUTPUT_TD1:
  2374. case HRTIM_OUTPUT_TE1:
  2375. {
  2376. CompareUnit = HRTIM_COMPAREUNIT_1;
  2377. }
  2378. break;
  2379. case HRTIM_OUTPUT_TA2:
  2380. case HRTIM_OUTPUT_TB2:
  2381. case HRTIM_OUTPUT_TC2:
  2382. case HRTIM_OUTPUT_TD2:
  2383. case HRTIM_OUTPUT_TE2:
  2384. {
  2385. CompareUnit = HRTIM_COMPAREUNIT_2;
  2386. }
  2387. break;
  2388. }
  2389. CompareCfg.CompareValue = pSimpleOnePulseChannelCfg->Pulse;
  2390. CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
  2391. CompareCfg.AutoDelayedTimeout = 0;
  2392. HRTIM_CompareUnitConfig(hhrtim,
  2393. TimerIdx,
  2394. CompareUnit,
  2395. &CompareCfg);
  2396. /* Configure timer output */
  2397. OutputCfg.Polarity = pSimpleOnePulseChannelCfg->OutputPolarity;
  2398. OutputCfg.IdleLevel = pSimpleOnePulseChannelCfg->OutputIdleLevel;
  2399. OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
  2400. OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
  2401. OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
  2402. OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
  2403. if (CompareUnit == HRTIM_COMPAREUNIT_1)
  2404. {
  2405. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
  2406. }
  2407. else
  2408. {
  2409. OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
  2410. }
  2411. OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER;
  2412. HRTIM_OutputConfig(hhrtim,
  2413. TimerIdx,
  2414. OnePulseChannel,
  2415. &OutputCfg);
  2416. /* Configure external event channel */
  2417. EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
  2418. EventCfg.Filter = pSimpleOnePulseChannelCfg->EventFilter;
  2419. EventCfg.Polarity = pSimpleOnePulseChannelCfg->EventPolarity;
  2420. EventCfg.Sensitivity = pSimpleOnePulseChannelCfg->EventSensitivity;
  2421. EventCfg.Source = HRTIM_EVENTSRC_1;
  2422. HRTIM_EventConfig(hhrtim,
  2423. pSimpleOnePulseChannelCfg->Event,
  2424. &EventCfg);
  2425. /* Configure the timer reset register */
  2426. HRTIM_TIM_ResetConfig(hhrtim,
  2427. TimerIdx,
  2428. pSimpleOnePulseChannelCfg->Event);
  2429. hhrtim->State = HAL_HRTIM_STATE_READY;
  2430. /* Process Unlocked */
  2431. __HAL_UNLOCK(hhrtim);
  2432. return HAL_OK;
  2433. }
  2434. /**
  2435. * @brief Enables the simple one pulse signal generation on the designed output
  2436. * @param hhrtim: pointer to HAL HRTIM handle
  2437. * @param TimerIdx: Timer index
  2438. * This parameter can be one of the following values:
  2439. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2440. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2441. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2442. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2443. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2444. * @param OnePulseChannel: Timer output
  2445. * This parameter can be one of the following values:
  2446. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2447. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2448. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2449. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2450. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2451. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2452. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2453. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2454. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2455. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2456. * @retval HAL status
  2457. */
  2458. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef * hhrtim,
  2459. uint32_t TimerIdx,
  2460. uint32_t OnePulseChannel)
  2461. {
  2462. /* Check the parameters */
  2463. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2464. /* Process Locked */
  2465. __HAL_LOCK(hhrtim);
  2466. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2467. /* Enable the timer output */
  2468. hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;
  2469. /* Enable the timer counter */
  2470. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2471. hhrtim->State = HAL_HRTIM_STATE_READY;
  2472. /* Process Unlocked */
  2473. __HAL_UNLOCK(hhrtim);
  2474. return HAL_OK;
  2475. }
  2476. /**
  2477. * @brief Disables the simple one pulse signal generation on the designed output
  2478. * @param hhrtim: pointer to HAL HRTIM handle
  2479. * @param TimerIdx: Timer index
  2480. * This parameter can be one of the following values:
  2481. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2482. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2483. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2484. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2485. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2486. * @param OnePulseChannel: Timer output
  2487. * This parameter can be one of the following values:
  2488. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2489. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2490. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2491. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2492. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2493. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2494. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2495. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2496. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2497. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2498. * @retval HAL status
  2499. */
  2500. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef * hhrtim,
  2501. uint32_t TimerIdx,
  2502. uint32_t OnePulseChannel)
  2503. {
  2504. /* Check the parameters */
  2505. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2506. /* Process Locked */
  2507. __HAL_LOCK(hhrtim);
  2508. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2509. /* Disable the timer output */
  2510. hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;
  2511. /* Disable the timer counter */
  2512. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2513. hhrtim->State = HAL_HRTIM_STATE_READY;
  2514. /* Process Unlocked */
  2515. __HAL_UNLOCK(hhrtim);
  2516. return HAL_OK;
  2517. }
  2518. /**
  2519. * @brief Enables the simple one pulse signal generation on the designed output
  2520. * (The compare interrupt is enabled (pulse start)).
  2521. * @param hhrtim: pointer to HAL HRTIM handle
  2522. * @param TimerIdx: Timer index
  2523. * This parameter can be one of the following values:
  2524. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2525. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2526. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2527. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2528. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2529. * @param OnePulseChannel: Timer output
  2530. * This parameter can be one of the following values:
  2531. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2532. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2533. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2534. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2535. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2536. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2537. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2538. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2539. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2540. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2541. * @retval HAL status
  2542. */
  2543. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart_IT(HRTIM_HandleTypeDef * hhrtim,
  2544. uint32_t TimerIdx,
  2545. uint32_t OnePulseChannel)
  2546. {
  2547. /* Check the parameters */
  2548. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2549. /* Process Locked */
  2550. __HAL_LOCK(hhrtim);
  2551. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2552. /* Enable the timer output */
  2553. hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;
  2554. /* Enable the timer interrupt (depends on the OnePulse output) */
  2555. switch (OnePulseChannel)
  2556. {
  2557. case HRTIM_OUTPUT_TA1:
  2558. case HRTIM_OUTPUT_TB1:
  2559. case HRTIM_OUTPUT_TC1:
  2560. case HRTIM_OUTPUT_TD1:
  2561. case HRTIM_OUTPUT_TE1:
  2562. {
  2563. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  2564. }
  2565. break;
  2566. case HRTIM_OUTPUT_TA2:
  2567. case HRTIM_OUTPUT_TB2:
  2568. case HRTIM_OUTPUT_TC2:
  2569. case HRTIM_OUTPUT_TD2:
  2570. case HRTIM_OUTPUT_TE2:
  2571. {
  2572. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  2573. }
  2574. break;
  2575. }
  2576. /* Enable the timer counter */
  2577. __HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2578. hhrtim->State = HAL_HRTIM_STATE_READY;
  2579. /* Process Unlocked */
  2580. __HAL_UNLOCK(hhrtim);
  2581. return HAL_OK;
  2582. }
  2583. /**
  2584. * @brief Disables the simple one pulse signal generation on the designed output
  2585. * (The compare interrupt is disabled).
  2586. * @param hhrtim: pointer to HAL HRTIM handle
  2587. * @param TimerIdx: Timer index
  2588. * This parameter can be one of the following values:
  2589. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  2590. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  2591. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  2592. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  2593. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  2594. * @param OnePulseChannel: Timer output
  2595. * This parameter can be one of the following values:
  2596. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  2597. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  2598. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  2599. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  2600. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  2601. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  2602. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  2603. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  2604. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  2605. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  2606. * @retval HAL status
  2607. */
  2608. HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop_IT(HRTIM_HandleTypeDef * hhrtim,
  2609. uint32_t TimerIdx,
  2610. uint32_t OnePulseChannel)
  2611. {
  2612. /* Check the parameters */
  2613. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
  2614. /* Process Locked */
  2615. __HAL_LOCK(hhrtim);
  2616. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2617. /* Disable the timer output */
  2618. hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;
  2619. /* Disable the timer interrupt (depends on the OnePulse output) */
  2620. switch (OnePulseChannel)
  2621. {
  2622. case HRTIM_OUTPUT_TA1:
  2623. case HRTIM_OUTPUT_TB1:
  2624. case HRTIM_OUTPUT_TC1:
  2625. case HRTIM_OUTPUT_TD1:
  2626. case HRTIM_OUTPUT_TE1:
  2627. {
  2628. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  2629. }
  2630. break;
  2631. case HRTIM_OUTPUT_TA2:
  2632. case HRTIM_OUTPUT_TB2:
  2633. case HRTIM_OUTPUT_TC2:
  2634. case HRTIM_OUTPUT_TD2:
  2635. case HRTIM_OUTPUT_TE2:
  2636. {
  2637. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  2638. }
  2639. break;
  2640. }
  2641. /* Disable the timer counter */
  2642. __HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
  2643. hhrtim->State = HAL_HRTIM_STATE_READY;
  2644. /* Process Unlocked */
  2645. __HAL_UNLOCK(hhrtim);
  2646. return HAL_OK;
  2647. }
  2648. /**
  2649. * @}
  2650. */
  2651. /** @defgroup HRTIM_Exported_Functions_Group7 Configuration functions
  2652. * @brief HRTIM configuration functions
  2653. @verbatim
  2654. ===============================================================================
  2655. ##### HRTIM configuration functions #####
  2656. ===============================================================================
  2657. [..] This section provides functions allowing to configure the HRTIM
  2658. resources shared by all the HRTIM timers operating in waveform mode:
  2659. (+) Configure the burst mode controller
  2660. (+) Configure an external event conditionning
  2661. (+) Configure the external events sampling clock
  2662. (+) Configure a fault conditionning
  2663. (+) Enable or disable fault inputs
  2664. (+) Configure the faults sampling clock
  2665. (+) Configure an ADC trigger
  2666. @endverbatim
  2667. * @{
  2668. */
  2669. /**
  2670. * @brief Configures the burst mode feature of the HRTIM
  2671. * @param hhrtim: pointer to HAL HRTIM handle
  2672. * @param pBurstModeCfg: pointer to the burst mode configuration structure
  2673. * @retval HAL status
  2674. * @note This function must be called before starting the burst mode
  2675. * controller
  2676. */
  2677. HAL_StatusTypeDef HAL_HRTIM_BurstModeConfig(HRTIM_HandleTypeDef * hhrtim,
  2678. HRTIM_BurstModeCfgTypeDef* pBurstModeCfg)
  2679. {
  2680. uint32_t hrtim_bmcr;
  2681. /* Check parameters */
  2682. assert_param(IS_HRTIM_BURSTMODE(pBurstModeCfg->Mode));
  2683. assert_param(IS_HRTIM_BURSTMODECLOCKSOURCE(pBurstModeCfg->ClockSource));
  2684. assert_param(IS_HRTIM_HRTIM_BURSTMODEPRESCALER(pBurstModeCfg->Prescaler));
  2685. assert_param(IS_HRTIM_BURSTMODEPRELOAD(pBurstModeCfg->PreloadEnable));
  2686. assert_param(IS_HRTIM_BURSTMODETRIGGER(pBurstModeCfg->Trigger));
  2687. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2688. {
  2689. return HAL_BUSY;
  2690. }
  2691. /* Process Locked */
  2692. __HAL_LOCK(hhrtim);
  2693. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2694. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  2695. /* Set the burst mode operating mode */
  2696. hrtim_bmcr &= ~(HRTIM_BMCR_BMOM);
  2697. hrtim_bmcr |= pBurstModeCfg->Mode;
  2698. /* Set the burst mode clock source */
  2699. hrtim_bmcr &= ~(HRTIM_BMCR_BMCLK);
  2700. hrtim_bmcr |= pBurstModeCfg->ClockSource;
  2701. /* Set the burst mode prescaler */
  2702. hrtim_bmcr &= ~(HRTIM_BMCR_BMPRSC);
  2703. hrtim_bmcr |= pBurstModeCfg->Prescaler;
  2704. /* Enable/disable burst mode registers preload */
  2705. hrtim_bmcr &= ~(HRTIM_BMCR_BMPREN);
  2706. hrtim_bmcr |= pBurstModeCfg->PreloadEnable;
  2707. /* Set the burst mode trigger */
  2708. hhrtim->Instance->sCommonRegs.BMTRGR = pBurstModeCfg->Trigger;
  2709. /* Set the burst mode compare value */
  2710. hhrtim->Instance->sCommonRegs.BMCMPR = pBurstModeCfg->IdleDuration;
  2711. /* Set the burst mode period */
  2712. hhrtim->Instance->sCommonRegs.BMPER = pBurstModeCfg->Period;
  2713. /* Update the HRTIM registers */
  2714. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  2715. hhrtim->State = HAL_HRTIM_STATE_READY;
  2716. /* Process Unlocked */
  2717. __HAL_UNLOCK(hhrtim);
  2718. return HAL_OK;
  2719. }
  2720. /**
  2721. * @brief Configures the conditioning of an external event
  2722. * @param hhrtim: pointer to HAL HRTIM handle
  2723. * @param Event: external event to configure
  2724. * This parameter can be one of the following values:
  2725. * @arg HRTIM_EVENT_1: External event 1
  2726. * @arg HRTIM_EVENT_2: External event 2
  2727. * @arg HRTIM_EVENT_3: External event 3
  2728. * @arg HRTIM_EVENT_4: External event 4
  2729. * @arg HRTIM_EVENT_5: External event 5
  2730. * @arg HRTIM_EVENT_6: External event 6
  2731. * @arg HRTIM_EVENT_7: External event 7
  2732. * @arg HRTIM_EVENT_8: External event 8
  2733. * @arg HRTIM_EVENT_9: External event 9
  2734. * @arg HRTIM_EVENT_10: External event 10
  2735. * @param pEventCfg: pointer to the event conditioning configuration structure
  2736. * @note This function must be called before starting the timer
  2737. * @retval HAL status
  2738. */
  2739. HAL_StatusTypeDef HAL_HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
  2740. uint32_t Event,
  2741. HRTIM_EventCfgTypeDef* pEventCfg)
  2742. {
  2743. /* Check parameters */
  2744. assert_param(IS_HRTIM_EVENTSRC(pEventCfg->Source));
  2745. assert_param(IS_HRTIM_EVENTPOLARITY(pEventCfg->Sensitivity, pEventCfg->Polarity));
  2746. assert_param(IS_HRTIM_EVENTSENSITIVITY(pEventCfg->Sensitivity));
  2747. assert_param(IS_HRTIM_EVENTFASTMODE(Event, pEventCfg->FastMode));
  2748. assert_param(IS_HRTIM_EVENTFILTER(Event, pEventCfg->Filter));
  2749. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2750. {
  2751. return HAL_BUSY;
  2752. }
  2753. /* Process Locked */
  2754. __HAL_LOCK(hhrtim);
  2755. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2756. /* Configure the event channel */
  2757. HRTIM_EventConfig(hhrtim, Event, pEventCfg);
  2758. hhrtim->State = HAL_HRTIM_STATE_READY;
  2759. /* Process Unlocked */
  2760. __HAL_UNLOCK(hhrtim);
  2761. return HAL_OK;
  2762. }
  2763. /**
  2764. * @brief Configures the external event conditioning block prescaler
  2765. * @param hhrtim: pointer to HAL HRTIM handle
  2766. * @param Prescaler: Prescaler value
  2767. * This parameter can be one of the following values:
  2768. * @arg HRTIM_EVENTPRESCALER_DIV1: fEEVS=fHRTIM
  2769. * @arg HRTIM_EVENTPRESCALER_DIV2: fEEVS=fHRTIM / 2
  2770. * @arg HRTIM_EVENTPRESCALER_DIV4: fEEVS=fHRTIM / 4
  2771. * @arg HRTIM_EVENTPRESCALER_DIV8: fEEVS=fHRTIM / 8
  2772. * @note This function must be called before starting the timer
  2773. * @retval HAL status
  2774. */
  2775. HAL_StatusTypeDef HAL_HRTIM_EventPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
  2776. uint32_t Prescaler)
  2777. {
  2778. uint32_t hrtim_eecr3;
  2779. /* Check parameters */
  2780. assert_param(IS_HRTIM_EVENTPRESCALER(Prescaler));
  2781. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2782. {
  2783. return HAL_BUSY;
  2784. }
  2785. /* Process Locked */
  2786. __HAL_LOCK(hhrtim);
  2787. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2788. /* Set the external event prescaler */
  2789. hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3;
  2790. hrtim_eecr3 &= ~(HRTIM_EECR3_EEVSD);
  2791. hrtim_eecr3 |= Prescaler;
  2792. /* Update the HRTIM registers */
  2793. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  2794. hhrtim->State = HAL_HRTIM_STATE_READY;
  2795. /* Process Unlocked */
  2796. __HAL_UNLOCK(hhrtim);
  2797. return HAL_OK;
  2798. }
  2799. /**
  2800. * @brief Configures the conditioning of fault input
  2801. * @param hhrtim: pointer to HAL HRTIM handle
  2802. * @param Fault: fault input to configure
  2803. * This parameter can be one of the following values:
  2804. * @arg HRTIM_FAULT_1: Fault input 1
  2805. * @arg HRTIM_FAULT_2: Fault input 2
  2806. * @arg HRTIM_FAULT_3: Fault input 3
  2807. * @arg HRTIM_FAULT_4: Fault input 4
  2808. * @arg HRTIM_FAULT_5: Fault input 5
  2809. * @param pFaultCfg: pointer to the fault conditioning configuration structure
  2810. * @note This function must be called before starting the timer and before
  2811. * enabling faults inputs
  2812. * @retval HAL status
  2813. */
  2814. HAL_StatusTypeDef HAL_HRTIM_FaultConfig(HRTIM_HandleTypeDef * hhrtim,
  2815. uint32_t Fault,
  2816. HRTIM_FaultCfgTypeDef* pFaultCfg)
  2817. {
  2818. uint32_t hrtim_fltinr1;
  2819. uint32_t hrtim_fltinr2;
  2820. /* Check parameters */
  2821. assert_param(IS_HRTIM_FAULT(Fault));
  2822. assert_param(IS_HRTIM_FAULTSOURCE(pFaultCfg->Source));
  2823. assert_param(IS_HRTIM_FAULTPOLARITY(pFaultCfg->Polarity));
  2824. assert_param(IS_HRTIM_FAULTFILTER(pFaultCfg->Filter));
  2825. assert_param(IS_HRTIM_FAULTLOCK(pFaultCfg->Lock));
  2826. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2827. {
  2828. return HAL_BUSY;
  2829. }
  2830. /* Process Locked */
  2831. __HAL_LOCK(hhrtim);
  2832. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2833. /* Configure fault channel */
  2834. hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1;
  2835. hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
  2836. switch (Fault)
  2837. {
  2838. case HRTIM_FAULT_1:
  2839. {
  2840. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT1P | HRTIM_FLTINR1_FLT1SRC | HRTIM_FLTINR1_FLT1F | HRTIM_FLTINR1_FLT1LCK);
  2841. hrtim_fltinr1 |= pFaultCfg->Polarity;
  2842. hrtim_fltinr1 |= pFaultCfg->Source;
  2843. hrtim_fltinr1 |= pFaultCfg->Filter;
  2844. hrtim_fltinr1 |= pFaultCfg->Lock;
  2845. }
  2846. break;
  2847. case HRTIM_FAULT_2:
  2848. {
  2849. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT2P | HRTIM_FLTINR1_FLT2SRC | HRTIM_FLTINR1_FLT2F | HRTIM_FLTINR1_FLT2LCK);
  2850. hrtim_fltinr1 |= (pFaultCfg->Polarity << 8);
  2851. hrtim_fltinr1 |= (pFaultCfg->Source << 8);
  2852. hrtim_fltinr1 |= (pFaultCfg->Filter << 8);
  2853. hrtim_fltinr1 |= (pFaultCfg->Lock << 8);
  2854. }
  2855. break;
  2856. case HRTIM_FAULT_3:
  2857. {
  2858. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT3P | HRTIM_FLTINR1_FLT3SRC | HRTIM_FLTINR1_FLT3F | HRTIM_FLTINR1_FLT3LCK);
  2859. hrtim_fltinr1 |= (pFaultCfg->Polarity << 16);
  2860. hrtim_fltinr1 |= (pFaultCfg->Source << 16);
  2861. hrtim_fltinr1 |= (pFaultCfg->Filter << 16);
  2862. hrtim_fltinr1 |= (pFaultCfg->Lock << 16);
  2863. }
  2864. break;
  2865. case HRTIM_FAULT_4:
  2866. {
  2867. hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT4P | HRTIM_FLTINR1_FLT4SRC | HRTIM_FLTINR1_FLT4F | HRTIM_FLTINR1_FLT4LCK);
  2868. hrtim_fltinr1 |= (pFaultCfg->Polarity << 24);
  2869. hrtim_fltinr1 |= (pFaultCfg->Source << 24);
  2870. hrtim_fltinr1 |= (pFaultCfg->Filter << 24);
  2871. hrtim_fltinr1 |= (pFaultCfg->Lock << 24);
  2872. }
  2873. break;
  2874. case HRTIM_FAULT_5:
  2875. {
  2876. hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLT5P | HRTIM_FLTINR2_FLT5SRC | HRTIM_FLTINR2_FLT5F | HRTIM_FLTINR2_FLT5LCK);
  2877. hrtim_fltinr2 |= pFaultCfg->Polarity;
  2878. hrtim_fltinr2 |= pFaultCfg->Source;
  2879. hrtim_fltinr2 |= pFaultCfg->Filter;
  2880. hrtim_fltinr2 |= pFaultCfg->Lock;
  2881. }
  2882. break;
  2883. default:
  2884. break;
  2885. }
  2886. /* Update the HRTIM registers */
  2887. hhrtim->Instance->sCommonRegs.FLTINR1 = hrtim_fltinr1;
  2888. hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2;
  2889. hhrtim->State = HAL_HRTIM_STATE_READY;
  2890. /* Process Unlocked */
  2891. __HAL_UNLOCK(hhrtim);
  2892. return HAL_OK;
  2893. }
  2894. /**
  2895. * @brief Configures the fault conditioning block prescaler
  2896. * @param hhrtim: pointer to HAL HRTIM handle
  2897. * @param Prescaler: Prescaler value
  2898. * This parameter can be one of the following values:
  2899. * @arg HRTIM_FAULTPRESCALER_DIV1: fFLTS=fHRTIM
  2900. * @arg HRTIM_FAULTPRESCALER_DIV2: fFLTS=fHRTIM / 2
  2901. * @arg HRTIM_FAULTPRESCALER_DIV4: fFLTS=fHRTIM / 4
  2902. * @arg HRTIM_FAULTPRESCALER_DIV8: fFLTS=fHRTIM / 8
  2903. * @retval HAL status
  2904. * @note This function must be called before starting the timer and before
  2905. * enabling faults inputs
  2906. */
  2907. HAL_StatusTypeDef HAL_HRTIM_FaultPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
  2908. uint32_t Prescaler)
  2909. {
  2910. uint32_t hrtim_fltinr2;
  2911. /* Check parameters */
  2912. assert_param(IS_HRTIM_FAULTPRESCALER(Prescaler));
  2913. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  2914. {
  2915. return HAL_BUSY;
  2916. }
  2917. /* Process Locked */
  2918. __HAL_LOCK(hhrtim);
  2919. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  2920. /* Set the external event prescaler */
  2921. hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
  2922. hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLTSD);
  2923. hrtim_fltinr2 |= Prescaler;
  2924. /* Update the HRTIM registers */
  2925. hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2;
  2926. hhrtim->State = HAL_HRTIM_STATE_READY;
  2927. /* Process Unlocked */
  2928. __HAL_UNLOCK(hhrtim);
  2929. return HAL_OK;
  2930. }
  2931. /**
  2932. * @brief Enables or disables the HRTIMx Fault mode.
  2933. * @param hhrtim: pointer to HAL HRTIM handle
  2934. * @param Faults: fault input(s) to enable or disable
  2935. * This parameter can be any combination of the following values:
  2936. * @arg HRTIM_FAULT_1: Fault input 1
  2937. * @arg HRTIM_FAULT_2: Fault input 2
  2938. * @arg HRTIM_FAULT_3: Fault input 3
  2939. * @arg HRTIM_FAULT_4: Fault input 4
  2940. * @arg HRTIM_FAULT_5: Fault input 5
  2941. * @param Enable: Fault(s) enabling
  2942. * This parameter can be one of the following values:
  2943. * @arg HRTIM_FAULTMODECTL_ENABLED: Fault(s) enabled
  2944. * @arg HRTIM_FAULTMODECTL_DISABLED: Fault(s) disabled
  2945. * @retval None
  2946. */
  2947. void HAL_HRTIM_FaultModeCtl(HRTIM_HandleTypeDef * hhrtim,
  2948. uint32_t Faults,
  2949. uint32_t Enable)
  2950. {
  2951. uint32_t hrtim_fltinr1;
  2952. uint32_t hrtim_fltinr2;
  2953. /* Check parameters */
  2954. assert_param(IS_HRTIM_FAULT(Faults));
  2955. assert_param(IS_HRTIM_FAULTMODECTL(Enable));
  2956. /* Configure fault channel */
  2957. hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1;
  2958. hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
  2959. if ((Faults & HRTIM_FAULT_1) != RESET)
  2960. {
  2961. hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT1E;
  2962. hrtim_fltinr1 |= Enable;
  2963. }
  2964. if ((Faults & HRTIM_FAULT_2) != RESET)
  2965. {
  2966. hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT2E;
  2967. hrtim_fltinr1 |= (Enable << 8);
  2968. }
  2969. if ((Faults & HRTIM_FAULT_3) != RESET)
  2970. {
  2971. hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT3E;
  2972. hrtim_fltinr1 |= (Enable << 16);
  2973. }
  2974. if ((Faults & HRTIM_FAULT_4) != RESET)
  2975. {
  2976. hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT4E;
  2977. hrtim_fltinr1 |= (Enable << 24);
  2978. }
  2979. if ((Faults & HRTIM_FAULT_5) != RESET)
  2980. {
  2981. hrtim_fltinr2 &= ~HRTIM_FLTINR2_FLT5E;
  2982. hrtim_fltinr2 |= Enable;
  2983. }
  2984. /* Update the HRTIMx registers */
  2985. hhrtim->Instance->sCommonRegs.FLTINR1 = hrtim_fltinr1;
  2986. hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2;
  2987. }
  2988. /**
  2989. * @brief Configures both the ADC trigger register update source and the ADC
  2990. * trigger source.
  2991. * @param hhrtim: pointer to HAL HRTIM handle
  2992. * @param ADCTrigger: ADC trigger to configure
  2993. * This parameter can be one of the following values:
  2994. * @arg HRTIM_ADCTRIGGER_1: ADC trigger 1
  2995. * @arg HRTIM_ADCTRIGGER_2: ADC trigger 2
  2996. * @arg HRTIM_ADCTRIGGER_3: ADC trigger 3
  2997. * @arg HRTIM_ADCTRIGGER_4: ADC trigger 4
  2998. * @param pADCTriggerCfg: pointer to the ADC trigger configuration structure
  2999. * @retval HAL status
  3000. * @note This function must be called before starting the timer
  3001. */
  3002. HAL_StatusTypeDef HAL_HRTIM_ADCTriggerConfig(HRTIM_HandleTypeDef * hhrtim,
  3003. uint32_t ADCTrigger,
  3004. HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg)
  3005. {
  3006. uint32_t hrtim_cr1;
  3007. /* Check parameters */
  3008. assert_param(IS_HRTIM_ADCTRIGGER(ADCTrigger));
  3009. assert_param(IS_HRTIM_ADCTRIGGERUPDATE(pADCTriggerCfg->UpdateSource));
  3010. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3011. {
  3012. return HAL_BUSY;
  3013. }
  3014. /* Process Locked */
  3015. __HAL_LOCK(hhrtim);
  3016. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3017. /* Set the ADC trigger update source */
  3018. hrtim_cr1 = hhrtim->Instance->sCommonRegs.CR1;
  3019. switch (ADCTrigger)
  3020. {
  3021. case HRTIM_ADCTRIGGER_1:
  3022. {
  3023. hrtim_cr1 &= ~(HRTIM_CR1_ADC1USRC);
  3024. hrtim_cr1 |= (pADCTriggerCfg->UpdateSource & HRTIM_CR1_ADC1USRC);
  3025. /* Set the ADC trigger 1 source */
  3026. hhrtim->Instance->sCommonRegs.ADC1R = pADCTriggerCfg->Trigger;
  3027. }
  3028. break;
  3029. case HRTIM_ADCTRIGGER_2:
  3030. {
  3031. hrtim_cr1 &= ~(HRTIM_CR1_ADC2USRC);
  3032. hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 3) & HRTIM_CR1_ADC2USRC);
  3033. /* Set the ADC trigger 2 source */
  3034. hhrtim->Instance->sCommonRegs.ADC2R = pADCTriggerCfg->Trigger;
  3035. }
  3036. break;
  3037. case HRTIM_ADCTRIGGER_3:
  3038. {
  3039. hrtim_cr1 &= ~(HRTIM_CR1_ADC3USRC);
  3040. hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 6) & HRTIM_CR1_ADC3USRC);
  3041. /* Set the ADC trigger 3 source */
  3042. hhrtim->Instance->sCommonRegs.ADC3R = pADCTriggerCfg->Trigger;
  3043. }
  3044. break;
  3045. case HRTIM_ADCTRIGGER_4:
  3046. {
  3047. hrtim_cr1 &= ~(HRTIM_CR1_ADC4USRC);
  3048. hrtim_cr1 |= ((pADCTriggerCfg->UpdateSource << 9) & HRTIM_CR1_ADC4USRC);
  3049. /* Set the ADC trigger 4 source */
  3050. hhrtim->Instance->sCommonRegs.ADC4R = pADCTriggerCfg->Trigger;
  3051. }
  3052. break;
  3053. }
  3054. /* Update the HRTIM registers */
  3055. hhrtim->Instance->sCommonRegs.CR1 = hrtim_cr1;
  3056. hhrtim->State = HAL_HRTIM_STATE_READY;
  3057. /* Process Unlocked */
  3058. __HAL_UNLOCK(hhrtim);
  3059. return HAL_OK;
  3060. }
  3061. /**
  3062. * @}
  3063. */
  3064. /** @defgroup HRTIM_Exported_Functions_Group8 Timer waveform configuration and functions
  3065. * @brief HRTIM timer configuration and control functions
  3066. @verbatim
  3067. ===============================================================================
  3068. ##### HRTIM timer configuration and control functions #####
  3069. ===============================================================================
  3070. [..] This section provides functions used to configure and control a
  3071. HRTIM timer operating in waveform mode:
  3072. (+) Configure HRTIM timer general behavior
  3073. (+) Configure HRTIM timer event filtering
  3074. (+) Configure HRTIM timer deadtime insertion
  3075. (+) Configure HRTIM timer chopper mode
  3076. (+) Configure HRTIM timer burst DMA
  3077. (+) Configure HRTIM timer compare unit
  3078. (+) Configure HRTIM timer capture unit
  3079. (+) Configure HRTIM timer output
  3080. (+) Set HRTIM timer output level
  3081. (+) Enable HRTIM timer output
  3082. (+) Disable HRTIM timer output
  3083. (+) Start HRTIM timer
  3084. (+) Stop HRTIM timer
  3085. (+) Start HRTIM timer and enable interrupt
  3086. (+) Stop HRTIM timer and disable interrupt
  3087. (+) Start HRTIM timer and enable DMA transfer
  3088. (+) Stop HRTIM timer and disable DMA transfer
  3089. (+) Enable or disable the burst mode controller
  3090. (+) Start the burst mode controller (by software)
  3091. (+) Trigger a Capture (by software)
  3092. (+) Update the HRTIM timer preloadable registers (by software)
  3093. (+) Reset the HRTIM timer counter (by software)
  3094. (+) Start a burst DMA transfer
  3095. (+) Enable timer register update
  3096. (+) Disable timer register update
  3097. @endverbatim
  3098. * @{
  3099. */
  3100. /**
  3101. * @brief Configures the general behavior of a timer operating in waveform mode
  3102. * @param hhrtim: pointer to HAL HRTIM handle
  3103. * @param TimerIdx: Timer index
  3104. * This parameter can be one of the following values:
  3105. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  3106. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3107. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3108. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3109. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3110. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3111. * @param pTimerCfg: pointer to the timer configuration structure
  3112. * @note When the timer operates in waveform mode, all the features supported by
  3113. * the HRTIM are available without any limitation.
  3114. * @retval HAL status
  3115. * @note This function must be called before starting the timer
  3116. */
  3117. HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef * hhrtim,
  3118. uint32_t TimerIdx,
  3119. HRTIM_TimerCfgTypeDef * pTimerCfg)
  3120. {
  3121. /* Check parameters */
  3122. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  3123. /* Relevant for all HRTIM timers, including the master */
  3124. assert_param(IS_HRTIM_HALFMODE(pTimerCfg->HalfModeEnable));
  3125. assert_param(IS_HRTIM_SYNCSTART(pTimerCfg->StartOnSync));
  3126. assert_param(IS_HRTIM_SYNCRESET(pTimerCfg->ResetOnSync));
  3127. assert_param(IS_HHRTIM_DACSYNC(pTimerCfg->DACSynchro));
  3128. assert_param(IS_HRTIM_PRELOAD(pTimerCfg->PreloadEnable));
  3129. assert_param(IS_HRTIM_TIMERBURSTMODE(pTimerCfg->BurstMode));
  3130. assert_param(IS_HRTIM_UPDATEONREPETITION(pTimerCfg->RepetitionUpdate));
  3131. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3132. {
  3133. return HAL_BUSY;
  3134. }
  3135. /* Process Locked */
  3136. __HAL_LOCK(hhrtim);
  3137. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3138. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  3139. {
  3140. /* Check parameters */
  3141. assert_param(IS_HRTIM_UPDATEGATING_MASTER(pTimerCfg->UpdateGating));
  3142. assert_param(IS_HRTIM_MASTER_IT(pTimerCfg->InterruptRequests));
  3143. assert_param(IS_HRTIM_MASTER_DMA(pTimerCfg->DMARequests));
  3144. /* Configure master timer */
  3145. HRTIM_MasterWaveform_Config(hhrtim, pTimerCfg);
  3146. }
  3147. else
  3148. {
  3149. /* Check parameters */
  3150. assert_param(IS_HRTIM_UPDATEGATING_TIM(pTimerCfg->UpdateGating));
  3151. assert_param(IS_HRTIM_TIM_IT(pTimerCfg->InterruptRequests));
  3152. assert_param(IS_HRTIM_TIM_DMA(pTimerCfg->DMARequests));
  3153. assert_param(IS_HRTIM_TIMPUSHPULLMODE(pTimerCfg->PushPull));
  3154. assert_param(IS_HRTIM_TIMFAULTENABLE(pTimerCfg->FaultEnable));
  3155. assert_param(IS_HRTIM_TIMFAULTLOCK(pTimerCfg->FaultLock));
  3156. assert_param(IS_HRTIM_TIMDEADTIMEINSERTION(pTimerCfg->PushPull,
  3157. pTimerCfg->DeadTimeInsertion));
  3158. assert_param(IS_HRTIM_TIMDELAYEDPROTECTION(pTimerCfg->PushPull,
  3159. pTimerCfg->DelayedProtectionMode));
  3160. assert_param(IS_HRTIM_TIMUPDATETRIGGER(pTimerCfg->UpdateTrigger));
  3161. assert_param(IS_HRTIM_TIMRESETTRIGGER(pTimerCfg->ResetTrigger));
  3162. assert_param(IS_HRTIM_TIMUPDATEONRESET(pTimerCfg->ResetUpdate));
  3163. /* Configure timing unit */
  3164. HRTIM_TimingUnitWaveform_Config(hhrtim, TimerIdx, pTimerCfg);
  3165. }
  3166. /* Update timer parameters */
  3167. hhrtim->TimerParam[TimerIdx].InterruptRequests = pTimerCfg->InterruptRequests;
  3168. hhrtim->TimerParam[TimerIdx].DMARequests = pTimerCfg->DMARequests;
  3169. hhrtim->TimerParam[TimerIdx].DMASrcAddress = pTimerCfg->DMASrcAddress;
  3170. hhrtim->TimerParam[TimerIdx].DMADstAddress = pTimerCfg->DMADstAddress;
  3171. hhrtim->TimerParam[TimerIdx].DMASize = pTimerCfg->DMASize;
  3172. /* Force a software update */
  3173. HRTIM_ForceRegistersUpdate(hhrtim, TimerIdx);
  3174. hhrtim->State = HAL_HRTIM_STATE_READY;
  3175. /* Process Unlocked */
  3176. __HAL_UNLOCK(hhrtim);
  3177. return HAL_OK;
  3178. }
  3179. /**
  3180. * @brief Configures the event filtering capabilities of a timer (blanking, windowing)
  3181. * @param hhrtim: pointer to HAL HRTIM handle
  3182. * @param TimerIdx: Timer index
  3183. * This parameter can be one of the following values:
  3184. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3185. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3186. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3187. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3188. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3189. * @param Event: external event for which timer event filtering must be configured
  3190. * This parameter can be one of the following values:
  3191. * @arg HRTIM_EVENT_NONE: Reset timer event filtering configuration
  3192. * @arg HRTIM_EVENT_1: External event 1
  3193. * @arg HRTIM_EVENT_2: External event 2
  3194. * @arg HRTIM_EVENT_3: External event 3
  3195. * @arg HRTIM_EVENT_4: External event 4
  3196. * @arg HRTIM_EVENT_5: External event 5
  3197. * @arg HRTIM_EVENT_6: External event 6
  3198. * @arg HRTIM_EVENT_7: External event 7
  3199. * @arg HRTIM_EVENT_8: External event 8
  3200. * @arg HRTIM_EVENT_9: External event 9
  3201. * @arg HRTIM_EVENT_10: External event 10
  3202. * @param pTimerEventFilteringCfg: pointer to the timer event filtering configuration structure
  3203. * @note This function must be called before starting the timer
  3204. * @retval HAL status
  3205. */
  3206. HAL_StatusTypeDef HAL_HRTIM_TimerEventFilteringConfig(HRTIM_HandleTypeDef * hhrtim,
  3207. uint32_t TimerIdx,
  3208. uint32_t Event,
  3209. HRTIM_TimerEventFilteringCfgTypeDef* pTimerEventFilteringCfg)
  3210. {
  3211. uint32_t hrtim_eefr;
  3212. /* Check parameters */
  3213. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  3214. assert_param(IS_HRTIM_EVENT(Event));
  3215. assert_param(IS_HRTIM_TIMEVENTFILTER(pTimerEventFilteringCfg->Filter));
  3216. assert_param(IS_HRTIM_TIMEVENTLATCH(pTimerEventFilteringCfg->Latch));
  3217. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3218. {
  3219. return HAL_BUSY;
  3220. }
  3221. /* Process Locked */
  3222. __HAL_LOCK(hhrtim);
  3223. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3224. /* Configure timer event filtering capabilities */
  3225. switch (Event)
  3226. {
  3227. case HRTIM_EVENT_NONE:
  3228. {
  3229. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = 0;
  3230. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = 0;
  3231. }
  3232. break;
  3233. case HRTIM_EVENT_1:
  3234. {
  3235. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3236. hrtim_eefr &= ~(HRTIM_EEFR1_EE1FLTR | HRTIM_EEFR1_EE1LTCH);
  3237. hrtim_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch);
  3238. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3239. }
  3240. break;
  3241. case HRTIM_EVENT_2:
  3242. {
  3243. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3244. hrtim_eefr &= ~(HRTIM_EEFR1_EE2FLTR | HRTIM_EEFR1_EE2LTCH);
  3245. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6);
  3246. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3247. }
  3248. break;
  3249. case HRTIM_EVENT_3:
  3250. {
  3251. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3252. hrtim_eefr &= ~(HRTIM_EEFR1_EE3FLTR | HRTIM_EEFR1_EE3LTCH);
  3253. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12);
  3254. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3255. }
  3256. break;
  3257. case HRTIM_EVENT_4:
  3258. {
  3259. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3260. hrtim_eefr &= ~(HRTIM_EEFR1_EE4FLTR | HRTIM_EEFR1_EE4LTCH);
  3261. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18);
  3262. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3263. }
  3264. break;
  3265. case HRTIM_EVENT_5:
  3266. {
  3267. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
  3268. hrtim_eefr &= ~(HRTIM_EEFR1_EE5FLTR | HRTIM_EEFR1_EE5LTCH);
  3269. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24);
  3270. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
  3271. }
  3272. break;
  3273. case HRTIM_EVENT_6:
  3274. {
  3275. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3276. hrtim_eefr &= ~(HRTIM_EEFR2_EE6FLTR | HRTIM_EEFR2_EE6LTCH);
  3277. hrtim_eefr |= (pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch);
  3278. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3279. }
  3280. break;
  3281. case HRTIM_EVENT_7:
  3282. {
  3283. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3284. hrtim_eefr &= ~(HRTIM_EEFR2_EE7FLTR | HRTIM_EEFR2_EE7LTCH);
  3285. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 6);
  3286. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3287. }
  3288. break;
  3289. case HRTIM_EVENT_8:
  3290. {
  3291. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3292. hrtim_eefr &= ~(HRTIM_EEFR2_EE8FLTR | HRTIM_EEFR2_EE8LTCH);
  3293. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 12);
  3294. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3295. }
  3296. break;
  3297. case HRTIM_EVENT_9:
  3298. {
  3299. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3300. hrtim_eefr &= ~(HRTIM_EEFR2_EE9FLTR | HRTIM_EEFR2_EE9LTCH);
  3301. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 18);
  3302. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3303. }
  3304. break;
  3305. case HRTIM_EVENT_10:
  3306. {
  3307. hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
  3308. hrtim_eefr &= ~(HRTIM_EEFR2_EE10FLTR | HRTIM_EEFR2_EE10LTCH);
  3309. hrtim_eefr |= ((pTimerEventFilteringCfg->Filter | pTimerEventFilteringCfg->Latch) << 24);
  3310. hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
  3311. }
  3312. break;
  3313. }
  3314. hhrtim->State = HAL_HRTIM_STATE_READY;
  3315. /* Process Unlocked */
  3316. __HAL_UNLOCK(hhrtim);
  3317. return HAL_OK;
  3318. }
  3319. /**
  3320. * @brief Configures the deadtime insertion feature for a timer
  3321. * @param hhrtim: pointer to HAL HRTIM handle
  3322. * @param TimerIdx: Timer index
  3323. * This parameter can be one of the following values:
  3324. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3325. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3326. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3327. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3328. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3329. * @param pDeadTimeCfg: pointer to the deadtime insertion configuration structure
  3330. * @retval HAL status
  3331. * @note This function must be called before starting the timer
  3332. */
  3333. HAL_StatusTypeDef HAL_HRTIM_DeadTimeConfig(HRTIM_HandleTypeDef * hhrtim,
  3334. uint32_t TimerIdx,
  3335. HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg)
  3336. {
  3337. uint32_t hrtim_dtr;
  3338. /* Check parameters */
  3339. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  3340. assert_param(IS_HRTIM_TIMDEADTIME_PRESCALERRATIO(pDeadTimeCfg->Prescaler));
  3341. assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGN(pDeadTimeCfg->RisingSign));
  3342. assert_param(IS_HRTIM_TIMDEADTIME_RISINGLOCK(pDeadTimeCfg->RisingLock));
  3343. assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(pDeadTimeCfg->RisingSignLock));
  3344. assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGN(pDeadTimeCfg->FallingSign));
  3345. assert_param(IS_HRTIM_TIMDEADTIME_FALLINGLOCK(pDeadTimeCfg->FallingLock));
  3346. assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(pDeadTimeCfg->FallingSignLock));
  3347. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3348. {
  3349. return HAL_BUSY;
  3350. }
  3351. /* Process Locked */
  3352. __HAL_LOCK(hhrtim);
  3353. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3354. hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR;
  3355. /* Clear timer deadtime configuration */
  3356. hrtim_dtr &= ~(HRTIM_DTR_DTR | HRTIM_DTR_SDTR | HRTIM_DTR_DTPRSC |
  3357. HRTIM_DTR_DTRSLK | HRTIM_DTR_DTRLK | HRTIM_DTR_DTF |
  3358. HRTIM_DTR_SDTF | HRTIM_DTR_DTFSLK | HRTIM_DTR_DTFLK);
  3359. /* Set timer deadtime configuration */
  3360. hrtim_dtr |= pDeadTimeCfg->Prescaler;
  3361. hrtim_dtr |= pDeadTimeCfg->RisingValue;
  3362. hrtim_dtr |= pDeadTimeCfg->RisingSign;
  3363. hrtim_dtr |= pDeadTimeCfg->RisingSignLock;
  3364. hrtim_dtr |= pDeadTimeCfg->RisingLock;
  3365. hrtim_dtr |= (pDeadTimeCfg->FallingValue << 16);
  3366. hrtim_dtr |= pDeadTimeCfg->FallingSign;
  3367. hrtim_dtr |= pDeadTimeCfg->FallingSignLock;
  3368. hrtim_dtr |= pDeadTimeCfg->FallingLock;
  3369. /* Update the HRTIM registers */
  3370. hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR = hrtim_dtr;
  3371. hhrtim->State = HAL_HRTIM_STATE_READY;
  3372. /* Process Unlocked */
  3373. __HAL_UNLOCK(hhrtim);
  3374. return HAL_OK;
  3375. }
  3376. /**
  3377. * @brief Configures the chopper mode feature for a timer
  3378. * @param hhrtim: pointer to HAL HRTIM handle
  3379. * @param TimerIdx: Timer index
  3380. * This parameter can be one of the following values:
  3381. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3382. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3383. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3384. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3385. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3386. * @param pChopperModeCfg: pointer to the chopper mode configuration structure
  3387. * @retval HAL status
  3388. * @note This function must be called before configuring the timer output(s)
  3389. */
  3390. HAL_StatusTypeDef HAL_HRTIM_ChopperModeConfig(HRTIM_HandleTypeDef * hhrtim,
  3391. uint32_t TimerIdx,
  3392. HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg)
  3393. {
  3394. uint32_t hrtim_chpr;
  3395. /* Check parameters */
  3396. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  3397. assert_param(IS_HRTIM_CHOPPER_PRESCALERRATIO(pChopperModeCfg->CarrierFreq));
  3398. assert_param(IS_HRTIM_CHOPPER_DUTYCYCLE(pChopperModeCfg->DutyCycle));
  3399. assert_param(IS_HRTIM_CHOPPER_PULSEWIDTH(pChopperModeCfg->StartPulse));
  3400. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3401. {
  3402. return HAL_BUSY;
  3403. }
  3404. /* Process Locked */
  3405. __HAL_LOCK(hhrtim);
  3406. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3407. hrtim_chpr = hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR;
  3408. /* Clear timer chopper mode configuration */
  3409. hrtim_chpr &= ~(HRTIM_CHPR_CARFRQ | HRTIM_CHPR_CARDTY | HRTIM_CHPR_STRPW);
  3410. /* Set timer choppe mode configuration */
  3411. hrtim_chpr |= pChopperModeCfg->CarrierFreq;
  3412. hrtim_chpr |= (pChopperModeCfg->DutyCycle);
  3413. hrtim_chpr |= (pChopperModeCfg->StartPulse);
  3414. /* Update the HRTIM registers */
  3415. hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR = hrtim_chpr;
  3416. hhrtim->State = HAL_HRTIM_STATE_READY;
  3417. /* Process Unlocked */
  3418. __HAL_UNLOCK(hhrtim);
  3419. return HAL_OK;
  3420. }
  3421. /**
  3422. * @brief Configures the burst DMA controller for a timer
  3423. * @param hhrtim: pointer to HAL HRTIM handle
  3424. * @param TimerIdx: Timer index
  3425. * This parameter can be one of the following values:
  3426. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  3427. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3428. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3429. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3430. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3431. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3432. * @param RegistersToUpdate: registers to be written by DMA
  3433. * This parameter can be any combination of the following values:
  3434. * @arg HRTIM_BURSTDMA_CR: HRTIM_MCR or HRTIM_TIMxCR
  3435. * @arg HRTIM_BURSTDMA_ICR: HRTIM_MICR or HRTIM_TIMxICR
  3436. * @arg HRTIM_BURSTDMA_DIER: HRTIM_MDIER or HRTIM_TIMxDIER
  3437. * @arg HRTIM_BURSTDMA_CNT: HRTIM_MCNT or HRTIM_TIMxCNT
  3438. * @arg HRTIM_BURSTDMA_PER: HRTIM_MPER or HRTIM_TIMxPER
  3439. * @arg HRTIM_BURSTDMA_REP: HRTIM_MREP or HRTIM_TIMxREP
  3440. * @arg HRTIM_BURSTDMA_CMP1: HRTIM_MCMP1 or HRTIM_TIMxCMP1
  3441. * @arg HRTIM_BURSTDMA_CMP2: HRTIM_MCMP2 or HRTIM_TIMxCMP2
  3442. * @arg HRTIM_BURSTDMA_CMP3: HRTIM_MCMP3 or HRTIM_TIMxCMP3
  3443. * @arg HRTIM_BURSTDMA_CMP4: HRTIM_MCMP4 or HRTIM_TIMxCMP4
  3444. * @arg HRTIM_BURSTDMA_DTR: HRTIM_TIMxDTR
  3445. * @arg HRTIM_BURSTDMA_SET1R: HRTIM_TIMxSET1R
  3446. * @arg HRTIM_BURSTDMA_RST1R: HRTIM_TIMxRST1R
  3447. * @arg HRTIM_BURSTDMA_SET2R: HRTIM_TIMxSET2R
  3448. * @arg HRTIM_BURSTDMA_RST2R: HRTIM_TIMxRST2R
  3449. * @arg HRTIM_BURSTDMA_EEFR1: HRTIM_TIMxEEFR1
  3450. * @arg HRTIM_BURSTDMA_EEFR2: HRTIM_TIMxEEFR2
  3451. * @arg HRTIM_BURSTDMA_RSTR: HRTIM_TIMxRSTR
  3452. * @arg HRTIM_BURSTDMA_CHPR: HRTIM_TIMxCHPR
  3453. * @arg HRTIM_BURSTDMA_OUTR: HRTIM_TIMxOUTR
  3454. * @arg HRTIM_BURSTDMA_FLTR: HRTIM_TIMxFLTR
  3455. * @retval HAL status
  3456. * @note This function must be called before starting the timer
  3457. */
  3458. HAL_StatusTypeDef HAL_HRTIM_BurstDMAConfig(HRTIM_HandleTypeDef * hhrtim,
  3459. uint32_t TimerIdx,
  3460. uint32_t RegistersToUpdate)
  3461. {
  3462. /* Check parameters */
  3463. assert_param(IS_HRTIM_TIMER_BURSTDMA(TimerIdx, RegistersToUpdate));
  3464. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3465. {
  3466. return HAL_BUSY;
  3467. }
  3468. /* Process Locked */
  3469. __HAL_LOCK(hhrtim);
  3470. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3471. /* Set the burst DMA timer update register */
  3472. switch (TimerIdx)
  3473. {
  3474. case HRTIM_TIMERINDEX_TIMER_A:
  3475. {
  3476. hhrtim->Instance->sCommonRegs.BDTAUPR = RegistersToUpdate;
  3477. }
  3478. break;
  3479. case HRTIM_TIMERINDEX_TIMER_B:
  3480. {
  3481. hhrtim->Instance->sCommonRegs.BDTBUPR = RegistersToUpdate;
  3482. }
  3483. break;
  3484. case HRTIM_TIMERINDEX_TIMER_C:
  3485. {
  3486. hhrtim->Instance->sCommonRegs.BDTCUPR = RegistersToUpdate;
  3487. }
  3488. break;
  3489. case HRTIM_TIMERINDEX_TIMER_D:
  3490. {
  3491. hhrtim->Instance->sCommonRegs.BDTDUPR = RegistersToUpdate;
  3492. }
  3493. break;
  3494. case HRTIM_TIMERINDEX_TIMER_E:
  3495. {
  3496. hhrtim->Instance->sCommonRegs.BDTEUPR = RegistersToUpdate;
  3497. }
  3498. break;
  3499. case HRTIM_TIMERINDEX_MASTER:
  3500. {
  3501. hhrtim->Instance->sCommonRegs.BDMUPR = RegistersToUpdate;
  3502. }
  3503. break;
  3504. }
  3505. hhrtim->State = HAL_HRTIM_STATE_READY;
  3506. /* Process Unlocked */
  3507. __HAL_UNLOCK(hhrtim);
  3508. return HAL_OK;
  3509. }
  3510. /**
  3511. * @brief Configures the compare unit of a timer operating in waveform mode
  3512. * @param hhrtim: pointer to HAL HRTIM handle
  3513. * @param TimerIdx: Timer index
  3514. * This parameter can be one of the following values:
  3515. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  3516. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3517. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3518. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3519. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3520. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3521. * @param CompareUnit: Compare unit to configure
  3522. * This parameter can be one of the following values:
  3523. * @arg HRTIM_COMPAREUNIT_1: Compare unit 1
  3524. * @arg HRTIM_COMPAREUNIT_2: Compare unit 2
  3525. * @arg HRTIM_COMPAREUNIT_3: Compare unit 3
  3526. * @arg HRTIM_COMPAREUNIT_4: Compare unit 4
  3527. * @param pCompareCfg: pointer to the compare unit configuration structure
  3528. * @note When auto delayed mode is required for compare unit 2 or compare unit 4,
  3529. * application has to configure separately the capture unit. Capture unit
  3530. * to configure in that case depends on the compare unit auto delayed mode
  3531. * is applied to (see below):
  3532. * Auto delayed on output compare 2: capture unit 1 must be configured
  3533. * Auto delayed on output compare 4: capture unit 2 must be configured
  3534. * @retval HAL status
  3535. * @note This function must be called before starting the timer
  3536. */
  3537. HAL_StatusTypeDef HAL_HRTIM_WaveformCompareConfig(HRTIM_HandleTypeDef * hhrtim,
  3538. uint32_t TimerIdx,
  3539. uint32_t CompareUnit,
  3540. HRTIM_CompareCfgTypeDef* pCompareCfg)
  3541. {
  3542. /* Check parameters */
  3543. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  3544. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3545. {
  3546. return HAL_BUSY;
  3547. }
  3548. /* Process Locked */
  3549. __HAL_LOCK(hhrtim);
  3550. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3551. /* Configure the compare unit */
  3552. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  3553. {
  3554. switch (CompareUnit)
  3555. {
  3556. case HRTIM_COMPAREUNIT_1:
  3557. {
  3558. hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue;
  3559. }
  3560. break;
  3561. case HRTIM_COMPAREUNIT_2:
  3562. {
  3563. hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue;
  3564. }
  3565. break;
  3566. case HRTIM_COMPAREUNIT_3:
  3567. {
  3568. hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue;
  3569. }
  3570. break;
  3571. case HRTIM_COMPAREUNIT_4:
  3572. {
  3573. hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue;
  3574. }
  3575. break;
  3576. }
  3577. }
  3578. else
  3579. {
  3580. switch (CompareUnit)
  3581. {
  3582. case HRTIM_COMPAREUNIT_1:
  3583. {
  3584. /* Set the compare value */
  3585. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
  3586. }
  3587. break;
  3588. case HRTIM_COMPAREUNIT_2:
  3589. {
  3590. /* Check parameters */
  3591. assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
  3592. /* Set the compare value */
  3593. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
  3594. if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
  3595. {
  3596. /* Configure auto-delayed mode */
  3597. /* DELCMP2 bitfield must be reset when reprogrammed from one value */
  3598. /* to the other to reinitialize properly the auto-delayed mechanism */
  3599. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP2;
  3600. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= pCompareCfg->AutoDelayedMode;
  3601. /* Set the compare value for timeout compare unit (if any) */
  3602. if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
  3603. {
  3604. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
  3605. }
  3606. else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
  3607. {
  3608. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
  3609. }
  3610. }
  3611. }
  3612. break;
  3613. case HRTIM_COMPAREUNIT_3:
  3614. {
  3615. /* Set the compare value */
  3616. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
  3617. }
  3618. break;
  3619. case HRTIM_COMPAREUNIT_4:
  3620. {
  3621. /* Check parameters */
  3622. assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
  3623. /* Set the compare value */
  3624. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
  3625. if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
  3626. {
  3627. /* Configure auto-delayed mode */
  3628. /* DELCMP4 bitfield must be reset when reprogrammed from one value */
  3629. /* to the other to reinitialize properly the auto-delayed mechanism */
  3630. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP4;
  3631. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR |= (pCompareCfg->AutoDelayedMode << 2);
  3632. /* Set the compare value for timeout compare unit (if any) */
  3633. if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
  3634. {
  3635. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
  3636. }
  3637. else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
  3638. {
  3639. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
  3640. }
  3641. }
  3642. }
  3643. break;
  3644. }
  3645. }
  3646. hhrtim->State = HAL_HRTIM_STATE_READY;
  3647. /* Process Unlocked */
  3648. __HAL_UNLOCK(hhrtim);
  3649. return HAL_OK;
  3650. }
  3651. /**
  3652. * @brief Configures the capture unit of a timer operating in waveform mode
  3653. * @param hhrtim: pointer to HAL HRTIM handle
  3654. * @param TimerIdx: Timer index
  3655. * This parameter can be one of the following values:
  3656. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3657. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3658. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3659. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3660. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3661. * @param CaptureUnit: Capture unit to configure
  3662. * This parameter can be one of the following values:
  3663. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  3664. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  3665. * @param pCaptureCfg: pointer to the compare unit configuration structure
  3666. * @retval HAL status
  3667. * @note This function must be called before starting the timer
  3668. */
  3669. HAL_StatusTypeDef HAL_HRTIM_WaveformCaptureConfig(HRTIM_HandleTypeDef * hhrtim,
  3670. uint32_t TimerIdx,
  3671. uint32_t CaptureUnit,
  3672. HRTIM_CaptureCfgTypeDef* pCaptureCfg)
  3673. {
  3674. /* Check parameters */
  3675. assert_param(IS_HRTIM_TIMER_CAPTURETRIGGER(TimerIdx, pCaptureCfg->Trigger));
  3676. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3677. {
  3678. return HAL_BUSY;
  3679. }
  3680. /* Process Locked */
  3681. __HAL_LOCK(hhrtim);
  3682. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3683. /* Configure the capture unit */
  3684. switch (CaptureUnit)
  3685. {
  3686. case HRTIM_CAPTUREUNIT_1:
  3687. {
  3688. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = pCaptureCfg->Trigger;
  3689. }
  3690. break;
  3691. case HRTIM_CAPTUREUNIT_2:
  3692. {
  3693. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = pCaptureCfg->Trigger;
  3694. }
  3695. break;
  3696. }
  3697. hhrtim->State = HAL_HRTIM_STATE_READY;
  3698. /* Process Unlocked */
  3699. __HAL_UNLOCK(hhrtim);
  3700. return HAL_OK;
  3701. }
  3702. /**
  3703. * @brief Configures the output of a timer operating in waveform mode
  3704. * @param hhrtim: pointer to HAL HRTIM handle
  3705. * @param TimerIdx: Timer index
  3706. * This parameter can be one of the following values:
  3707. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3708. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3709. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3710. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3711. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3712. * @param Output: Timer output
  3713. * This parameter can be one of the following values:
  3714. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  3715. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  3716. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  3717. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  3718. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  3719. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  3720. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  3721. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  3722. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  3723. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  3724. * @param pOutputCfg: pointer to the timer output configuration structure
  3725. * @retval HAL status
  3726. * @note This function must be called before configuring the timer and after
  3727. * configuring the deadtime insertion feature (if required).
  3728. */
  3729. HAL_StatusTypeDef HAL_HRTIM_WaveformOutputConfig(HRTIM_HandleTypeDef * hhrtim,
  3730. uint32_t TimerIdx,
  3731. uint32_t Output,
  3732. HRTIM_OutputCfgTypeDef * pOutputCfg)
  3733. {
  3734. /* Check parameters */
  3735. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  3736. assert_param(IS_HRTIM_OUTPUTPOLARITY(pOutputCfg->Polarity));
  3737. assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pOutputCfg->IdleLevel));
  3738. assert_param(IS_HRTIM_OUTPUTIDLEMODE(pOutputCfg->IdleMode));
  3739. assert_param(IS_HRTIM_OUTPUTFAULTLEVEL(pOutputCfg->FaultLevel));
  3740. assert_param(IS_HRTIM_OUTPUTCHOPPERMODE(pOutputCfg->ChopperModeEnable));
  3741. assert_param(IS_HRTIM_OUTPUTBURSTMODEENTRY(pOutputCfg->BurstModeEntryDelayed));
  3742. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3743. {
  3744. return HAL_BUSY;
  3745. }
  3746. /* Process Locked */
  3747. __HAL_LOCK(hhrtim);
  3748. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3749. /* Configure the timer output */
  3750. HRTIM_OutputConfig(hhrtim,
  3751. TimerIdx,
  3752. Output,
  3753. pOutputCfg);
  3754. hhrtim->State = HAL_HRTIM_STATE_READY;
  3755. /* Process Unlocked */
  3756. __HAL_UNLOCK(hhrtim);
  3757. return HAL_OK;
  3758. }
  3759. /**
  3760. * @brief Forces the timer output to its active or inactive state
  3761. * @param hhrtim: pointer to HAL HRTIM handle
  3762. * @param TimerIdx: Timer index
  3763. * This parameter can be one of the following values:
  3764. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  3765. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  3766. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  3767. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  3768. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  3769. * @param Output: Timer output
  3770. * This parameter can be one of the following values:
  3771. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  3772. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  3773. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  3774. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  3775. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  3776. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  3777. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  3778. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  3779. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  3780. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  3781. * @param OutputLevel: indicates whether the output is forced to its active or inactive level
  3782. * This parameter can be one of the following values:
  3783. * @arg HRTIM_OUTPUTLEVEL_ACTIVE: output is forced to its active level
  3784. * @arg HRTIM_OUTPUTLEVEL_INACTIVE: output is forced to its inactive level
  3785. * @retval HAL status
  3786. * @note The 'software set/reset trigger' bit in the output set/reset registers
  3787. * is automatically reset by hardware
  3788. */
  3789. HAL_StatusTypeDef HAL_HRTIM_WaveformSetOutputLevel(HRTIM_HandleTypeDef * hhrtim,
  3790. uint32_t TimerIdx,
  3791. uint32_t Output,
  3792. uint32_t OutputLevel)
  3793. {
  3794. /* Check parameters */
  3795. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  3796. assert_param(IS_HRTIM_OUTPUTLEVEL(OutputLevel));
  3797. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  3798. {
  3799. return HAL_BUSY;
  3800. }
  3801. /* Process Locked */
  3802. __HAL_LOCK(hhrtim);
  3803. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3804. /* Force timer output level */
  3805. switch (Output)
  3806. {
  3807. case HRTIM_OUTPUT_TA1:
  3808. case HRTIM_OUTPUT_TB1:
  3809. case HRTIM_OUTPUT_TC1:
  3810. case HRTIM_OUTPUT_TD1:
  3811. case HRTIM_OUTPUT_TE1:
  3812. {
  3813. if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
  3814. {
  3815. /* Force output to its active state */
  3816. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R |= HRTIM_SET1R_SST;
  3817. }
  3818. else
  3819. {
  3820. /* Force output to its inactive state */
  3821. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R |= HRTIM_RST1R_SRT;
  3822. }
  3823. }
  3824. break;
  3825. case HRTIM_OUTPUT_TA2:
  3826. case HRTIM_OUTPUT_TB2:
  3827. case HRTIM_OUTPUT_TC2:
  3828. case HRTIM_OUTPUT_TD2:
  3829. case HRTIM_OUTPUT_TE2:
  3830. {
  3831. if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
  3832. {
  3833. /* Force output to its active state */
  3834. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R |= HRTIM_SET2R_SST;
  3835. }
  3836. else
  3837. {
  3838. /* Force output to its inactive state */
  3839. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R |= HRTIM_RST2R_SRT;
  3840. }
  3841. }
  3842. break;
  3843. }
  3844. hhrtim->State = HAL_HRTIM_STATE_READY;
  3845. /* Process Unlocked */
  3846. __HAL_UNLOCK(hhrtim);
  3847. return HAL_OK;
  3848. }
  3849. /**
  3850. * @brief Enables the generation of the waveform signal on the designated output(s)
  3851. * Outputs can be combined (ORed) to allow for simultaneous output enabling.
  3852. * @param hhrtim: pointer to HAL HRTIM handle
  3853. * @param OutputsToStart: Timer output(s) to enable
  3854. * This parameter can be any combination of the following values:
  3855. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  3856. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  3857. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  3858. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  3859. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  3860. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  3861. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  3862. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  3863. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  3864. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  3865. * @retval HAL status
  3866. */
  3867. HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStart(HRTIM_HandleTypeDef * hhrtim,
  3868. uint32_t OutputsToStart)
  3869. {
  3870. /* Check the parameters */
  3871. assert_param(IS_HRTIM_OUTPUT(OutputsToStart));
  3872. /* Process Locked */
  3873. __HAL_LOCK(hhrtim);
  3874. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3875. /* Enable the HRTIM outputs */
  3876. hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart);
  3877. hhrtim->State = HAL_HRTIM_STATE_READY;
  3878. /* Process Unlocked */
  3879. __HAL_UNLOCK(hhrtim);
  3880. return HAL_OK;
  3881. }
  3882. /**
  3883. * @brief Disables the generation of the waveform signal on the designated output(s)
  3884. * Outputs can be combined (ORed) to allow for simultaneous output disabling.
  3885. * @param hhrtim: pointer to HAL HRTIM handle
  3886. * @param OutputsToStop: Timer output(s) to disable
  3887. * This parameter can be any combination of the following values:
  3888. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  3889. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  3890. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  3891. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  3892. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  3893. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  3894. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  3895. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  3896. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  3897. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  3898. * @retval HAL status
  3899. */
  3900. HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStop(HRTIM_HandleTypeDef * hhrtim,
  3901. uint32_t OutputsToStop)
  3902. {
  3903. /* Check the parameters */
  3904. assert_param(IS_HRTIM_OUTPUT(OutputsToStop));
  3905. /* Process Locked */
  3906. __HAL_LOCK(hhrtim);
  3907. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3908. /* Enable the HRTIM outputs */
  3909. hhrtim->Instance->sCommonRegs.ODISR |= (OutputsToStop);
  3910. hhrtim->State = HAL_HRTIM_STATE_READY;
  3911. /* Process Unlocked */
  3912. __HAL_UNLOCK(hhrtim);
  3913. return HAL_OK;
  3914. }
  3915. /**
  3916. * @brief Starts the counter of the designated timer(s) operating in waveform mode
  3917. * Timers can be combined (ORed) to allow for simultaneous counter start.
  3918. * @param hhrtim: pointer to HAL HRTIM handle
  3919. * @param Timers: Timer counter(s) to start
  3920. * This parameter can be any combination of the following values:
  3921. * @arg HRTIM_TIMERID_MASTER
  3922. * @arg HRTIM_TIMERID_TIMER_A
  3923. * @arg HRTIM_TIMERID_TIMER_B
  3924. * @arg HRTIM_TIMERID_TIMER_C
  3925. * @arg HRTIM_TIMERID_TIMER_D
  3926. * @arg HRTIM_TIMERID_TIMER_E
  3927. * @retval HAL status
  3928. */
  3929. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart(HRTIM_HandleTypeDef * hhrtim,
  3930. uint32_t Timers)
  3931. {
  3932. /* Check the parameters */
  3933. assert_param(IS_HRTIM_TIMERID(Timers));
  3934. /* Process Locked */
  3935. __HAL_LOCK(hhrtim);
  3936. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3937. /* Enable timer(s) counter */
  3938. hhrtim->Instance->sMasterRegs.MCR |= (Timers);
  3939. hhrtim->State = HAL_HRTIM_STATE_READY;
  3940. /* Process Unlocked */
  3941. __HAL_UNLOCK(hhrtim);
  3942. return HAL_OK;
  3943. }
  3944. /**
  3945. * @brief Stops the counter of the designated timer(s) operating in waveform mode
  3946. * Timers can be combined (ORed) to allow for simultaneous counter stop.
  3947. * @param hhrtim: pointer to HAL HRTIM handle
  3948. * @param Timers: Timer counter(s) to stop
  3949. * This parameter can be any combination of the following values:
  3950. * @arg HRTIM_TIMER_MASTER
  3951. * @arg HRTIM_TIMER_A
  3952. * @arg HRTIM_TIMER_B
  3953. * @arg HRTIM_TIMER_C
  3954. * @arg HRTIM_TIMER_D
  3955. * @arg HRTIM_TIMER_E
  3956. * @retval HAL status
  3957. * @note The counter of a timer is stopped only if all timer outputs are disabled
  3958. */
  3959. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop(HRTIM_HandleTypeDef * hhrtim,
  3960. uint32_t Timers)
  3961. {
  3962. /* Check the parameters */
  3963. assert_param(IS_HRTIM_TIMERID(Timers));
  3964. /* Process Locked */
  3965. __HAL_LOCK(hhrtim);
  3966. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  3967. /* Disable timer(s) counter */
  3968. hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
  3969. hhrtim->State = HAL_HRTIM_STATE_READY;
  3970. /* Process Unlocked */
  3971. __HAL_UNLOCK(hhrtim);
  3972. return HAL_OK;
  3973. }
  3974. /**
  3975. * @brief Starts the counter of the designated timer(s) operating in waveform mode
  3976. * Timers can be combined (ORed) to allow for simultaneous counter start.
  3977. * @param hhrtim: pointer to HAL HRTIM handle
  3978. * @param Timers: Timer counter(s) to start
  3979. * This parameter can be any combination of the following values:
  3980. * @arg HRTIM_TIMERID_MASTER
  3981. * @arg HRTIM_TIMERID_A
  3982. * @arg HRTIM_TIMERID_B
  3983. * @arg HRTIM_TIMERID_C
  3984. * @arg HRTIM_TIMERID_D
  3985. * @arg HRTIM_TIMERID_E
  3986. * @note HRTIM interrupts (e.g. faults interrupts) and interrupts related
  3987. * to the timers to start are enabled within this function.
  3988. * Interrupts to enable are selected through HAL_HRTIM_WaveformTimerConfig
  3989. * function.
  3990. * @retval HAL status
  3991. */
  3992. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_IT(HRTIM_HandleTypeDef * hhrtim,
  3993. uint32_t Timers)
  3994. {
  3995. uint8_t timer_idx;
  3996. /* Check the parameters */
  3997. assert_param(IS_HRTIM_TIMERID(Timers));
  3998. /* Process Locked */
  3999. __HAL_LOCK(hhrtim);
  4000. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4001. /* Enable HRTIM interrupts (if required) */
  4002. __HAL_HRTIM_ENABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
  4003. /* Enable master timer related interrupts (if required) */
  4004. if ((Timers & HRTIM_TIMERID_MASTER) != RESET)
  4005. {
  4006. __HAL_HRTIM_MASTER_ENABLE_IT(hhrtim,
  4007. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
  4008. }
  4009. /* Enable timing unit related interrupts (if required) */
  4010. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4011. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4012. timer_idx++)
  4013. {
  4014. if ((Timers & TimerIdxToTimerId[timer_idx]) != RESET)
  4015. {
  4016. __HAL_HRTIM_TIMER_ENABLE_IT(hhrtim,
  4017. timer_idx,
  4018. hhrtim->TimerParam[timer_idx].InterruptRequests);
  4019. }
  4020. }
  4021. /* Enable timer(s) counter */
  4022. hhrtim->Instance->sMasterRegs.MCR |= (Timers);
  4023. hhrtim->State = HAL_HRTIM_STATE_READY;
  4024. /* Process Unlocked */
  4025. __HAL_UNLOCK(hhrtim);
  4026. return HAL_OK;}
  4027. /**
  4028. * @brief Stops the counter of the designated timer(s) operating in waveform mode
  4029. * Timers can be combined (ORed) to allow for simultaneous counter stop.
  4030. * @param hhrtim: pointer to HAL HRTIM handle
  4031. * @param Timers: Timer counter(s) to stop
  4032. * This parameter can be any combination of the following values:
  4033. * @arg HRTIM_TIMER_MASTER
  4034. * @arg HRTIM_TIMER_A
  4035. * @arg HRTIM_TIMER_B
  4036. * @arg HRTIM_TIMER_C
  4037. * @arg HRTIM_TIMER_D
  4038. * @arg HRTIM_TIMER_E
  4039. * @retval HAL status
  4040. * @note The counter of a timer is stopped only if all timer outputs are disabled
  4041. * @note All enabled timer related interrupts are disabled.
  4042. */
  4043. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_IT(HRTIM_HandleTypeDef * hhrtim,
  4044. uint32_t Timers)
  4045. {
  4046. /* ++ WA */
  4047. __IO uint32_t delai = (uint32_t)(0x17F);
  4048. /* -- WA */
  4049. uint8_t timer_idx;
  4050. /* Check the parameters */
  4051. assert_param(IS_HRTIM_TIMERID(Timers));
  4052. /* Process Locked */
  4053. __HAL_LOCK(hhrtim);
  4054. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4055. /* Disable HRTIM interrupts (if required) */
  4056. __HAL_HRTIM_DISABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
  4057. /* Disable master timer related interrupts (if required) */
  4058. if ((Timers & HRTIM_TIMERID_MASTER) != RESET)
  4059. {
  4060. /* Interrupts enable flag must be cleared one by one */
  4061. __HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
  4062. }
  4063. /* Disable timing unit related interrupts (if required) */
  4064. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4065. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4066. timer_idx++)
  4067. {
  4068. if ((Timers & TimerIdxToTimerId[timer_idx]) != RESET)
  4069. {
  4070. __HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, timer_idx, hhrtim->TimerParam[timer_idx].InterruptRequests);
  4071. }
  4072. }
  4073. /* ++ WA */
  4074. do { delai--; } while (delai != 0);
  4075. /* -- WA */
  4076. /* Disable timer(s) counter */
  4077. hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
  4078. hhrtim->State = HAL_HRTIM_STATE_READY;
  4079. /* Process Unlocked */
  4080. __HAL_UNLOCK(hhrtim);
  4081. return HAL_OK;
  4082. }
  4083. /**
  4084. * @brief Starts the counter of the designated timer(s) operating in waveform mode
  4085. * Timers can be combined (ORed) to allow for simultaneous counter start.
  4086. * @param hhrtim: pointer to HAL HRTIM handle
  4087. * @param Timers: Timer counter(s) to start
  4088. * This parameter can be any combination of the following values:
  4089. * HRTIM_TIMER_MASTER
  4090. * @arg HRTIM_TIMER_A
  4091. * @arg HRTIM_TIMER_B
  4092. * @arg HRTIM_TIMER_C
  4093. * @arg HRTIM_TIMER_D
  4094. * @arg HRTIM_TIMER_E
  4095. * @retval HAL status
  4096. * @note This function enables the dma request(s) mentionned in the timer
  4097. * configuration data structure for every timers to start.
  4098. * @note The source memory address, the destination memory address and the
  4099. * size of each DMA transfer are specified at timer configuration time
  4100. * (see HAL_HRTIM_WaveformTimerConfig)
  4101. */
  4102. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_DMA(HRTIM_HandleTypeDef * hhrtim,
  4103. uint32_t Timers)
  4104. {
  4105. uint8_t timer_idx;
  4106. DMA_HandleTypeDef * hdma;
  4107. /* Check the parameters */
  4108. assert_param(IS_HRTIM_TIMERID(Timers));
  4109. if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
  4110. {
  4111. return HAL_BUSY;
  4112. }
  4113. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4114. /* Process Locked */
  4115. __HAL_LOCK(hhrtim);
  4116. if (((Timers & HRTIM_TIMERID_MASTER) != RESET) &&
  4117. (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0))
  4118. {
  4119. /* Set the DMA error callback */
  4120. hhrtim->hdmaMaster->XferErrorCallback = HRTIM_DMAError ;
  4121. /* Set the DMA transfer completed callback */
  4122. hhrtim->hdmaMaster->XferCpltCallback = HRTIM_DMAMasterCplt;
  4123. /* Enable the DMA channel */
  4124. HAL_DMA_Start_IT(hhrtim->hdmaMaster,
  4125. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASrcAddress,
  4126. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMADstAddress,
  4127. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASize);
  4128. /* Enable the timer DMA request */
  4129. __HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim,
  4130. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
  4131. }
  4132. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4133. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4134. timer_idx++)
  4135. {
  4136. if (((Timers & TimerIdxToTimerId[timer_idx]) != RESET) &&
  4137. (hhrtim->TimerParam[timer_idx].DMARequests != 0))
  4138. {
  4139. /* Get the timer DMA handler */
  4140. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx);
  4141. /* Set the DMA error callback */
  4142. hdma->XferErrorCallback = HRTIM_DMAError ;
  4143. /* Set the DMA transfer completed callback */
  4144. hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
  4145. /* Enable the DMA channel */
  4146. HAL_DMA_Start_IT(hdma,
  4147. hhrtim->TimerParam[timer_idx].DMASrcAddress,
  4148. hhrtim->TimerParam[timer_idx].DMADstAddress,
  4149. hhrtim->TimerParam[timer_idx].DMASize);
  4150. /* Enable the timer DMA request */
  4151. __HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim,
  4152. timer_idx,
  4153. hhrtim->TimerParam[timer_idx].DMARequests);
  4154. }
  4155. }
  4156. /* Enable the timer counter */
  4157. __HAL_HRTIM_ENABLE(hhrtim, Timers);
  4158. hhrtim->State = HAL_HRTIM_STATE_READY;
  4159. /* Process Unlocked */
  4160. __HAL_UNLOCK(hhrtim);
  4161. return HAL_OK;
  4162. }
  4163. /**
  4164. * @brief Stops the counter of the designated timer(s) operating in waveform mode
  4165. * Timers can be combined (ORed) to allow for simultaneous counter stop.
  4166. * @param hhrtim: pointer to HAL HRTIM handle
  4167. * @param Timers: Timer counter(s) to stop
  4168. * This parameter can be any combination of the following values:
  4169. * @arg HRTIM_TIMER_MASTER
  4170. * @arg HRTIM_TIMER_A
  4171. * @arg HRTIM_TIMER_B
  4172. * @arg HRTIM_TIMER_C
  4173. * @arg HRTIM_TIMER_D
  4174. * @arg HRTIM_TIMER_E
  4175. * @retval HAL status
  4176. * @note The counter of a timer is stopped only if all timer outputs are disabled
  4177. * @note All enabled timer related DMA requests are disabled.
  4178. */
  4179. HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_DMA(HRTIM_HandleTypeDef * hhrtim,
  4180. uint32_t Timers)
  4181. {
  4182. uint8_t timer_idx;
  4183. DMA_HandleTypeDef * hdma;
  4184. /* Check the parameters */
  4185. assert_param(IS_HRTIM_TIMERID(Timers));
  4186. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4187. if (((Timers & HRTIM_TIMERID_MASTER) != RESET) &&
  4188. (hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0))
  4189. {
  4190. /* Disable the DMA */
  4191. HAL_DMA_Abort(hhrtim->hdmaMaster);
  4192. /* Disable the DMA request(s) */
  4193. __HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim,
  4194. hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
  4195. }
  4196. for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
  4197. timer_idx < HRTIM_TIMERINDEX_MASTER ;
  4198. timer_idx++)
  4199. {
  4200. if (((Timers & TimerIdxToTimerId[timer_idx]) != RESET) &&
  4201. (hhrtim->TimerParam[timer_idx].DMARequests != 0))
  4202. {
  4203. /* Get the timer DMA handler */
  4204. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx);
  4205. /* Disable the DMA */
  4206. HAL_DMA_Abort(hdma);
  4207. /* Disable the DMA request(s) */
  4208. __HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim,
  4209. timer_idx,
  4210. hhrtim->TimerParam[timer_idx].DMARequests);
  4211. }
  4212. }
  4213. /* Disable the timer counter */
  4214. __HAL_HRTIM_DISABLE(hhrtim, Timers);
  4215. hhrtim->State = HAL_HRTIM_STATE_READY;
  4216. return HAL_OK;
  4217. }
  4218. /**
  4219. * @brief Enables or disables the HRTIM burst mode controller.
  4220. * @param hhrtim: pointer to HAL HRTIM handle
  4221. * @param Enable: Burst mode controller enabling
  4222. * This parameter can be one of the following values:
  4223. * @arg HRTIM_BURSTMODECTL_ENABLED: Burst mode enabled
  4224. * @arg HRTIM_BURSTMODECTL_DISABLED: Burst mode disabled
  4225. * @retval HAL status
  4226. * @note This function must be called after starting the timer(s)
  4227. */
  4228. HAL_StatusTypeDef HAL_HRTIM_BurstModeCtl(HRTIM_HandleTypeDef * hhrtim,
  4229. uint32_t Enable)
  4230. {
  4231. uint32_t hrtim_bmcr;
  4232. /* Check parameters */
  4233. assert_param(IS_HRTIM_BURSTMODECTL(Enable));
  4234. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4235. {
  4236. return HAL_BUSY;
  4237. }
  4238. /* Process Locked */
  4239. __HAL_LOCK(hhrtim);
  4240. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4241. /* Enable/Disable the burst mode controller */
  4242. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  4243. hrtim_bmcr &= ~(HRTIM_BMCR_BME);
  4244. hrtim_bmcr |= Enable;
  4245. /* Update the HRTIM registers */
  4246. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  4247. hhrtim->State = HAL_HRTIM_STATE_READY;
  4248. /* Process Unlocked */
  4249. __HAL_UNLOCK(hhrtim);
  4250. return HAL_OK;
  4251. }
  4252. /**
  4253. * @brief Triggers the burst mode operation.
  4254. * @param hhrtim: pointer to HAL HRTIM handle
  4255. * @retval HAL status
  4256. */
  4257. HAL_StatusTypeDef HAL_HRTIM_BurstModeSoftwareTrigger(HRTIM_HandleTypeDef *hhrtim)
  4258. {
  4259. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4260. {
  4261. return HAL_BUSY;
  4262. }
  4263. /* Process Locked */
  4264. __HAL_LOCK(hhrtim);
  4265. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4266. /* Software trigger of the burst mode controller */
  4267. hhrtim->Instance->sCommonRegs.BMTRGR |= HRTIM_BMTRGR_SW;
  4268. hhrtim->State = HAL_HRTIM_STATE_READY;
  4269. /* Process Unlocked */
  4270. __HAL_UNLOCK(hhrtim);
  4271. return HAL_OK;
  4272. }
  4273. /**
  4274. * @brief Triggers a software capture on the designed capture unit
  4275. * @param hhrtim: pointer to HAL HRTIM handle
  4276. * @param TimerIdx: Timer index
  4277. * This parameter can be one of the following values:
  4278. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4279. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4280. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4281. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4282. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4283. * @param CaptureUnit: Capture unit to trig
  4284. * This parameter can be one of the following values:
  4285. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  4286. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  4287. * @retval HAL status
  4288. * @note The 'software capture' bit in the capure configuration register is
  4289. * automatically reset by hardware
  4290. */
  4291. HAL_StatusTypeDef HAL_HRTIM_SoftwareCapture(HRTIM_HandleTypeDef * hhrtim,
  4292. uint32_t TimerIdx,
  4293. uint32_t CaptureUnit)
  4294. {
  4295. /* Check parameters */
  4296. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  4297. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
  4298. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4299. {
  4300. return HAL_BUSY;
  4301. }
  4302. /* Process Locked */
  4303. __HAL_LOCK(hhrtim);
  4304. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4305. /* Force a software capture on concerned capture unit */
  4306. switch (CaptureUnit)
  4307. {
  4308. case HRTIM_CAPTUREUNIT_1:
  4309. {
  4310. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR |= HRTIM_CPT1CR_SWCPT;
  4311. }
  4312. break;
  4313. case HRTIM_CAPTUREUNIT_2:
  4314. {
  4315. hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR |= HRTIM_CPT2CR_SWCPT;
  4316. }
  4317. break;
  4318. }
  4319. hhrtim->State = HAL_HRTIM_STATE_READY;
  4320. /* Process Unlocked */
  4321. __HAL_UNLOCK(hhrtim);
  4322. return HAL_OK;
  4323. }
  4324. /**
  4325. * @brief Triggers the update of the registers of one or several timers
  4326. * @param hhrtim: pointer to HAL HRTIM handle
  4327. * @param Timers: timers concerned with the software register update
  4328. * This parameter can be any combination of the following values:
  4329. * @arg HRTIM_TIMERUPDATE_MASTER
  4330. * @arg HRTIM_TIMERUPDATE_A
  4331. * @arg HRTIM_TIMERUPDATE_B
  4332. * @arg HRTIM_TIMERUPDATE_C
  4333. * @arg HRTIM_TIMERUPDATE_D
  4334. * @arg HRTIM_TIMERUPDATE_E
  4335. * @retval HAL status
  4336. * @note The 'software update' bits in the HRTIM conrol register 2 register are
  4337. * automatically reset by hardware
  4338. */
  4339. HAL_StatusTypeDef HAL_HRTIM_SoftwareUpdate(HRTIM_HandleTypeDef * hhrtim,
  4340. uint32_t Timers)
  4341. {
  4342. /* Check parameters */
  4343. assert_param(IS_HRTIM_TIMERUPDATE(Timers));
  4344. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4345. {
  4346. return HAL_BUSY;
  4347. }
  4348. /* Process Locked */
  4349. __HAL_LOCK(hhrtim);
  4350. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4351. /* Force timer(s) registers update */
  4352. hhrtim->Instance->sCommonRegs.CR2 |= Timers;
  4353. hhrtim->State = HAL_HRTIM_STATE_READY;
  4354. /* Process Unlocked */
  4355. __HAL_UNLOCK(hhrtim);
  4356. return HAL_OK;
  4357. }
  4358. /**
  4359. * @brief Triggers the reset of one or several timers
  4360. * @param hhrtim: pointer to HAL HRTIM handle
  4361. * @param Timers: timers concerned with the software counter reset
  4362. * This parameter can be any combination of the following values:
  4363. * @arg HRTIM_TIMERRESET_MASTER
  4364. * @arg HRTIM_TIMERRESET_TIMER_A
  4365. * @arg HRTIM_TIMERRESET_TIMER_B
  4366. * @arg HRTIM_TIMERRESET_TIMER_C
  4367. * @arg HRTIM_TIMERRESET_TIMER_D
  4368. * @arg HRTIM_TIMERRESET_TIMER_E
  4369. * @retval HAL status
  4370. * @note The 'software reset' bits in the HRTIM conrol register 2 are
  4371. * automatically reset by hardware
  4372. */
  4373. HAL_StatusTypeDef HAL_HRTIM_SoftwareReset(HRTIM_HandleTypeDef * hhrtim,
  4374. uint32_t Timers)
  4375. {
  4376. /* Check parameters */
  4377. assert_param(IS_HRTIM_TIMERRESET(Timers));
  4378. if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
  4379. {
  4380. return HAL_BUSY;
  4381. }
  4382. /* Process Locked */
  4383. __HAL_LOCK(hhrtim);
  4384. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4385. /* Force timer(s) registers reset */
  4386. hhrtim->Instance->sCommonRegs.CR2 = Timers;
  4387. hhrtim->State = HAL_HRTIM_STATE_READY;
  4388. /* Process Unlocked */
  4389. __HAL_UNLOCK(hhrtim);
  4390. return HAL_OK;
  4391. }
  4392. /**
  4393. * @brief Starts a burst DMA operation to update HRTIM control registers content
  4394. * @param hhrtim: pointer to HAL HRTIM handle
  4395. * @param TimerIdx: Timer index
  4396. * This parameter can be one of the following values:
  4397. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  4398. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4399. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4400. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4401. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4402. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4403. * @param BurstBufferAddress: address of the buffer the HRTIM control registers
  4404. * content will be updated from.
  4405. * @param BurstBufferLength: size (in WORDS) of the burst buffer.
  4406. * @retval HAL status
  4407. * @note The TimerIdx parameter determines the dma channel to be used by the
  4408. * DMA burst controller (see below)
  4409. * HRTIM_TIMERINDEX_MASTER: DMA channel 2 is used by the DMA burst controller
  4410. * HRTIM_TIMERINDEX_TIMER_A: DMA channel 3 is used by the DMA burst controller
  4411. * HRTIM_TIMERINDEX_TIMER_B: DMA channel 4 is used by the DMA burst controller
  4412. * HRTIM_TIMERINDEX_TIMER_C: DMA channel 5 is used by the DMA burst controller
  4413. * HRTIM_TIMERINDEX_TIMER_D: DMA channel 6 is used by the DMA burst controller
  4414. * HRTIM_TIMERINDEX_TIMER_E: DMA channel 7 is used by the DMA burst controller
  4415. */
  4416. HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,
  4417. uint32_t TimerIdx,
  4418. uint32_t BurstBufferAddress,
  4419. uint32_t BurstBufferLength)
  4420. {
  4421. DMA_HandleTypeDef * hdma;
  4422. /* Check the parameters */
  4423. assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
  4424. if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
  4425. {
  4426. return HAL_BUSY;
  4427. }
  4428. if((hhrtim->State == HAL_HRTIM_STATE_READY))
  4429. {
  4430. if((BurstBufferAddress == 0 ) || (BurstBufferLength == 0))
  4431. {
  4432. return HAL_ERROR;
  4433. }
  4434. else
  4435. {
  4436. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4437. }
  4438. }
  4439. /* Process Locked */
  4440. __HAL_LOCK(hhrtim);
  4441. /* Get the timer DMA handler */
  4442. hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
  4443. /* Set the DMA transfer completed callback */
  4444. hdma->XferCpltCallback = HRTIM_BurstDMACplt;
  4445. /* Set the DMA error callback */
  4446. hdma->XferErrorCallback = HRTIM_DMAError ;
  4447. /* Enable the DMA channel */
  4448. HAL_DMA_Start_IT(hdma,
  4449. BurstBufferAddress,
  4450. (uint32_t)&(hhrtim->Instance->sCommonRegs.BDMADR),
  4451. BurstBufferLength);
  4452. hhrtim->State = HAL_HRTIM_STATE_READY;
  4453. /* Process Unlocked */
  4454. __HAL_UNLOCK(hhrtim);
  4455. return HAL_OK;
  4456. }
  4457. /**
  4458. * @brief Enables the transfer from preload to active registers for one
  4459. * or several timing units (including master timer).
  4460. * @param hhrtim: pointer to HAL HRTIM handle
  4461. * @param Timers: Timer(s) concerned by the register preload enabling command
  4462. * This parameter can be any combination of the following values:
  4463. * @arg HRTIM_TIMERUPDATE_MASTER
  4464. * @arg HRTIM_TIMERUPDATE_A
  4465. * @arg HRTIM_TIMERUPDATE_B
  4466. * @arg HRTIM_TIMERUPDATE_C
  4467. * @arg HRTIM_TIMERUPDATE_D
  4468. * @arg HRTIM_TIMERUPDATE_E
  4469. * @retval HAL status
  4470. */
  4471. HAL_StatusTypeDef HAL_HRTIM_UpdateEnable(HRTIM_HandleTypeDef *hhrtim,
  4472. uint32_t Timers)
  4473. {
  4474. /* Check the parameters */
  4475. assert_param(IS_HRTIM_TIMERUPDATE(Timers));
  4476. /* Process Locked */
  4477. __HAL_LOCK(hhrtim);
  4478. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4479. /* Enable timer(s) registers update */
  4480. hhrtim->Instance->sCommonRegs.CR1 &= ~(Timers);
  4481. hhrtim->State = HAL_HRTIM_STATE_READY;
  4482. /* Process Unlocked */
  4483. __HAL_UNLOCK(hhrtim);
  4484. return HAL_OK;
  4485. }
  4486. /**
  4487. * @brief Disables the transfer from preload to active registers for one
  4488. * or several timing units (including master timer).
  4489. * @param hhrtim: pointer to HAL HRTIM handle
  4490. * @param Timers: Timer(s) concerned by the register preload disabling command
  4491. * This parameter can be any combination of the following values:
  4492. * @arg HRTIM_TIMERUPDATE_MASTER
  4493. * @arg HRTIM_TIMERUPDATE_A
  4494. * @arg HRTIM_TIMERUPDATE_B
  4495. * @arg HRTIM_TIMERUPDATE_C
  4496. * @arg HRTIM_TIMERUPDATE_D
  4497. * @arg HRTIM_TIMERUPDATE_E
  4498. * @retval HAL status
  4499. */
  4500. HAL_StatusTypeDef HAL_HRTIM_UpdateDisable(HRTIM_HandleTypeDef *hhrtim,
  4501. uint32_t Timers)
  4502. {
  4503. /* Check the parameters */
  4504. assert_param(IS_HRTIM_TIMERUPDATE(Timers));
  4505. /* Process Locked */
  4506. __HAL_LOCK(hhrtim);
  4507. hhrtim->State = HAL_HRTIM_STATE_BUSY;
  4508. /* Enable timer(s) registers update */
  4509. hhrtim->Instance->sCommonRegs.CR1 |= (Timers);
  4510. hhrtim->State = HAL_HRTIM_STATE_READY;
  4511. /* Process Unlocked */
  4512. __HAL_UNLOCK(hhrtim);
  4513. return HAL_OK;
  4514. }
  4515. /**
  4516. * @}
  4517. */
  4518. /** @defgroup HRTIM_Exported_Functions_Group9 Peripheral state functions
  4519. * @brief Peripheral State functions
  4520. @verbatim
  4521. ===============================================================================
  4522. ##### Peripheral State functions #####
  4523. ===============================================================================
  4524. [..] This section provides functions used to get HRTIM or HRTIM timer
  4525. specific information:
  4526. (+) Get HRTIM HAL state
  4527. (+) Get captured value
  4528. (+) Get HRTIM timer output level
  4529. (+) Get HRTIM timer output state
  4530. (+) Get delayed protection status
  4531. (+) Get burst status
  4532. (+) Get current push-pull status
  4533. (+) Get idle push-pull status
  4534. @endverbatim
  4535. * @{
  4536. */
  4537. /**
  4538. * @brief return the HRTIM HAL state
  4539. * @param hhrtim: pointer to HAL HRTIM handle
  4540. * @retval HAL state
  4541. */
  4542. HAL_HRTIM_StateTypeDef HAL_HRTIM_GetState(HRTIM_HandleTypeDef* hhrtim)
  4543. {
  4544. /* Return ADC state */
  4545. return hhrtim->State;
  4546. }
  4547. /**
  4548. * @brief Returns actual value of the capture register of the designated capture unit
  4549. * @param hhrtim: pointer to HAL HRTIM handle
  4550. * @param TimerIdx: Timer index
  4551. * This parameter can be one of the following values:
  4552. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4553. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4554. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4555. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4556. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4557. * @param CaptureUnit: Capture unit to trig
  4558. * This parameter can be one of the following values:
  4559. * @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
  4560. * @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
  4561. * @retval Captured value
  4562. */
  4563. uint32_t HAL_HRTIM_GetCapturedValue(HRTIM_HandleTypeDef * hhrtim,
  4564. uint32_t TimerIdx,
  4565. uint32_t CaptureUnit)
  4566. {
  4567. uint32_t captured_value = 0;
  4568. /* Check parameters */
  4569. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  4570. assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
  4571. /* Read captured value */
  4572. switch (CaptureUnit)
  4573. {
  4574. case HRTIM_CAPTUREUNIT_1:
  4575. {
  4576. captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xR;
  4577. }
  4578. break;
  4579. case HRTIM_CAPTUREUNIT_2:
  4580. {
  4581. captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xR;
  4582. }
  4583. break;
  4584. }
  4585. return captured_value;
  4586. }
  4587. /**
  4588. * @brief Returns actual level (active or inactive) of the designated output
  4589. * @param hhrtim: pointer to HAL HRTIM handle
  4590. * @param TimerIdx: Timer index
  4591. * This parameter can be one of the following values:
  4592. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4593. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4594. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4595. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4596. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4597. * @param Output: Timer output
  4598. * This parameter can be one of the following values:
  4599. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4600. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4601. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4602. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4603. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4604. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4605. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4606. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4607. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4608. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4609. * @retval Output level
  4610. * @note Returned output level is taken before the output stage (chopper,
  4611. * polarity).
  4612. */
  4613. uint32_t HAL_HRTIM_WaveformGetOutputLevel(HRTIM_HandleTypeDef * hhrtim,
  4614. uint32_t TimerIdx,
  4615. uint32_t Output)
  4616. {
  4617. uint32_t output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
  4618. /* Check parameters */
  4619. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  4620. /* Read the output level */
  4621. switch (Output)
  4622. {
  4623. case HRTIM_OUTPUT_TA1:
  4624. case HRTIM_OUTPUT_TB1:
  4625. case HRTIM_OUTPUT_TC1:
  4626. case HRTIM_OUTPUT_TD1:
  4627. case HRTIM_OUTPUT_TE1:
  4628. {
  4629. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1CPY) != RESET)
  4630. {
  4631. output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
  4632. }
  4633. else
  4634. {
  4635. output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
  4636. }
  4637. }
  4638. break;
  4639. case HRTIM_OUTPUT_TA2:
  4640. case HRTIM_OUTPUT_TB2:
  4641. case HRTIM_OUTPUT_TC2:
  4642. case HRTIM_OUTPUT_TD2:
  4643. case HRTIM_OUTPUT_TE2:
  4644. {
  4645. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2CPY) != RESET)
  4646. {
  4647. output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
  4648. }
  4649. else
  4650. {
  4651. output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
  4652. }
  4653. }
  4654. break;
  4655. }
  4656. return output_level;
  4657. }
  4658. /**
  4659. * @brief Returns actual state (RUN, IDLE, FAULT) of the designated output
  4660. * @param hhrtim: pointer to HAL HRTIM handle
  4661. * @param TimerIdx: Timer index
  4662. * This parameter can be one of the following values:
  4663. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4664. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4665. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4666. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4667. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4668. * @param Output: Timer output
  4669. * This parameter can be one of the following values:
  4670. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4671. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4672. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4673. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4674. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4675. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4676. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4677. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4678. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  4679. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  4680. * @retval Output state
  4681. */
  4682. uint32_t HAL_HRTIM_WaveformGetOutputState(HRTIM_HandleTypeDef * hhrtim,
  4683. uint32_t TimerIdx,
  4684. uint32_t Output)
  4685. {
  4686. uint32_t output_bit = 0;
  4687. uint32_t output_state = HRTIM_OUTPUTSTATE_IDLE;
  4688. /* Check parameters */
  4689. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  4690. /* Set output state according to output control status and output disable status */
  4691. switch (Output)
  4692. {
  4693. case HRTIM_OUTPUT_TA1:
  4694. {
  4695. output_bit = HRTIM_OENR_TA1OEN;
  4696. }
  4697. break;
  4698. case HRTIM_OUTPUT_TA2:
  4699. {
  4700. output_bit = HRTIM_OENR_TA2OEN;
  4701. }
  4702. break;
  4703. case HRTIM_OUTPUT_TB1:
  4704. {
  4705. output_bit = HRTIM_OENR_TB1OEN;
  4706. }
  4707. break;
  4708. case HRTIM_OUTPUT_TB2:
  4709. {
  4710. output_bit = HRTIM_OENR_TB2OEN;
  4711. }
  4712. break;
  4713. case HRTIM_OUTPUT_TC1:
  4714. {
  4715. output_bit = HRTIM_OENR_TC1OEN;
  4716. }
  4717. break;
  4718. case HRTIM_OUTPUT_TC2:
  4719. {
  4720. output_bit = HRTIM_OENR_TC2OEN;
  4721. }
  4722. break;
  4723. case HRTIM_OUTPUT_TD1:
  4724. {
  4725. output_bit = HRTIM_OENR_TD1OEN;
  4726. }
  4727. break;
  4728. case HRTIM_OUTPUT_TD2:
  4729. {
  4730. output_bit = HRTIM_OENR_TD2OEN;
  4731. }
  4732. break;
  4733. case HRTIM_OUTPUT_TE1:
  4734. {
  4735. output_bit = HRTIM_OENR_TE1OEN;
  4736. }
  4737. break;
  4738. case HRTIM_OUTPUT_TE2:
  4739. {
  4740. output_bit = HRTIM_OENR_TE2OEN;
  4741. }
  4742. break;
  4743. }
  4744. if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != RESET)
  4745. {
  4746. /* Output is enabled: output in RUN state (whatever ouput disable status is)*/
  4747. output_state = HRTIM_OUTPUTSTATE_RUN;
  4748. }
  4749. else
  4750. {
  4751. if ((hhrtim->Instance->sCommonRegs.ODSR & output_bit) != RESET)
  4752. {
  4753. /* Output is disabled: output in FAULT state */
  4754. output_state = HRTIM_OUTPUTSTATE_FAULT;
  4755. }
  4756. else
  4757. {
  4758. /* Output is disabled: output in IDLE state */
  4759. output_state = HRTIM_OUTPUTSTATE_IDLE;
  4760. }
  4761. }
  4762. return(output_state);
  4763. }
  4764. /**
  4765. * @brief Returns the level (active or inactive) of the designated output
  4766. * when the delayed protection was triggered.
  4767. * @param hhrtim: pointer to HAL HRTIM handle
  4768. * @param TimerIdx: Timer index
  4769. * This parameter can be one of the following values:
  4770. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4771. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4772. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4773. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4774. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4775. * @param Output: Timer output
  4776. * This parameter can be one of the following values:
  4777. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  4778. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  4779. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  4780. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  4781. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  4782. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  4783. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  4784. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  4785. * @arg HRTIM_OUTPUT_TD1: Timer E - Output 1
  4786. * @arg HRTIM_OUTPUT_TD2: Timer E - Output 2
  4787. * @retval Delayed protection status
  4788. */
  4789. uint32_t HAL_HRTIM_GetDelayedProtectionStatus(HRTIM_HandleTypeDef * hhrtim,
  4790. uint32_t TimerIdx,
  4791. uint32_t Output)
  4792. {
  4793. uint32_t delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
  4794. /* Check parameters */
  4795. assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
  4796. /* Read the delayed protection status */
  4797. switch (Output)
  4798. {
  4799. case HRTIM_OUTPUT_TA1:
  4800. case HRTIM_OUTPUT_TB1:
  4801. case HRTIM_OUTPUT_TC1:
  4802. case HRTIM_OUTPUT_TD1:
  4803. case HRTIM_OUTPUT_TE1:
  4804. {
  4805. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1STAT) != RESET)
  4806. {
  4807. /* Output 1 was active when the delayed idle protection was triggered */
  4808. delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
  4809. }
  4810. else
  4811. {
  4812. /* Output 1 was inactive when the delayed idle protection was triggered */
  4813. delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
  4814. }
  4815. }
  4816. break;
  4817. case HRTIM_OUTPUT_TA2:
  4818. case HRTIM_OUTPUT_TB2:
  4819. case HRTIM_OUTPUT_TC2:
  4820. case HRTIM_OUTPUT_TD2:
  4821. case HRTIM_OUTPUT_TE2:
  4822. {
  4823. if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2STAT) != RESET)
  4824. {
  4825. /* Output 2 was active when the delayed idle protection was triggered */
  4826. delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
  4827. }
  4828. else
  4829. {
  4830. /* Output 2 was inactive when the delayed idle protection was triggered */
  4831. delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
  4832. }
  4833. }
  4834. break;
  4835. }
  4836. return delayed_protection_status;
  4837. }
  4838. /**
  4839. * @brief Returns the actual status (active or inactive) of the burst mode controller
  4840. * @param hhrtim: pointer to HAL HRTIM handle
  4841. * @retval Burst mode controller status
  4842. */
  4843. uint32_t HAL_HRTIM_GetBurstStatus(HRTIM_HandleTypeDef * hhrtim)
  4844. {
  4845. uint32_t burst_mode_status;
  4846. /* Read burst mode status */
  4847. burst_mode_status = (hhrtim->Instance->sCommonRegs.BMCR & HRTIM_BMCR_BMSTAT);
  4848. return burst_mode_status;
  4849. }
  4850. /**
  4851. * @brief Indicates on which output the signal is currently active (when the
  4852. * push pull mode is enabled).
  4853. * @param hhrtim: pointer to HAL HRTIM handle
  4854. * @param TimerIdx: Timer index
  4855. * This parameter can be one of the following values:
  4856. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4857. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4858. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4859. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4860. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4861. * @retval Burst mode controller status
  4862. */
  4863. uint32_t HAL_HRTIM_GetCurrentPushPullStatus(HRTIM_HandleTypeDef * hhrtim,
  4864. uint32_t TimerIdx)
  4865. {
  4866. uint32_t current_pushpull_status;
  4867. /* Check the parameters */
  4868. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  4869. /* Read current push pull status */
  4870. current_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_CPPSTAT);
  4871. return current_pushpull_status;
  4872. }
  4873. /**
  4874. * @brief Indicates on which output the signal was applied, in push-pull mode,
  4875. balanced fault mode or delayed idle mode, when the protection was triggered.
  4876. * @param hhrtim: pointer to HAL HRTIM handle
  4877. * @param TimerIdx: Timer index
  4878. * This parameter can be one of the following values:
  4879. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  4880. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  4881. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  4882. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  4883. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  4884. * @retval Idle Push Pull Status
  4885. */
  4886. uint32_t HAL_HRTIM_GetIdlePushPullStatus(HRTIM_HandleTypeDef * hhrtim,
  4887. uint32_t TimerIdx)
  4888. {
  4889. uint32_t idle_pushpull_status;
  4890. /* Check the parameters */
  4891. assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
  4892. /* Read current push pull status */
  4893. idle_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_IPPSTAT);
  4894. return idle_pushpull_status;
  4895. }
  4896. /**
  4897. * @}
  4898. */
  4899. /** @defgroup HRTIM_Exported_Functions_Group10 Interrupts handling
  4900. * @brief Functions called when HRTIM generates an interrupt
  4901. * 7 interrupts can be generated by the master timer:
  4902. * - Master timer registers update
  4903. * - Synchronization event received
  4904. * - Master timer repetition event
  4905. * - Master Compare 1 to 4 event
  4906. * 14 interrupts can be generated by each timing unit:
  4907. * - Delayed protection triggered
  4908. * - Counter reset or roll-over event
  4909. * - Output 1 and output 2 reset (transition active to inactive)
  4910. * - Output 1 and output 2 set (transition inactive to active)
  4911. * - Capture 1 and 2 events
  4912. * - Timing unit registers update
  4913. * - Repetition event
  4914. * - Compare 1 to 4 event
  4915. * 8 global interrupts are generated for the whole HRTIM:
  4916. * - System fault and Fault 1 to 5 (regardless of the timing unit attribution)
  4917. * - Burst mode period completed
  4918. *
  4919. @verbatim
  4920. ===============================================================================
  4921. ##### HRTIM interrupts handling #####
  4922. ===============================================================================
  4923. [..]
  4924. This subsection provides a set of functions allowing to manage the HRTIM
  4925. interrupts:
  4926. (+) HRTIM interrupt handler
  4927. (+) Callback function called when Fault1 interrupt occurs
  4928. (+) Callback function called when Fault2 interrupt occurs
  4929. (+) Callback function called when Fault3 interrupt occurs
  4930. (+) Callback function called when Fault4 interrupt occurs
  4931. (+) Callback function called when Fault5 interrupt occurs
  4932. (+) Callback function called when system Fault interrupt occurs
  4933. (+) Callback function called when burst mode period interrupt occurs
  4934. (+) Callback function called when synchronization input interrupt occurs
  4935. (+) Callback function called when a timer register update interrupt occurs
  4936. (+) Callback function called when a timer repetition interrupt occurs
  4937. (+) Callback function called when a compare 1 match interrupt occurs
  4938. (+) Callback function called when a compare 2 match interrupt occurs
  4939. (+) Callback function called when a compare 3 match interrupt occurs
  4940. (+) Callback function called when a compare 4 match interrupt occurs
  4941. (+) Callback function called when a capture 1 interrupt occurs
  4942. (+) Callback function called when a capture 2 interrupt occurs
  4943. (+) Callback function called when a delayed protection interrupt occurs
  4944. (+) Callback function called when a timer counter reset interrupt occurs
  4945. (+) Callback function called when a timer output 1 set interrupt occurs
  4946. (+) Callback function called when a timer output 1 reset interrupt occurs
  4947. (+) Callback function called when a timer output 2 set interrupt occurs
  4948. (+) Callback function called when a timer output 2 reset interrupt occurs
  4949. (+) Callback function called when a timer output 2 reset interrupt occurs
  4950. (+) Callback function called upon completion of a burst DMA transfer
  4951. @endverbatim
  4952. * @{
  4953. */
  4954. /**
  4955. * @brief This function handles HRTIM interrupt request.
  4956. * @param hhrtim: pointer to HAL HRTIM handle
  4957. * @param TimerIdx: Timer index
  4958. * This parameter can be any value of @ref HRTIM_Timer_Index
  4959. * @retval None
  4960. */
  4961. void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef * hhrtim,
  4962. uint32_t TimerIdx)
  4963. {
  4964. /* HRTIM interrupts handling */
  4965. if (TimerIdx == HRTIM_TIMERINDEX_COMMON)
  4966. {
  4967. HRTIM_HRTIM_ISR(hhrtim);
  4968. }
  4969. else if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  4970. {
  4971. /* Master related interrupts handling */
  4972. HRTIM_Master_ISR(hhrtim);
  4973. }
  4974. else
  4975. {
  4976. /* Timing unit related interrupts handling */
  4977. HRTIM_Timer_ISR(hhrtim, TimerIdx);
  4978. }
  4979. }
  4980. /**
  4981. * @brief Callback function invoked when a fault 1 interrupt occured
  4982. * @param hhrtim: pointer to HAL HRTIM handle * @retval None
  4983. * @retval None
  4984. */
  4985. __weak void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef * hhrtim)
  4986. {
  4987. /* Prevent unused argument(s) compilation warning */
  4988. UNUSED(hhrtim);
  4989. /* NOTE : This function should not be modified, when the callback is needed,
  4990. the HAL_HRTIM_Fault1Callback could be implenetd in the user file
  4991. */
  4992. }
  4993. /**
  4994. * @brief Callback function invoked when a fault 2 interrupt occured
  4995. * @param hhrtim: pointer to HAL HRTIM handle
  4996. * @retval None
  4997. */
  4998. __weak void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef * hhrtim)
  4999. {
  5000. /* Prevent unused argument(s) compilation warning */
  5001. UNUSED(hhrtim);
  5002. /* NOTE : This function should not be modified, when the callback is needed,
  5003. the HAL_HRTIM_Fault2Callback could be implenetd in the user file
  5004. */
  5005. }
  5006. /**
  5007. * @brief Callback function invoked when a fault 3 interrupt occured
  5008. * @param hhrtim: pointer to HAL HRTIM handle
  5009. * @retval None
  5010. */
  5011. __weak void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef * hhrtim)
  5012. {
  5013. /* Prevent unused argument(s) compilation warning */
  5014. UNUSED(hhrtim);
  5015. /* NOTE : This function should not be modified, when the callback is needed,
  5016. the HAL_HRTIM_Fault3Callback could be implenetd in the user file
  5017. */
  5018. }
  5019. /**
  5020. * @brief Callback function invoked when a fault 4 interrupt occured
  5021. * @param hhrtim: pointer to HAL HRTIM handle
  5022. * @retval None
  5023. */
  5024. __weak void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef * hhrtim)
  5025. {
  5026. /* Prevent unused argument(s) compilation warning */
  5027. UNUSED(hhrtim);
  5028. /* NOTE : This function should not be modified, when the callback is needed,
  5029. the HAL_HRTIM_Fault4Callback could be implenetd in the user file
  5030. */
  5031. }
  5032. /**
  5033. * @brief Callback function invoked when a fault 5 interrupt occured
  5034. * @param hhrtim: pointer to HAL HRTIM handle
  5035. * @retval None
  5036. */
  5037. __weak void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef * hhrtim)
  5038. {
  5039. /* Prevent unused argument(s) compilation warning */
  5040. UNUSED(hhrtim);
  5041. /* NOTE : This function should not be modified, when the callback is needed,
  5042. the HAL_HRTIM_Fault5Callback could be implenetd in the user file
  5043. */
  5044. }
  5045. /**
  5046. * @brief Callback function invoked when a system fault interrupt occured
  5047. * @param hhrtim: pointer to HAL HRTIM handle
  5048. * @retval None
  5049. */
  5050. __weak void HAL_HRTIM_SystemFaultCallback(HRTIM_HandleTypeDef * hhrtim)
  5051. {
  5052. /* Prevent unused argument(s) compilation warning */
  5053. UNUSED(hhrtim);
  5054. /* NOTE : This function should not be modified, when the callback is needed,
  5055. the HAL_HRTIM_SystemFaultCallback could be implenetd in the user file
  5056. */
  5057. }
  5058. /**
  5059. * @brief Callback function invoked when the end of the burst mode period is reached
  5060. * @param hhrtim: pointer to HAL HRTIM handle
  5061. * @retval None
  5062. */
  5063. __weak void HAL_HRTIM_BurstModePeriodCallback(HRTIM_HandleTypeDef * hhrtim)
  5064. {
  5065. /* Prevent unused argument(s) compilation warning */
  5066. UNUSED(hhrtim);
  5067. /* NOTE : This function should not be modified, when the callback is needed,
  5068. the HAL_HRTIM_BurstModeCallback could be implenetd in the user file
  5069. */
  5070. }
  5071. /**
  5072. * @brief Callback function invoked when a synchronization input event is received
  5073. * @param hhrtim: pointer to HAL HRTIM handle
  5074. * @retval None
  5075. */
  5076. __weak void HAL_HRTIM_SynchronizationEventCallback(HRTIM_HandleTypeDef * hhrtim)
  5077. {
  5078. /* Prevent unused argument(s) compilation warning */
  5079. UNUSED(hhrtim);
  5080. /* NOTE : This function should not be modified, when the callback is needed,
  5081. the HAL_HRTIM_Master_SynchronizationEventCallback could be implenetd in the user file
  5082. */
  5083. }
  5084. /**
  5085. * @brief Callback function invoked when timer registers are updated
  5086. * @param hhrtim: pointer to HAL HRTIM handle
  5087. * @param TimerIdx: Timer index
  5088. * This parameter can be one of the following values:
  5089. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5090. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5091. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5092. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5093. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5094. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5095. * @retval None
  5096. */
  5097. __weak void HAL_HRTIM_RegistersUpdateCallback(HRTIM_HandleTypeDef * hhrtim,
  5098. uint32_t TimerIdx)
  5099. {
  5100. /* Prevent unused argument(s) compilation warning */
  5101. UNUSED(hhrtim);
  5102. UNUSED(TimerIdx);
  5103. /* NOTE : This function should not be modified, when the callback is needed,
  5104. the HAL_HRTIM_Master_RegistersUpdateCallback could be implenetd in the user file
  5105. */
  5106. }
  5107. /**
  5108. * @brief Callback function invoked when timer repetition period has elapsed
  5109. * @param hhrtim: pointer to HAL HRTIM handle
  5110. * @param TimerIdx: Timer index
  5111. * This parameter can be one of the following values:
  5112. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5113. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5114. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5115. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5116. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5117. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5118. * @retval None
  5119. */
  5120. __weak void HAL_HRTIM_RepetitionEventCallback(HRTIM_HandleTypeDef * hhrtim,
  5121. uint32_t TimerIdx)
  5122. {
  5123. /* Prevent unused argument(s) compilation warning */
  5124. UNUSED(hhrtim);
  5125. UNUSED(TimerIdx);
  5126. /* NOTE : This function should not be modified, when the callback is needed,
  5127. the HAL_HRTIM_Master_RepetitionEventCallback could be implenetd in the user file
  5128. */
  5129. }
  5130. /**
  5131. * @brief Callback function invoked when the timer counter matches the value
  5132. * programmed in the compare 1 register
  5133. * @param hhrtim: pointer to HAL HRTIM handle
  5134. * @param TimerIdx: Timer index
  5135. * This parameter can be one of the following values:
  5136. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5137. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5138. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5139. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5140. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5141. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5142. * @retval None
  5143. */
  5144. __weak void HAL_HRTIM_Compare1EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5145. uint32_t TimerIdx)
  5146. {
  5147. /* Prevent unused argument(s) compilation warning */
  5148. UNUSED(hhrtim);
  5149. UNUSED(TimerIdx);
  5150. /* NOTE : This function should not be modified, when the callback is needed,
  5151. the HAL_HRTIM_Master_Compare1EventCallback could be implenetd in the user file
  5152. */
  5153. }
  5154. /**
  5155. * @brief Callback function invoked when the timer counter matches the value
  5156. * programmed in the compare 2 register
  5157. * @param hhrtim: pointer to HAL HRTIM handle
  5158. * @retval None
  5159. * @param TimerIdx: Timer index
  5160. * This parameter can be one of the following values:
  5161. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5162. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5163. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5164. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5165. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5166. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5167. */
  5168. __weak void HAL_HRTIM_Compare2EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5169. uint32_t TimerIdx)
  5170. {
  5171. /* Prevent unused argument(s) compilation warning */
  5172. UNUSED(hhrtim);
  5173. UNUSED(TimerIdx);
  5174. /* NOTE : This function should not be modified, when the callback is needed,
  5175. the HAL_HRTIM_Master_Compare2EventCallback could be implenetd in the user file
  5176. */
  5177. }
  5178. /**
  5179. * @brief Callback function invoked when the timer counter matches the value
  5180. * programmed in the compare 3 register
  5181. * @param hhrtim: pointer to HAL HRTIM handle
  5182. * @param TimerIdx: Timer index
  5183. * This parameter can be one of the following values:
  5184. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5185. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5186. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5187. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5188. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5189. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5190. * @retval None
  5191. */
  5192. __weak void HAL_HRTIM_Compare3EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5193. uint32_t TimerIdx)
  5194. {
  5195. /* Prevent unused argument(s) compilation warning */
  5196. UNUSED(hhrtim);
  5197. UNUSED(TimerIdx);
  5198. /* NOTE : This function should not be modified, when the callback is needed,
  5199. the HAL_HRTIM_Master_Compare3EventCallback could be implenetd in the user file
  5200. */
  5201. }
  5202. /**
  5203. * @brief Callback function invoked when the timer counter matches the value
  5204. * programmed in the compare 4 register
  5205. * @param hhrtim: pointer to HAL HRTIM handle
  5206. * @param TimerIdx: Timer index
  5207. * This parameter can be one of the following values:
  5208. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5209. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5210. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5211. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5212. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5213. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5214. * @retval None
  5215. */
  5216. __weak void HAL_HRTIM_Compare4EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5217. uint32_t TimerIdx)
  5218. {
  5219. /* Prevent unused argument(s) compilation warning */
  5220. UNUSED(hhrtim);
  5221. UNUSED(TimerIdx);
  5222. /* NOTE : This function should not be modified, when the callback is needed,
  5223. the HAL_HRTIM_Master_Compare4EventCallback could be implenetd in the user file
  5224. */
  5225. }
  5226. /**
  5227. * @brief Callback function invoked when the timer x capture 1 event occurs
  5228. * @param hhrtim: pointer to HAL HRTIM handle
  5229. * @param TimerIdx: Timer index
  5230. * This parameter can be one of the following values:
  5231. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5232. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5233. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5234. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5235. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5236. * @retval None
  5237. */
  5238. __weak void HAL_HRTIM_Capture1EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5239. uint32_t TimerIdx)
  5240. {
  5241. /* Prevent unused argument(s) compilation warning */
  5242. UNUSED(hhrtim);
  5243. UNUSED(TimerIdx);
  5244. /* NOTE : This function should not be modified, when the callback is needed,
  5245. the HAL_HRTIM_Timer_Capture1EventCallback could be implenetd in the user file
  5246. */
  5247. }
  5248. /**
  5249. * @brief Callback function invoked when the timer x capture 2 event occurs
  5250. * @param hhrtim: pointer to HAL HRTIM handle
  5251. * @param TimerIdx: Timer index
  5252. * This parameter can be one of the following values:
  5253. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5254. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5255. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5256. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5257. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5258. * @retval None
  5259. */
  5260. __weak void HAL_HRTIM_Capture2EventCallback(HRTIM_HandleTypeDef * hhrtim,
  5261. uint32_t TimerIdx)
  5262. {
  5263. /* Prevent unused argument(s) compilation warning */
  5264. UNUSED(hhrtim);
  5265. UNUSED(TimerIdx);
  5266. /* NOTE : This function should not be modified, when the callback is needed,
  5267. the HAL_HRTIM_Timer_Capture2EventCallback could be implenetd in the user file
  5268. */
  5269. }
  5270. /**
  5271. * @brief Callback function invoked when the delayed idle or balanced idle mode is
  5272. * entered
  5273. * @param hhrtim: pointer to HAL HRTIM handle
  5274. * @param TimerIdx: Timer index
  5275. * This parameter can be one of the following values:
  5276. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5277. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5278. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5279. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5280. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5281. * @retval None
  5282. */
  5283. __weak void HAL_HRTIM_DelayedProtectionCallback(HRTIM_HandleTypeDef * hhrtim,
  5284. uint32_t TimerIdx)
  5285. {
  5286. /* Prevent unused argument(s) compilation warning */
  5287. UNUSED(hhrtim);
  5288. UNUSED(TimerIdx);
  5289. /* NOTE : This function should not be modified, when the callback is needed,
  5290. the HAL_HRTIM_Timer_DelayedProtectionCallback could be implenetd in the user file
  5291. */
  5292. }
  5293. /**
  5294. * @brief Callback function invoked when the timer x counter reset/roll-over
  5295. * event occurs
  5296. * @param hhrtim: pointer to HAL HRTIM handle
  5297. * @param TimerIdx: Timer index
  5298. * This parameter can be one of the following values:
  5299. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5300. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5301. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5302. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5303. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5304. * @retval None
  5305. */
  5306. __weak void HAL_HRTIM_CounterResetCallback(HRTIM_HandleTypeDef * hhrtim,
  5307. uint32_t TimerIdx)
  5308. {
  5309. /* Prevent unused argument(s) compilation warning */
  5310. UNUSED(hhrtim);
  5311. UNUSED(TimerIdx);
  5312. /* NOTE : This function should not be modified, when the callback is needed,
  5313. the HAL_HRTIM_Timer_CounterResetCallback could be implenetd in the user file
  5314. */
  5315. }
  5316. /**
  5317. * @brief Callback function invoked when the timer x output 1 is set
  5318. * @param hhrtim: pointer to HAL HRTIM handle
  5319. * @param TimerIdx: Timer index
  5320. * This parameter can be one of the following values:
  5321. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5322. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5323. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5324. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5325. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5326. * @retval None
  5327. */
  5328. __weak void HAL_HRTIM_Output1SetCallback(HRTIM_HandleTypeDef * hhrtim,
  5329. uint32_t TimerIdx)
  5330. {
  5331. /* Prevent unused argument(s) compilation warning */
  5332. UNUSED(hhrtim);
  5333. UNUSED(TimerIdx);
  5334. /* NOTE : This function should not be modified, when the callback is needed,
  5335. the HAL_HRTIM_Timer_Output1SetCallback could be implenetd in the user file
  5336. */
  5337. }
  5338. /**
  5339. * @brief Callback function invoked when the timer x output 1 is reset
  5340. * @param hhrtim: pointer to HAL HRTIM handle
  5341. * @param TimerIdx: Timer index
  5342. * This parameter can be one of the following values:
  5343. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5344. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5345. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5346. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5347. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5348. * @retval None
  5349. */
  5350. __weak void HAL_HRTIM_Output1ResetCallback(HRTIM_HandleTypeDef * hhrtim,
  5351. uint32_t TimerIdx)
  5352. {
  5353. /* Prevent unused argument(s) compilation warning */
  5354. UNUSED(hhrtim);
  5355. UNUSED(TimerIdx);
  5356. /* NOTE : This function should not be modified, when the callback is needed,
  5357. the HAL_HRTIM_Timer_Output1ResetCallback could be implenetd in the user file
  5358. */
  5359. }
  5360. /**
  5361. * @brief Callback function invoked when the timer x output 2 is set
  5362. * @param hhrtim: pointer to HAL HRTIM handle
  5363. * @param TimerIdx: Timer index
  5364. * This parameter can be one of the following values:
  5365. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5366. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5367. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5368. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5369. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5370. * @retval None
  5371. */
  5372. __weak void HAL_HRTIM_Output2SetCallback(HRTIM_HandleTypeDef * hhrtim,
  5373. uint32_t TimerIdx)
  5374. {
  5375. /* Prevent unused argument(s) compilation warning */
  5376. UNUSED(hhrtim);
  5377. UNUSED(TimerIdx);
  5378. /* NOTE : This function should not be modified, when the callback is needed,
  5379. the HAL_HRTIM_Timer_Output2SetCallback could be implenetd in the user file
  5380. */
  5381. }
  5382. /**
  5383. * @brief Callback function invoked when the timer x output 2 is reset
  5384. * @param hhrtim: pointer to HAL HRTIM handle
  5385. * @param TimerIdx: Timer index
  5386. * This parameter can be one of the following values:
  5387. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5388. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5389. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5390. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5391. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5392. * @retval None
  5393. */
  5394. __weak void HAL_HRTIM_Output2ResetCallback(HRTIM_HandleTypeDef * hhrtim,
  5395. uint32_t TimerIdx)
  5396. {
  5397. /* Prevent unused argument(s) compilation warning */
  5398. UNUSED(hhrtim);
  5399. UNUSED(TimerIdx);
  5400. /* NOTE : This function should not be modified, when the callback is needed,
  5401. the HAL_HRTIM_Timer_Output2ResetCallback could be implenetd in the user file
  5402. */
  5403. }
  5404. /**
  5405. * @brief Callback function invoked when a DMA burst transfer is completed
  5406. * @param hhrtim: pointer to HAL HRTIM handle
  5407. * @param TimerIdx: Timer index
  5408. * This parameter can be one of the following values:
  5409. * @arg HRTIM_TIMERINDEX_MASTER for master timer
  5410. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  5411. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  5412. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  5413. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  5414. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  5415. * @retval None
  5416. */
  5417. __weak void HAL_HRTIM_BurstDMATransferCallback(HRTIM_HandleTypeDef * hhrtim,
  5418. uint32_t TimerIdx)
  5419. {
  5420. /* Prevent unused argument(s) compilation warning */
  5421. UNUSED(hhrtim);
  5422. UNUSED(TimerIdx);
  5423. /* NOTE : This function should not be modified, when the callback is needed,
  5424. the HAL_HRTIM_BurstDMATransferCallback could be implenetd in the user file
  5425. */
  5426. }
  5427. /**
  5428. * @brief Callback function invoked when a DMA error occurs
  5429. * @param hhrtim: pointer to HAL HRTIM handle
  5430. * @retval None
  5431. */
  5432. __weak void HAL_HRTIM_ErrorCallback(HRTIM_HandleTypeDef *hhrtim)
  5433. {
  5434. /* Prevent unused argument(s) compilation warning */
  5435. UNUSED(hhrtim);
  5436. /* NOTE : This function should not be modified, when the callback is needed,
  5437. the HAL_HRTIM_ErrorCallback could be implenetd in the user file
  5438. */
  5439. }
  5440. /**
  5441. * @}
  5442. */
  5443. /**
  5444. * @}
  5445. */
  5446. /** @addtogroup HRTIM_Private_Functions HRTIM Private Functions
  5447. * @{
  5448. */
  5449. /**
  5450. * @brief Configures the master timer time base
  5451. * @param hhrtim: pointer to HAL HRTIM handle
  5452. * @param pTimeBaseCfg: pointer to the time base configuration structure
  5453. * @retval None
  5454. */
  5455. static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
  5456. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
  5457. {
  5458. uint32_t hrtim_mcr;
  5459. /* Configure master timer */
  5460. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  5461. /* Set the prescaler ratio */
  5462. hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CK_PSC);
  5463. hrtim_mcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio;
  5464. /* Set the operating mode */
  5465. hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CONT | HRTIM_MCR_RETRIG);
  5466. hrtim_mcr |= (uint32_t)pTimeBaseCfg->Mode;
  5467. /* Update the HRTIM registers */
  5468. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  5469. hhrtim->Instance->sMasterRegs.MPER = pTimeBaseCfg->Period;
  5470. hhrtim->Instance->sMasterRegs.MREP = pTimeBaseCfg->RepetitionCounter;
  5471. }
  5472. /**
  5473. * @brief Configures timing unit (timer A to timer E) time base
  5474. * @param hhrtim: pointer to HAL HRTIM handle
  5475. * @param TimerIdx: Timer index
  5476. * @param pTimeBaseCfg: pointer to the time base configuration structure
  5477. * @retval None
  5478. */
  5479. static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
  5480. uint32_t TimerIdx ,
  5481. HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
  5482. {
  5483. uint32_t hrtim_timcr;
  5484. /* Configure master timing unit */
  5485. hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
  5486. /* Set the prescaler ratio */
  5487. hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CK_PSC);
  5488. hrtim_timcr |= (uint32_t)pTimeBaseCfg->PrescalerRatio;
  5489. /* Set the operating mode */
  5490. hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CONT | HRTIM_TIMCR_RETRIG);
  5491. hrtim_timcr |= (uint32_t)pTimeBaseCfg->Mode;
  5492. /* Update the HRTIM registers */
  5493. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
  5494. hhrtim->Instance->sTimerxRegs[TimerIdx].PERxR = pTimeBaseCfg->Period;
  5495. hhrtim->Instance->sTimerxRegs[TimerIdx].REPxR = pTimeBaseCfg->RepetitionCounter;
  5496. }
  5497. /**
  5498. * @brief Configures the master timer in waveform mode
  5499. * @param hhrtim: pointer to HAL HRTIM handle
  5500. * @param pTimerCfg: pointer to the timer configuration data structure
  5501. * @retval None
  5502. */
  5503. static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  5504. HRTIM_TimerCfgTypeDef * pTimerCfg)
  5505. {
  5506. uint32_t hrtim_mcr;
  5507. uint32_t hrtim_bmcr;
  5508. /* Configure master timer */
  5509. hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
  5510. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  5511. /* Enable/Disable the half mode */
  5512. hrtim_mcr &= ~(HRTIM_MCR_HALF);
  5513. hrtim_mcr |= pTimerCfg->HalfModeEnable;
  5514. /* Enable/Disable the timer start upon synchronization event reception */
  5515. hrtim_mcr &= ~(HRTIM_MCR_SYNCSTRTM);
  5516. hrtim_mcr |= pTimerCfg->StartOnSync;
  5517. /* Enable/Disable the timer reset upon synchronization event reception */
  5518. hrtim_mcr &= ~(HRTIM_MCR_SYNCRSTM);
  5519. hrtim_mcr |= pTimerCfg->ResetOnSync;
  5520. /* Enable/Disable the DAC synchronization event generation */
  5521. hrtim_mcr &= ~(HRTIM_MCR_DACSYNC);
  5522. hrtim_mcr |= pTimerCfg->DACSynchro;
  5523. /* Enable/Disable preload meachanism for timer registers */
  5524. hrtim_mcr &= ~(HRTIM_MCR_PREEN);
  5525. hrtim_mcr |= pTimerCfg->PreloadEnable;
  5526. /* Master timer registers update handling */
  5527. hrtim_mcr &= ~(HRTIM_MCR_BRSTDMA);
  5528. hrtim_mcr |= (pTimerCfg->UpdateGating << 2);
  5529. /* Enable/Disable registers update on repetition */
  5530. hrtim_mcr &= ~(HRTIM_MCR_MREPU);
  5531. hrtim_mcr |= pTimerCfg->RepetitionUpdate;
  5532. /* Set the timer burst mode */
  5533. hrtim_bmcr &= ~(HRTIM_BMCR_MTBM);
  5534. hrtim_bmcr |= pTimerCfg->BurstMode;
  5535. /* Update the HRTIM registers */
  5536. hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
  5537. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  5538. }
  5539. /**
  5540. * @brief Configures timing unit (timer A to timer E) in waveform mode
  5541. * @param hhrtim: pointer to HAL HRTIM handle
  5542. * @param TimerIdx: Timer index
  5543. * @param pTimerCfg: pointer to the timer configuration data structure
  5544. * @retval None
  5545. */
  5546. static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
  5547. uint32_t TimerIdx,
  5548. HRTIM_TimerCfgTypeDef * pTimerCfg)
  5549. {
  5550. uint32_t hrtim_timcr;
  5551. uint32_t hrtim_timfltr;
  5552. uint32_t hrtim_timoutr;
  5553. uint32_t hrtim_timrstr;
  5554. uint32_t hrtim_bmcr;
  5555. /* UPDGAT bitfield must be reset before programming a new value */
  5556. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~(HRTIM_TIMCR_UPDGAT);
  5557. /* Configure timing unit (Timer A to Timer E) */
  5558. hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
  5559. hrtim_timfltr = hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR;
  5560. hrtim_timoutr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
  5561. hrtim_timrstr = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR;
  5562. hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
  5563. /* Enable/Disable the half mode */
  5564. hrtim_timcr &= ~(HRTIM_TIMCR_HALF);
  5565. hrtim_timcr |= pTimerCfg->HalfModeEnable;
  5566. /* Enable/Disable the timer start upon synchronization event reception */
  5567. hrtim_timcr &= ~(HRTIM_TIMCR_SYNCSTRT);
  5568. hrtim_timcr |= pTimerCfg->StartOnSync;
  5569. /* Enable/Disable the timer reset upon synchronization event reception */
  5570. hrtim_timcr &= ~(HRTIM_TIMCR_SYNCRST);
  5571. hrtim_timcr |= pTimerCfg->ResetOnSync;
  5572. /* Enable/Disable the DAC synchronization event generation */
  5573. hrtim_timcr &= ~(HRTIM_TIMCR_DACSYNC);
  5574. hrtim_timcr |= pTimerCfg->DACSynchro;
  5575. /* Enable/Disable preload meachanism for timer registers */
  5576. hrtim_timcr &= ~(HRTIM_TIMCR_PREEN);
  5577. hrtim_timcr |= pTimerCfg->PreloadEnable;
  5578. /* Timing unit registers update handling */
  5579. hrtim_timcr &= ~(HRTIM_TIMCR_UPDGAT);
  5580. hrtim_timcr |= pTimerCfg->UpdateGating;
  5581. /* Enable/Disable registers update on repetition */
  5582. hrtim_timcr &= ~(HRTIM_TIMCR_TREPU);
  5583. if (pTimerCfg->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED)
  5584. {
  5585. hrtim_timcr |= HRTIM_TIMCR_TREPU;
  5586. }
  5587. /* Set the push-pull mode */
  5588. hrtim_timcr &= ~(HRTIM_TIMCR_PSHPLL);
  5589. hrtim_timcr |= pTimerCfg->PushPull;
  5590. /* Enable/Disable registers update on timer counter reset */
  5591. hrtim_timcr &= ~(HRTIM_TIMCR_TRSTU);
  5592. hrtim_timcr |= pTimerCfg->ResetUpdate;
  5593. /* Set the timer update trigger */
  5594. hrtim_timcr &= ~(HRTIM_TIMCR_TIMUPDATETRIGGER);
  5595. hrtim_timcr |= pTimerCfg->UpdateTrigger;
  5596. /* Enable/Disable the fault channel at timer level */
  5597. hrtim_timfltr &= ~(HRTIM_FLTR_FLTxEN);
  5598. hrtim_timfltr |= (pTimerCfg->FaultEnable & HRTIM_FLTR_FLTxEN);
  5599. /* Lock/Unlock fault sources at timer level */
  5600. hrtim_timfltr &= ~(HRTIM_FLTR_FLTLCK);
  5601. hrtim_timfltr |= pTimerCfg->FaultLock;
  5602. /* The deadtime cannot be used simultaneously with the push-pull mode */
  5603. if (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_DISABLED)
  5604. {
  5605. /* Enable/Disable dead time insertion at timer level */
  5606. hrtim_timoutr &= ~(HRTIM_OUTR_DTEN);
  5607. hrtim_timoutr |= pTimerCfg->DeadTimeInsertion;
  5608. }
  5609. /* Enable/Disable delayed protection at timer level
  5610. Delayed Idle is available whatever the timer operating mode (regular, push-pull)
  5611. Balanced Idle is only available in push-pull mode
  5612. */
  5613. if (((pTimerCfg->DelayedProtectionMode != HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6)
  5614. && (pTimerCfg->DelayedProtectionMode != HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7))
  5615. || (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_ENABLED))
  5616. {
  5617. hrtim_timoutr &= ~(HRTIM_OUTR_DLYPRT| HRTIM_OUTR_DLYPRTEN);
  5618. hrtim_timoutr |= pTimerCfg->DelayedProtectionMode;
  5619. }
  5620. /* Set the timer counter reset trigger */
  5621. hrtim_timrstr = pTimerCfg->ResetTrigger;
  5622. /* Set the timer burst mode */
  5623. switch (TimerIdx)
  5624. {
  5625. case HRTIM_TIMERINDEX_TIMER_A:
  5626. {
  5627. hrtim_bmcr &= ~(HRTIM_BMCR_TABM);
  5628. hrtim_bmcr |= ( pTimerCfg->BurstMode << 1);
  5629. }
  5630. break;
  5631. case HRTIM_TIMERINDEX_TIMER_B:
  5632. {
  5633. hrtim_bmcr &= ~(HRTIM_BMCR_TBBM);
  5634. hrtim_bmcr |= ( pTimerCfg->BurstMode << 2);
  5635. }
  5636. break;
  5637. case HRTIM_TIMERINDEX_TIMER_C:
  5638. {
  5639. hrtim_bmcr &= ~(HRTIM_BMCR_TCBM);
  5640. hrtim_bmcr |= ( pTimerCfg->BurstMode << 3);
  5641. }
  5642. break;
  5643. case HRTIM_TIMERINDEX_TIMER_D:
  5644. {
  5645. hrtim_bmcr &= ~(HRTIM_BMCR_TDBM);
  5646. hrtim_bmcr |= ( pTimerCfg->BurstMode << 4);
  5647. }
  5648. break;
  5649. case HRTIM_TIMERINDEX_TIMER_E:
  5650. {
  5651. hrtim_bmcr &= ~(HRTIM_BMCR_TEBM);
  5652. hrtim_bmcr |= ( pTimerCfg->BurstMode << 5);
  5653. }
  5654. break;
  5655. }
  5656. /* Update the HRTIM registers */
  5657. hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
  5658. hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR = hrtim_timfltr;
  5659. hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_timoutr;
  5660. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = hrtim_timrstr;
  5661. hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
  5662. }
  5663. /**
  5664. * @brief Configures a compare unit
  5665. * @param hhrtim: pointer to HAL HRTIM handle
  5666. * @param TimerIdx: Timer index
  5667. * @param CompareUnit: Compare unit identifier
  5668. * @param pCompareCfg: pointer to the compare unit configuration data structure
  5669. * @retval None
  5670. */
  5671. static void HRTIM_CompareUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  5672. uint32_t TimerIdx,
  5673. uint32_t CompareUnit,
  5674. HRTIM_CompareCfgTypeDef * pCompareCfg)
  5675. {
  5676. if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
  5677. {
  5678. /* Configure the compare unit of the master timer */
  5679. switch (CompareUnit)
  5680. {
  5681. case HRTIM_COMPAREUNIT_1:
  5682. {
  5683. hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue;
  5684. }
  5685. break;
  5686. case HRTIM_COMPAREUNIT_2:
  5687. {
  5688. hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue;
  5689. }
  5690. break;
  5691. case HRTIM_COMPAREUNIT_3:
  5692. {
  5693. hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue;
  5694. }
  5695. break;
  5696. case HRTIM_COMPAREUNIT_4:
  5697. {
  5698. hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue;
  5699. }
  5700. break;
  5701. }
  5702. }
  5703. else
  5704. {
  5705. /* Configure the compare unit of the timing unit */
  5706. switch (CompareUnit)
  5707. {
  5708. case HRTIM_COMPAREUNIT_1:
  5709. {
  5710. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
  5711. }
  5712. break;
  5713. case HRTIM_COMPAREUNIT_2:
  5714. {
  5715. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
  5716. }
  5717. break;
  5718. case HRTIM_COMPAREUNIT_3:
  5719. {
  5720. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
  5721. }
  5722. break;
  5723. case HRTIM_COMPAREUNIT_4:
  5724. {
  5725. hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
  5726. }
  5727. break;
  5728. }
  5729. }
  5730. }
  5731. /**
  5732. * @brief Configures a capture unit
  5733. * @param hhrtim: pointer to HAL HRTIM handle
  5734. * @param TimerIdx: Timer index
  5735. * @param CaptureUnit: Capture unit identifier
  5736. * @param Event: Event reference
  5737. * @retval None
  5738. */
  5739. static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
  5740. uint32_t TimerIdx,
  5741. uint32_t CaptureUnit,
  5742. uint32_t Event)
  5743. {
  5744. uint32_t CaptureTrigger = 0xFFFFFFFFU;
  5745. switch (Event)
  5746. {
  5747. case HRTIM_EVENT_1:
  5748. {
  5749. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1;
  5750. }
  5751. break;
  5752. case HRTIM_EVENT_2:
  5753. {
  5754. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_2;
  5755. }
  5756. break;
  5757. case HRTIM_EVENT_3:
  5758. {
  5759. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_3;
  5760. }
  5761. break;
  5762. case HRTIM_EVENT_4:
  5763. {
  5764. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_4;
  5765. }
  5766. break;
  5767. case HRTIM_EVENT_5:
  5768. {
  5769. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_5;
  5770. }
  5771. break;
  5772. case HRTIM_EVENT_6:
  5773. {
  5774. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_6;
  5775. }
  5776. break;
  5777. case HRTIM_EVENT_7:
  5778. {
  5779. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_7;
  5780. }
  5781. break;
  5782. case HRTIM_EVENT_8:
  5783. {
  5784. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_8;
  5785. }
  5786. break;
  5787. case HRTIM_EVENT_9:
  5788. {
  5789. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_9;
  5790. }
  5791. break;
  5792. case HRTIM_EVENT_10:
  5793. {
  5794. CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_10;
  5795. }
  5796. break;
  5797. }
  5798. switch (CaptureUnit)
  5799. {
  5800. case HRTIM_CAPTUREUNIT_1:
  5801. {
  5802. hhrtim->TimerParam[TimerIdx].CaptureTrigger1 = CaptureTrigger;
  5803. }
  5804. break;
  5805. case HRTIM_CAPTUREUNIT_2:
  5806. {
  5807. hhrtim->TimerParam[TimerIdx].CaptureTrigger2 = CaptureTrigger;
  5808. }
  5809. break;
  5810. }
  5811. }
  5812. /**
  5813. * @brief Configures the output of a timing unit
  5814. * @param hhrtim: pointer to HAL HRTIM handle
  5815. * @param TimerIdx: Timer index
  5816. * @param Output: timing unit output identifier
  5817. * @param pOutputCfg: pointer to the output configuration data structure
  5818. * @retval None
  5819. */
  5820. static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
  5821. uint32_t TimerIdx,
  5822. uint32_t Output,
  5823. HRTIM_OutputCfgTypeDef * pOutputCfg)
  5824. {
  5825. uint32_t hrtim_outr;
  5826. uint32_t hrtim_dtr;
  5827. uint32_t shift = 0xFFFFFFFFU;
  5828. hrtim_outr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
  5829. hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR;
  5830. switch (Output)
  5831. {
  5832. case HRTIM_OUTPUT_TA1:
  5833. case HRTIM_OUTPUT_TB1:
  5834. case HRTIM_OUTPUT_TC1:
  5835. case HRTIM_OUTPUT_TD1:
  5836. case HRTIM_OUTPUT_TE1:
  5837. {
  5838. /* Set the output set/reset crossbar */
  5839. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R = pOutputCfg->SetSource;
  5840. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R = pOutputCfg->ResetSource;
  5841. shift = 0;
  5842. }
  5843. break;
  5844. case HRTIM_OUTPUT_TA2:
  5845. case HRTIM_OUTPUT_TB2:
  5846. case HRTIM_OUTPUT_TC2:
  5847. case HRTIM_OUTPUT_TD2:
  5848. case HRTIM_OUTPUT_TE2:
  5849. {
  5850. /* Set the output set/reset crossbar */
  5851. hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R = pOutputCfg->SetSource;
  5852. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R = pOutputCfg->ResetSource;
  5853. shift = 16;
  5854. }
  5855. break;
  5856. }
  5857. /* Clear output config */
  5858. hrtim_outr &= ~((HRTIM_OUTR_POL1 |
  5859. HRTIM_OUTR_IDLM1 |
  5860. HRTIM_OUTR_IDLES1|
  5861. HRTIM_OUTR_FAULT1|
  5862. HRTIM_OUTR_CHP1 |
  5863. HRTIM_OUTR_DIDL1) << shift);
  5864. /* Set the polarity */
  5865. hrtim_outr |= (pOutputCfg->Polarity << shift);
  5866. /* Set the IDLE mode */
  5867. hrtim_outr |= (pOutputCfg->IdleMode << shift);
  5868. /* Set the IDLE state */
  5869. hrtim_outr |= (pOutputCfg->IdleLevel << shift);
  5870. /* Set the FAULT state */
  5871. hrtim_outr |= (pOutputCfg->FaultLevel << shift);
  5872. /* Set the chopper mode */
  5873. hrtim_outr |= (pOutputCfg->ChopperModeEnable << shift);
  5874. /* Set the burst mode entry mode : deadtime insertion when entering the idle
  5875. state during a burst mode operation is allowed only under the following
  5876. conditions:
  5877. - the outputs is active during the burst mode (IDLES=1)
  5878. - positive deadtimes (SDTR/SDTF set to 0)
  5879. */
  5880. if ((pOutputCfg->IdleLevel == HRTIM_OUTPUTIDLELEVEL_ACTIVE) &&
  5881. ((hrtim_dtr & HRTIM_DTR_SDTR) == RESET) &&
  5882. ((hrtim_dtr & HRTIM_DTR_SDTF) == RESET))
  5883. {
  5884. hrtim_outr |= (pOutputCfg->BurstModeEntryDelayed << shift);
  5885. }
  5886. /* Update HRTIM register */
  5887. hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_outr;
  5888. }
  5889. /**
  5890. * @brief Configures an external event channel
  5891. * @param hhrtim: pointer to HAL HRTIM handle
  5892. * @param Event: Event channel identifier
  5893. * @param pEventCfg: pointer to the event channel configuration data structure
  5894. * @retval None
  5895. */
  5896. static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
  5897. uint32_t Event,
  5898. HRTIM_EventCfgTypeDef *pEventCfg)
  5899. {
  5900. uint32_t hrtim_eecr1;
  5901. uint32_t hrtim_eecr2;
  5902. uint32_t hrtim_eecr3;
  5903. /* Configure external event channel */
  5904. hrtim_eecr1 = hhrtim->Instance->sCommonRegs.EECR1;
  5905. hrtim_eecr2 = hhrtim->Instance->sCommonRegs.EECR2;
  5906. hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3;
  5907. switch (Event)
  5908. {
  5909. case HRTIM_EVENT_1:
  5910. {
  5911. hrtim_eecr1 &= ~(HRTIM_EECR1_EE1SRC | HRTIM_EECR1_EE1POL | HRTIM_EECR1_EE1SNS | HRTIM_EECR1_EE1FAST);
  5912. hrtim_eecr1 |= pEventCfg->Source;
  5913. hrtim_eecr1 |= (pEventCfg->Polarity & HRTIM_EECR1_EE1POL);
  5914. hrtim_eecr1 |= pEventCfg->Sensitivity;
  5915. /* Update the HRTIM registers (all bitfields but EE1FAST bit) */
  5916. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5917. /* Update the HRTIM registers (EE1FAST bit) */
  5918. hrtim_eecr1 |= pEventCfg->FastMode;
  5919. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5920. }
  5921. break;
  5922. case HRTIM_EVENT_2:
  5923. {
  5924. hrtim_eecr1 &= ~(HRTIM_EECR1_EE2SRC | HRTIM_EECR1_EE2POL | HRTIM_EECR1_EE2SNS | HRTIM_EECR1_EE2FAST);
  5925. hrtim_eecr1 |= (pEventCfg->Source << 6);
  5926. hrtim_eecr1 |= ((pEventCfg->Polarity << 6) & (HRTIM_EECR1_EE2POL));
  5927. hrtim_eecr1 |= (pEventCfg->Sensitivity << 6);
  5928. /* Update the HRTIM registers (all bitfields but EE2FAST bit) */
  5929. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5930. /* Update the HRTIM registers (EE2FAST bit) */
  5931. hrtim_eecr1 |= (pEventCfg->FastMode << 6);
  5932. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5933. }
  5934. break;
  5935. case HRTIM_EVENT_3:
  5936. {
  5937. hrtim_eecr1 &= ~(HRTIM_EECR1_EE3SRC | HRTIM_EECR1_EE3POL | HRTIM_EECR1_EE3SNS | HRTIM_EECR1_EE3FAST);
  5938. hrtim_eecr1 |= (pEventCfg->Source << 12);
  5939. hrtim_eecr1 |= ((pEventCfg->Polarity << 12) & (HRTIM_EECR1_EE3POL));
  5940. hrtim_eecr1 |= (pEventCfg->Sensitivity << 12);
  5941. /* Update the HRTIM registers (all bitfields but EE3FAST bit) */
  5942. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5943. /* Update the HRTIM registers (EE3FAST bit) */
  5944. hrtim_eecr1 |= (pEventCfg->FastMode << 12);
  5945. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5946. }
  5947. break;
  5948. case HRTIM_EVENT_4:
  5949. {
  5950. hrtim_eecr1 &= ~(HRTIM_EECR1_EE4SRC | HRTIM_EECR1_EE4POL | HRTIM_EECR1_EE4SNS | HRTIM_EECR1_EE4FAST);
  5951. hrtim_eecr1 |= (pEventCfg->Source << 18);
  5952. hrtim_eecr1 |= ((pEventCfg->Polarity << 18) & (HRTIM_EECR1_EE4POL));
  5953. hrtim_eecr1 |= (pEventCfg->Sensitivity << 18);
  5954. /* Update the HRTIM registers (all bitfields but EE4FAST bit) */
  5955. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5956. /* Update the HRTIM registers (EE4FAST bit) */
  5957. hrtim_eecr1 |= (pEventCfg->FastMode << 18);
  5958. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5959. }
  5960. break;
  5961. case HRTIM_EVENT_5:
  5962. {
  5963. hrtim_eecr1 &= ~(HRTIM_EECR1_EE5SRC | HRTIM_EECR1_EE5POL | HRTIM_EECR1_EE5SNS | HRTIM_EECR1_EE5FAST);
  5964. hrtim_eecr1 |= (pEventCfg->Source << 24);
  5965. hrtim_eecr1 |= ((pEventCfg->Polarity << 24) & (HRTIM_EECR1_EE5POL));
  5966. hrtim_eecr1 |= (pEventCfg->Sensitivity << 24);
  5967. /* Update the HRTIM registers (all bitfields but EE5FAST bit) */
  5968. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5969. /* Update the HRTIM registers (EE5FAST bit) */
  5970. hrtim_eecr1 |= (pEventCfg->FastMode << 24);
  5971. hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
  5972. }
  5973. break;
  5974. case HRTIM_EVENT_6:
  5975. {
  5976. hrtim_eecr2 &= ~(HRTIM_EECR2_EE6SRC | HRTIM_EECR2_EE6POL | HRTIM_EECR2_EE6SNS);
  5977. hrtim_eecr2 |= pEventCfg->Source;
  5978. hrtim_eecr2 |= (pEventCfg->Polarity & HRTIM_EECR2_EE6POL);
  5979. hrtim_eecr2 |= pEventCfg->Sensitivity;
  5980. hrtim_eecr3 &= ~(HRTIM_EECR3_EE6F);
  5981. hrtim_eecr3 |= pEventCfg->Filter;
  5982. /* Update the HRTIM registers */
  5983. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  5984. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  5985. }
  5986. break;
  5987. case HRTIM_EVENT_7:
  5988. {
  5989. hrtim_eecr2 &= ~(HRTIM_EECR2_EE7SRC | HRTIM_EECR2_EE7POL | HRTIM_EECR2_EE7SNS);
  5990. hrtim_eecr2 |= (pEventCfg->Source << 6);
  5991. hrtim_eecr2 |= ((pEventCfg->Polarity << 6) & (HRTIM_EECR2_EE7POL));
  5992. hrtim_eecr2 |= (pEventCfg->Sensitivity << 6);
  5993. hrtim_eecr3 &= ~(HRTIM_EECR3_EE7F);
  5994. hrtim_eecr3 |= (pEventCfg->Filter << 6);
  5995. /* Update the HRTIM registers */
  5996. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  5997. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  5998. }
  5999. break;
  6000. case HRTIM_EVENT_8:
  6001. {
  6002. hrtim_eecr2 &= ~(HRTIM_EECR2_EE8SRC | HRTIM_EECR2_EE8POL | HRTIM_EECR2_EE8SNS);
  6003. hrtim_eecr2 |= (pEventCfg->Source << 12);
  6004. hrtim_eecr2 |= ((pEventCfg->Polarity << 12) & (HRTIM_EECR2_EE8POL));
  6005. hrtim_eecr2 |= (pEventCfg->Sensitivity << 12);
  6006. hrtim_eecr3 &= ~(HRTIM_EECR3_EE8F);
  6007. hrtim_eecr3 |= (pEventCfg->Filter << 12);
  6008. /* Update the HRTIM registers */
  6009. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6010. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6011. }
  6012. break;
  6013. case HRTIM_EVENT_9:
  6014. {
  6015. hrtim_eecr2 &= ~(HRTIM_EECR2_EE9SRC | HRTIM_EECR2_EE9POL | HRTIM_EECR2_EE9SNS);
  6016. hrtim_eecr2 |= (pEventCfg->Source << 18);
  6017. hrtim_eecr2 |= ((pEventCfg->Polarity << 18) & (HRTIM_EECR2_EE9POL));
  6018. hrtim_eecr2 |= (pEventCfg->Sensitivity << 18);
  6019. hrtim_eecr3 &= ~(HRTIM_EECR3_EE9F);
  6020. hrtim_eecr3 |= (pEventCfg->Filter << 18);
  6021. /* Update the HRTIM registers */
  6022. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6023. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6024. }
  6025. break;
  6026. case HRTIM_EVENT_10:
  6027. {
  6028. hrtim_eecr2 &= ~(HRTIM_EECR2_EE10SRC | HRTIM_EECR2_EE10POL | HRTIM_EECR2_EE10SNS);
  6029. hrtim_eecr2 |= (pEventCfg->Source << 24);
  6030. hrtim_eecr2 |= ((pEventCfg->Polarity << 24) & (HRTIM_EECR2_EE10POL));
  6031. hrtim_eecr2 |= (pEventCfg->Sensitivity << 24);
  6032. hrtim_eecr3 &= ~(HRTIM_EECR3_EE10F);
  6033. hrtim_eecr3 |= (pEventCfg->Filter << 24);
  6034. /* Update the HRTIM registers */
  6035. hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
  6036. hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
  6037. }
  6038. break;
  6039. default:
  6040. break;
  6041. }
  6042. }
  6043. /**
  6044. * @brief Configures the timer counter reset
  6045. * @param hhrtim: pointer to HAL HRTIM handle
  6046. * @param TimerIdx: Timer index
  6047. * @param Event: Event channel identifier
  6048. * @retval None
  6049. */
  6050. static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
  6051. uint32_t TimerIdx,
  6052. uint32_t Event)
  6053. {
  6054. switch (Event)
  6055. {
  6056. case HRTIM_EVENT_1:
  6057. {
  6058. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_1;
  6059. }
  6060. break;
  6061. case HRTIM_EVENT_2:
  6062. {
  6063. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_2;
  6064. }
  6065. break;
  6066. case HRTIM_EVENT_3:
  6067. {
  6068. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_3;
  6069. }
  6070. break;
  6071. case HRTIM_EVENT_4:
  6072. {
  6073. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_4;
  6074. }
  6075. break;
  6076. case HRTIM_EVENT_5:
  6077. {
  6078. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_5;
  6079. }
  6080. break;
  6081. case HRTIM_EVENT_6:
  6082. {
  6083. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_6;
  6084. }
  6085. break;
  6086. case HRTIM_EVENT_7:
  6087. {
  6088. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_7;
  6089. }
  6090. break;
  6091. case HRTIM_EVENT_8:
  6092. {
  6093. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_8;
  6094. }
  6095. break;
  6096. case HRTIM_EVENT_9:
  6097. {
  6098. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_9;
  6099. }
  6100. break;
  6101. case HRTIM_EVENT_10:
  6102. {
  6103. hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_10;
  6104. }
  6105. break;
  6106. }
  6107. }
  6108. /**
  6109. * @brief Returns the interrupt to enable or disable according to the
  6110. * OC mode.
  6111. * @param hhrtim: pointer to HAL HRTIM handle
  6112. * @param TimerIdx: Timer index
  6113. * @param OCChannel: Timer output
  6114. * This parameter can be one of the following values:
  6115. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  6116. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  6117. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  6118. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  6119. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  6120. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  6121. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  6122. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  6123. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  6124. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  6125. * @retval Interrupt to enable or disable
  6126. */
  6127. static uint32_t HRTIM_GetITFromOCMode(HRTIM_HandleTypeDef * hhrtim,
  6128. uint32_t TimerIdx,
  6129. uint32_t OCChannel)
  6130. {
  6131. uint32_t hrtim_set;
  6132. uint32_t hrtim_reset;
  6133. uint32_t interrupt = 0;
  6134. switch (OCChannel)
  6135. {
  6136. case HRTIM_OUTPUT_TA1:
  6137. case HRTIM_OUTPUT_TB1:
  6138. case HRTIM_OUTPUT_TC1:
  6139. case HRTIM_OUTPUT_TD1:
  6140. case HRTIM_OUTPUT_TE1:
  6141. {
  6142. /* Retreives actual OC mode and set interrupt accordingly */
  6143. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
  6144. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
  6145. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  6146. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
  6147. {
  6148. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  6149. interrupt = HRTIM_TIM_IT_CMP1;
  6150. }
  6151. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  6152. (hrtim_reset == 0))
  6153. {
  6154. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  6155. interrupt = HRTIM_TIM_IT_SET1;
  6156. }
  6157. else if ((hrtim_set == 0) &&
  6158. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
  6159. {
  6160. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  6161. interrupt = HRTIM_TIM_IT_RST1;
  6162. }
  6163. }
  6164. break;
  6165. case HRTIM_OUTPUT_TA2:
  6166. case HRTIM_OUTPUT_TB2:
  6167. case HRTIM_OUTPUT_TC2:
  6168. case HRTIM_OUTPUT_TD2:
  6169. case HRTIM_OUTPUT_TE2:
  6170. {
  6171. /* Retreives actual OC mode and set interrupt accordingly */
  6172. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
  6173. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
  6174. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  6175. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
  6176. {
  6177. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  6178. interrupt = HRTIM_TIM_IT_CMP2;
  6179. }
  6180. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  6181. (hrtim_reset == 0))
  6182. {
  6183. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  6184. interrupt = HRTIM_TIM_IT_SET2;
  6185. }
  6186. else if ((hrtim_set == 0) &&
  6187. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
  6188. {
  6189. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  6190. interrupt = HRTIM_TIM_IT_RST2;
  6191. }
  6192. }
  6193. break;
  6194. }
  6195. return interrupt;
  6196. }
  6197. /**
  6198. * @brief Returns the DMA request to enable or disable according to the
  6199. * OC mode.
  6200. * @param hhrtim: pointer to HAL HRTIM handle
  6201. * @param TimerIdx: Timer index
  6202. * @param OCChannel: Timer output
  6203. * This parameter can be one of the following values:
  6204. * @arg HRTIM_OUTPUT_TA1: Timer A - Output 1
  6205. * @arg HRTIM_OUTPUT_TA2: Timer A - Output 2
  6206. * @arg HRTIM_OUTPUT_TB1: Timer B - Output 1
  6207. * @arg HRTIM_OUTPUT_TB2: Timer B - Output 2
  6208. * @arg HRTIM_OUTPUT_TC1: Timer C - Output 1
  6209. * @arg HRTIM_OUTPUT_TC2: Timer C - Output 2
  6210. * @arg HRTIM_OUTPUT_TD1: Timer D - Output 1
  6211. * @arg HRTIM_OUTPUT_TD2: Timer D - Output 2
  6212. * @arg HRTIM_OUTPUT_TE1: Timer E - Output 1
  6213. * @arg HRTIM_OUTPUT_TE2: Timer E - Output 2
  6214. * @retval DMA request to enable or disable
  6215. */
  6216. static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim,
  6217. uint32_t TimerIdx,
  6218. uint32_t OCChannel)
  6219. {
  6220. uint32_t hrtim_set;
  6221. uint32_t hrtim_reset;
  6222. uint32_t dma_request = 0;
  6223. switch (OCChannel)
  6224. {
  6225. case HRTIM_OUTPUT_TA1:
  6226. case HRTIM_OUTPUT_TB1:
  6227. case HRTIM_OUTPUT_TC1:
  6228. case HRTIM_OUTPUT_TD1:
  6229. case HRTIM_OUTPUT_TE1:
  6230. {
  6231. /* Retreives actual OC mode and set dma_request accordingly */
  6232. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
  6233. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
  6234. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  6235. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
  6236. {
  6237. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  6238. dma_request = HRTIM_TIM_DMA_CMP1;
  6239. }
  6240. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
  6241. (hrtim_reset == 0))
  6242. {
  6243. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  6244. dma_request = HRTIM_TIM_DMA_SET1;
  6245. }
  6246. else if ((hrtim_set == 0) &&
  6247. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
  6248. {
  6249. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  6250. dma_request = HRTIM_TIM_DMA_RST1;
  6251. }
  6252. }
  6253. break;
  6254. case HRTIM_OUTPUT_TA2:
  6255. case HRTIM_OUTPUT_TB2:
  6256. case HRTIM_OUTPUT_TC2:
  6257. case HRTIM_OUTPUT_TD2:
  6258. case HRTIM_OUTPUT_TE2:
  6259. {
  6260. /* Retreives actual OC mode and set dma_request accordingly */
  6261. hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
  6262. hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
  6263. if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  6264. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
  6265. {
  6266. /* OC mode: HRTIM_BASICOCMODE_TOGGLE */
  6267. dma_request = HRTIM_TIM_DMA_CMP2;
  6268. }
  6269. else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
  6270. (hrtim_reset == 0))
  6271. {
  6272. /* OC mode: HRTIM_BASICOCMODE_ACTIVE */
  6273. dma_request = HRTIM_TIM_DMA_SET2;
  6274. }
  6275. else if ((hrtim_set == 0) &&
  6276. ((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
  6277. {
  6278. /* OC mode: HRTIM_BASICOCMODE_INACTIVE */
  6279. dma_request = HRTIM_TIM_DMA_RST2;
  6280. }
  6281. }
  6282. break;
  6283. }
  6284. return dma_request;
  6285. }
  6286. static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim,
  6287. uint32_t TimerIdx)
  6288. {
  6289. DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)NULL;
  6290. switch (TimerIdx)
  6291. {
  6292. case HRTIM_TIMERINDEX_MASTER:
  6293. {
  6294. hdma = hhrtim->hdmaMaster;
  6295. }
  6296. break;
  6297. case HRTIM_TIMERINDEX_TIMER_A:
  6298. {
  6299. hdma = hhrtim->hdmaTimerA;
  6300. }
  6301. break;
  6302. case HRTIM_TIMERINDEX_TIMER_B:
  6303. {
  6304. hdma = hhrtim->hdmaTimerB;
  6305. }
  6306. break;
  6307. case HRTIM_TIMERINDEX_TIMER_C:
  6308. {
  6309. hdma = hhrtim->hdmaTimerC;
  6310. }
  6311. break;
  6312. case HRTIM_TIMERINDEX_TIMER_D:
  6313. {
  6314. hdma = hhrtim->hdmaTimerD;
  6315. }
  6316. break;
  6317. case HRTIM_TIMERINDEX_TIMER_E:
  6318. {
  6319. hdma = hhrtim->hdmaTimerE;
  6320. }
  6321. break;
  6322. }
  6323. return hdma;
  6324. }
  6325. static uint32_t GetTimerIdxFromDMAHandle(DMA_HandleTypeDef *hdma)
  6326. {
  6327. uint32_t timed_idx = 0xFFFFFFFF;
  6328. if (hdma->Init.Request == DMA_REQUEST_HRTIM_MASTER)
  6329. {
  6330. timed_idx = HRTIM_TIMERINDEX_MASTER;
  6331. }
  6332. else if (hdma->Init.Request == DMA_REQUEST_HRTIM_TIMER_A)
  6333. {
  6334. timed_idx = HRTIM_TIMERINDEX_TIMER_A;
  6335. }
  6336. else if (hdma->Init.Request == DMA_REQUEST_HRTIM_TIMER_B)
  6337. {
  6338. timed_idx = HRTIM_TIMERINDEX_TIMER_B;
  6339. }
  6340. else if (hdma->Init.Request == DMA_REQUEST_HRTIM_TIMER_C)
  6341. {
  6342. timed_idx = HRTIM_TIMERINDEX_TIMER_C;
  6343. }
  6344. else if (hdma->Init.Request == DMA_REQUEST_HRTIM_TIMER_D)
  6345. {
  6346. timed_idx = HRTIM_TIMERINDEX_TIMER_D;
  6347. }
  6348. else if (hdma->Init.Request == DMA_REQUEST_HRTIM_TIMER_E)
  6349. {
  6350. timed_idx = HRTIM_TIMERINDEX_TIMER_E;
  6351. }
  6352. return timed_idx;
  6353. }
  6354. /**
  6355. * @brief Forces an immediate transfer from the preload to the active
  6356. * registers.
  6357. * @param hhrtim: pointer to HAL HRTIM handle
  6358. * @param TimerIdx: Timer index
  6359. * @retval None
  6360. */
  6361. static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
  6362. uint32_t TimerIdx)
  6363. {
  6364. switch (TimerIdx)
  6365. {
  6366. case HRTIM_TIMERINDEX_MASTER:
  6367. {
  6368. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_MSWU;
  6369. }
  6370. break;
  6371. case HRTIM_TIMERINDEX_TIMER_A:
  6372. {
  6373. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TASWU;
  6374. }
  6375. break;
  6376. case HRTIM_TIMERINDEX_TIMER_B:
  6377. {
  6378. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TBSWU;
  6379. }
  6380. break;
  6381. case HRTIM_TIMERINDEX_TIMER_C:
  6382. {
  6383. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TCSWU;
  6384. }
  6385. break;
  6386. case HRTIM_TIMERINDEX_TIMER_D:
  6387. {
  6388. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TDSWU;
  6389. }
  6390. break;
  6391. case HRTIM_TIMERINDEX_TIMER_E:
  6392. {
  6393. hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TESWU;
  6394. }
  6395. break;
  6396. }
  6397. }
  6398. /**
  6399. * @brief HRTIM interrupts service routine
  6400. * @param hhrtim: pointer to HAL HRTIM handle
  6401. * @retval None
  6402. */
  6403. static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim)
  6404. {
  6405. /* Fault 1 event */
  6406. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT1) != RESET)
  6407. {
  6408. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT1) != RESET)
  6409. {
  6410. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT1);
  6411. /* Invoke Fault 1 event callback */
  6412. HAL_HRTIM_Fault1Callback(hhrtim);
  6413. }
  6414. }
  6415. /* Fault 2 event */
  6416. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT2) != RESET)
  6417. {
  6418. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT2) != RESET)
  6419. {
  6420. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT2);
  6421. /* Invoke Fault 2 event callback */
  6422. HAL_HRTIM_Fault2Callback(hhrtim);
  6423. }
  6424. }
  6425. /* Fault 3 event */
  6426. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT3) != RESET)
  6427. {
  6428. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT3) != RESET)
  6429. {
  6430. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT3);
  6431. /* Invoke Fault 3 event callback */
  6432. HAL_HRTIM_Fault3Callback(hhrtim);
  6433. }
  6434. }
  6435. /* Fault 4 event */
  6436. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT4) != RESET)
  6437. {
  6438. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT4) != RESET)
  6439. {
  6440. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT4);
  6441. /* Invoke Fault 4 event callback */
  6442. HAL_HRTIM_Fault4Callback(hhrtim);
  6443. }
  6444. }
  6445. /* Fault 5 event */
  6446. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT5) != RESET)
  6447. {
  6448. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT5) != RESET)
  6449. {
  6450. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT5);
  6451. /* Invoke Fault 5 event callback */
  6452. HAL_HRTIM_Fault5Callback(hhrtim);
  6453. }
  6454. }
  6455. /* System fault event */
  6456. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_SYSFLT) != RESET)
  6457. {
  6458. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_SYSFLT) != RESET)
  6459. {
  6460. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_SYSFLT);
  6461. /* Invoke System fault event callback */
  6462. HAL_HRTIM_SystemFaultCallback(hhrtim);
  6463. }
  6464. }
  6465. }
  6466. /**
  6467. * @brief Master timer interrupts service routine
  6468. * @param hhrtim: pointer to HAL HRTIM handle
  6469. * @retval None
  6470. */
  6471. static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim)
  6472. {
  6473. /* Burst mode period event */
  6474. if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_BMPER) != RESET)
  6475. {
  6476. if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_BMPER) != RESET)
  6477. {
  6478. __HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_BMPER);
  6479. /* Invoke Burst mode period event callback */
  6480. HAL_HRTIM_BurstModePeriodCallback(hhrtim);
  6481. }
  6482. }
  6483. /* Master timer compare 1 event */
  6484. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP1) != RESET)
  6485. {
  6486. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP1) != RESET)
  6487. {
  6488. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP1);
  6489. /* Invoke compare 1 event callback */
  6490. HAL_HRTIM_Compare1EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6491. }
  6492. }
  6493. /* Master timer compare 2 event */
  6494. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP2) != RESET)
  6495. {
  6496. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP2) != RESET)
  6497. {
  6498. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP2);
  6499. /* Invoke compare 2 event callback */
  6500. HAL_HRTIM_Compare2EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6501. }
  6502. }
  6503. /* Master timer compare 3 event */
  6504. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP3) != RESET)
  6505. {
  6506. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP3) != RESET)
  6507. {
  6508. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP3);
  6509. /* Invoke compare 3 event callback */
  6510. HAL_HRTIM_Compare3EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6511. }
  6512. }
  6513. /* Master timer compare 4 event */
  6514. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP4) != RESET)
  6515. {
  6516. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP4) != RESET)
  6517. {
  6518. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP4);
  6519. /* Invoke compare 4 event callback */
  6520. HAL_HRTIM_Compare4EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6521. }
  6522. }
  6523. /* Master timer repetition event */
  6524. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MREP) != RESET)
  6525. {
  6526. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MREP) != RESET)
  6527. {
  6528. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MREP);
  6529. /* Invoke repetition event callback */
  6530. HAL_HRTIM_RepetitionEventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6531. }
  6532. }
  6533. /* Synchronization input event */
  6534. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_SYNC) != RESET)
  6535. {
  6536. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_SYNC) != RESET)
  6537. {
  6538. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_SYNC);
  6539. /* Invoke synchronization event callback */
  6540. HAL_HRTIM_SynchronizationEventCallback(hhrtim);
  6541. }
  6542. }
  6543. /* Master timer registers update event */
  6544. if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MUPD) != RESET)
  6545. {
  6546. if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MUPD) != RESET)
  6547. {
  6548. __HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MUPD);
  6549. /* Invoke registers update event callback */
  6550. HAL_HRTIM_RegistersUpdateCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
  6551. }
  6552. }
  6553. }
  6554. /**
  6555. * @brief Timer interrupts service routine
  6556. * @param hhrtim: pointer to HAL HRTIM handle
  6557. * @param TimerIdx: Timer index
  6558. * This parameter can be one of the following values:
  6559. * @arg HRTIM_TIMERINDEX_TIMER_A for timer A
  6560. * @arg HRTIM_TIMERINDEX_TIMER_B for timer B
  6561. * @arg HRTIM_TIMERINDEX_TIMER_C for timer C
  6562. * @arg HRTIM_TIMERINDEX_TIMER_D for timer D
  6563. * @arg HRTIM_TIMERINDEX_TIMER_E for timer E
  6564. * @retval None
  6565. */
  6566. static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
  6567. uint32_t TimerIdx)
  6568. {
  6569. /* Timer compare 1 event */
  6570. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP1) != RESET)
  6571. {
  6572. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1) != RESET)
  6573. {
  6574. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
  6575. /* Invoke compare 1 event callback */
  6576. HAL_HRTIM_Compare1EventCallback(hhrtim, TimerIdx);
  6577. }
  6578. }
  6579. /* Timer compare 2 event */
  6580. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP2) != RESET)
  6581. {
  6582. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2) != RESET)
  6583. {
  6584. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
  6585. /* Invoke compare 2 event callback */
  6586. HAL_HRTIM_Compare2EventCallback(hhrtim, TimerIdx);
  6587. }
  6588. }
  6589. /* Timer compare 3 event */
  6590. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP3) != RESET)
  6591. {
  6592. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3) != RESET)
  6593. {
  6594. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3);
  6595. /* Invoke compare 3 event callback */
  6596. HAL_HRTIM_Compare3EventCallback(hhrtim, TimerIdx);
  6597. }
  6598. }
  6599. /* Timer compare 4 event */
  6600. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP4) != RESET)
  6601. {
  6602. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4) != RESET)
  6603. {
  6604. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4);
  6605. /* Invoke compare 4 event callback */
  6606. HAL_HRTIM_Compare4EventCallback(hhrtim, TimerIdx);
  6607. }
  6608. }
  6609. /* Timer repetition event */
  6610. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_REP) != RESET)
  6611. {
  6612. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_REP) != RESET)
  6613. {
  6614. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
  6615. /* Invoke repetition event callback */
  6616. HAL_HRTIM_RepetitionEventCallback(hhrtim, TimerIdx);
  6617. }
  6618. }
  6619. /* Timer registers update event */
  6620. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_UPD) != RESET)
  6621. {
  6622. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD) != RESET)
  6623. {
  6624. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD);
  6625. /* Invoke registers update event callback */
  6626. HAL_HRTIM_RegistersUpdateCallback(hhrtim, TimerIdx);
  6627. }
  6628. }
  6629. /* Timer capture 1 event */
  6630. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CPT1) != RESET)
  6631. {
  6632. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1) != RESET)
  6633. {
  6634. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
  6635. /* Invoke capture 1 event callback */
  6636. HAL_HRTIM_Capture1EventCallback(hhrtim, TimerIdx);
  6637. }
  6638. }
  6639. /* Timer capture 2 event */
  6640. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CPT2) != RESET)
  6641. {
  6642. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2) != RESET)
  6643. {
  6644. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
  6645. /* Invoke capture 2 event callback */
  6646. HAL_HRTIM_Capture2EventCallback(hhrtim, TimerIdx);
  6647. }
  6648. }
  6649. /* Timer ouput 1 set event */
  6650. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_SET1) != RESET)
  6651. {
  6652. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1) != RESET)
  6653. {
  6654. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1);
  6655. /* Invoke ouput 1 set event callback */
  6656. HAL_HRTIM_Output1SetCallback(hhrtim, TimerIdx);
  6657. }
  6658. }
  6659. /* Timer ouput 1 reset event */
  6660. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST1) != RESET)
  6661. {
  6662. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1) != RESET)
  6663. {
  6664. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1);
  6665. /* Invoke ouput 1 reset event callback */
  6666. HAL_HRTIM_Output1ResetCallback(hhrtim, TimerIdx);
  6667. }
  6668. }
  6669. /* Timer ouput 2 set event */
  6670. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_SET2) != RESET)
  6671. {
  6672. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2) != RESET)
  6673. {
  6674. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2);
  6675. /* Invoke ouput 2 set event callback */
  6676. HAL_HRTIM_Output2SetCallback(hhrtim, TimerIdx);
  6677. }
  6678. }
  6679. /* Timer ouput 2 reset event */
  6680. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST2) != RESET)
  6681. {
  6682. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2) != RESET)
  6683. {
  6684. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2);
  6685. /* Invoke ouput 2 reset event callback */
  6686. HAL_HRTIM_Output2ResetCallback(hhrtim, TimerIdx);
  6687. }
  6688. }
  6689. /* Timer reset event */
  6690. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST) != RESET)
  6691. {
  6692. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST) != RESET)
  6693. {
  6694. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST);
  6695. /* Invoke timer reset callback */
  6696. HAL_HRTIM_CounterResetCallback(hhrtim, TimerIdx);
  6697. }
  6698. }
  6699. /* Delayed protection event */
  6700. if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_DLYPRT) != RESET)
  6701. {
  6702. if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT) != RESET)
  6703. {
  6704. __HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT);
  6705. /* Invoke delayed protection callback */
  6706. HAL_HRTIM_DelayedProtectionCallback(hhrtim, TimerIdx);
  6707. }
  6708. }
  6709. }
  6710. /**
  6711. * @brief DMA callback invoked upon master timer related DMA request completion
  6712. * @param hdma: pointer to DMA handle.
  6713. * @retval None
  6714. */
  6715. static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma)
  6716. {
  6717. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  6718. if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP1) != RESET)
  6719. {
  6720. HAL_HRTIM_Compare1EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  6721. }
  6722. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP2) != RESET)
  6723. {
  6724. HAL_HRTIM_Compare2EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  6725. }
  6726. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP3) != RESET)
  6727. {
  6728. HAL_HRTIM_Compare3EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  6729. }
  6730. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP4) != RESET)
  6731. {
  6732. HAL_HRTIM_Compare4EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  6733. }
  6734. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MREP) != RESET)
  6735. {
  6736. HAL_HRTIM_RepetitionEventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  6737. }
  6738. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_SYNC) != RESET)
  6739. {
  6740. HAL_HRTIM_SynchronizationEventCallback(hrtim);
  6741. }
  6742. else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MUPD) != RESET)
  6743. {
  6744. HAL_HRTIM_RegistersUpdateCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
  6745. }
  6746. }
  6747. /**
  6748. * @brief DMA callback invoked upon timer A..E related DMA request completion
  6749. * @param hdma: pointer to DMA handle.
  6750. * @retval None
  6751. */
  6752. static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma)
  6753. {
  6754. uint8_t timer_idx;
  6755. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  6756. timer_idx = GetTimerIdxFromDMAHandle(hdma);
  6757. if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP1) != RESET)
  6758. {
  6759. HAL_HRTIM_Compare1EventCallback(hrtim, timer_idx);
  6760. }
  6761. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP2) != RESET)
  6762. {
  6763. HAL_HRTIM_Compare2EventCallback(hrtim, timer_idx);
  6764. }
  6765. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP3) != RESET)
  6766. {
  6767. HAL_HRTIM_Compare3EventCallback(hrtim, timer_idx);
  6768. }
  6769. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP4) != RESET)
  6770. {
  6771. HAL_HRTIM_Compare4EventCallback(hrtim, timer_idx);
  6772. }
  6773. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_REP) != RESET)
  6774. {
  6775. HAL_HRTIM_RepetitionEventCallback(hrtim, timer_idx);
  6776. }
  6777. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_UPD) != RESET)
  6778. {
  6779. HAL_HRTIM_RegistersUpdateCallback(hrtim, timer_idx);
  6780. }
  6781. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT1) != RESET)
  6782. {
  6783. HAL_HRTIM_Capture1EventCallback(hrtim, timer_idx);
  6784. }
  6785. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT2) != RESET)
  6786. {
  6787. HAL_HRTIM_Capture2EventCallback(hrtim, timer_idx);
  6788. }
  6789. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET1) != RESET)
  6790. {
  6791. HAL_HRTIM_Output1SetCallback(hrtim, timer_idx);
  6792. }
  6793. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST1) != RESET)
  6794. {
  6795. HAL_HRTIM_Output1ResetCallback(hrtim, timer_idx);
  6796. }
  6797. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET2) != RESET)
  6798. {
  6799. HAL_HRTIM_Output2SetCallback(hrtim, timer_idx);
  6800. }
  6801. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST2) != RESET)
  6802. {
  6803. HAL_HRTIM_Output2ResetCallback(hrtim, timer_idx);
  6804. }
  6805. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST) != RESET)
  6806. {
  6807. HAL_HRTIM_CounterResetCallback(hrtim, timer_idx);
  6808. }
  6809. else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_DLYPRT) != RESET)
  6810. {
  6811. HAL_HRTIM_DelayedProtectionCallback(hrtim, timer_idx);
  6812. }
  6813. }
  6814. /**
  6815. * @brief DMA error callback
  6816. * @param hdma: pointer to DMA handle.
  6817. * @retval None
  6818. */
  6819. static void HRTIM_DMAError(DMA_HandleTypeDef *hdma)
  6820. {
  6821. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  6822. HAL_HRTIM_ErrorCallback(hrtim);
  6823. }
  6824. /**
  6825. * @brief DMA callback invoked upon burst DMA transfer completion
  6826. * @param hdma: pointer to DMA handle.
  6827. * @retval None
  6828. */
  6829. static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma)
  6830. {
  6831. HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef *)((DMA_HandleTypeDef* )hdma)->Parent;
  6832. HAL_HRTIM_BurstDMATransferCallback(hrtim, GetTimerIdxFromDMAHandle(hdma));
  6833. }
  6834. /**
  6835. * @}
  6836. */
  6837. /**
  6838. * @}
  6839. */
  6840. #endif /* HAL_HRTIM_MODULE_ENABLED */
  6841. /**
  6842. * @}
  6843. */
  6844. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/