stm32h7xx_hal_swpmi.c 44 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_swpmi.c
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 21-April-2017
  7. * @brief SWPMI HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the Single Wire Protocol Master Interface (SWPMI).
  10. * + Initialization and Configuration
  11. * + Data transfers functions
  12. * + DMA transfers management
  13. * + Interrupts and flags management
  14. @verbatim
  15. ===============================================================================
  16. ##### How to use this driver #####
  17. ===============================================================================
  18. [..]
  19. The SWPMI HAL driver can be used as follows:
  20. (#) Declare a SWPMI_HandleTypeDef handle structure (eg. SWPMI_HandleTypeDef hswpmi).
  21. (#) Initialize the SWPMI low level resources by implementing the HAL_SWPMI_MspInit() API:
  22. (##) Enable the SWPMIx interface clock with __HAL_RCC_SWPMIx_CLK_ENABLE().
  23. (##) SWPMI IO configuration:
  24. (+++) Enable the clock for the SWPMI GPIO.
  25. (+++) Configure these SWPMI pins as alternate function pull-up.
  26. (##) NVIC configuration if you need to use interrupt process (HAL_SWPMI_Transmit_IT()
  27. and HAL_SWPMI_Receive_IT() APIs):
  28. (+++) Configure the SWPMIx interrupt priority with HAL_NVIC_SetPriority().
  29. (+++) Enable the NVIC SWPMI IRQ handle with HAL_NVIC_EnableIRQ().
  30. (##) DMA Configuration if you need to use DMA process (HAL_SWPMI_Transmit_DMA()
  31. and HAL_SWPMI_Receive_DMA() APIs):
  32. (+++) Declare a DMA handle structure for the Tx/Rx channels.
  33. (+++) Enable the DMAx interface clock.
  34. (+++) Configure the declared DMA handle structure with the required
  35. Tx/Rx parameters.
  36. (+++) Configure the DMA Tx/Rx channels and requests.
  37. (+++) Associate the initialized DMA handle to the SWPMI DMA Tx/Rx handle.
  38. (+++) Configure the priority and enable the NVIC for the transfer complete
  39. interrupt on the DMA Tx/Rx channels.
  40. (#) Program the Bite Rate, Tx Buffering mode, Rx Buffering mode in the Init structure.
  41. (#) Enable the SWPMI peripheral by calling the HAL_SWPMI_Init() function.
  42. @endverbatim
  43. ******************************************************************************
  44. * @attention
  45. *
  46. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  47. *
  48. * Redistribution and use in source and binary forms, with or without modification,
  49. * are permitted provided that the following conditions are met:
  50. * 1. Redistributions of source code must retain the above copyright notice,
  51. * this list of conditions and the following disclaimer.
  52. * 2. Redistributions in binary form must reproduce the above copyright notice,
  53. * this list of conditions and the following disclaimer in the documentation
  54. * and/or other materials provided with the distribution.
  55. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  56. * may be used to endorse or promote products derived from this software
  57. * without specific prior written permission.
  58. *
  59. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  60. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  61. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  62. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  63. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  64. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  65. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  66. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  67. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  68. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  69. *
  70. ******************************************************************************
  71. */
  72. /* Includes ------------------------------------------------------------------*/
  73. #include "stm32h7xx_hal.h"
  74. /** @addtogroup STM32H7xx_HAL_Driver
  75. * @{
  76. */
  77. /** @defgroup SWPMI SWPMI
  78. * @brief HAL SWPMI module driver
  79. * @{
  80. */
  81. #ifdef HAL_SWPMI_MODULE_ENABLED
  82. /* Private typedef -----------------------------------------------------------*/
  83. /* Private define ------------------------------------------------------------*/
  84. /* Private constants ---------------------------------------------------------*/
  85. /** @addtogroup SWPMI_Private_Constants SWPMI Private Constants
  86. * @{
  87. */
  88. #define SWPMI_TIMEOUT_VALUE ((uint32_t) 22000U)
  89. /**
  90. * @}
  91. */
  92. /* Private macros ------------------------------------------------------------*/
  93. /* Private variables ---------------------------------------------------------*/
  94. /* Private function prototypes -----------------------------------------------*/
  95. static void SWPMI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
  96. static void SWPMI_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
  97. static void SWPMI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
  98. static void SWPMI_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
  99. static void SWPMI_DMAError(DMA_HandleTypeDef *hdma);
  100. static void SWPMI_DMAAbortOnError(DMA_HandleTypeDef *hdma);
  101. static HAL_StatusTypeDef SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi);
  102. static HAL_StatusTypeDef SWPMI_EndTransmit_IT(SWPMI_HandleTypeDef *hswpmi);
  103. static HAL_StatusTypeDef SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi);
  104. static HAL_StatusTypeDef SWPMI_EndReceive_IT(SWPMI_HandleTypeDef *hswpmi);
  105. static HAL_StatusTypeDef SWPMI_EndTransmitReceive_IT(SWPMI_HandleTypeDef *hswpmi);
  106. static HAL_StatusTypeDef SWPMI_WaitOnFlagSetUntilTimeout(SWPMI_HandleTypeDef *hswpmi, uint32_t Flag, uint32_t Tickstart, uint32_t Timeout);
  107. /* Exported functions --------------------------------------------------------*/
  108. /** @defgroup SWPMI_Exported_Functions SWPMI Exported Functions
  109. * @{
  110. */
  111. /** @defgroup SWPMI_Exported_Group1 Initialization/de-initialization methods
  112. * @brief Initialization and Configuration functions
  113. *
  114. @verbatim
  115. ===============================================================================
  116. ##### Initialization and Configuration functions #####
  117. ===============================================================================
  118. [..] This section provides functions allowing to:
  119. (+) Initialize and configure the SWPMI peripheral.
  120. (+) De-initialize the SWPMI peripheral.
  121. @endverbatim
  122. * @{
  123. */
  124. /**
  125. * @brief Initialize the SWPMI peripheral according to the specified parameters in the SWPMI_InitTypeDef.
  126. * @param hswpmi: SWPMI handle
  127. * @retval HAL status
  128. */
  129. HAL_StatusTypeDef HAL_SWPMI_Init(SWPMI_HandleTypeDef *hswpmi)
  130. {
  131. uint32_t tickstart = HAL_GetTick();
  132. HAL_StatusTypeDef status = HAL_OK;
  133. /* Check the SWPMI handle allocation */
  134. if(hswpmi == NULL)
  135. {
  136. status = HAL_ERROR;
  137. }
  138. else
  139. {
  140. /* Check the parameters */
  141. assert_param(IS_SWPMI_VOLTAGE_CLASS(hswpmi->Init.VoltageClass));
  142. assert_param(IS_SWPMI_BITRATE_VALUE(hswpmi->Init.BitRate));
  143. assert_param(IS_SWPMI_TX_BUFFERING_MODE(hswpmi->Init.TxBufferingMode));
  144. assert_param(IS_SWPMI_RX_BUFFERING_MODE(hswpmi->Init.RxBufferingMode));
  145. if(hswpmi->State == HAL_SWPMI_STATE_RESET)
  146. {
  147. /* Allocate lock resource and initialize it */
  148. hswpmi->Lock = HAL_UNLOCKED;
  149. /* Init the low level hardware : GPIO, CLOCK, CORTEX */
  150. HAL_SWPMI_MspInit(hswpmi);
  151. }
  152. hswpmi->State = HAL_SWPMI_STATE_BUSY;
  153. /* Disable SWPMI interface */
  154. CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  155. /* Apply Voltage class selection */
  156. MODIFY_REG(hswpmi->Instance->OR, SWPMI_OR_CLASS, hswpmi->Init.VoltageClass);
  157. /* Configure the BRR register (Bitrate) */
  158. WRITE_REG(hswpmi->Instance->BRR, hswpmi->Init.BitRate);
  159. /* Apply SWPMI CR configuration */
  160. MODIFY_REG(hswpmi->Instance->CR, \
  161. SWPMI_CR_RXDMA | SWPMI_CR_TXDMA | SWPMI_CR_RXMODE | SWPMI_CR_TXMODE, \
  162. hswpmi->Init.TxBufferingMode | hswpmi->Init.RxBufferingMode);
  163. hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
  164. hswpmi->State = HAL_SWPMI_STATE_READY;
  165. /*Enable the SWPMI transceiver.*/
  166. __HAL_SWPMI_TRANSCEIVER_ENABLE(hswpmi);
  167. /* Wait on TXBEF flag to be able to start a second transfer */
  168. if(SWPMI_WaitOnFlagSetUntilTimeout(hswpmi, SWPMI_FLAG_RDYF, tickstart, SWPMI_TIMEOUT_VALUE) != HAL_OK)
  169. {
  170. status = HAL_TIMEOUT;
  171. }
  172. /* Enable SWPMI peripheral if not */
  173. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  174. }
  175. return status;
  176. }
  177. /**
  178. * @brief De-initialize the SWPMI peripheral.
  179. * @param hswpmi: SWPMI handle
  180. * @retval HAL status
  181. */
  182. HAL_StatusTypeDef HAL_SWPMI_DeInit(SWPMI_HandleTypeDef *hswpmi)
  183. {
  184. HAL_StatusTypeDef status = HAL_OK;
  185. /* Check the SWPMI handle allocation */
  186. if(hswpmi == NULL)
  187. {
  188. status = HAL_ERROR;
  189. }
  190. else
  191. {
  192. /* Check the parameters */
  193. assert_param(IS_SWPMI_INSTANCE(hswpmi->Instance));
  194. hswpmi->State = HAL_SWPMI_STATE_BUSY;
  195. /* Disable SWPMI interface */
  196. CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  197. /* Disable SWPMI transceiver */
  198. __HAL_SWPMI_TRANSCEIVER_DISABLE(hswpmi);
  199. /* DeInit the low level hardware */
  200. HAL_SWPMI_MspDeInit(hswpmi);
  201. hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
  202. hswpmi->State = HAL_SWPMI_STATE_RESET;
  203. /* Release Lock */
  204. __HAL_UNLOCK(hswpmi);
  205. }
  206. return status;
  207. }
  208. /**
  209. * @brief Initialize the SWPMI MSP.
  210. * @param hswpmi: SWPMI handle
  211. * @retval None
  212. */
  213. __weak void HAL_SWPMI_MspInit(SWPMI_HandleTypeDef *hswpmi)
  214. {
  215. /* Prevent unused argument(s) compilation warning */
  216. UNUSED(hswpmi);
  217. /* NOTE : This function should not be modified, when the callback is needed,
  218. the HAL_SWPMI_MspInit can be implemented in the user file
  219. */
  220. }
  221. /**
  222. * @brief DeInitialize the SWPMI MSP.
  223. * @param hswpmi: SWPMI handle
  224. * @retval None
  225. */
  226. __weak void HAL_SWPMI_MspDeInit(SWPMI_HandleTypeDef *hswpmi)
  227. {
  228. /* Prevent unused argument(s) compilation warning */
  229. UNUSED(hswpmi);
  230. /* NOTE : This function should not be modified, when the callback is needed,
  231. the HAL_SWPMI_MspDeInit can be implemented in the user file
  232. */
  233. }
  234. /**
  235. * @}
  236. */
  237. /** @defgroup SWPMI_Exported_Group2 IO operation methods
  238. * @brief SWPMI Transmit/Receive functions
  239. *
  240. @verbatim
  241. ===============================================================================
  242. ##### IO operation methods #####
  243. ===============================================================================
  244. [..]
  245. This subsection provides a set of functions allowing to manage the SWPMI
  246. data transfers.
  247. (#) There are two modes of transfer:
  248. (++) Blocking mode: The communication is performed in polling mode.
  249. The HAL status of all data processing is returned by the same function
  250. after finishing transfer.
  251. (++) Non-Blocking mode: The communication is performed using Interrupts
  252. or DMA. The end of the data processing will be indicated through the
  253. dedicated SWPMI Interrupt handler (HAL_SWPMI_IRQHandler()) when using Interrupt mode or
  254. the selected DMA channel interrupt handler when using DMA mode.
  255. The HAL_SWPMI_TxCpltCallback(), HAL_SWPMI_RxCpltCallback() user callbacks
  256. will be executed respectively at the end of the transmit or receive process.
  257. The HAL_SWPMI_ErrorCallback() user callback will be executed when a communication error is detected.
  258. (#) Blocking mode API's are:
  259. (++) HAL_SWPMI_Transmit()
  260. (++) HAL_SWPMI_Receive()
  261. (#) Non-Blocking mode API's with Interrupt are:
  262. (++) HAL_SWPMI_Transmit_IT()
  263. (++) HAL_SWPMI_Receive_IT()
  264. (++) HAL_SWPMI_IRQHandler()
  265. (#) Non-Blocking mode API's with DMA are:
  266. (++) HAL_SWPMI_Transmit_DMA()
  267. (++) HAL_SWPMI_Receive_DMA()
  268. (++) HAL_SWPMI_DMAPause()
  269. (++) HAL_SWPMI_DMAResume()
  270. (++) HAL_SWPMI_DMAStop()
  271. (#) A set of Transfer Complete Callbacks are provided in Non-Blocking mode:
  272. (++) HAL_SWPMI_TxHalfCpltCallback()
  273. (++) HAL_SWPMI_TxCpltCallback()
  274. (++) HAL_SWPMI_RxHalfCpltCallback()
  275. (++) HAL_SWPMI_RxCpltCallback()
  276. (++) HAL_SWPMI_ErrorCallback()
  277. (#) The capability to launch the above IO operations in loopback mode for
  278. user application verification:
  279. (++) HAL_SWPMI_EnableLoopback()
  280. (++) HAL_SWPMI_DisableLoopback()
  281. @endverbatim
  282. * @{
  283. */
  284. /**
  285. * @brief Transmit an amount of data in blocking mode.
  286. * @param hswpmi: pointer to a SWPMI_HandleTypeDef structure that contains
  287. * the configuration information for SWPMI module.
  288. * @param pData: Pointer to data buffer
  289. * @param Size: Amount of data to be sent
  290. * @param Timeout: Timeout duration
  291. * @retval HAL status
  292. */
  293. HAL_StatusTypeDef HAL_SWPMI_Transmit(SWPMI_HandleTypeDef *hswpmi, uint32_t* pData, uint16_t Size, uint32_t Timeout)
  294. {
  295. uint32_t tickstart = HAL_GetTick();
  296. HAL_StatusTypeDef status = HAL_OK;
  297. if((pData == NULL ) || (Size == 0))
  298. {
  299. status = HAL_ERROR;
  300. }
  301. else
  302. {
  303. /* Process Locked */
  304. __HAL_LOCK(hswpmi);
  305. if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_RX))
  306. {
  307. /* Check if a non-blocking receive process is ongoing or not */
  308. if(hswpmi->State == HAL_SWPMI_STATE_READY)
  309. {
  310. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
  311. /* Disable any transmitter interrupts */
  312. __HAL_SWPMI_DISABLE_IT(hswpmi, SWPMI_IT_TCIE | SWPMI_IT_TIE | SWPMI_IT_TXUNRIE | SWPMI_IT_TXBEIE);
  313. /* Disable any transmitter flags */
  314. __HAL_SWPMI_CLEAR_FLAG(hswpmi, SWPMI_FLAG_TXBEF | SWPMI_FLAG_TXUNRF | SWPMI_FLAG_TCF);
  315. /* Enable SWPMI peripheral if not */
  316. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  317. }
  318. else
  319. {
  320. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
  321. }
  322. do
  323. {
  324. /* Wait the TXE to write data */
  325. if(HAL_IS_BIT_SET(hswpmi->Instance->ISR, SWPMI_FLAG_TXE))
  326. {
  327. hswpmi->Instance->TDR = (*pData++);
  328. Size--;
  329. }
  330. else
  331. {
  332. /* Check for the Timeout */
  333. if(Timeout != HAL_MAX_DELAY)
  334. {
  335. if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
  336. {
  337. status = HAL_TIMEOUT;
  338. break;
  339. }
  340. }
  341. }
  342. } while(Size != 0);
  343. /* Wait on TXBEF flag to be able to start a second transfer */
  344. if(SWPMI_WaitOnFlagSetUntilTimeout(hswpmi, SWPMI_FLAG_TXBEF, tickstart, Timeout) != HAL_OK)
  345. {
  346. status = HAL_TIMEOUT;
  347. }
  348. if(status == HAL_OK)
  349. {
  350. /* Check if a non-blocking receive Process is ongoing or not */
  351. if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
  352. {
  353. hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
  354. }
  355. else
  356. {
  357. hswpmi->State = HAL_SWPMI_STATE_READY;
  358. }
  359. }
  360. }
  361. else
  362. {
  363. status = HAL_BUSY;
  364. }
  365. }
  366. if((status != HAL_OK) && (status != HAL_BUSY))
  367. {
  368. hswpmi->State = HAL_SWPMI_STATE_READY;
  369. }
  370. /* Process Unlocked */
  371. __HAL_UNLOCK(hswpmi);
  372. return status;
  373. }
  374. /**
  375. * @brief Receive an amount of data in blocking mode.
  376. * @param hswpmi: pointer to a SWPMI_HandleTypeDef structure that contains
  377. * the configuration information for SWPMI module.
  378. * @param pData: Pointer to data buffer
  379. * @param Size: Amount of data to be received
  380. * @param Timeout: Timeout duration
  381. * @retval HAL status
  382. */
  383. HAL_StatusTypeDef HAL_SWPMI_Receive(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout)
  384. {
  385. uint32_t tickstart = HAL_GetTick();
  386. HAL_StatusTypeDef status = HAL_OK;
  387. if((pData == NULL ) || (Size == 0))
  388. {
  389. status = HAL_ERROR;
  390. }
  391. else
  392. {
  393. /* Process Locked */
  394. __HAL_LOCK(hswpmi);
  395. if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX))
  396. {
  397. /* Check if a non-blocking transmit process is ongoing or not */
  398. if(hswpmi->State == HAL_SWPMI_STATE_READY)
  399. {
  400. hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
  401. /* Disable any receiver interrupts */
  402. CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_SRIE | SWPMI_IT_RIE | SWPMI_IT_RXBERIE | SWPMI_IT_RXOVRIE | SWPMI_IT_RXBFIE);
  403. /* Enable SWPMI peripheral if not */
  404. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  405. }
  406. else
  407. {
  408. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
  409. }
  410. do
  411. {
  412. /* Wait the RXNE to read data */
  413. if(HAL_IS_BIT_SET(hswpmi->Instance->ISR, SWPMI_FLAG_RXNE))
  414. {
  415. (*pData++) = hswpmi->Instance->RDR;
  416. Size--;
  417. }
  418. else
  419. {
  420. /* Check for the Timeout */
  421. if(Timeout != HAL_MAX_DELAY)
  422. {
  423. if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
  424. {
  425. status = HAL_TIMEOUT;
  426. break;
  427. }
  428. }
  429. }
  430. } while(Size != 0);
  431. if(status == HAL_OK)
  432. {
  433. if(HAL_IS_BIT_SET(hswpmi->Instance->ISR, SWPMI_FLAG_RXBFF))
  434. {
  435. /* Clear RXBFF at end of reception */
  436. WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_RXBFF);
  437. }
  438. /* Check if a non-blocking transmit Process is ongoing or not */
  439. if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
  440. {
  441. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
  442. }
  443. else
  444. {
  445. hswpmi->State = HAL_SWPMI_STATE_READY;
  446. }
  447. }
  448. }
  449. else
  450. {
  451. status = HAL_BUSY;
  452. }
  453. }
  454. if((status != HAL_OK) && (status != HAL_BUSY))
  455. {
  456. hswpmi->State = HAL_SWPMI_STATE_READY;
  457. }
  458. /* Process Unlocked */
  459. __HAL_UNLOCK(hswpmi);
  460. return status;
  461. }
  462. /**
  463. * @brief Transmit an amount of data in non-blocking mode with interrupt.
  464. * @param hswpmi: pointer to a SWPMI_HandleTypeDef structure that contains
  465. * the configuration information for SWPMI module.
  466. * @param pData: Pointer to data buffer
  467. * @param Size: Amount of data to be sent
  468. * @retval HAL status
  469. */
  470. HAL_StatusTypeDef HAL_SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size)
  471. {
  472. HAL_StatusTypeDef status = HAL_OK;
  473. if((pData == NULL ) || (Size == 0))
  474. {
  475. status = HAL_ERROR;
  476. }
  477. else
  478. {
  479. /* Process Locked */
  480. __HAL_LOCK(hswpmi);
  481. if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_RX))
  482. {
  483. /* Update handle */
  484. hswpmi->pTxBuffPtr = pData;
  485. hswpmi->TxXferSize = Size;
  486. hswpmi->TxXferCount = Size;
  487. hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
  488. /* Check if a receive process is ongoing or not */
  489. if(hswpmi->State == HAL_SWPMI_STATE_READY)
  490. {
  491. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
  492. /* Enable SWPMI peripheral if not */
  493. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  494. }
  495. else
  496. {
  497. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
  498. }
  499. /* Enable the SWPMI transmit underrun error */
  500. __HAL_SWPMI_ENABLE_IT(hswpmi, SWPMI_IT_TXUNRIE);
  501. /* Process Unlocked */
  502. __HAL_UNLOCK(hswpmi);
  503. /* Enable the SWPMI interrupts: */
  504. /* - Transmit data register empty */
  505. /* - Transmit buffer empty */
  506. /* - Transmit/Reception completion */
  507. __HAL_SWPMI_ENABLE_IT(hswpmi, SWPMI_IT_TIE | SWPMI_IT_TXBEIE | SWPMI_IT_TCIE);
  508. }
  509. else
  510. {
  511. status = HAL_BUSY;
  512. /* Process Unlocked */
  513. __HAL_UNLOCK(hswpmi);
  514. }
  515. }
  516. return status;
  517. }
  518. /**
  519. * @brief Receive an amount of data in non-blocking mode with interrupt.
  520. * @param hswpmi: SWPMI handle
  521. * @param pData: pointer to data buffer
  522. * @param Size: amount of data to be received
  523. * @retval HAL status
  524. */
  525. HAL_StatusTypeDef HAL_SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size)
  526. {
  527. HAL_StatusTypeDef status = HAL_OK;
  528. if((pData == NULL ) || (Size == 0))
  529. {
  530. status = HAL_ERROR;
  531. }
  532. else
  533. {
  534. /* Process Locked */
  535. __HAL_LOCK(hswpmi);
  536. if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX))
  537. {
  538. /* Update handle */
  539. hswpmi->pRxBuffPtr = pData;
  540. hswpmi->RxXferSize = Size;
  541. hswpmi->RxXferCount = Size;
  542. hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
  543. /* Check if a transmit process is ongoing or not */
  544. if(hswpmi->State == HAL_SWPMI_STATE_READY)
  545. {
  546. hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
  547. /* Enable SWPMI peripheral if not */
  548. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  549. }
  550. else
  551. {
  552. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
  553. }
  554. /* Process Unlocked */
  555. __HAL_UNLOCK(hswpmi);
  556. /* Enable the SWPMI slave resume */
  557. /* Enable the SWPMI Data Register not empty Interrupt, receive CRC Error, receive overrun and RxBuf Interrupt */
  558. /* Enable the SWPMI Transmit/Reception completion */
  559. __HAL_SWPMI_ENABLE_IT(hswpmi, SWPMI_IT_RIE | SWPMI_IT_RXBERIE | SWPMI_IT_RXOVRIE | SWPMI_IT_RXBFIE);
  560. }
  561. else
  562. {
  563. status = HAL_BUSY;
  564. /* Process Unlocked */
  565. __HAL_UNLOCK(hswpmi);
  566. }
  567. }
  568. return status;
  569. }
  570. /**
  571. * @brief Transmit an amount of data in non-blocking mode with DMA interrupt.
  572. * @param hswpmi: SWPMI handle
  573. * @param pData: pointer to data buffer
  574. * @param Size: amount of data to be sent
  575. * @retval HAL status
  576. */
  577. HAL_StatusTypeDef HAL_SWPMI_Transmit_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size)
  578. {
  579. HAL_StatusTypeDef status = HAL_OK;
  580. if((pData == NULL ) || (Size == 0))
  581. {
  582. status = HAL_ERROR;
  583. }
  584. else
  585. {
  586. /* Process Locked */
  587. __HAL_LOCK(hswpmi);
  588. if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_RX))
  589. {
  590. /* Update handle */
  591. hswpmi->pTxBuffPtr = pData;
  592. hswpmi->TxXferSize = Size;
  593. hswpmi->TxXferCount = Size;
  594. hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
  595. /* Check if a receive process is ongoing or not */
  596. if(hswpmi->State == HAL_SWPMI_STATE_READY)
  597. {
  598. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
  599. /* Enable SWPMI peripheral if not */
  600. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  601. }
  602. else
  603. {
  604. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
  605. }
  606. /* Set the SWPMI DMA transfer complete callback */
  607. hswpmi->hdmatx->XferCpltCallback = SWPMI_DMATransmitCplt;
  608. /* Set the SWPMI DMA Half transfer complete callback */
  609. hswpmi->hdmatx->XferHalfCpltCallback = SWPMI_DMATxHalfCplt;
  610. /* Set the DMA error callback */
  611. hswpmi->hdmatx->XferErrorCallback = SWPMI_DMAError;
  612. /* Enable the SWPMI transmit DMA Stream */
  613. HAL_DMA_Start_IT(hswpmi->hdmatx, (uint32_t)hswpmi->pTxBuffPtr, (uint32_t)&hswpmi->Instance->TDR, Size);
  614. /* Process Unlocked */
  615. __HAL_UNLOCK(hswpmi);
  616. /* Enable the SWPMI transmit underrun error */
  617. __HAL_SWPMI_ENABLE_IT(hswpmi, SWPMI_IT_TXUNRIE);
  618. /* Enable the DMA transfer for transmit request by setting the TXDMA bit
  619. in the SWPMI CR register */
  620. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_TXDMA);
  621. }
  622. else
  623. {
  624. status = HAL_BUSY;
  625. /* Process Unlocked */
  626. __HAL_UNLOCK(hswpmi);
  627. }
  628. }
  629. return status;
  630. }
  631. /**
  632. * @brief Receive an amount of data in non-blocking mode with DMA interrupt.
  633. * @param hswpmi: SWPMI handle
  634. * @param pData: pointer to data buffer
  635. * @param Size: amount of data to be received
  636. * @retval HAL status
  637. */
  638. HAL_StatusTypeDef HAL_SWPMI_Receive_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size)
  639. {
  640. HAL_StatusTypeDef status = HAL_OK;
  641. if((pData == NULL ) || (Size == 0))
  642. {
  643. status = HAL_ERROR;
  644. }
  645. else
  646. {
  647. /* Process Locked */
  648. __HAL_LOCK(hswpmi);
  649. if((hswpmi->State == HAL_SWPMI_STATE_READY) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX))
  650. {
  651. /* Update handle */
  652. hswpmi->pRxBuffPtr = pData;
  653. hswpmi->RxXferSize = Size;
  654. hswpmi->ErrorCode = HAL_SWPMI_ERROR_NONE;
  655. /* Check if a transmit process is ongoing or not */
  656. if(hswpmi->State == HAL_SWPMI_STATE_READY)
  657. {
  658. hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
  659. /* Enable SWPMI peripheral if not */
  660. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  661. }
  662. else
  663. {
  664. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX_RX;
  665. }
  666. /* Set the SWPMI DMA transfer complete callback */
  667. hswpmi->hdmarx->XferCpltCallback = SWPMI_DMAReceiveCplt;
  668. /* Set the SWPMI DMA Half transfer complete callback */
  669. hswpmi->hdmarx->XferHalfCpltCallback = SWPMI_DMARxHalfCplt;
  670. /* Set the DMA error callback */
  671. hswpmi->hdmarx->XferErrorCallback = SWPMI_DMAError;
  672. /* Enable the DMA request */
  673. HAL_DMA_Start_IT(hswpmi->hdmarx, (uint32_t)&hswpmi->Instance->RDR, (uint32_t)hswpmi->pRxBuffPtr, Size);
  674. /* Process Unlocked */
  675. __HAL_UNLOCK(hswpmi);
  676. /* Enable the SWPMI receive CRC Error and receive overrun interrupts */
  677. __HAL_SWPMI_ENABLE_IT(hswpmi, SWPMI_IT_RXBERIE | SWPMI_IT_RXOVRIE);
  678. /* Enable the DMA transfer for the receiver request by setting the RXDMA bit
  679. in the SWPMI CR register */
  680. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_RXDMA);
  681. }
  682. else
  683. {
  684. status = HAL_BUSY;
  685. /* Process Unlocked */
  686. __HAL_UNLOCK(hswpmi);
  687. }
  688. }
  689. return status;
  690. }
  691. /**
  692. * @brief Stop all DMA transfers.
  693. * @param hswpmi: SWPMI handle
  694. * @retval HAL_OK
  695. */
  696. HAL_StatusTypeDef HAL_SWPMI_DMAStop(SWPMI_HandleTypeDef *hswpmi)
  697. {
  698. /* Process Locked */
  699. __HAL_LOCK(hswpmi);
  700. /* Disable the SWPMI Tx/Rx DMA requests */
  701. CLEAR_BIT(hswpmi->Instance->CR, (SWPMI_CR_TXDMA | SWPMI_CR_RXDMA));
  702. /* Abort the SWPMI DMA tx channel */
  703. if(hswpmi->hdmatx != NULL)
  704. {
  705. HAL_DMA_Abort(hswpmi->hdmatx);
  706. }
  707. /* Abort the SWPMI DMA rx channel */
  708. if(hswpmi->hdmarx != NULL)
  709. {
  710. HAL_DMA_Abort(hswpmi->hdmarx);
  711. }
  712. /* Disable SWPMI interface */
  713. CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT);
  714. hswpmi->State = HAL_SWPMI_STATE_READY;
  715. /* Process Unlocked */
  716. __HAL_UNLOCK(hswpmi);
  717. return HAL_OK;
  718. }
  719. /**
  720. * @brief Enable the Loopback mode.
  721. * @param hswpmi: SWPMI handle
  722. * @note Loopback mode is to be used only for test purposes
  723. * @retval HAL_OK / HAL_BUSY
  724. */
  725. HAL_StatusTypeDef HAL_SWPMI_EnableLoopback(SWPMI_HandleTypeDef *hswpmi)
  726. {
  727. HAL_StatusTypeDef status = HAL_OK;
  728. /* Process Locked */
  729. __HAL_LOCK(hswpmi);
  730. /* Check SWPMI not enabled */
  731. if(READ_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT) != RESET)
  732. {
  733. status = HAL_BUSY;
  734. }
  735. else
  736. {
  737. /* Set Loopback */
  738. SET_BIT(hswpmi->Instance->CR, SWPMI_CR_LPBK);
  739. }
  740. /* Process Unlocked */
  741. __HAL_UNLOCK(hswpmi);
  742. return status;
  743. }
  744. /**
  745. * @brief Disable the Loopback mode.
  746. * @param hswpmi: SWPMI handle
  747. * @note Loopback mode is to be used only for test purposes
  748. * @retval HAL_OK / HAL_BUSY
  749. */
  750. HAL_StatusTypeDef HAL_SWPMI_DisableLoopback(SWPMI_HandleTypeDef *hswpmi)
  751. {
  752. HAL_StatusTypeDef status = HAL_OK;
  753. /* Process Locked */
  754. __HAL_LOCK(hswpmi);
  755. /* Check SWPMI not enabled */
  756. if(READ_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT) != RESET)
  757. {
  758. status = HAL_BUSY;
  759. }
  760. else
  761. {
  762. /* Reset Loopback */
  763. CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_LPBK);
  764. }
  765. /* Process Unlocked */
  766. __HAL_UNLOCK(hswpmi);
  767. return status;
  768. }
  769. /**
  770. * @}
  771. */
  772. /** @defgroup SWPMI_Exported_Group3 SWPMI IRQ handler and callbacks
  773. * @brief SWPMI IRQ handler.
  774. *
  775. @verbatim
  776. ==============================================================================
  777. ##### SWPMI IRQ handler and callbacks #####
  778. ==============================================================================
  779. [..] This section provides SWPMI IRQ handler and callback functions called within
  780. the IRQ handler.
  781. @endverbatim
  782. * @{
  783. */
  784. /**
  785. * @brief Handle SWPMI interrupt request.
  786. * @param hswpmi: SWPMI handle
  787. * @retval None
  788. */
  789. void HAL_SWPMI_IRQHandler(SWPMI_HandleTypeDef *hswpmi)
  790. {
  791. uint32_t regisr = READ_REG(hswpmi->Instance->ISR);
  792. uint32_t regier = READ_REG(hswpmi->Instance->IER);
  793. uint32_t errcode = HAL_SWPMI_ERROR_NONE;
  794. /* SWPMI CRC error interrupt occurred --------------------------------------*/
  795. if(((regisr & SWPMI_FLAG_RXBERF) != RESET) && ((regier & SWPMI_IT_RXBERIE) != RESET))
  796. {
  797. /* Disable Receive CRC interrupt */
  798. CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_RXBERIE | SWPMI_IT_RXBFIE);
  799. /* Clear Receive CRC and Receive buffer full flag */
  800. WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_RXBERF | SWPMI_FLAG_RXBFF);
  801. errcode |= HAL_SWPMI_ERROR_CRC;
  802. }
  803. /* SWPMI Over-Run interrupt occurred -----------------------------------------*/
  804. if(((regisr & SWPMI_FLAG_RXOVRF) != RESET) && ((regier & SWPMI_IT_RXOVRIE) != RESET))
  805. {
  806. /* Disable Receive overrun interrupt */
  807. CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_RXOVRIE);
  808. /* Clear Receive overrun flag */
  809. WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_RXOVRF);
  810. errcode |= HAL_SWPMI_ERROR_OVR;
  811. }
  812. /* SWPMI Under-Run interrupt occurred -----------------------------------------*/
  813. if(((regisr & SWPMI_FLAG_TXUNRF) != RESET) && ((regier & SWPMI_IT_TXUNRIE) != RESET))
  814. {
  815. /* Disable Transmit under run interrupt */
  816. CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_TXUNRIE);
  817. /* Clear Transmit under run flag */
  818. WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_TXUNRF);
  819. errcode |= HAL_SWPMI_ERROR_UDR;
  820. }
  821. /* Call SWPMI Error Call back function if needed --------------------------*/
  822. if(errcode != HAL_SWPMI_ERROR_NONE)
  823. {
  824. hswpmi->ErrorCode |= errcode;
  825. if((errcode & HAL_SWPMI_ERROR_UDR) != RESET)
  826. {
  827. /* Check TXDMA transfer to abort */
  828. if(HAL_IS_BIT_SET(hswpmi->Instance->CR, SWPMI_CR_TXDMA))
  829. {
  830. /* Disable DMA TX at SWPMI level */
  831. CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_TXDMA);
  832. /* Abort the USART DMA Tx channel */
  833. if(hswpmi->hdmatx != NULL)
  834. {
  835. /* Set the SWPMI Tx DMA Abort callback :
  836. will lead to call HAL_SWPMI_ErrorCallback() at end of DMA abort procedure */
  837. hswpmi->hdmatx->XferAbortCallback = SWPMI_DMAAbortOnError;
  838. /* Abort DMA TX */
  839. if(HAL_DMA_Abort_IT(hswpmi->hdmatx) != HAL_OK)
  840. {
  841. /* Call Directly hswpmi->hdmatx->XferAbortCallback function in case of error */
  842. hswpmi->hdmatx->XferAbortCallback(hswpmi->hdmatx);
  843. }
  844. }
  845. else
  846. {
  847. /* Set the SWPMI state ready to be able to start again the process */
  848. hswpmi->State = HAL_SWPMI_STATE_READY;
  849. HAL_SWPMI_ErrorCallback(hswpmi);
  850. }
  851. }
  852. else
  853. {
  854. /* Set the SWPMI state ready to be able to start again the process */
  855. hswpmi->State = HAL_SWPMI_STATE_READY;
  856. HAL_SWPMI_ErrorCallback(hswpmi);
  857. }
  858. }
  859. else
  860. {
  861. /* Check RXDMA transfer to abort */
  862. if(HAL_IS_BIT_SET(hswpmi->Instance->CR, SWPMI_CR_RXDMA))
  863. {
  864. /* Disable DMA RX at SWPMI level */
  865. CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_RXDMA);
  866. /* Abort the USART DMA Rx channel */
  867. if(hswpmi->hdmarx != NULL)
  868. {
  869. /* Set the SWPMI Rx DMA Abort callback :
  870. will lead to call HAL_SWPMI_ErrorCallback() at end of DMA abort procedure */
  871. hswpmi->hdmarx->XferAbortCallback = SWPMI_DMAAbortOnError;
  872. /* Abort DMA RX */
  873. if(HAL_DMA_Abort_IT(hswpmi->hdmarx) != HAL_OK)
  874. {
  875. /* Call Directly hswpmi->hdmarx->XferAbortCallback function in case of error */
  876. hswpmi->hdmarx->XferAbortCallback(hswpmi->hdmarx);
  877. }
  878. }
  879. else
  880. {
  881. /* Set the SWPMI state ready to be able to start again the process */
  882. hswpmi->State = HAL_SWPMI_STATE_READY;
  883. HAL_SWPMI_ErrorCallback(hswpmi);
  884. }
  885. }
  886. else
  887. {
  888. /* Set the SWPMI state ready to be able to start again the process */
  889. hswpmi->State = HAL_SWPMI_STATE_READY;
  890. HAL_SWPMI_ErrorCallback(hswpmi);
  891. }
  892. }
  893. }
  894. /* SWPMI in mode Receiver ---------------------------------------------------*/
  895. if(((regisr & SWPMI_FLAG_RXNE) != RESET) && ((regier & SWPMI_IT_RIE) != RESET))
  896. {
  897. SWPMI_Receive_IT(hswpmi);
  898. }
  899. /* SWPMI in mode Transmitter ------------------------------------------------*/
  900. if(((regisr & SWPMI_FLAG_TXE) != RESET) && ((regier & SWPMI_IT_TIE) != RESET))
  901. {
  902. SWPMI_Transmit_IT(hswpmi);
  903. }
  904. /* SWPMI in mode Transmitter (Transmit buffer empty) ------------------------*/
  905. if(((regisr & SWPMI_FLAG_TXBEF) != RESET) && ((regier & SWPMI_IT_TXBEIE) != RESET))
  906. {
  907. SWPMI_EndTransmit_IT(hswpmi);
  908. }
  909. /* SWPMI in mode Receiver (Receive buffer full) -----------------------------*/
  910. if(((regisr & SWPMI_FLAG_RXBFF) != RESET) && ((regier & SWPMI_IT_RXBFIE) != RESET))
  911. {
  912. SWPMI_EndReceive_IT(hswpmi);
  913. }
  914. /* Both Transmission and reception complete ---------------------------------*/
  915. if(((regisr & SWPMI_FLAG_TCF) != RESET) && ((regier & SWPMI_IT_TCIE) != RESET))
  916. {
  917. SWPMI_EndTransmitReceive_IT(hswpmi);
  918. }
  919. }
  920. /**
  921. * @brief Tx Transfer completed callback.
  922. * @param hswpmi: SWPMI handle
  923. * @retval None
  924. */
  925. __weak void HAL_SWPMI_TxCpltCallback(SWPMI_HandleTypeDef *hswpmi)
  926. {
  927. /* Prevent unused argument(s) compilation warning */
  928. UNUSED(hswpmi);
  929. /* NOTE : This function should not be modified, when the callback is needed,
  930. the HAL_SWPMI_TxCpltCallback is to be implemented in the user file
  931. */
  932. }
  933. /**
  934. * @brief Tx Half Transfer completed callback.
  935. * @param hswpmi: SWPMI handle
  936. * @retval None
  937. */
  938. __weak void HAL_SWPMI_TxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi)
  939. {
  940. /* Prevent unused argument(s) compilation warning */
  941. UNUSED(hswpmi);
  942. /* NOTE: This function should not be modified, when the callback is needed,
  943. the HAL_SWPMI_TxHalfCpltCallback is to be implemented in the user file
  944. */
  945. }
  946. /**
  947. * @brief Rx Transfer completed callback.
  948. * @param hswpmi: SWPMI handle
  949. * @retval None
  950. */
  951. __weak void HAL_SWPMI_RxCpltCallback(SWPMI_HandleTypeDef *hswpmi)
  952. {
  953. /* Prevent unused argument(s) compilation warning */
  954. UNUSED(hswpmi);
  955. /* NOTE : This function should not be modified, when the callback is needed,
  956. the HAL_SWPMI_RxCpltCallback is to be implemented in the user file
  957. */
  958. }
  959. /**
  960. * @brief Rx Half Transfer completed callback.
  961. * @param hswpmi: SWPMI handle
  962. * @retval None
  963. */
  964. __weak void HAL_SWPMI_RxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi)
  965. {
  966. /* Prevent unused argument(s) compilation warning */
  967. UNUSED(hswpmi);
  968. /* NOTE: This function should not be modified, when the callback is needed,
  969. the HAL_SWPMI_RxHalfCpltCallback is to be implemented in the user file
  970. */
  971. }
  972. /**
  973. * @brief SWPMI error callback.
  974. * @param hswpmi: SWPMI handle
  975. * @retval None
  976. */
  977. __weak void HAL_SWPMI_ErrorCallback(SWPMI_HandleTypeDef *hswpmi)
  978. {
  979. /* Prevent unused argument(s) compilation warning */
  980. UNUSED(hswpmi);
  981. /* NOTE : This function should not be modified, when the callback is needed,
  982. the HAL_SWPMI_ErrorCallback is to be implemented in the user file
  983. */
  984. }
  985. /**
  986. * @}
  987. */
  988. /** @defgroup SWPMI_Exported_Group4 Peripheral Control methods
  989. * @brief SWPMI control functions
  990. *
  991. @verbatim
  992. ===============================================================================
  993. ##### Peripheral Control methods #####
  994. ===============================================================================
  995. [..]
  996. This subsection provides a set of functions allowing to control the SWPMI.
  997. (+) HAL_SWPMI_GetState() API is helpful to check in run-time the state of the SWPMI peripheral
  998. (+) HAL_SWPMI_GetError() API is helpful to check in run-time the error state of the SWPMI peripheral
  999. @endverbatim
  1000. * @{
  1001. */
  1002. /**
  1003. * @brief Return the SWPMI handle state.
  1004. * @param hswpmi: SWPMI handle
  1005. * @retval HAL state
  1006. */
  1007. HAL_SWPMI_StateTypeDef HAL_SWPMI_GetState(SWPMI_HandleTypeDef *hswpmi)
  1008. {
  1009. /* Return SWPMI handle state */
  1010. return hswpmi->State;
  1011. }
  1012. /**
  1013. * @brief Return the SWPMI error code.
  1014. * @param hswpmi : pointer to a SWPMI_HandleTypeDef structure that contains
  1015. * the configuration information for the specified SWPMI.
  1016. * @retval SWPMI Error Code
  1017. */
  1018. uint32_t HAL_SWPMI_GetError(SWPMI_HandleTypeDef *hswpmi)
  1019. {
  1020. return hswpmi->ErrorCode;
  1021. }
  1022. /**
  1023. * @}
  1024. */
  1025. /**
  1026. * @}
  1027. */
  1028. /* Private functions ---------------------------------------------------------*/
  1029. /** @defgroup SWPMI_Private_Functions SWPMI Private Functions
  1030. * @{
  1031. */
  1032. /**
  1033. * @brief Transmit an amount of data in interrupt mode.
  1034. * @note Function called under interruption only, once interruptions have been enabled by HAL_SWPMI_Transmit_IT()
  1035. * @param hswpmi: SWPMI handle
  1036. * @retval HAL status
  1037. */
  1038. static HAL_StatusTypeDef SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi)
  1039. {
  1040. HAL_StatusTypeDef status = HAL_OK;
  1041. if ((hswpmi->State == HAL_SWPMI_STATE_BUSY_TX) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX))
  1042. {
  1043. if(hswpmi->TxXferCount == 0)
  1044. {
  1045. /* Disable the SWPMI TXE and Underrun Interrupts */
  1046. CLEAR_BIT(hswpmi->Instance->IER, (SWPMI_IT_TIE | SWPMI_IT_TXUNRIE));
  1047. }
  1048. else
  1049. {
  1050. hswpmi->Instance->TDR = (uint32_t)(*hswpmi->pTxBuffPtr++);
  1051. hswpmi->TxXferCount--;
  1052. }
  1053. }
  1054. else
  1055. {
  1056. status = HAL_BUSY;
  1057. }
  1058. return status;
  1059. }
  1060. /**
  1061. * @brief Wraps up transmission in non-blocking mode.
  1062. * @param hswpmi: SWPMI handle
  1063. * @retval HAL status
  1064. * @retval HAL status
  1065. */
  1066. static HAL_StatusTypeDef SWPMI_EndTransmit_IT(SWPMI_HandleTypeDef *hswpmi)
  1067. {
  1068. /* Clear the SWPMI Transmit buffer empty Flag */
  1069. WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_TXBEF);
  1070. /* Disable the all SWPMI Transmit Interrupts */
  1071. CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_TIE | SWPMI_IT_TXUNRIE | SWPMI_IT_TXBEIE);
  1072. /* Check if a receive Process is ongoing or not */
  1073. if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
  1074. {
  1075. hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
  1076. }
  1077. else
  1078. {
  1079. hswpmi->State = HAL_SWPMI_STATE_READY;
  1080. }
  1081. HAL_SWPMI_TxCpltCallback(hswpmi);
  1082. return HAL_OK;
  1083. }
  1084. /**
  1085. * @brief Receive an amount of data in interrupt mode.
  1086. * @note Function called under interruption only, once interruptions have been enabled by HAL_SWPMI_Receive_IT()
  1087. * @param hswpmi: SWPMI handle
  1088. * @retval HAL status
  1089. */
  1090. static HAL_StatusTypeDef SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi)
  1091. {
  1092. HAL_StatusTypeDef status = HAL_OK;
  1093. if((hswpmi->State == HAL_SWPMI_STATE_BUSY_RX) || (hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX))
  1094. {
  1095. *hswpmi->pRxBuffPtr++ = (uint32_t)(hswpmi->Instance->RDR);
  1096. if(--hswpmi->RxXferCount == 0)
  1097. {
  1098. /* Wait for RXBFF flag to update state */
  1099. HAL_SWPMI_RxCpltCallback(hswpmi);
  1100. }
  1101. }
  1102. else
  1103. {
  1104. status = HAL_BUSY;
  1105. }
  1106. return status;
  1107. }
  1108. /**
  1109. * @brief Wraps up reception in non-blocking mode.
  1110. * @param hswpmi: SWPMI handle
  1111. * @retval HAL status
  1112. * @retval HAL status
  1113. */
  1114. static HAL_StatusTypeDef SWPMI_EndReceive_IT(SWPMI_HandleTypeDef *hswpmi)
  1115. {
  1116. /* Clear the SWPMI Receive buffer full Flag */
  1117. WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_RXBFF);
  1118. /* Disable the all SWPMI Receive Interrupts */
  1119. CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_RIE | SWPMI_IT_RXBERIE | SWPMI_IT_RXOVRIE | SWPMI_IT_RXBFIE);
  1120. /* Check if a transmit Process is ongoing or not */
  1121. if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
  1122. {
  1123. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
  1124. }
  1125. else
  1126. {
  1127. hswpmi->State = HAL_SWPMI_STATE_READY;
  1128. }
  1129. return HAL_OK;
  1130. }
  1131. /**
  1132. * @brief Wraps up transmission and reception in non-blocking mode.
  1133. * @param hswpmi: SWPMI handle
  1134. * @retval HAL status
  1135. * @retval HAL status
  1136. */
  1137. static HAL_StatusTypeDef SWPMI_EndTransmitReceive_IT(SWPMI_HandleTypeDef *hswpmi)
  1138. {
  1139. /* Clear the SWPMI Transmission Complete Flag */
  1140. WRITE_REG(hswpmi->Instance->ICR, SWPMI_FLAG_TCF);
  1141. /* Disable the SWPMI Transmission Complete Interrupt */
  1142. CLEAR_BIT(hswpmi->Instance->IER, SWPMI_IT_TCIE);
  1143. /* Check if a receive Process is ongoing or not */
  1144. if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
  1145. {
  1146. hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
  1147. }
  1148. else if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX)
  1149. {
  1150. hswpmi->State = HAL_SWPMI_STATE_READY;
  1151. }
  1152. return HAL_OK;
  1153. }
  1154. /**
  1155. * @brief DMA SWPMI transmit process complete callback.
  1156. * @param hdma: DMA handle
  1157. * @retval None
  1158. */
  1159. static void SWPMI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
  1160. {
  1161. SWPMI_HandleTypeDef* hswpmi = ( SWPMI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1162. uint32_t tickstart = 0;
  1163. /* DMA Normal mode*/
  1164. if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & DMA_SxCR_CIRC) != SET)
  1165. {
  1166. hswpmi->TxXferCount = 0;
  1167. /* Disable the DMA transfer for transmit request by setting the TXDMA bit
  1168. in the SWPMI CR register */
  1169. CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_TXDMA);
  1170. /* Init tickstart for timeout managment*/
  1171. tickstart = HAL_GetTick();
  1172. /* Wait the TXBEF */
  1173. if(SWPMI_WaitOnFlagSetUntilTimeout(hswpmi, SWPMI_FLAG_TXBEF, tickstart, SWPMI_TIMEOUT_VALUE) != HAL_OK)
  1174. {
  1175. /* Timeout occurred */
  1176. HAL_SWPMI_ErrorCallback(hswpmi);
  1177. }
  1178. else
  1179. {
  1180. /* No Timeout */
  1181. /* Check if a receive process is ongoing or not */
  1182. if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
  1183. {
  1184. hswpmi->State = HAL_SWPMI_STATE_BUSY_RX;
  1185. }
  1186. else
  1187. {
  1188. hswpmi->State = HAL_SWPMI_STATE_READY;
  1189. }
  1190. HAL_SWPMI_TxCpltCallback(hswpmi);
  1191. }
  1192. }
  1193. /* DMA Circular mode */
  1194. else
  1195. {
  1196. HAL_SWPMI_TxCpltCallback(hswpmi);
  1197. }
  1198. }
  1199. /**
  1200. * @brief DMA SWPMI transmit process half complete callback.
  1201. * @param hdma : DMA handle
  1202. * @retval None
  1203. */
  1204. static void SWPMI_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
  1205. {
  1206. SWPMI_HandleTypeDef* hswpmi = (SWPMI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1207. HAL_SWPMI_TxHalfCpltCallback(hswpmi);
  1208. }
  1209. /**
  1210. * @brief DMA SWPMI receive process complete callback.
  1211. * @param hdma: DMA handle
  1212. * @retval None
  1213. */
  1214. static void SWPMI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
  1215. {
  1216. SWPMI_HandleTypeDef* hswpmi = ( SWPMI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1217. /* DMA Normal mode*/
  1218. if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & DMA_SxCR_CIRC) == RESET)
  1219. {
  1220. hswpmi->RxXferCount = 0;
  1221. /* Disable the DMA transfer for the receiver request by setting the RXDMA bit
  1222. in the SWPMI CR register */
  1223. CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_RXDMA);
  1224. /* Check if a transmit Process is ongoing or not */
  1225. if(hswpmi->State == HAL_SWPMI_STATE_BUSY_TX_RX)
  1226. {
  1227. hswpmi->State = HAL_SWPMI_STATE_BUSY_TX;
  1228. }
  1229. else
  1230. {
  1231. hswpmi->State = HAL_SWPMI_STATE_READY;
  1232. }
  1233. }
  1234. HAL_SWPMI_RxCpltCallback(hswpmi);
  1235. }
  1236. /**
  1237. * @brief DMA SWPMI receive process half complete callback.
  1238. * @param hdma : DMA handle
  1239. * @retval None
  1240. */
  1241. static void SWPMI_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
  1242. {
  1243. SWPMI_HandleTypeDef* hswpmi = (SWPMI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1244. HAL_SWPMI_RxHalfCpltCallback(hswpmi);
  1245. }
  1246. /**
  1247. * @brief DMA SWPMI communication error callback.
  1248. * @param hdma: DMA handle
  1249. * @retval None
  1250. */
  1251. static void SWPMI_DMAError(DMA_HandleTypeDef *hdma)
  1252. {
  1253. SWPMI_HandleTypeDef* hswpmi = ( SWPMI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1254. /* Update handle */
  1255. hswpmi->RxXferCount = 0;
  1256. hswpmi->TxXferCount = 0;
  1257. hswpmi->State= HAL_SWPMI_STATE_READY;
  1258. hswpmi->ErrorCode |= HAL_SWPMI_ERROR_DMA;
  1259. HAL_SWPMI_ErrorCallback(hswpmi);
  1260. }
  1261. /**
  1262. * @brief DMA SWPMI communication abort callback.
  1263. * @param hdma: DMA handle
  1264. * @retval None
  1265. */
  1266. static void SWPMI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
  1267. {
  1268. SWPMI_HandleTypeDef* hswpmi = ( SWPMI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1269. /* Update handle */
  1270. hswpmi->RxXferCount = 0;
  1271. hswpmi->TxXferCount = 0;
  1272. hswpmi->State= HAL_SWPMI_STATE_READY;
  1273. HAL_SWPMI_ErrorCallback(hswpmi);
  1274. }
  1275. /**
  1276. * @brief Handle SWPMI Communication Timeout.
  1277. * @param hswpmi: SWPMI handle
  1278. * @param Flag: specifies the SWPMI flag to check.
  1279. * @param Tickstart Tick start value
  1280. * @param Timeout timeout duration.
  1281. * @retval HAL status
  1282. */
  1283. static HAL_StatusTypeDef SWPMI_WaitOnFlagSetUntilTimeout(SWPMI_HandleTypeDef *hswpmi, uint32_t Flag, uint32_t Tickstart, uint32_t Timeout)
  1284. {
  1285. HAL_StatusTypeDef status = HAL_OK;
  1286. /* Wait until flag is set */
  1287. while(!(HAL_IS_BIT_SET(hswpmi->Instance->ISR, Flag)))
  1288. {
  1289. /* Check for the Timeout */
  1290. if(Timeout != HAL_MAX_DELAY)
  1291. {
  1292. if((Timeout == 0) || ((HAL_GetTick()-Tickstart) > Timeout))
  1293. {
  1294. hswpmi->State = HAL_SWPMI_STATE_READY;
  1295. status = HAL_TIMEOUT;
  1296. break;
  1297. }
  1298. }
  1299. }
  1300. return status;
  1301. }
  1302. /**
  1303. * @}
  1304. */
  1305. #endif /* HAL_SWPMI_MODULE_ENABLED */
  1306. /**
  1307. * @}
  1308. */
  1309. /**
  1310. * @}
  1311. */
  1312. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/