stm32l4xx_ll_dma2d.h 81 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055
  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @version V1.7.2
  6. * @date 16-June-2017
  7. * @brief Header file of DMA2D LL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32L4xx_LL_DMA2D_H
  39. #define __STM32L4xx_LL_DMA2D_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32l4xx.h"
  45. /** @addtogroup STM32L4xx_LL_Driver
  46. * @{
  47. */
  48. #if defined (DMA2D)
  49. /** @defgroup DMA2D_LL DMA2D
  50. * @{
  51. */
  52. /* Private types -------------------------------------------------------------*/
  53. /* Private variables ---------------------------------------------------------*/
  54. /* Private constants ---------------------------------------------------------*/
  55. /* Private macros ------------------------------------------------------------*/
  56. #if defined(USE_FULL_LL_DRIVER)
  57. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  58. * @{
  59. */
  60. /**
  61. * @}
  62. */
  63. #endif /*USE_FULL_LL_DRIVER*/
  64. /* Exported types ------------------------------------------------------------*/
  65. #if defined(USE_FULL_LL_DRIVER)
  66. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  67. * @{
  68. */
  69. /**
  70. * @brief LL DMA2D Init Structure Definition
  71. */
  72. typedef struct
  73. {
  74. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  75. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  76. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
  77. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  78. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  79. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  80. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  81. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  82. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  83. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  84. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  85. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  86. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  87. function @ref LL_DMA2D_ConfigOutputColor(). */
  88. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  89. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  90. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  91. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  92. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  93. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  94. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  95. function @ref LL_DMA2D_ConfigOutputColor(). */
  96. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  97. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  98. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  99. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  100. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  101. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  102. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  103. function @ref LL_DMA2D_ConfigOutputColor(). */
  104. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  105. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  106. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  107. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  108. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  109. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  110. function @ref LL_DMA2D_ConfigOutputColor(). */
  111. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  112. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  113. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  114. uint32_t LineOffset; /*!< Specifies the output line offset value.
  115. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  116. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
  117. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  118. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  119. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  120. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
  121. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  122. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  123. uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode.
  124. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  125. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */
  126. uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode.
  127. - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP.
  128. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */
  129. } LL_DMA2D_InitTypeDef;
  130. /**
  131. * @brief LL DMA2D Layer Configuration Structure Definition
  132. */
  133. typedef struct
  134. {
  135. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  136. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  137. This parameter can be modified afterwards using unitary functions
  138. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  139. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  140. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  141. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  142. This parameter can be modified afterwards using unitary functions
  143. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  144. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  145. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  146. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  147. This parameter can be modified afterwards using unitary functions
  148. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  149. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  150. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  151. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  152. This parameter can be modified afterwards using unitary functions
  153. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  154. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  155. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  156. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  157. This parameter can be modified afterwards using unitary functions
  158. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  159. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  160. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  161. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  162. This parameter can be modified afterwards using unitary functions
  163. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  164. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  165. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  166. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  167. This parameter can be modified afterwards using unitary functions
  168. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  169. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  170. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  171. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  172. This parameter can be modified afterwards using unitary functions
  173. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  174. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  175. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  176. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  177. This parameter can be modified afterwards using unitary functions
  178. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  179. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  180. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  181. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  182. This parameter can be modified afterwards using unitary functions
  183. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  184. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  185. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  186. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  187. This parameter can be modified afterwards using unitary functions
  188. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  189. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  190. uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode.
  191. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  192. This parameter can be modified afterwards using unitary functions
  193. - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer,
  194. - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */
  195. uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode.
  196. This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP .
  197. This parameter can be modified afterwards using unitary functions
  198. - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer,
  199. - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */
  200. } LL_DMA2D_LayerCfgTypeDef;
  201. /**
  202. * @brief LL DMA2D Output Color Structure Definition
  203. */
  204. typedef struct
  205. {
  206. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  207. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  208. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  209. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  210. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  211. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  212. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  213. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  214. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  215. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  216. function @ref LL_DMA2D_ConfigOutputColor(). */
  217. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  218. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  219. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  220. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  221. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  222. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  223. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  224. function @ref LL_DMA2D_ConfigOutputColor(). */
  225. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  226. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  227. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  228. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  229. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  230. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  231. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  232. function @ref LL_DMA2D_ConfigOutputColor(). */
  233. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  234. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  235. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  236. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  237. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  238. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  239. function @ref LL_DMA2D_ConfigOutputColor(). */
  240. } LL_DMA2D_ColorTypeDef;
  241. /**
  242. * @}
  243. */
  244. #endif /* USE_FULL_LL_DRIVER */
  245. /* Exported constants --------------------------------------------------------*/
  246. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  247. * @{
  248. */
  249. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  250. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  251. * @{
  252. */
  253. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  254. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  255. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  256. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  257. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  258. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  259. /**
  260. * @}
  261. */
  262. /** @defgroup DMA2D_LL_EC_IT IT Defines
  263. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  264. * @{
  265. */
  266. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  267. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  268. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  269. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  270. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  271. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  272. /**
  273. * @}
  274. */
  275. /** @defgroup DMA2D_LL_EC_MODE Mode
  276. * @{
  277. */
  278. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  279. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  280. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  281. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  282. /**
  283. * @}
  284. */
  285. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  286. * @{
  287. */
  288. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  289. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  290. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  291. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  292. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  293. /**
  294. * @}
  295. */
  296. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  297. * @{
  298. */
  299. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  300. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  301. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  302. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  303. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  304. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  305. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  306. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  307. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  308. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  309. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  310. /**
  311. * @}
  312. */
  313. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  314. * @{
  315. */
  316. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  317. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
  318. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
  319. with original alpha channel value */
  320. /**
  321. * @}
  322. */
  323. /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap
  324. * @{
  325. */
  326. #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */
  327. #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */
  328. /**
  329. * @}
  330. */
  331. /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion
  332. * @{
  333. */
  334. #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */
  335. #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */
  336. /**
  337. * @}
  338. */
  339. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  340. * @{
  341. */
  342. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  343. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  344. /**
  345. * @}
  346. */
  347. /**
  348. * @}
  349. */
  350. /* Exported macro ------------------------------------------------------------*/
  351. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  352. * @{
  353. */
  354. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  355. * @{
  356. */
  357. /**
  358. * @brief Write a value in DMA2D register.
  359. * @param __INSTANCE__ DMA2D Instance
  360. * @param __REG__ Register to be written
  361. * @param __VALUE__ Value to be written in the register
  362. * @retval None
  363. */
  364. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  365. /**
  366. * @brief Read a value in DMA2D register.
  367. * @param __INSTANCE__ DMA2D Instance
  368. * @param __REG__ Register to be read
  369. * @retval Register value
  370. */
  371. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  372. /**
  373. * @}
  374. */
  375. /**
  376. * @}
  377. */
  378. /* Exported functions --------------------------------------------------------*/
  379. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  380. * @{
  381. */
  382. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  383. * @{
  384. */
  385. /**
  386. * @brief Start a DMA2D transfer.
  387. * @rmtoll CR START LL_DMA2D_Start
  388. * @param DMA2Dx DMA2D Instance
  389. * @retval None
  390. */
  391. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  392. {
  393. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  394. }
  395. /**
  396. * @brief Indicate if a DMA2D transfer is ongoing.
  397. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  398. * @param DMA2Dx DMA2D Instance
  399. * @retval State of bit (1 or 0).
  400. */
  401. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  402. {
  403. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
  404. }
  405. /**
  406. * @brief Suspend DMA2D transfer.
  407. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  408. * @rmtoll CR SUSP LL_DMA2D_Suspend
  409. * @param DMA2Dx DMA2D Instance
  410. * @retval None
  411. */
  412. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  413. {
  414. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  415. }
  416. /**
  417. * @brief Resume DMA2D transfer.
  418. * @note This API can be used to resume automatic foreground or background CLUT loading.
  419. * @rmtoll CR SUSP LL_DMA2D_Resume
  420. * @param DMA2Dx DMA2D Instance
  421. * @retval None
  422. */
  423. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  424. {
  425. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  426. }
  427. /**
  428. * @brief Indicate if DMA2D transfer is suspended.
  429. * @note This API can be used to indicate whether or not automatic foreground or
  430. * background CLUT loading is suspended.
  431. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  432. * @param DMA2Dx DMA2D Instance
  433. * @retval State of bit (1 or 0).
  434. */
  435. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  436. {
  437. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
  438. }
  439. /**
  440. * @brief Abort DMA2D transfer.
  441. * @note This API can be used to abort automatic foreground or background CLUT loading.
  442. * @rmtoll CR ABORT LL_DMA2D_Abort
  443. * @param DMA2Dx DMA2D Instance
  444. * @retval None
  445. */
  446. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  447. {
  448. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  449. }
  450. /**
  451. * @brief Indicate if DMA2D transfer is aborted.
  452. * @note This API can be used to indicate whether or not automatic foreground or
  453. * background CLUT loading is aborted.
  454. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  455. * @param DMA2Dx DMA2D Instance
  456. * @retval State of bit (1 or 0).
  457. */
  458. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  459. {
  460. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
  461. }
  462. /**
  463. * @brief Set DMA2D mode.
  464. * @rmtoll CR MODE LL_DMA2D_SetMode
  465. * @param DMA2Dx DMA2D Instance
  466. * @param Mode This parameter can be one of the following values:
  467. * @arg @ref LL_DMA2D_MODE_M2M
  468. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  469. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  470. * @arg @ref LL_DMA2D_MODE_R2M
  471. * @retval None
  472. */
  473. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  474. {
  475. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  476. }
  477. /**
  478. * @brief Return DMA2D mode
  479. * @rmtoll CR MODE LL_DMA2D_GetMode
  480. * @param DMA2Dx DMA2D Instance
  481. * @retval Returned value can be one of the following values:
  482. * @arg @ref LL_DMA2D_MODE_M2M
  483. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  484. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  485. * @arg @ref LL_DMA2D_MODE_R2M
  486. */
  487. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  488. {
  489. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  490. }
  491. /**
  492. * @brief Set DMA2D output color mode.
  493. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  494. * @param DMA2Dx DMA2D Instance
  495. * @param ColorMode This parameter can be one of the following values:
  496. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  497. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  498. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  499. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  500. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  501. * @retval None
  502. */
  503. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  504. {
  505. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  506. }
  507. /**
  508. * @brief Return DMA2D output color mode.
  509. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  510. * @param DMA2Dx DMA2D Instance
  511. * @retval Returned value can be one of the following values:
  512. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  513. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  514. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  515. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  516. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  517. */
  518. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  519. {
  520. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  521. }
  522. /**
  523. * @brief Set DMA2D output Red Blue swap mode.
  524. * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode
  525. * @param DMA2Dx DMA2D Instance
  526. * @param RBSwapMode This parameter can be one of the following values:
  527. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  528. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  529. * @retval None
  530. */
  531. __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  532. {
  533. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
  534. }
  535. /**
  536. * @brief Return DMA2D output Red Blue swap mode.
  537. * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode
  538. * @param DMA2Dx DMA2D Instance
  539. * @retval Returned value can be one of the following values:
  540. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  541. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  542. */
  543. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  544. {
  545. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
  546. }
  547. /**
  548. * @brief Set DMA2D output alpha inversion mode.
  549. * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode
  550. * @param DMA2Dx DMA2D Instance
  551. * @param AlphaInversionMode This parameter can be one of the following values:
  552. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  553. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  554. * @retval None
  555. */
  556. __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  557. {
  558. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
  559. }
  560. /**
  561. * @brief Return DMA2D output alpha inversion mode.
  562. * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode
  563. * @param DMA2Dx DMA2D Instance
  564. * @retval Returned value can be one of the following values:
  565. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  566. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  567. */
  568. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  569. {
  570. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
  571. }
  572. /**
  573. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  574. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  575. * @param DMA2Dx DMA2D Instance
  576. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  577. * @retval None
  578. */
  579. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  580. {
  581. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  582. }
  583. /**
  584. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  585. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  586. * @param DMA2Dx DMA2D Instance
  587. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  588. */
  589. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  590. {
  591. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  592. }
  593. /**
  594. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  595. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  596. * @param DMA2Dx DMA2D Instance
  597. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  598. * @retval None
  599. */
  600. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  601. {
  602. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  603. }
  604. /**
  605. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  606. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  607. * @param DMA2Dx DMA2D Instance
  608. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  609. */
  610. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  611. {
  612. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  613. }
  614. /**
  615. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  616. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  617. * @param DMA2Dx DMA2D Instance
  618. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  619. * @retval None
  620. */
  621. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  622. {
  623. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  624. }
  625. /**
  626. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  627. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  628. * @param DMA2Dx DMA2D Instance
  629. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  630. */
  631. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  632. {
  633. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  634. }
  635. /**
  636. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  637. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  638. * @param DMA2Dx DMA2D Instance
  639. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  640. * @retval None
  641. */
  642. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  643. {
  644. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  645. }
  646. /**
  647. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  648. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  649. * @param DMA2Dx DMA2D Instance
  650. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  651. */
  652. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  653. {
  654. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  655. }
  656. /**
  657. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  658. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  659. * RGB565, ARGB1555 or ARGB4444.
  660. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  661. * with respect to color mode is not done by the user code.
  662. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  663. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  664. * OCOLR RED LL_DMA2D_SetOutputColor\n
  665. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  666. * @param DMA2Dx DMA2D Instance
  667. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  668. * @retval None
  669. */
  670. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  671. {
  672. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  673. OutputColor);
  674. }
  675. /**
  676. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  677. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  678. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  679. * as set by @ref LL_DMA2D_SetOutputColorMode.
  680. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  681. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  682. * OCOLR RED LL_DMA2D_GetOutputColor\n
  683. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  684. * @param DMA2Dx DMA2D Instance
  685. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  686. */
  687. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  688. {
  689. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  690. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  691. }
  692. /**
  693. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  694. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  695. * @param DMA2Dx DMA2D Instance
  696. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  697. * @retval None
  698. */
  699. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  700. {
  701. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  702. }
  703. /**
  704. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  705. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  706. * @param DMA2Dx DMA2D Instance
  707. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  708. */
  709. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  710. {
  711. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  712. }
  713. /**
  714. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  715. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  716. * @param DMA2Dx DMA2D Instance
  717. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  718. * @retval None
  719. */
  720. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  721. {
  722. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  723. }
  724. /**
  725. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  726. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  727. * @param DMA2Dx DMA2D Instance
  728. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  729. */
  730. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  731. {
  732. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  733. }
  734. /**
  735. * @brief Enable DMA2D dead time functionality.
  736. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  737. * @param DMA2Dx DMA2D Instance
  738. * @retval None
  739. */
  740. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  741. {
  742. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  743. }
  744. /**
  745. * @brief Disable DMA2D dead time functionality.
  746. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  747. * @param DMA2Dx DMA2D Instance
  748. * @retval None
  749. */
  750. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  751. {
  752. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  753. }
  754. /**
  755. * @brief Indicate if DMA2D dead time functionality is enabled.
  756. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  757. * @param DMA2Dx DMA2D Instance
  758. * @retval State of bit (1 or 0).
  759. */
  760. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  761. {
  762. return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
  763. }
  764. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  765. * @{
  766. */
  767. /**
  768. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  769. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  770. * @param DMA2Dx DMA2D Instance
  771. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  772. * @retval None
  773. */
  774. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  775. {
  776. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  777. }
  778. /**
  779. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  780. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  781. * @param DMA2Dx DMA2D Instance
  782. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  783. */
  784. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  785. {
  786. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  787. }
  788. /**
  789. * @brief Enable DMA2D foreground CLUT loading.
  790. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  791. * @param DMA2Dx DMA2D Instance
  792. * @retval None
  793. */
  794. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  795. {
  796. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  797. }
  798. /**
  799. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  800. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  801. * @param DMA2Dx DMA2D Instance
  802. * @retval State of bit (1 or 0).
  803. */
  804. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  805. {
  806. return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
  807. }
  808. /**
  809. * @brief Set DMA2D foreground color mode.
  810. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  811. * @param DMA2Dx DMA2D Instance
  812. * @param ColorMode This parameter can be one of the following values:
  813. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  814. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  815. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  816. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  817. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  818. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  819. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  820. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  821. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  822. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  823. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  824. * @retval None
  825. */
  826. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  827. {
  828. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  829. }
  830. /**
  831. * @brief Return DMA2D foreground color mode.
  832. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  833. * @param DMA2Dx DMA2D Instance
  834. * @retval Returned value can be one of the following values:
  835. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  836. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  837. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  838. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  839. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  840. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  841. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  842. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  843. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  844. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  845. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  846. */
  847. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  848. {
  849. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  850. }
  851. /**
  852. * @brief Set DMA2D foreground alpha mode.
  853. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  854. * @param DMA2Dx DMA2D Instance
  855. * @param AphaMode This parameter can be one of the following values:
  856. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  857. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  858. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  859. * @retval None
  860. */
  861. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  862. {
  863. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  864. }
  865. /**
  866. * @brief Return DMA2D foreground alpha mode.
  867. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  868. * @param DMA2Dx DMA2D Instance
  869. * @retval Returned value can be one of the following values:
  870. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  871. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  872. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  873. */
  874. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  875. {
  876. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  877. }
  878. /**
  879. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  880. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  881. * @param DMA2Dx DMA2D Instance
  882. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  883. * @retval None
  884. */
  885. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  886. {
  887. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  888. }
  889. /**
  890. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  891. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  892. * @param DMA2Dx DMA2D Instance
  893. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  894. */
  895. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  896. {
  897. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  898. }
  899. /**
  900. * @brief Set DMA2D foreground Red Blue swap mode.
  901. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode
  902. * @param DMA2Dx DMA2D Instance
  903. * @param RBSwapMode This parameter can be one of the following values:
  904. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  905. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  906. * @retval None
  907. */
  908. __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  909. {
  910. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
  911. }
  912. /**
  913. * @brief Return DMA2D foreground Red Blue swap mode.
  914. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode
  915. * @param DMA2Dx DMA2D Instance
  916. * @retval Returned value can be one of the following values:
  917. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  918. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  919. */
  920. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  921. {
  922. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
  923. }
  924. /**
  925. * @brief Set DMA2D foreground alpha inversion mode.
  926. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode
  927. * @param DMA2Dx DMA2D Instance
  928. * @param AlphaInversionMode This parameter can be one of the following values:
  929. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  930. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  931. * @retval None
  932. */
  933. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  934. {
  935. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
  936. }
  937. /**
  938. * @brief Return DMA2D foreground alpha inversion mode.
  939. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode
  940. * @param DMA2Dx DMA2D Instance
  941. * @retval Returned value can be one of the following values:
  942. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  943. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  944. */
  945. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  946. {
  947. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
  948. }
  949. /**
  950. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  951. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  952. * @param DMA2Dx DMA2D Instance
  953. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  954. * @retval None
  955. */
  956. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  957. {
  958. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  959. }
  960. /**
  961. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  962. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  963. * @param DMA2Dx DMA2D Instance
  964. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  965. */
  966. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  967. {
  968. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  969. }
  970. /**
  971. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  972. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  973. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  974. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  975. * @param DMA2Dx DMA2D Instance
  976. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  977. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  978. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  979. * @retval None
  980. */
  981. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  982. {
  983. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  984. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  985. }
  986. /**
  987. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  988. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  989. * @param DMA2Dx DMA2D Instance
  990. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  991. * @retval None
  992. */
  993. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  994. {
  995. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  996. }
  997. /**
  998. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  999. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  1000. * @param DMA2Dx DMA2D Instance
  1001. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1002. */
  1003. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1004. {
  1005. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  1006. }
  1007. /**
  1008. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1009. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  1010. * @param DMA2Dx DMA2D Instance
  1011. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1012. * @retval None
  1013. */
  1014. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1015. {
  1016. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  1017. }
  1018. /**
  1019. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1020. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  1021. * @param DMA2Dx DMA2D Instance
  1022. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1023. */
  1024. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1025. {
  1026. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  1027. }
  1028. /**
  1029. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1030. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  1031. * @param DMA2Dx DMA2D Instance
  1032. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1033. * @retval None
  1034. */
  1035. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1036. {
  1037. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  1038. }
  1039. /**
  1040. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1041. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  1042. * @param DMA2Dx DMA2D Instance
  1043. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1044. */
  1045. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1046. {
  1047. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  1048. }
  1049. /**
  1050. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1051. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  1052. * @param DMA2Dx DMA2D Instance
  1053. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1054. * @retval None
  1055. */
  1056. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1057. {
  1058. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  1059. }
  1060. /**
  1061. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1062. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  1063. * @param DMA2Dx DMA2D Instance
  1064. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1065. */
  1066. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1067. {
  1068. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  1069. }
  1070. /**
  1071. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1072. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  1073. * @param DMA2Dx DMA2D Instance
  1074. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1075. * @retval None
  1076. */
  1077. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1078. {
  1079. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  1080. }
  1081. /**
  1082. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1083. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  1084. * @param DMA2Dx DMA2D Instance
  1085. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  1086. */
  1087. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1088. {
  1089. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  1090. }
  1091. /**
  1092. * @brief Set DMA2D foreground CLUT color mode.
  1093. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  1094. * @param DMA2Dx DMA2D Instance
  1095. * @param CLUTColorMode This parameter can be one of the following values:
  1096. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1097. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1098. * @retval None
  1099. */
  1100. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1101. {
  1102. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1103. }
  1104. /**
  1105. * @brief Return DMA2D foreground CLUT color mode.
  1106. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1107. * @param DMA2Dx DMA2D Instance
  1108. * @retval Returned value can be one of the following values:
  1109. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1110. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1111. */
  1112. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1113. {
  1114. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1115. }
  1116. /**
  1117. * @}
  1118. */
  1119. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1120. * @{
  1121. */
  1122. /**
  1123. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1124. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1125. * @param DMA2Dx DMA2D Instance
  1126. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1127. * @retval None
  1128. */
  1129. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1130. {
  1131. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1132. }
  1133. /**
  1134. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1135. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1136. * @param DMA2Dx DMA2D Instance
  1137. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1138. */
  1139. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1140. {
  1141. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1142. }
  1143. /**
  1144. * @brief Enable DMA2D background CLUT loading.
  1145. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1146. * @param DMA2Dx DMA2D Instance
  1147. * @retval None
  1148. */
  1149. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1150. {
  1151. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1152. }
  1153. /**
  1154. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1155. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1156. * @param DMA2Dx DMA2D Instance
  1157. * @retval State of bit (1 or 0).
  1158. */
  1159. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1160. {
  1161. return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
  1162. }
  1163. /**
  1164. * @brief Set DMA2D background color mode.
  1165. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1166. * @param DMA2Dx DMA2D Instance
  1167. * @param ColorMode This parameter can be one of the following values:
  1168. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1169. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1170. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1171. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1172. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1173. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1174. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1175. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1176. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1177. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1178. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1179. * @retval None
  1180. */
  1181. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1182. {
  1183. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1184. }
  1185. /**
  1186. * @brief Return DMA2D background color mode.
  1187. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1188. * @param DMA2Dx DMA2D Instance
  1189. * @retval Returned value can be one of the following values:
  1190. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1191. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1192. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1193. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1194. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1195. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1196. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1197. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1198. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1199. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1200. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1201. */
  1202. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1203. {
  1204. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1205. }
  1206. /**
  1207. * @brief Set DMA2D background alpha mode.
  1208. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1209. * @param DMA2Dx DMA2D Instance
  1210. * @param AphaMode This parameter can be one of the following values:
  1211. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1212. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1213. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1214. * @retval None
  1215. */
  1216. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1217. {
  1218. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1219. }
  1220. /**
  1221. * @brief Return DMA2D background alpha mode.
  1222. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1223. * @param DMA2Dx DMA2D Instance
  1224. * @retval Returned value can be one of the following values:
  1225. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1226. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1227. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1228. */
  1229. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1230. {
  1231. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1232. }
  1233. /**
  1234. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1235. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1236. * @param DMA2Dx DMA2D Instance
  1237. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1238. * @retval None
  1239. */
  1240. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1241. {
  1242. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1243. }
  1244. /**
  1245. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1246. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1247. * @param DMA2Dx DMA2D Instance
  1248. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1249. */
  1250. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1251. {
  1252. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1253. }
  1254. /**
  1255. * @brief Set DMA2D background Red Blue swap mode.
  1256. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode
  1257. * @param DMA2Dx DMA2D Instance
  1258. * @param RBSwapMode This parameter can be one of the following values:
  1259. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1260. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1261. * @retval None
  1262. */
  1263. __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  1264. {
  1265. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
  1266. }
  1267. /**
  1268. * @brief Return DMA2D background Red Blue swap mode.
  1269. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode
  1270. * @param DMA2Dx DMA2D Instance
  1271. * @retval Returned value can be one of the following values:
  1272. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1273. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1274. */
  1275. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  1276. {
  1277. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
  1278. }
  1279. /**
  1280. * @brief Set DMA2D background alpha inversion mode.
  1281. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode
  1282. * @param DMA2Dx DMA2D Instance
  1283. * @param AlphaInversionMode This parameter can be one of the following values:
  1284. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1285. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1286. * @retval None
  1287. */
  1288. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1289. {
  1290. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
  1291. }
  1292. /**
  1293. * @brief Return DMA2D background alpha inversion mode.
  1294. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode
  1295. * @param DMA2Dx DMA2D Instance
  1296. * @retval Returned value can be one of the following values:
  1297. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1298. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1299. */
  1300. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  1301. {
  1302. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
  1303. }
  1304. /**
  1305. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1306. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1307. * @param DMA2Dx DMA2D Instance
  1308. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1309. * @retval None
  1310. */
  1311. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1312. {
  1313. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1314. }
  1315. /**
  1316. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1317. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1318. * @param DMA2Dx DMA2D Instance
  1319. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1320. */
  1321. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1322. {
  1323. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1324. }
  1325. /**
  1326. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1327. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1328. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1329. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1330. * @param DMA2Dx DMA2D Instance
  1331. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1332. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1333. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1334. * @retval None
  1335. */
  1336. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1337. {
  1338. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1339. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1340. }
  1341. /**
  1342. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1343. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1344. * @param DMA2Dx DMA2D Instance
  1345. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1346. * @retval None
  1347. */
  1348. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1349. {
  1350. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1351. }
  1352. /**
  1353. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1354. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1355. * @param DMA2Dx DMA2D Instance
  1356. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1357. */
  1358. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1359. {
  1360. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1361. }
  1362. /**
  1363. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1364. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1365. * @param DMA2Dx DMA2D Instance
  1366. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1367. * @retval None
  1368. */
  1369. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1370. {
  1371. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1372. }
  1373. /**
  1374. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1375. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1376. * @param DMA2Dx DMA2D Instance
  1377. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1378. */
  1379. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1380. {
  1381. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1382. }
  1383. /**
  1384. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1385. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1386. * @param DMA2Dx DMA2D Instance
  1387. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1388. * @retval None
  1389. */
  1390. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1391. {
  1392. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1393. }
  1394. /**
  1395. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1396. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1397. * @param DMA2Dx DMA2D Instance
  1398. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1399. */
  1400. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1401. {
  1402. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1403. }
  1404. /**
  1405. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1406. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1407. * @param DMA2Dx DMA2D Instance
  1408. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1409. * @retval None
  1410. */
  1411. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1412. {
  1413. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1414. }
  1415. /**
  1416. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1417. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1418. * @param DMA2Dx DMA2D Instance
  1419. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1420. */
  1421. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1422. {
  1423. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1424. }
  1425. /**
  1426. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1427. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1428. * @param DMA2Dx DMA2D Instance
  1429. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1430. * @retval None
  1431. */
  1432. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1433. {
  1434. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1435. }
  1436. /**
  1437. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1438. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1439. * @param DMA2Dx DMA2D Instance
  1440. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1441. */
  1442. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1443. {
  1444. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1445. }
  1446. /**
  1447. * @brief Set DMA2D background CLUT color mode.
  1448. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1449. * @param DMA2Dx DMA2D Instance
  1450. * @param CLUTColorMode This parameter can be one of the following values:
  1451. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1452. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1453. * @retval None
  1454. */
  1455. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1456. {
  1457. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1458. }
  1459. /**
  1460. * @brief Return DMA2D background CLUT color mode.
  1461. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1462. * @param DMA2Dx DMA2D Instance
  1463. * @retval Returned value can be one of the following values:
  1464. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1465. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1466. */
  1467. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1468. {
  1469. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1470. }
  1471. /**
  1472. * @}
  1473. */
  1474. /**
  1475. * @}
  1476. */
  1477. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1478. * @{
  1479. */
  1480. /**
  1481. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1482. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1483. * @param DMA2Dx DMA2D Instance
  1484. * @retval State of bit (1 or 0).
  1485. */
  1486. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1487. {
  1488. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
  1489. }
  1490. /**
  1491. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1492. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1493. * @param DMA2Dx DMA2D Instance
  1494. * @retval State of bit (1 or 0).
  1495. */
  1496. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1497. {
  1498. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
  1499. }
  1500. /**
  1501. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1502. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1503. * @param DMA2Dx DMA2D Instance
  1504. * @retval State of bit (1 or 0).
  1505. */
  1506. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1507. {
  1508. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
  1509. }
  1510. /**
  1511. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1512. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1513. * @param DMA2Dx DMA2D Instance
  1514. * @retval State of bit (1 or 0).
  1515. */
  1516. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1517. {
  1518. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
  1519. }
  1520. /**
  1521. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1522. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1523. * @param DMA2Dx DMA2D Instance
  1524. * @retval State of bit (1 or 0).
  1525. */
  1526. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1527. {
  1528. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
  1529. }
  1530. /**
  1531. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1532. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1533. * @param DMA2Dx DMA2D Instance
  1534. * @retval State of bit (1 or 0).
  1535. */
  1536. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1537. {
  1538. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
  1539. }
  1540. /**
  1541. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1542. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1543. * @param DMA2Dx DMA2D Instance
  1544. * @retval None
  1545. */
  1546. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1547. {
  1548. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1549. }
  1550. /**
  1551. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1552. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1553. * @param DMA2Dx DMA2D Instance
  1554. * @retval None
  1555. */
  1556. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1557. {
  1558. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1559. }
  1560. /**
  1561. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1562. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1563. * @param DMA2Dx DMA2D Instance
  1564. * @retval None
  1565. */
  1566. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1567. {
  1568. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1569. }
  1570. /**
  1571. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1572. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1573. * @param DMA2Dx DMA2D Instance
  1574. * @retval None
  1575. */
  1576. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1577. {
  1578. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1579. }
  1580. /**
  1581. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1582. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1583. * @param DMA2Dx DMA2D Instance
  1584. * @retval None
  1585. */
  1586. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1587. {
  1588. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1589. }
  1590. /**
  1591. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1592. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1593. * @param DMA2Dx DMA2D Instance
  1594. * @retval None
  1595. */
  1596. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1597. {
  1598. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1599. }
  1600. /**
  1601. * @}
  1602. */
  1603. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1604. * @{
  1605. */
  1606. /**
  1607. * @brief Enable Configuration Error Interrupt
  1608. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1609. * @param DMA2Dx DMA2D Instance
  1610. * @retval None
  1611. */
  1612. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1613. {
  1614. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1615. }
  1616. /**
  1617. * @brief Enable CLUT Transfer Complete Interrupt
  1618. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1619. * @param DMA2Dx DMA2D Instance
  1620. * @retval None
  1621. */
  1622. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1623. {
  1624. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1625. }
  1626. /**
  1627. * @brief Enable CLUT Access Error Interrupt
  1628. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1629. * @param DMA2Dx DMA2D Instance
  1630. * @retval None
  1631. */
  1632. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1633. {
  1634. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1635. }
  1636. /**
  1637. * @brief Enable Transfer Watermark Interrupt
  1638. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1639. * @param DMA2Dx DMA2D Instance
  1640. * @retval None
  1641. */
  1642. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1643. {
  1644. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1645. }
  1646. /**
  1647. * @brief Enable Transfer Complete Interrupt
  1648. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1649. * @param DMA2Dx DMA2D Instance
  1650. * @retval None
  1651. */
  1652. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1653. {
  1654. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1655. }
  1656. /**
  1657. * @brief Enable Transfer Error Interrupt
  1658. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1659. * @param DMA2Dx DMA2D Instance
  1660. * @retval None
  1661. */
  1662. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1663. {
  1664. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1665. }
  1666. /**
  1667. * @brief Disable Configuration Error Interrupt
  1668. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1669. * @param DMA2Dx DMA2D Instance
  1670. * @retval None
  1671. */
  1672. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1673. {
  1674. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1675. }
  1676. /**
  1677. * @brief Disable CLUT Transfer Complete Interrupt
  1678. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1679. * @param DMA2Dx DMA2D Instance
  1680. * @retval None
  1681. */
  1682. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1683. {
  1684. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1685. }
  1686. /**
  1687. * @brief Disable CLUT Access Error Interrupt
  1688. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1689. * @param DMA2Dx DMA2D Instance
  1690. * @retval None
  1691. */
  1692. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1693. {
  1694. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1695. }
  1696. /**
  1697. * @brief Disable Transfer Watermark Interrupt
  1698. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1699. * @param DMA2Dx DMA2D Instance
  1700. * @retval None
  1701. */
  1702. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1703. {
  1704. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1705. }
  1706. /**
  1707. * @brief Disable Transfer Complete Interrupt
  1708. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1709. * @param DMA2Dx DMA2D Instance
  1710. * @retval None
  1711. */
  1712. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1713. {
  1714. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1715. }
  1716. /**
  1717. * @brief Disable Transfer Error Interrupt
  1718. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1719. * @param DMA2Dx DMA2D Instance
  1720. * @retval None
  1721. */
  1722. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1723. {
  1724. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1725. }
  1726. /**
  1727. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1728. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1729. * @param DMA2Dx DMA2D Instance
  1730. * @retval State of bit (1 or 0).
  1731. */
  1732. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1733. {
  1734. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
  1735. }
  1736. /**
  1737. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1738. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1739. * @param DMA2Dx DMA2D Instance
  1740. * @retval State of bit (1 or 0).
  1741. */
  1742. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1743. {
  1744. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
  1745. }
  1746. /**
  1747. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1748. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1749. * @param DMA2Dx DMA2D Instance
  1750. * @retval State of bit (1 or 0).
  1751. */
  1752. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1753. {
  1754. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
  1755. }
  1756. /**
  1757. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1758. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1759. * @param DMA2Dx DMA2D Instance
  1760. * @retval State of bit (1 or 0).
  1761. */
  1762. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1763. {
  1764. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
  1765. }
  1766. /**
  1767. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1768. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1769. * @param DMA2Dx DMA2D Instance
  1770. * @retval State of bit (1 or 0).
  1771. */
  1772. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1773. {
  1774. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
  1775. }
  1776. /**
  1777. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1778. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1779. * @param DMA2Dx DMA2D Instance
  1780. * @retval State of bit (1 or 0).
  1781. */
  1782. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1783. {
  1784. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
  1785. }
  1786. /**
  1787. * @}
  1788. */
  1789. #if defined(USE_FULL_LL_DRIVER)
  1790. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1791. * @{
  1792. */
  1793. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1794. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1795. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1796. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1797. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1798. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1799. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1800. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1801. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1802. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1803. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1804. /**
  1805. * @}
  1806. */
  1807. #endif /* USE_FULL_LL_DRIVER */
  1808. /**
  1809. * @}
  1810. */
  1811. /**
  1812. * @}
  1813. */
  1814. #endif /* defined (DMA2D) */
  1815. /**
  1816. * @}
  1817. */
  1818. #ifdef __cplusplus
  1819. }
  1820. #endif
  1821. #endif /* __STM32L4xx_LL_DMA2D_H */
  1822. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/