stm32l4xx_ll_lptim.h 53 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_ll_lptim.h
  4. * @author MCD Application Team
  5. * @version V1.7.2
  6. * @date 16-June-2017
  7. * @brief Header file of LPTIM LL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32L4xx_LL_LPTIM_H
  39. #define __STM32L4xx_LL_LPTIM_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32l4xx.h"
  45. /** @addtogroup STM32L4xx_LL_Driver
  46. * @{
  47. */
  48. #if defined (LPTIM1) || defined (LPTIM2)
  49. /** @defgroup LPTIM_LL LPTIM
  50. * @{
  51. */
  52. /* Private types -------------------------------------------------------------*/
  53. /* Private variables ---------------------------------------------------------*/
  54. /* Private constants ---------------------------------------------------------*/
  55. /* Private macros ------------------------------------------------------------*/
  56. #if defined(USE_FULL_LL_DRIVER)
  57. /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
  58. * @{
  59. */
  60. /**
  61. * @}
  62. */
  63. #endif /*USE_FULL_LL_DRIVER*/
  64. /* Exported types ------------------------------------------------------------*/
  65. #if defined(USE_FULL_LL_DRIVER)
  66. /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
  67. * @{
  68. */
  69. /**
  70. * @brief LPTIM Init structure definition
  71. */
  72. typedef struct
  73. {
  74. uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
  75. This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
  76. This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
  77. uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
  78. This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
  79. This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
  80. uint32_t Waveform; /*!< Specifies the waveform shape.
  81. This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
  82. This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
  83. uint32_t Polarity; /*!< Specifies waveform polarity.
  84. This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
  85. This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
  86. } LL_LPTIM_InitTypeDef;
  87. /**
  88. * @}
  89. */
  90. #endif /* USE_FULL_LL_DRIVER */
  91. /* Exported constants --------------------------------------------------------*/
  92. /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
  93. * @{
  94. */
  95. /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
  96. * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
  97. * @{
  98. */
  99. #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
  100. #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
  101. #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
  102. #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
  103. #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
  104. #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
  105. #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
  106. /**
  107. * @}
  108. */
  109. /** @defgroup LPTIM_LL_EC_IT IT Defines
  110. * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
  111. * @{
  112. */
  113. #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match Interrupt Enable */
  114. #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match Interrupt Enable */
  115. #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger valid edge Interrupt Enable */
  116. #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK Interrupt Enable */
  117. #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK Interrupt Enable */
  118. #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Direction change to UP Interrupt Enable */
  119. #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Direction change to down Interrupt Enable */
  120. /**
  121. * @}
  122. */
  123. /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
  124. * @{
  125. */
  126. #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
  127. #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
  128. /**
  129. * @}
  130. */
  131. /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
  132. * @{
  133. */
  134. #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
  135. #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
  136. /**
  137. * @}
  138. */
  139. /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
  140. * @{
  141. */
  142. #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
  143. #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
  144. /**
  145. * @}
  146. */
  147. /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
  148. * @{
  149. */
  150. #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/
  151. #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
  152. /**
  153. * @}
  154. */
  155. /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
  156. * @{
  157. */
  158. #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
  159. #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
  160. /**
  161. * @}
  162. */
  163. /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
  164. * @{
  165. */
  166. #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
  167. #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
  168. #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
  169. #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
  170. #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
  171. #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
  172. #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
  173. #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
  174. /**
  175. * @}
  176. */
  177. /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
  178. * @{
  179. */
  180. #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
  181. #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
  182. #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
  183. #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
  184. #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
  185. #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
  186. #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
  187. #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
  188. /**
  189. * @}
  190. */
  191. /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
  192. * @{
  193. */
  194. #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
  195. #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
  196. #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
  197. #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
  198. /**
  199. * @}
  200. */
  201. /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
  202. * @{
  203. */
  204. #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
  205. #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
  206. #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
  207. /**
  208. * @}
  209. */
  210. /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
  211. * @{
  212. */
  213. #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
  214. #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
  215. /**
  216. * @}
  217. */
  218. /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
  219. * @{
  220. */
  221. #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
  222. #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
  223. #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
  224. #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
  225. /**
  226. * @}
  227. */
  228. /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
  229. * @{
  230. */
  231. #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
  232. #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
  233. #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
  234. /**
  235. * @}
  236. */
  237. /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
  238. * @{
  239. */
  240. #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
  241. #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
  242. #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
  243. /**
  244. * @}
  245. */
  246. /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
  247. * @{
  248. */
  249. #define LL_LPTIM_INPUT1_SRC_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */
  250. #define LL_LPTIM_INPUT1_SRC_COMP1 LPTIM_OR_OR_0 /*!< For LPTIM1 and LPTIM2 */
  251. #define LL_LPTIM_INPUT1_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM2 */
  252. #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2 LPTIM_OR_OR /*!< For LPTIM2 */
  253. /**
  254. * @}
  255. */
  256. /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
  257. * @{
  258. */
  259. #define LL_LPTIM_INPUT2_SRC_GPIO 0x00000000U /*!< For LPTIM1 */
  260. #define LL_LPTIM_INPUT2_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM1 */
  261. /**
  262. * @}
  263. */
  264. /**
  265. * @}
  266. */
  267. /* Exported macro ------------------------------------------------------------*/
  268. /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
  269. * @{
  270. */
  271. /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
  272. * @{
  273. */
  274. /**
  275. * @brief Write a value in LPTIM register
  276. * @param __INSTANCE__ LPTIM Instance
  277. * @param __REG__ Register to be written
  278. * @param __VALUE__ Value to be written in the register
  279. * @retval None
  280. */
  281. #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  282. /**
  283. * @brief Read a value in LPTIM register
  284. * @param __INSTANCE__ LPTIM Instance
  285. * @param __REG__ Register to be read
  286. * @retval Register value
  287. */
  288. #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  289. /**
  290. * @}
  291. */
  292. /**
  293. * @}
  294. */
  295. /* Exported functions --------------------------------------------------------*/
  296. /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
  297. * @{
  298. */
  299. /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
  300. * @{
  301. */
  302. /**
  303. * @brief Enable the LPTIM instance
  304. * @note After setting the ENABLE bit, a delay of two counter clock is needed
  305. * before the LPTIM instance is actually enabled.
  306. * @rmtoll CR ENABLE LL_LPTIM_Enable
  307. * @param LPTIMx Low-Power Timer instance
  308. * @retval None
  309. */
  310. __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
  311. {
  312. SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
  313. }
  314. /**
  315. * @brief Disable the LPTIM instance
  316. * @rmtoll CR ENABLE LL_LPTIM_Disable
  317. * @param LPTIMx Low-Power Timer instance
  318. * @retval None
  319. */
  320. __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
  321. {
  322. CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
  323. }
  324. /**
  325. * @brief Indicates whether the LPTIM instance is enabled.
  326. * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
  327. * @param LPTIMx Low-Power Timer instance
  328. * @retval State of bit (1 or 0).
  329. */
  330. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
  331. {
  332. return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
  333. }
  334. /**
  335. * @brief Starts the LPTIM counter in the desired mode.
  336. * @note LPTIM instance must be enabled before starting the counter.
  337. * @note It is possible to change on the fly from One Shot mode to
  338. * Continuous mode.
  339. * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
  340. * CR SNGSTRT LL_LPTIM_StartCounter
  341. * @param LPTIMx Low-Power Timer instance
  342. * @param OperatingMode This parameter can be one of the following values:
  343. * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
  344. * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
  345. * @retval None
  346. */
  347. __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
  348. {
  349. MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
  350. }
  351. /**
  352. * @brief Set the LPTIM registers update mode (enable/disable register preload)
  353. * @note This function must be called when the LPTIM instance is disabled.
  354. * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
  355. * @param LPTIMx Low-Power Timer instance
  356. * @param UpdateMode This parameter can be one of the following values:
  357. * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
  358. * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
  359. * @retval None
  360. */
  361. __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
  362. {
  363. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
  364. }
  365. /**
  366. * @brief Get the LPTIM registers update mode
  367. * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
  368. * @param LPTIMx Low-Power Timer instance
  369. * @retval Returned value can be one of the following values:
  370. * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
  371. * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
  372. */
  373. __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
  374. {
  375. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
  376. }
  377. /**
  378. * @brief Set the auto reload value
  379. * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
  380. * @note After a write to the LPTIMx_ARR register a new write operation to the
  381. * same register can only be performed when the previous write operation
  382. * is completed. Any successive write before the ARROK flag be set, will
  383. * lead to unpredictable results.
  384. * @note autoreload value be strictly greater than the compare value.
  385. * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
  386. * @param LPTIMx Low-Power Timer instance
  387. * @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
  388. * @retval None
  389. */
  390. __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
  391. {
  392. MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
  393. }
  394. /**
  395. * @brief Get actual auto reload value
  396. * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
  397. * @param LPTIMx Low-Power Timer instance
  398. * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
  399. */
  400. __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
  401. {
  402. return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
  403. }
  404. /**
  405. * @brief Set the compare value
  406. * @note After a write to the LPTIMx_CMP register a new write operation to the
  407. * same register can only be performed when the previous write operation
  408. * is completed. Any successive write before the CMPOK flag be set, will
  409. * lead to unpredictable results.
  410. * @rmtoll CMP CMP LL_LPTIM_SetCompare
  411. * @param LPTIMx Low-Power Timer instance
  412. * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
  413. * @retval None
  414. */
  415. __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
  416. {
  417. MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
  418. }
  419. /**
  420. * @brief Get actual compare value
  421. * @rmtoll CMP CMP LL_LPTIM_GetCompare
  422. * @param LPTIMx Low-Power Timer instance
  423. * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
  424. */
  425. __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
  426. {
  427. return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
  428. }
  429. /**
  430. * @brief Get actual counter value
  431. * @note When the LPTIM instance is running with an asynchronous clock, reading
  432. * the LPTIMx_CNT register may return unreliable values. So in this case
  433. * it is necessary to perform two consecutive read accesses and verify
  434. * that the two returned values are identical.
  435. * @rmtoll CNT CNT LL_LPTIM_GetCounter
  436. * @param LPTIMx Low-Power Timer instance
  437. * @retval Counter value
  438. */
  439. __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
  440. {
  441. return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
  442. }
  443. /**
  444. * @brief Set the counter mode (selection of the LPTIM counter clock source).
  445. * @note The counter mode can be set only when the LPTIM instance is disabled.
  446. * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
  447. * @param LPTIMx Low-Power Timer instance
  448. * @param CounterMode This parameter can be one of the following values:
  449. * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
  450. * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
  451. * @retval None
  452. */
  453. __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
  454. {
  455. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
  456. }
  457. /**
  458. * @brief Get the counter mode
  459. * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
  460. * @param LPTIMx Low-Power Timer instance
  461. * @retval Returned value can be one of the following values:
  462. * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
  463. * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
  464. */
  465. __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
  466. {
  467. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
  468. }
  469. /**
  470. * @brief Configure the LPTIM instance output (LPTIMx_OUT)
  471. * @note This function must be called when the LPTIM instance is disabled.
  472. * @note Regarding the LPTIM output polarity the change takes effect
  473. * immediately, so the output default value will change immediately after
  474. * the polarity is re-configured, even before the timer is enabled.
  475. * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
  476. * CFGR WAVPOL LL_LPTIM_ConfigOutput
  477. * @param LPTIMx Low-Power Timer instance
  478. * @param Waveform This parameter can be one of the following values:
  479. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
  480. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
  481. * @param Polarity This parameter can be one of the following values:
  482. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
  483. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
  484. * @retval None
  485. */
  486. __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
  487. {
  488. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
  489. }
  490. /**
  491. * @brief Set waveform shape
  492. * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
  493. * @param LPTIMx Low-Power Timer instance
  494. * @param Waveform This parameter can be one of the following values:
  495. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
  496. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
  497. * @retval None
  498. */
  499. __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
  500. {
  501. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
  502. }
  503. /**
  504. * @brief Get actual waveform shape
  505. * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
  506. * @param LPTIMx Low-Power Timer instance
  507. * @retval Returned value can be one of the following values:
  508. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
  509. * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
  510. */
  511. __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
  512. {
  513. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
  514. }
  515. /**
  516. * @brief Set output polarity
  517. * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
  518. * @param LPTIMx Low-Power Timer instance
  519. * @param Polarity This parameter can be one of the following values:
  520. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
  521. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
  522. * @retval None
  523. */
  524. __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
  525. {
  526. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
  527. }
  528. /**
  529. * @brief Get actual output polarity
  530. * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
  531. * @param LPTIMx Low-Power Timer instance
  532. * @retval Returned value can be one of the following values:
  533. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
  534. * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
  535. */
  536. __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
  537. {
  538. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
  539. }
  540. /**
  541. * @brief Set actual prescaler division ratio.
  542. * @note This function must be called when the LPTIM instance is disabled.
  543. * @note When the LPTIM is configured to be clocked by an internal clock source
  544. * and the LPTIM counter is configured to be updated by active edges
  545. * detected on the LPTIM external Input1, the internal clock provided to
  546. * the LPTIM must be not be prescaled.
  547. * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
  548. * @param LPTIMx Low-Power Timer instance
  549. * @param Prescaler This parameter can be one of the following values:
  550. * @arg @ref LL_LPTIM_PRESCALER_DIV1
  551. * @arg @ref LL_LPTIM_PRESCALER_DIV2
  552. * @arg @ref LL_LPTIM_PRESCALER_DIV4
  553. * @arg @ref LL_LPTIM_PRESCALER_DIV8
  554. * @arg @ref LL_LPTIM_PRESCALER_DIV16
  555. * @arg @ref LL_LPTIM_PRESCALER_DIV32
  556. * @arg @ref LL_LPTIM_PRESCALER_DIV64
  557. * @arg @ref LL_LPTIM_PRESCALER_DIV128
  558. * @retval None
  559. */
  560. __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
  561. {
  562. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
  563. }
  564. /**
  565. * @brief Get actual prescaler division ratio.
  566. * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
  567. * @param LPTIMx Low-Power Timer instance
  568. * @retval Returned value can be one of the following values:
  569. * @arg @ref LL_LPTIM_PRESCALER_DIV1
  570. * @arg @ref LL_LPTIM_PRESCALER_DIV2
  571. * @arg @ref LL_LPTIM_PRESCALER_DIV4
  572. * @arg @ref LL_LPTIM_PRESCALER_DIV8
  573. * @arg @ref LL_LPTIM_PRESCALER_DIV16
  574. * @arg @ref LL_LPTIM_PRESCALER_DIV32
  575. * @arg @ref LL_LPTIM_PRESCALER_DIV64
  576. * @arg @ref LL_LPTIM_PRESCALER_DIV128
  577. */
  578. __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
  579. {
  580. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
  581. }
  582. /**
  583. * @brief Set LPTIM input 1 source (default GPIO).
  584. * @rmtoll OR OR_0 LL_LPTIM_SetInput1Src
  585. * @rmtoll OR OR_1 LL_LPTIM_SetInput1Src
  586. * @param LPTIMx Low-Power Timer instance
  587. * @param Src This parameter can be one of the following values:
  588. * @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
  589. * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
  590. * @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
  591. * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
  592. * @retval None
  593. */
  594. __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
  595. {
  596. WRITE_REG(LPTIMx->OR, Src);
  597. }
  598. /**
  599. * @brief Set LPTIM input 2 source (default GPIO).
  600. * @rmtoll OR OR_0 LL_LPTIM_SetInput2Src
  601. * @param LPTIMx Low-Power Timer instance
  602. * @param Src This parameter can be one of the following values:
  603. * @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
  604. * @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
  605. * @retval None
  606. */
  607. __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
  608. {
  609. WRITE_REG(LPTIMx->OR, Src);
  610. }
  611. /**
  612. * @}
  613. */
  614. /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
  615. * @{
  616. */
  617. /**
  618. * @brief Enable the timeout function
  619. * @note This function must be called when the LPTIM instance is disabled.
  620. * @note The first trigger event will start the timer, any successive trigger
  621. * event will reset the counter and the timer will restart.
  622. * @note The timeout value corresponds to the compare value; if no trigger
  623. * occurs within the expected time frame, the MCU is waked-up by the
  624. * compare match event.
  625. * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
  626. * @param LPTIMx Low-Power Timer instance
  627. * @retval None
  628. */
  629. __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
  630. {
  631. SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
  632. }
  633. /**
  634. * @brief Disable the timeout function
  635. * @note This function must be called when the LPTIM instance is disabled.
  636. * @note A trigger event arriving when the timer is already started will be
  637. * ignored.
  638. * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
  639. * @param LPTIMx Low-Power Timer instance
  640. * @retval None
  641. */
  642. __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
  643. {
  644. CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
  645. }
  646. /**
  647. * @brief Indicate whether the timeout function is enabled.
  648. * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
  649. * @param LPTIMx Low-Power Timer instance
  650. * @retval State of bit (1 or 0).
  651. */
  652. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
  653. {
  654. return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
  655. }
  656. /**
  657. * @brief Start the LPTIM counter
  658. * @note This function must be called when the LPTIM instance is disabled.
  659. * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
  660. * @param LPTIMx Low-Power Timer instance
  661. * @retval None
  662. */
  663. __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
  664. {
  665. CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
  666. }
  667. /**
  668. * @brief Configure the external trigger used as a trigger event for the LPTIM.
  669. * @note This function must be called when the LPTIM instance is disabled.
  670. * @note An internal clock source must be present when a digital filter is
  671. * required for the trigger.
  672. * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
  673. * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
  674. * CFGR TRIGEN LL_LPTIM_ConfigTrigger
  675. * @param LPTIMx Low-Power Timer instance
  676. * @param Source This parameter can be one of the following values:
  677. * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
  678. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
  679. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
  680. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
  681. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
  682. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
  683. * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
  684. * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
  685. * @param Filter This parameter can be one of the following values:
  686. * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
  687. * @arg @ref LL_LPTIM_TRIG_FILTER_2
  688. * @arg @ref LL_LPTIM_TRIG_FILTER_4
  689. * @arg @ref LL_LPTIM_TRIG_FILTER_8
  690. * @param Polarity This parameter can be one of the following values:
  691. * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
  692. * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
  693. * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
  694. * @retval None
  695. */
  696. __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
  697. {
  698. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
  699. }
  700. /**
  701. * @brief Get actual external trigger source.
  702. * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
  703. * @param LPTIMx Low-Power Timer instance
  704. * @retval Returned value can be one of the following values:
  705. * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
  706. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
  707. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
  708. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
  709. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
  710. * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
  711. * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
  712. * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
  713. */
  714. __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
  715. {
  716. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
  717. }
  718. /**
  719. * @brief Get actual external trigger filter.
  720. * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
  721. * @param LPTIMx Low-Power Timer instance
  722. * @retval Returned value can be one of the following values:
  723. * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
  724. * @arg @ref LL_LPTIM_TRIG_FILTER_2
  725. * @arg @ref LL_LPTIM_TRIG_FILTER_4
  726. * @arg @ref LL_LPTIM_TRIG_FILTER_8
  727. */
  728. __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
  729. {
  730. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
  731. }
  732. /**
  733. * @brief Get actual external trigger polarity.
  734. * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
  735. * @param LPTIMx Low-Power Timer instance
  736. * @retval Returned value can be one of the following values:
  737. * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
  738. * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
  739. * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
  740. */
  741. __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
  742. {
  743. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
  744. }
  745. /**
  746. * @}
  747. */
  748. /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
  749. * @{
  750. */
  751. /**
  752. * @brief Set the source of the clock used by the LPTIM instance.
  753. * @note This function must be called when the LPTIM instance is disabled.
  754. * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
  755. * @param LPTIMx Low-Power Timer instance
  756. * @param ClockSource This parameter can be one of the following values:
  757. * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
  758. * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
  759. * @retval None
  760. */
  761. __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
  762. {
  763. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
  764. }
  765. /**
  766. * @brief Get actual LPTIM instance clock source.
  767. * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
  768. * @param LPTIMx Low-Power Timer instance
  769. * @retval Returned value can be one of the following values:
  770. * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
  771. * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
  772. */
  773. __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
  774. {
  775. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
  776. }
  777. /**
  778. * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
  779. * @note This function must be called when the LPTIM instance is disabled.
  780. * @note When both external clock signal edges are considered active ones,
  781. * the LPTIM must also be clocked by an internal clock source with a
  782. * frequency equal to at least four times the external clock frequency.
  783. * @note An internal clock source must be present when a digital filter is
  784. * required for external clock.
  785. * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
  786. * CFGR CKPOL LL_LPTIM_ConfigClock
  787. * @param LPTIMx Low-Power Timer instance
  788. * @param ClockFilter This parameter can be one of the following values:
  789. * @arg @ref LL_LPTIM_CLK_FILTER_NONE
  790. * @arg @ref LL_LPTIM_CLK_FILTER_2
  791. * @arg @ref LL_LPTIM_CLK_FILTER_4
  792. * @arg @ref LL_LPTIM_CLK_FILTER_8
  793. * @param ClockPolarity This parameter can be one of the following values:
  794. * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
  795. * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
  796. * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
  797. * @retval None
  798. */
  799. __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
  800. {
  801. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
  802. }
  803. /**
  804. * @brief Get actual clock polarity
  805. * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
  806. * @param LPTIMx Low-Power Timer instance
  807. * @retval Returned value can be one of the following values:
  808. * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
  809. * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
  810. * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
  811. */
  812. __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
  813. {
  814. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
  815. }
  816. /**
  817. * @brief Get actual clock digital filter
  818. * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
  819. * @param LPTIMx Low-Power Timer instance
  820. * @retval Returned value can be one of the following values:
  821. * @arg @ref LL_LPTIM_CLK_FILTER_NONE
  822. * @arg @ref LL_LPTIM_CLK_FILTER_2
  823. * @arg @ref LL_LPTIM_CLK_FILTER_4
  824. * @arg @ref LL_LPTIM_CLK_FILTER_8
  825. */
  826. __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
  827. {
  828. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
  829. }
  830. /**
  831. * @}
  832. */
  833. /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
  834. * @{
  835. */
  836. /**
  837. * @brief Configure the encoder mode.
  838. * @note This function must be called when the LPTIM instance is disabled.
  839. * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
  840. * @param LPTIMx Low-Power Timer instance
  841. * @param EncoderMode This parameter can be one of the following values:
  842. * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
  843. * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
  844. * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
  845. * @retval None
  846. */
  847. __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
  848. {
  849. MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
  850. }
  851. /**
  852. * @brief Get actual encoder mode.
  853. * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
  854. * @param LPTIMx Low-Power Timer instance
  855. * @retval Returned value can be one of the following values:
  856. * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
  857. * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
  858. * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
  859. */
  860. __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
  861. {
  862. return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
  863. }
  864. /**
  865. * @brief Enable the encoder mode
  866. * @note This function must be called when the LPTIM instance is disabled.
  867. * @note In this mode the LPTIM instance must be clocked by an internal clock
  868. * source. Also, the prescaler division ratio must be equal to 1.
  869. * @note LPTIM instance must be configured in continuous mode prior enabling
  870. * the encoder mode.
  871. * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
  872. * @param LPTIMx Low-Power Timer instance
  873. * @retval None
  874. */
  875. __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
  876. {
  877. SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
  878. }
  879. /**
  880. * @brief Disable the encoder mode
  881. * @note This function must be called when the LPTIM instance is disabled.
  882. * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
  883. * @param LPTIMx Low-Power Timer instance
  884. * @retval None
  885. */
  886. __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
  887. {
  888. CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
  889. }
  890. /**
  891. * @brief Indicates whether the LPTIM operates in encoder mode.
  892. * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
  893. * @param LPTIMx Low-Power Timer instance
  894. * @retval State of bit (1 or 0).
  895. */
  896. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
  897. {
  898. return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
  899. }
  900. /**
  901. * @}
  902. */
  903. /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
  904. * @{
  905. */
  906. /**
  907. * @brief Clear the compare match flag (CMPMCF)
  908. * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
  909. * @param LPTIMx Low-Power Timer instance
  910. * @retval None
  911. */
  912. __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
  913. {
  914. SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
  915. }
  916. /**
  917. * @brief Inform application whether a compare match interrupt has occurred.
  918. * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
  919. * @param LPTIMx Low-Power Timer instance
  920. * @retval State of bit (1 or 0).
  921. */
  922. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
  923. {
  924. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
  925. }
  926. /**
  927. * @brief Clear the autoreload match flag (ARRMCF)
  928. * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
  929. * @param LPTIMx Low-Power Timer instance
  930. * @retval None
  931. */
  932. __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
  933. {
  934. SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
  935. }
  936. /**
  937. * @brief Inform application whether a autoreload match interrupt has occured.
  938. * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
  939. * @param LPTIMx Low-Power Timer instance
  940. * @retval State of bit (1 or 0).
  941. */
  942. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
  943. {
  944. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
  945. }
  946. /**
  947. * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
  948. * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
  949. * @param LPTIMx Low-Power Timer instance
  950. * @retval None
  951. */
  952. __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  953. {
  954. SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
  955. }
  956. /**
  957. * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
  958. * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
  959. * @param LPTIMx Low-Power Timer instance
  960. * @retval State of bit (1 or 0).
  961. */
  962. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  963. {
  964. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
  965. }
  966. /**
  967. * @brief Clear the compare register update interrupt flag (CMPOKCF).
  968. * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
  969. * @param LPTIMx Low-Power Timer instance
  970. * @retval None
  971. */
  972. __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
  973. {
  974. SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
  975. }
  976. /**
  977. * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
  978. * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
  979. * @param LPTIMx Low-Power Timer instance
  980. * @retval State of bit (1 or 0).
  981. */
  982. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
  983. {
  984. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
  985. }
  986. /**
  987. * @brief Clear the autoreload register update interrupt flag (ARROKCF).
  988. * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
  989. * @param LPTIMx Low-Power Timer instance
  990. * @retval None
  991. */
  992. __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
  993. {
  994. SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
  995. }
  996. /**
  997. * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
  998. * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
  999. * @param LPTIMx Low-Power Timer instance
  1000. * @retval State of bit (1 or 0).
  1001. */
  1002. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
  1003. {
  1004. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
  1005. }
  1006. /**
  1007. * @brief Clear the counter direction change to up interrupt flag (UPCF).
  1008. * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
  1009. * @param LPTIMx Low-Power Timer instance
  1010. * @retval None
  1011. */
  1012. __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
  1013. {
  1014. SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
  1015. }
  1016. /**
  1017. * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
  1018. * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
  1019. * @param LPTIMx Low-Power Timer instance
  1020. * @retval State of bit (1 or 0).
  1021. */
  1022. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
  1023. {
  1024. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
  1025. }
  1026. /**
  1027. * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
  1028. * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
  1029. * @param LPTIMx Low-Power Timer instance
  1030. * @retval None
  1031. */
  1032. __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
  1033. {
  1034. SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
  1035. }
  1036. /**
  1037. * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
  1038. * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
  1039. * @param LPTIMx Low-Power Timer instance
  1040. * @retval State of bit (1 or 0).
  1041. */
  1042. __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
  1043. {
  1044. return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
  1045. }
  1046. /**
  1047. * @}
  1048. */
  1049. /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
  1050. * @{
  1051. */
  1052. /**
  1053. * @brief Enable compare match interrupt (CMPMIE).
  1054. * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
  1055. * @param LPTIMx Low-Power Timer instance
  1056. * @retval None
  1057. */
  1058. __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
  1059. {
  1060. SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
  1061. }
  1062. /**
  1063. * @brief Disable compare match interrupt (CMPMIE).
  1064. * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
  1065. * @param LPTIMx Low-Power Timer instance
  1066. * @retval None
  1067. */
  1068. __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
  1069. {
  1070. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
  1071. }
  1072. /**
  1073. * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
  1074. * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
  1075. * @param LPTIMx Low-Power Timer instance
  1076. * @retval State of bit (1 or 0).
  1077. */
  1078. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
  1079. {
  1080. return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
  1081. }
  1082. /**
  1083. * @brief Enable autoreload match interrupt (ARRMIE).
  1084. * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
  1085. * @param LPTIMx Low-Power Timer instance
  1086. * @retval None
  1087. */
  1088. __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
  1089. {
  1090. SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
  1091. }
  1092. /**
  1093. * @brief Disable autoreload match interrupt (ARRMIE).
  1094. * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
  1095. * @param LPTIMx Low-Power Timer instance
  1096. * @retval None
  1097. */
  1098. __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
  1099. {
  1100. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
  1101. }
  1102. /**
  1103. * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
  1104. * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
  1105. * @param LPTIMx Low-Power Timer instance
  1106. * @retval State of bit (1 or 0).
  1107. */
  1108. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
  1109. {
  1110. return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
  1111. }
  1112. /**
  1113. * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
  1114. * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
  1115. * @param LPTIMx Low-Power Timer instance
  1116. * @retval None
  1117. */
  1118. __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  1119. {
  1120. SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
  1121. }
  1122. /**
  1123. * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
  1124. * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
  1125. * @param LPTIMx Low-Power Timer instance
  1126. * @retval None
  1127. */
  1128. __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  1129. {
  1130. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
  1131. }
  1132. /**
  1133. * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
  1134. * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
  1135. * @param LPTIMx Low-Power Timer instance
  1136. * @retval State of bit (1 or 0).
  1137. */
  1138. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
  1139. {
  1140. return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
  1141. }
  1142. /**
  1143. * @brief Enable compare register write completed interrupt (CMPOKIE).
  1144. * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
  1145. * @param LPTIMx Low-Power Timer instance
  1146. * @retval None
  1147. */
  1148. __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
  1149. {
  1150. SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
  1151. }
  1152. /**
  1153. * @brief Disable compare register write completed interrupt (CMPOKIE).
  1154. * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
  1155. * @param LPTIMx Low-Power Timer instance
  1156. * @retval None
  1157. */
  1158. __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
  1159. {
  1160. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
  1161. }
  1162. /**
  1163. * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
  1164. * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
  1165. * @param LPTIMx Low-Power Timer instance
  1166. * @retval State of bit (1 or 0).
  1167. */
  1168. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
  1169. {
  1170. return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
  1171. }
  1172. /**
  1173. * @brief Enable autoreload register write completed interrupt (ARROKIE).
  1174. * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
  1175. * @param LPTIMx Low-Power Timer instance
  1176. * @retval None
  1177. */
  1178. __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
  1179. {
  1180. SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
  1181. }
  1182. /**
  1183. * @brief Disable autoreload register write completed interrupt (ARROKIE).
  1184. * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
  1185. * @param LPTIMx Low-Power Timer instance
  1186. * @retval None
  1187. */
  1188. __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
  1189. {
  1190. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
  1191. }
  1192. /**
  1193. * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
  1194. * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
  1195. * @param LPTIMx Low-Power Timer instance
  1196. * @retval State of bit (1 or 0).
  1197. */
  1198. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
  1199. {
  1200. return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
  1201. }
  1202. /**
  1203. * @brief Enable direction change to up interrupt (UPIE).
  1204. * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
  1205. * @param LPTIMx Low-Power Timer instance
  1206. * @retval None
  1207. */
  1208. __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
  1209. {
  1210. SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
  1211. }
  1212. /**
  1213. * @brief Disable direction change to up interrupt (UPIE).
  1214. * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
  1215. * @param LPTIMx Low-Power Timer instance
  1216. * @retval None
  1217. */
  1218. __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
  1219. {
  1220. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
  1221. }
  1222. /**
  1223. * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
  1224. * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
  1225. * @param LPTIMx Low-Power Timer instance
  1226. * @retval State of bit (1 or 0).
  1227. */
  1228. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
  1229. {
  1230. return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
  1231. }
  1232. /**
  1233. * @brief Enable direction change to down interrupt (DOWNIE).
  1234. * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
  1235. * @param LPTIMx Low-Power Timer instance
  1236. * @retval None
  1237. */
  1238. __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
  1239. {
  1240. SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
  1241. }
  1242. /**
  1243. * @brief Disable direction change to down interrupt (DOWNIE).
  1244. * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
  1245. * @param LPTIMx Low-Power Timer instance
  1246. * @retval None
  1247. */
  1248. __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
  1249. {
  1250. CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
  1251. }
  1252. /**
  1253. * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
  1254. * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
  1255. * @param LPTIMx Low-Power Timer instance
  1256. * @retval State of bit (1 or 0).
  1257. */
  1258. __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
  1259. {
  1260. return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
  1261. }
  1262. /**
  1263. * @}
  1264. */
  1265. #if defined(USE_FULL_LL_DRIVER)
  1266. /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
  1267. * @{
  1268. */
  1269. ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
  1270. void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
  1271. ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
  1272. /**
  1273. * @}
  1274. */
  1275. #endif /* USE_FULL_LL_DRIVER */
  1276. /**
  1277. * @}
  1278. */
  1279. /**
  1280. * @}
  1281. */
  1282. #endif /* LPTIM1 || LPTIM2 */
  1283. /**
  1284. * @}
  1285. */
  1286. #ifdef __cplusplus
  1287. }
  1288. #endif
  1289. #endif /* __STM32L4xx_LL_LPTIM_H */
  1290. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/