1
0

stm32l4xx_hal.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695
  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal.c
  4. * @author MCD Application Team
  5. * @version V1.7.2
  6. * @date 16-June-2017
  7. * @brief HAL module driver.
  8. * This is the common part of the HAL initialization
  9. *
  10. @verbatim
  11. ==============================================================================
  12. ##### How to use this driver #####
  13. ==============================================================================
  14. [..]
  15. The common HAL driver contains a set of generic and common APIs that can be
  16. used by the PPP peripheral drivers and the user to start using the HAL.
  17. [..]
  18. The HAL contains two APIs' categories:
  19. (+) Common HAL APIs
  20. (+) Services HAL APIs
  21. @endverbatim
  22. ******************************************************************************
  23. * @attention
  24. *
  25. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  26. *
  27. * Redistribution and use in source and binary forms, with or without modification,
  28. * are permitted provided that the following conditions are met:
  29. * 1. Redistributions of source code must retain the above copyright notice,
  30. * this list of conditions and the following disclaimer.
  31. * 2. Redistributions in binary form must reproduce the above copyright notice,
  32. * this list of conditions and the following disclaimer in the documentation
  33. * and/or other materials provided with the distribution.
  34. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  35. * may be used to endorse or promote products derived from this software
  36. * without specific prior written permission.
  37. *
  38. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  39. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  40. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  41. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  42. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  43. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  44. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  45. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  46. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  47. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  48. *
  49. ******************************************************************************
  50. */
  51. /* Includes ------------------------------------------------------------------*/
  52. #include "stm32l4xx_hal.h"
  53. /** @addtogroup STM32L4xx_HAL_Driver
  54. * @{
  55. */
  56. /** @defgroup HAL HAL
  57. * @brief HAL module driver
  58. * @{
  59. */
  60. #ifdef HAL_MODULE_ENABLED
  61. /* Private typedef -----------------------------------------------------------*/
  62. /* Private define ------------------------------------------------------------*/
  63. /**
  64. * @brief STM32L4xx HAL Driver version number V1.7.2
  65. */
  66. #define __STM32L4xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
  67. #define __STM32L4xx_HAL_VERSION_SUB1 (0x07) /*!< [23:16] sub1 version */
  68. #define __STM32L4xx_HAL_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
  69. #define __STM32L4xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
  70. #define __STM32L4xx_HAL_VERSION ((__STM32L4xx_HAL_VERSION_MAIN << 24)\
  71. |(__STM32L4xx_HAL_VERSION_SUB1 << 16)\
  72. |(__STM32L4xx_HAL_VERSION_SUB2 << 8 )\
  73. |(__STM32L4xx_HAL_VERSION_RC))
  74. #if defined(VREFBUF)
  75. #define VREFBUF_TIMEOUT_VALUE (uint32_t)10 /* 10 ms (to be confirmed) */
  76. #endif /* VREFBUF */
  77. /* ------------ SYSCFG registers bit address in the alias region ------------ */
  78. #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
  79. /* --- MEMRMP Register ---*/
  80. /* Alias word address of FB_MODE bit */
  81. #define MEMRMP_OFFSET SYSCFG_OFFSET
  82. #define FB_MODE_BitNumber ((uint8_t)0x8)
  83. #define FB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (FB_MODE_BitNumber * 4))
  84. /* --- SCSR Register ---*/
  85. /* Alias word address of SRAM2ER bit */
  86. #define SCSR_OFFSET (SYSCFG_OFFSET + 0x18)
  87. #define BRER_BitNumber ((uint8_t)0x0)
  88. #define SCSR_SRAM2ER_BB (PERIPH_BB_BASE + (SCSR_OFFSET * 32) + (BRER_BitNumber * 4))
  89. /* Private macro -------------------------------------------------------------*/
  90. /* Private variables ---------------------------------------------------------*/
  91. __IO uint32_t uwTick;
  92. /* Private function prototypes -----------------------------------------------*/
  93. /* Exported functions --------------------------------------------------------*/
  94. /** @defgroup HAL_Exported_Functions HAL Exported Functions
  95. * @{
  96. */
  97. /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
  98. * @brief Initialization and de-initialization functions
  99. *
  100. @verbatim
  101. ===============================================================================
  102. ##### Initialization and de-initialization functions #####
  103. ===============================================================================
  104. [..] This section provides functions allowing to:
  105. (+) Initialize the Flash interface the NVIC allocation and initial time base
  106. clock configuration.
  107. (+) De-initialize common part of the HAL.
  108. (+) Configure the time base source to have 1ms time base with a dedicated
  109. Tick interrupt priority.
  110. (++) SysTick timer is used by default as source of time base, but user
  111. can eventually implement his proper time base source (a general purpose
  112. timer for example or other time source), keeping in mind that Time base
  113. duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
  114. handled in milliseconds basis.
  115. (++) Time base configuration function (HAL_InitTick ()) is called automatically
  116. at the beginning of the program after reset by HAL_Init() or at any time
  117. when clock is configured, by HAL_RCC_ClockConfig().
  118. (++) Source of time base is configured to generate interrupts at regular
  119. time intervals. Care must be taken if HAL_Delay() is called from a
  120. peripheral ISR process, the Tick interrupt line must have higher priority
  121. (numerically lower) than the peripheral interrupt. Otherwise the caller
  122. ISR process will be blocked.
  123. (++) functions affecting time base configurations are declared as __weak
  124. to make override possible in case of other implementations in user file.
  125. @endverbatim
  126. * @{
  127. */
  128. /**
  129. * @brief Configure the Flash prefetch, the Instruction and Data caches,
  130. * the time base source, NVIC and any required global low level hardware
  131. * by calling the HAL_MspInit() callback function to be optionally defined in user file
  132. * stm32l4xx_hal_msp.c.
  133. *
  134. * @note HAL_Init() function is called at the beginning of program after reset and before
  135. * the clock configuration.
  136. *
  137. * @note In the default implementation the System Timer (Systick) is used as source of time base.
  138. * The Systick configuration is based on MSI clock, as MSI is the clock
  139. * used after a system Reset and the NVIC configuration is set to Priority group 4.
  140. * Once done, time base tick starts incrementing: the tick variable counter is incremented
  141. * each 1ms in the SysTick_Handler() interrupt handler.
  142. *
  143. * @retval HAL status
  144. */
  145. HAL_StatusTypeDef HAL_Init(void)
  146. {
  147. /* Configure Flash prefetch, Instruction cache, Data cache */
  148. /* Default configuration at reset is: */
  149. /* - Prefetch disabled */
  150. /* - Instruction cache enabled */
  151. /* - Data cache enabled */
  152. #if (INSTRUCTION_CACHE_ENABLE == 0)
  153. __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
  154. #endif /* INSTRUCTION_CACHE_ENABLE */
  155. #if (DATA_CACHE_ENABLE == 0)
  156. __HAL_FLASH_DATA_CACHE_DISABLE();
  157. #endif /* DATA_CACHE_ENABLE */
  158. #if (PREFETCH_ENABLE != 0)
  159. __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
  160. #endif /* PREFETCH_ENABLE */
  161. /* Set Interrupt Group Priority */
  162. HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
  163. /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */
  164. HAL_InitTick(TICK_INT_PRIORITY);
  165. /* Init the low level hardware */
  166. HAL_MspInit();
  167. /* Return function status */
  168. return HAL_OK;
  169. }
  170. /**
  171. * @brief De-initialize common part of the HAL and stop the source of time base.
  172. * @note This function is optional.
  173. * @retval HAL status
  174. */
  175. HAL_StatusTypeDef HAL_DeInit(void)
  176. {
  177. /* Reset of all peripherals */
  178. __HAL_RCC_APB1_FORCE_RESET();
  179. __HAL_RCC_APB1_RELEASE_RESET();
  180. __HAL_RCC_APB2_FORCE_RESET();
  181. __HAL_RCC_APB2_RELEASE_RESET();
  182. __HAL_RCC_AHB1_FORCE_RESET();
  183. __HAL_RCC_AHB1_RELEASE_RESET();
  184. __HAL_RCC_AHB2_FORCE_RESET();
  185. __HAL_RCC_AHB2_RELEASE_RESET();
  186. __HAL_RCC_AHB3_FORCE_RESET();
  187. __HAL_RCC_AHB3_RELEASE_RESET();
  188. /* De-Init the low level hardware */
  189. HAL_MspDeInit();
  190. /* Return function status */
  191. return HAL_OK;
  192. }
  193. /**
  194. * @brief Initialize the MSP.
  195. * @retval None
  196. */
  197. __weak void HAL_MspInit(void)
  198. {
  199. /* NOTE : This function should not be modified, when the callback is needed,
  200. the HAL_MspInit could be implemented in the user file
  201. */
  202. }
  203. /**
  204. * @brief DeInitialize the MSP.
  205. * @retval None
  206. */
  207. __weak void HAL_MspDeInit(void)
  208. {
  209. /* NOTE : This function should not be modified, when the callback is needed,
  210. the HAL_MspDeInit could be implemented in the user file
  211. */
  212. }
  213. /**
  214. * @brief This function configures the source of the time base:
  215. * The time source is configured to have 1ms time base with a dedicated
  216. * Tick interrupt priority.
  217. * @note This function is called automatically at the beginning of program after
  218. * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
  219. * @note In the default implementation, SysTick timer is the source of time base.
  220. * It is used to generate interrupts at regular time intervals.
  221. * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
  222. * The SysTick interrupt must have higher priority (numerically lower)
  223. * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
  224. * The function is declared as __weak to be overwritten in case of other
  225. * implementation in user file.
  226. * @param TickPriority: Tick interrupt priority.
  227. * @retval HAL status
  228. */
  229. __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
  230. {
  231. /*Configure the SysTick to have interrupt in 1ms time basis*/
  232. HAL_SYSTICK_Config(SystemCoreClock/1000);
  233. /*Configure the SysTick IRQ priority */
  234. HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
  235. /* Return function status */
  236. return HAL_OK;
  237. }
  238. /**
  239. * @}
  240. */
  241. /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
  242. * @brief HAL Control functions
  243. *
  244. @verbatim
  245. ===============================================================================
  246. ##### HAL Control functions #####
  247. ===============================================================================
  248. [..] This section provides functions allowing to:
  249. (+) Provide a tick value in millisecond
  250. (+) Provide a blocking delay in millisecond
  251. (+) Suspend the time base source interrupt
  252. (+) Resume the time base source interrupt
  253. (+) Get the HAL API driver version
  254. (+) Get the device identifier
  255. (+) Get the device revision identifier
  256. @endverbatim
  257. * @{
  258. */
  259. /**
  260. * @brief This function is called to increment a global variable "uwTick"
  261. * used as application time base.
  262. * @note In the default implementation, this variable is incremented each 1ms
  263. * in SysTick ISR.
  264. * @note This function is declared as __weak to be overwritten in case of other
  265. * implementations in user file.
  266. * @retval None
  267. */
  268. __weak void HAL_IncTick(void)
  269. {
  270. uwTick++;
  271. }
  272. /**
  273. * @brief Provide a tick value in millisecond.
  274. * @note This function is declared as __weak to be overwritten in case of other
  275. * implementations in user file.
  276. * @retval tick value
  277. */
  278. __weak uint32_t HAL_GetTick(void)
  279. {
  280. return uwTick;
  281. }
  282. /**
  283. * @brief This function provides minimum delay (in milliseconds) based
  284. * on variable incremented.
  285. * @note In the default implementation , SysTick timer is the source of time base.
  286. * It is used to generate interrupts at regular time intervals where uwTick
  287. * is incremented.
  288. * @note This function is declared as __weak to be overwritten in case of other
  289. * implementations in user file.
  290. * @param Delay: specifies the delay time length, in milliseconds.
  291. * @retval None
  292. */
  293. __weak void HAL_Delay(uint32_t Delay)
  294. {
  295. uint32_t tickstart = HAL_GetTick();
  296. uint32_t wait = Delay;
  297. /* Add a period to guaranty minimum wait */
  298. if (wait < HAL_MAX_DELAY)
  299. {
  300. wait++;
  301. }
  302. while((HAL_GetTick() - tickstart) < wait)
  303. {
  304. }
  305. }
  306. /**
  307. * @brief Suspend Tick increment.
  308. * @note In the default implementation , SysTick timer is the source of time base. It is
  309. * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
  310. * is called, the SysTick interrupt will be disabled and so Tick increment
  311. * is suspended.
  312. * @note This function is declared as __weak to be overwritten in case of other
  313. * implementations in user file.
  314. * @retval None
  315. */
  316. __weak void HAL_SuspendTick(void)
  317. {
  318. /* Disable SysTick Interrupt */
  319. SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
  320. }
  321. /**
  322. * @brief Resume Tick increment.
  323. * @note In the default implementation , SysTick timer is the source of time base. It is
  324. * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
  325. * is called, the SysTick interrupt will be enabled and so Tick increment
  326. * is resumed.
  327. * @note This function is declared as __weak to be overwritten in case of other
  328. * implementations in user file.
  329. * @retval None
  330. */
  331. __weak void HAL_ResumeTick(void)
  332. {
  333. /* Enable SysTick Interrupt */
  334. SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
  335. }
  336. /**
  337. * @brief Return the HAL revision.
  338. * @retval version : 0xXYZR (8bits for each decimal, R for RC)
  339. */
  340. uint32_t HAL_GetHalVersion(void)
  341. {
  342. return __STM32L4xx_HAL_VERSION;
  343. }
  344. /**
  345. * @brief Return the device revision identifier.
  346. * @retval Device revision identifier
  347. */
  348. uint32_t HAL_GetREVID(void)
  349. {
  350. return((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID) >> 16);
  351. }
  352. /**
  353. * @brief Return the device identifier.
  354. * @retval Device identifier
  355. */
  356. uint32_t HAL_GetDEVID(void)
  357. {
  358. return(DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID);
  359. }
  360. /**
  361. * @brief Return the first word of the unique device identifier (UID based on 96 bits)
  362. * @retval Device identifier
  363. */
  364. uint32_t HAL_GetUIDw0(void)
  365. {
  366. return(READ_REG(*((uint32_t *)UID_BASE)));
  367. }
  368. /**
  369. * @brief Return the second word of the unique device identifier (UID based on 96 bits)
  370. * @retval Device identifier
  371. */
  372. uint32_t HAL_GetUIDw1(void)
  373. {
  374. return(READ_REG(*((uint32_t *)(UID_BASE + 4U))));
  375. }
  376. /**
  377. * @brief Return the third word of the unique device identifier (UID based on 96 bits)
  378. * @retval Device identifier
  379. */
  380. uint32_t HAL_GetUIDw2(void)
  381. {
  382. return(READ_REG(*((uint32_t *)(UID_BASE + 8U))));
  383. }
  384. /**
  385. * @}
  386. */
  387. /** @defgroup HAL_Exported_Functions_Group3 HAL Debug functions
  388. * @brief HAL Debug functions
  389. *
  390. @verbatim
  391. ===============================================================================
  392. ##### HAL Debug functions #####
  393. ===============================================================================
  394. [..] This section provides functions allowing to:
  395. (+) Enable/Disable Debug module during SLEEP mode
  396. (+) Enable/Disable Debug module during STOP0/STOP1/STOP2 modes
  397. (+) Enable/Disable Debug module during STANDBY mode
  398. @endverbatim
  399. * @{
  400. */
  401. /**
  402. * @brief Enable the Debug Module during SLEEP mode.
  403. * @retval None
  404. */
  405. void HAL_DBGMCU_EnableDBGSleepMode(void)
  406. {
  407. SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
  408. }
  409. /**
  410. * @brief Disable the Debug Module during SLEEP mode.
  411. * @retval None
  412. */
  413. void HAL_DBGMCU_DisableDBGSleepMode(void)
  414. {
  415. CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
  416. }
  417. /**
  418. * @brief Enable the Debug Module during STOP0/STOP1/STOP2 modes.
  419. * @retval None
  420. */
  421. void HAL_DBGMCU_EnableDBGStopMode(void)
  422. {
  423. SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
  424. }
  425. /**
  426. * @brief Disable the Debug Module during STOP0/STOP1/STOP2 modes.
  427. * @retval None
  428. */
  429. void HAL_DBGMCU_DisableDBGStopMode(void)
  430. {
  431. CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
  432. }
  433. /**
  434. * @brief Enable the Debug Module during STANDBY mode.
  435. * @retval None
  436. */
  437. void HAL_DBGMCU_EnableDBGStandbyMode(void)
  438. {
  439. SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
  440. }
  441. /**
  442. * @brief Disable the Debug Module during STANDBY mode.
  443. * @retval None
  444. */
  445. void HAL_DBGMCU_DisableDBGStandbyMode(void)
  446. {
  447. CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
  448. }
  449. /**
  450. * @}
  451. */
  452. /** @defgroup HAL_Exported_Functions_Group4 HAL SYSCFG configuration functions
  453. * @brief HAL SYSCFG configuration functions
  454. *
  455. @verbatim
  456. ===============================================================================
  457. ##### HAL SYSCFG configuration functions #####
  458. ===============================================================================
  459. [..] This section provides functions allowing to:
  460. (+) Start a hardware SRAM2 erase operation
  461. (+) Enable/Disable the Internal FLASH Bank Swapping
  462. (+) Configure the Voltage reference buffer
  463. (+) Enable/Disable the Voltage reference buffer
  464. (+) Enable/Disable the I/O analog switch voltage booster
  465. @endverbatim
  466. * @{
  467. */
  468. /**
  469. * @brief Start a hardware SRAM2 erase operation.
  470. * @note As long as SRAM2 is not erased the SRAM2ER bit will be set.
  471. * This bit is automatically reset at the end of the SRAM2 erase operation.
  472. * @retval None
  473. */
  474. void HAL_SYSCFG_SRAM2Erase(void)
  475. {
  476. /* unlock the write protection of the SRAM2ER bit */
  477. SYSCFG->SKR = 0xCA;
  478. SYSCFG->SKR = 0x53;
  479. /* Starts a hardware SRAM2 erase operation*/
  480. *(__IO uint32_t *) SCSR_SRAM2ER_BB = (uint8_t)0x00000001;
  481. }
  482. /**
  483. * @brief Enable the Internal FLASH Bank Swapping.
  484. *
  485. * @note This function can be used only for STM32L4xx devices.
  486. *
  487. * @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
  488. * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)
  489. *
  490. * @retval None
  491. */
  492. void HAL_SYSCFG_EnableMemorySwappingBank(void)
  493. {
  494. *(__IO uint32_t *)FB_MODE_BB = (uint32_t)ENABLE;
  495. }
  496. /**
  497. * @brief Disable the Internal FLASH Bank Swapping.
  498. *
  499. * @note This function can be used only for STM32L4xx devices.
  500. *
  501. * @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000)
  502. * and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)
  503. *
  504. * @retval None
  505. */
  506. void HAL_SYSCFG_DisableMemorySwappingBank(void)
  507. {
  508. *(__IO uint32_t *)FB_MODE_BB = (uint32_t)DISABLE;
  509. }
  510. #if defined(VREFBUF)
  511. /**
  512. * @brief Configure the internal voltage reference buffer voltage scale.
  513. * @param VoltageScaling: specifies the output voltage to achieve
  514. * This parameter can be one of the following values:
  515. * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE0: VREF_OUT1 around 2.048 V.
  516. * This requires VDDA equal to or higher than 2.4 V.
  517. * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE1: VREF_OUT2 around 2.5 V.
  518. * This requires VDDA equal to or higher than 2.8 V.
  519. * @retval None
  520. */
  521. void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)
  522. {
  523. /* Check the parameters */
  524. assert_param(IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(VoltageScaling));
  525. MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, VoltageScaling);
  526. }
  527. /**
  528. * @brief Configure the internal voltage reference buffer high impedance mode.
  529. * @param Mode: specifies the high impedance mode
  530. * This parameter can be one of the following values:
  531. * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE: VREF+ pin is internally connect to VREFINT output.
  532. * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE: VREF+ pin is high impedance.
  533. * @retval None
  534. */
  535. void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
  536. {
  537. /* Check the parameters */
  538. assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode));
  539. MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode);
  540. }
  541. /**
  542. * @brief Tune the Internal Voltage Reference buffer (VREFBUF).
  543. * @retval None
  544. */
  545. void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)
  546. {
  547. /* Check the parameters */
  548. assert_param(IS_SYSCFG_VREFBUF_TRIMMING(TrimmingValue));
  549. MODIFY_REG(VREFBUF->CCR, VREFBUF_CCR_TRIM, TrimmingValue);
  550. }
  551. /**
  552. * @brief Enable the Internal Voltage Reference buffer (VREFBUF).
  553. * @retval HAL_OK/HAL_TIMEOUT
  554. */
  555. HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void)
  556. {
  557. uint32_t tickstart = 0;
  558. SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
  559. /* Get Start Tick*/
  560. tickstart = HAL_GetTick();
  561. /* Wait for VRR bit */
  562. while(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == RESET)
  563. {
  564. if((HAL_GetTick() - tickstart) > VREFBUF_TIMEOUT_VALUE)
  565. {
  566. return HAL_TIMEOUT;
  567. }
  568. }
  569. return HAL_OK;
  570. }
  571. /**
  572. * @brief Disable the Internal Voltage Reference buffer (VREFBUF).
  573. *
  574. * @retval None
  575. */
  576. void HAL_SYSCFG_DisableVREFBUF(void)
  577. {
  578. CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
  579. }
  580. #endif /* VREFBUF */
  581. /**
  582. * @brief Enable the I/O analog switch voltage booster
  583. *
  584. * @retval None
  585. */
  586. void HAL_SYSCFG_EnableIOAnalogSwitchBooster(void)
  587. {
  588. SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
  589. }
  590. /**
  591. * @brief Disable the I/O analog switch voltage booster
  592. *
  593. * @retval None
  594. */
  595. void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void)
  596. {
  597. CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
  598. }
  599. /**
  600. * @}
  601. */
  602. /**
  603. * @}
  604. */
  605. #endif /* HAL_MODULE_ENABLED */
  606. /**
  607. * @}
  608. */
  609. /**
  610. * @}
  611. */
  612. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/