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stm32l4xx_hal_dfsdm.c 106 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_dfsdm.c
  4. * @author MCD Application Team
  5. * @version V1.7.2
  6. * @date 16-June-2017
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Digital Filter for Sigma-Delta Modulators
  9. * (DFSDM) peripherals:
  10. * + Initialization and configuration of channels and filters
  11. * + Regular channels configuration
  12. * + Injected channels configuration
  13. * + Regular/Injected Channels DMA Configuration
  14. * + Interrupts and flags management
  15. * + Analog watchdog feature
  16. * + Short-circuit detector feature
  17. * + Extremes detector feature
  18. * + Clock absence detector feature
  19. * + Break generation on analog watchdog or short-circuit event
  20. *
  21. @verbatim
  22. ==============================================================================
  23. ##### How to use this driver #####
  24. ==============================================================================
  25. [..]
  26. *** Channel initialization ***
  27. ==============================
  28. [..]
  29. (#) User has first to initialize channels (before filters initialization).
  30. (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
  31. (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
  32. (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
  33. (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
  34. (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
  35. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  36. (#) Configure the output clock, input, serial interface, analog watchdog,
  37. offset and data right bit shift parameters for this channel using the
  38. HAL_DFSDM_ChannelInit() function.
  39. *** Channel clock absence detector ***
  40. ======================================
  41. [..]
  42. (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
  43. HAL_DFSDM_ChannelCkabStart_IT().
  44. (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
  45. absence.
  46. (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
  47. clock absence is detected.
  48. (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
  49. HAL_DFSDM_ChannelCkabStop_IT().
  50. (#) Please note that the same mode (polling or interrupt) has to be used
  51. for all channels because the channels are sharing the same interrupt.
  52. (#) Please note also that in interrupt mode, if clock absence detector is
  53. stopped for one channel, interrupt will be disabled for all channels.
  54. *** Channel short circuit detector ***
  55. ======================================
  56. [..]
  57. (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
  58. or HAL_DFSDM_ChannelScdStart_IT().
  59. (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
  60. circuit.
  61. (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
  62. short circuit is detected.
  63. (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
  64. or HAL_DFSDM_ChannelScdStop_IT().
  65. (#) Please note that the same mode (polling or interrupt) has to be used
  66. for all channels because the channels are sharing the same interrupt.
  67. (#) Please note also that in interrupt mode, if short circuit detector is
  68. stopped for one channel, interrupt will be disabled for all channels.
  69. *** Channel analog watchdog value ***
  70. =====================================
  71. [..]
  72. (#) Get analog watchdog filter value of a channel using
  73. HAL_DFSDM_ChannelGetAwdValue().
  74. *** Channel offset value ***
  75. =====================================
  76. [..]
  77. (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
  78. *** Filter initialization ***
  79. =============================
  80. [..]
  81. (#) After channel initialization, user has to init filters.
  82. (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
  83. (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
  84. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  85. Please note that DFSDMz_FLT0 global interrupt could be already
  86. enabled if interrupt is used for channel.
  87. (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
  88. with DFSDMz filter handle using __HAL_LINKDMA().
  89. (#) Configure the regular conversion, injected conversion and filter
  90. parameters for this filter using the HAL_DFSDM_FilterInit() function.
  91. *** Filter regular channel conversion ***
  92. =========================================
  93. [..]
  94. (#) Select regular channel and enable/disable continuous mode using
  95. HAL_DFSDM_FilterConfigRegChannel().
  96. (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
  97. HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
  98. HAL_DFSDM_FilterRegularMsbStart_DMA().
  99. (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
  100. the end of regular conversion.
  101. (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
  102. at the end of regular conversion.
  103. (#) Get value of regular conversion and corresponding channel using
  104. HAL_DFSDM_FilterGetRegularValue().
  105. (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
  106. HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
  107. half transfer and at the transfer complete. Please note that
  108. HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
  109. circular mode.
  110. (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
  111. HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
  112. *** Filter injected channels conversion ***
  113. ===========================================
  114. [..]
  115. (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
  116. (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
  117. HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
  118. HAL_DFSDM_FilterInjectedMsbStart_DMA().
  119. (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
  120. the end of injected conversion.
  121. (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
  122. at the end of injected conversion.
  123. (#) Get value of injected conversion and corresponding channel using
  124. HAL_DFSDM_FilterGetInjectedValue().
  125. (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
  126. HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
  127. half transfer and at the transfer complete. Please note that
  128. HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
  129. circular mode.
  130. (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
  131. HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
  132. *** Filter analog watchdog ***
  133. ==============================
  134. [..]
  135. (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
  136. (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
  137. (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
  138. *** Filter extreme detector ***
  139. ===============================
  140. [..]
  141. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
  142. (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
  143. (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
  144. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
  145. *** Filter conversion time ***
  146. ==============================
  147. [..]
  148. (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
  149. @endverbatim
  150. ******************************************************************************
  151. * @attention
  152. *
  153. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  154. *
  155. * Redistribution and use in source and binary forms, with or without modification,
  156. * are permitted provided that the following conditions are met:
  157. * 1. Redistributions of source code must retain the above copyright notice,
  158. * this list of conditions and the following disclaimer.
  159. * 2. Redistributions in binary form must reproduce the above copyright notice,
  160. * this list of conditions and the following disclaimer in the documentation
  161. * and/or other materials provided with the distribution.
  162. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  163. * may be used to endorse or promote products derived from this software
  164. * without specific prior written permission.
  165. *
  166. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  167. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  168. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  169. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  170. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  171. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  172. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  173. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  174. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  175. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  176. *
  177. ******************************************************************************
  178. */
  179. /* Includes ------------------------------------------------------------------*/
  180. #include "stm32l4xx_hal.h"
  181. /** @addtogroup STM32L4xx_HAL_Driver
  182. * @{
  183. */
  184. #ifdef HAL_DFSDM_MODULE_ENABLED
  185. #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
  186. defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
  187. defined(STM32L496xx) || defined(STM32L4A6xx)
  188. /** @defgroup DFSDM DFSDM
  189. * @brief DFSDM HAL driver module
  190. * @{
  191. */
  192. /* Private typedef -----------------------------------------------------------*/
  193. /* Private define ------------------------------------------------------------*/
  194. /** @defgroup DFSDM_Private_Define DFSDM Private Define
  195. * @{
  196. */
  197. #define DFSDM_CHCFGR1_CLK_DIV_OFFSET POSITION_VAL(DFSDM_CHCFGR1_CKOUTDIV)
  198. #define DFSDM_CHAWSCDR_BKSCD_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_BKSCD)
  199. #define DFSDM_CHAWSCDR_FOSR_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_AWFOSR)
  200. #define DFSDM_CHCFGR2_OFFSET_OFFSET POSITION_VAL(DFSDM_CHCFGR2_OFFSET)
  201. #define DFSDM_CHCFGR2_DTRBS_OFFSET POSITION_VAL(DFSDM_CHCFGR2_DTRBS)
  202. #define DFSDM_FLTFCR_FOSR_OFFSET POSITION_VAL(DFSDM_FLTFCR_FOSR)
  203. #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
  204. #define DFSDM_FLTCR2_EXCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_EXCH)
  205. #define DFSDM_FLTCR2_AWDCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_AWDCH)
  206. #define DFSDM_FLTISR_CKABF_OFFSET POSITION_VAL(DFSDM_FLTISR_CKABF)
  207. #define DFSDM_FLTISR_SCDF_OFFSET POSITION_VAL(DFSDM_FLTISR_SCDF)
  208. #define DFSDM_FLTICR_CLRCKABF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRCKABF)
  209. #define DFSDM_FLTICR_CLRSCDF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRSCSDF)
  210. #define DFSDM_FLTRDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTRDATAR_RDATA)
  211. #define DFSDM_FLTJDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTJDATAR_JDATA)
  212. #define DFSDM_FLTAWHTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWHTR_AWHT)
  213. #define DFSDM_FLTAWLTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWLTR_AWLT)
  214. #define DFSDM_FLTEXMAX_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMAX_EXMAX)
  215. #define DFSDM_FLTEXMIN_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMIN_EXMIN)
  216. #define DFSDM_FLTCNVTIMR_DATA_OFFSET POSITION_VAL(DFSDM_FLTCNVTIMR_CNVCNT)
  217. #define DFSDM_FLTAWSR_HIGH_OFFSET POSITION_VAL(DFSDM_FLTAWSR_AWHTF)
  218. #define DFSDM_MSB_MASK 0xFFFF0000U
  219. #define DFSDM_LSB_MASK 0x0000FFFFU
  220. #define DFSDM_CKAB_TIMEOUT 5000U
  221. #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)
  222. #define DFSDM1_CHANNEL_NUMBER 4U
  223. #else /* STM32L451xx || STM32L452xx || STM32L462xx */
  224. #define DFSDM1_CHANNEL_NUMBER 8U
  225. #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
  226. /**
  227. * @}
  228. */
  229. /* Private macro -------------------------------------------------------------*/
  230. /* Private variables ---------------------------------------------------------*/
  231. /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
  232. * @{
  233. */
  234. __IO uint32_t v_dfsdm1ChannelCounter = 0;
  235. DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
  236. /**
  237. * @}
  238. */
  239. /* Private function prototypes -----------------------------------------------*/
  240. /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
  241. * @{
  242. */
  243. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
  244. static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
  245. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
  246. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  247. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  248. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  249. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
  250. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
  251. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
  252. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
  253. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
  254. /**
  255. * @}
  256. */
  257. /* Exported functions --------------------------------------------------------*/
  258. /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
  259. * @{
  260. */
  261. /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
  262. * @brief Channel initialization and de-initialization functions
  263. *
  264. @verbatim
  265. ==============================================================================
  266. ##### Channel initialization and de-initialization functions #####
  267. ==============================================================================
  268. [..] This section provides functions allowing to:
  269. (+) Initialize the DFSDM channel.
  270. (+) De-initialize the DFSDM channel.
  271. @endverbatim
  272. * @{
  273. */
  274. /**
  275. * @brief Initialize the DFSDM channel according to the specified parameters
  276. * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
  277. * @param hdfsdm_channel : DFSDM channel handle.
  278. * @retval HAL status.
  279. */
  280. HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  281. {
  282. /* Check DFSDM Channel handle */
  283. if(hdfsdm_channel == NULL)
  284. {
  285. return HAL_ERROR;
  286. }
  287. /* Check parameters */
  288. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  289. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
  290. assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
  291. assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
  292. assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
  293. assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
  294. assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
  295. assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
  296. assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
  297. assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
  298. assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
  299. /* Check that channel has not been already initialized */
  300. if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
  301. {
  302. return HAL_ERROR;
  303. }
  304. /* Call MSP init function */
  305. HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
  306. /* Update the channel counter */
  307. v_dfsdm1ChannelCounter++;
  308. /* Configure output serial clock and enable global DFSDM interface only for first channel */
  309. if(v_dfsdm1ChannelCounter == 1)
  310. {
  311. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
  312. /* Set the output serial clock source */
  313. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
  314. DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
  315. /* Reset clock divider */
  316. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
  317. if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
  318. {
  319. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
  320. /* Set the output clock divider */
  321. DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1) <<
  322. DFSDM_CHCFGR1_CLK_DIV_OFFSET);
  323. }
  324. /* enable the DFSDM global interface */
  325. DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
  326. }
  327. /* Set channel input parameters */
  328. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
  329. DFSDM_CHCFGR1_CHINSEL);
  330. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
  331. hdfsdm_channel->Init.Input.DataPacking |
  332. hdfsdm_channel->Init.Input.Pins);
  333. /* Set serial interface parameters */
  334. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
  335. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
  336. hdfsdm_channel->Init.SerialInterface.SpiClock);
  337. /* Set analog watchdog parameters */
  338. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
  339. hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
  340. ((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_CHAWSCDR_FOSR_OFFSET));
  341. /* Set channel offset and right bit shift */
  342. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
  343. hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) |
  344. (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
  345. /* Enable DFSDM channel */
  346. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
  347. /* Set DFSDM Channel to ready state */
  348. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
  349. /* Store channel handle in DFSDM channel handle table */
  350. a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
  351. return HAL_OK;
  352. }
  353. /**
  354. * @brief De-initialize the DFSDM channel.
  355. * @param hdfsdm_channel : DFSDM channel handle.
  356. * @retval HAL status.
  357. */
  358. HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  359. {
  360. /* Check DFSDM Channel handle */
  361. if(hdfsdm_channel == NULL)
  362. {
  363. return HAL_ERROR;
  364. }
  365. /* Check parameters */
  366. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  367. /* Check that channel has not been already deinitialized */
  368. if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
  369. {
  370. return HAL_ERROR;
  371. }
  372. /* Disable the DFSDM channel */
  373. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
  374. /* Update the channel counter */
  375. v_dfsdm1ChannelCounter--;
  376. /* Disable global DFSDM at deinit of last channel */
  377. if(v_dfsdm1ChannelCounter == 0)
  378. {
  379. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
  380. }
  381. /* Call MSP deinit function */
  382. HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
  383. /* Set DFSDM Channel in reset state */
  384. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
  385. /* Reset channel handle in DFSDM channel handle table */
  386. a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
  387. return HAL_OK;
  388. }
  389. /**
  390. * @brief Initialize the DFSDM channel MSP.
  391. * @param hdfsdm_channel : DFSDM channel handle.
  392. * @retval None
  393. */
  394. __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  395. {
  396. /* Prevent unused argument(s) compilation warning */
  397. UNUSED(hdfsdm_channel);
  398. /* NOTE : This function should not be modified, when the function is needed,
  399. the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
  400. */
  401. }
  402. /**
  403. * @brief De-initialize the DFSDM channel MSP.
  404. * @param hdfsdm_channel : DFSDM channel handle.
  405. * @retval None
  406. */
  407. __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  408. {
  409. /* Prevent unused argument(s) compilation warning */
  410. UNUSED(hdfsdm_channel);
  411. /* NOTE : This function should not be modified, when the function is needed,
  412. the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
  413. */
  414. }
  415. /**
  416. * @}
  417. */
  418. /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
  419. * @brief Channel operation functions
  420. *
  421. @verbatim
  422. ==============================================================================
  423. ##### Channel operation functions #####
  424. ==============================================================================
  425. [..] This section provides functions allowing to:
  426. (+) Manage clock absence detector feature.
  427. (+) Manage short circuit detector feature.
  428. (+) Get analog watchdog value.
  429. (+) Modify offset value.
  430. @endverbatim
  431. * @{
  432. */
  433. /**
  434. * @brief This function allows to start clock absence detection in polling mode.
  435. * @note Same mode has to be used for all channels.
  436. * @note If clock is not available on this channel during 5 seconds,
  437. * clock absence detection will not be activated and function
  438. * will return HAL_TIMEOUT error.
  439. * @param hdfsdm_channel : DFSDM channel handle.
  440. * @retval HAL status
  441. */
  442. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  443. {
  444. HAL_StatusTypeDef status = HAL_OK;
  445. uint32_t channel;
  446. uint32_t tickstart;
  447. /* Check parameters */
  448. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  449. /* Check DFSDM channel state */
  450. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  451. {
  452. /* Return error status */
  453. status = HAL_ERROR;
  454. }
  455. else
  456. {
  457. /* Get channel number from channel instance */
  458. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  459. /* Get timeout */
  460. tickstart = HAL_GetTick();
  461. /* Clear clock absence flag */
  462. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
  463. {
  464. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  465. /* Check the Timeout */
  466. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  467. {
  468. /* Set timeout status */
  469. status = HAL_TIMEOUT;
  470. break;
  471. }
  472. }
  473. if(status == HAL_OK)
  474. {
  475. /* Start clock absence detection */
  476. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  477. }
  478. }
  479. /* Return function status */
  480. return status;
  481. }
  482. /**
  483. * @brief This function allows to poll for the clock absence detection.
  484. * @param hdfsdm_channel : DFSDM channel handle.
  485. * @param Timeout : Timeout value in milliseconds.
  486. * @retval HAL status
  487. */
  488. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  489. uint32_t Timeout)
  490. {
  491. uint32_t tickstart;
  492. uint32_t channel;
  493. /* Check parameters */
  494. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  495. /* Check DFSDM channel state */
  496. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  497. {
  498. /* Return error status */
  499. return HAL_ERROR;
  500. }
  501. else
  502. {
  503. /* Get channel number from channel instance */
  504. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  505. /* Get timeout */
  506. tickstart = HAL_GetTick();
  507. /* Wait clock absence detection */
  508. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) == 0)
  509. {
  510. /* Check the Timeout */
  511. if(Timeout != HAL_MAX_DELAY)
  512. {
  513. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  514. {
  515. /* Return timeout status */
  516. return HAL_TIMEOUT;
  517. }
  518. }
  519. }
  520. /* Clear clock absence detection flag */
  521. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  522. /* Return function status */
  523. return HAL_OK;
  524. }
  525. }
  526. /**
  527. * @brief This function allows to stop clock absence detection in polling mode.
  528. * @param hdfsdm_channel : DFSDM channel handle.
  529. * @retval HAL status
  530. */
  531. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  532. {
  533. HAL_StatusTypeDef status = HAL_OK;
  534. uint32_t channel;
  535. /* Check parameters */
  536. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  537. /* Check DFSDM channel state */
  538. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  539. {
  540. /* Return error status */
  541. status = HAL_ERROR;
  542. }
  543. else
  544. {
  545. /* Stop clock absence detection */
  546. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  547. /* Clear clock absence flag */
  548. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  549. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  550. }
  551. /* Return function status */
  552. return status;
  553. }
  554. /**
  555. * @brief This function allows to start clock absence detection in interrupt mode.
  556. * @note Same mode has to be used for all channels.
  557. * @note If clock is not available on this channel during 5 seconds,
  558. * clock absence detection will not be activated and function
  559. * will return HAL_TIMEOUT error.
  560. * @param hdfsdm_channel : DFSDM channel handle.
  561. * @retval HAL status
  562. */
  563. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  564. {
  565. HAL_StatusTypeDef status = HAL_OK;
  566. uint32_t channel;
  567. uint32_t tickstart;
  568. /* Check parameters */
  569. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  570. /* Check DFSDM channel state */
  571. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  572. {
  573. /* Return error status */
  574. status = HAL_ERROR;
  575. }
  576. else
  577. {
  578. /* Get channel number from channel instance */
  579. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  580. /* Get timeout */
  581. tickstart = HAL_GetTick();
  582. /* Clear clock absence flag */
  583. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
  584. {
  585. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  586. /* Check the Timeout */
  587. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  588. {
  589. /* Set timeout status */
  590. status = HAL_TIMEOUT;
  591. break;
  592. }
  593. }
  594. if(status == HAL_OK)
  595. {
  596. /* Activate clock absence detection interrupt */
  597. DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
  598. /* Start clock absence detection */
  599. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  600. }
  601. }
  602. /* Return function status */
  603. return status;
  604. }
  605. /**
  606. * @brief Clock absence detection callback.
  607. * @param hdfsdm_channel : DFSDM channel handle.
  608. * @retval None
  609. */
  610. __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  611. {
  612. /* Prevent unused argument(s) compilation warning */
  613. UNUSED(hdfsdm_channel);
  614. /* NOTE : This function should not be modified, when the callback is needed,
  615. the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
  616. */
  617. }
  618. /**
  619. * @brief This function allows to stop clock absence detection in interrupt mode.
  620. * @note Interrupt will be disabled for all channels
  621. * @param hdfsdm_channel : DFSDM channel handle.
  622. * @retval HAL status
  623. */
  624. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  625. {
  626. HAL_StatusTypeDef status = HAL_OK;
  627. uint32_t channel;
  628. /* Check parameters */
  629. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  630. /* Check DFSDM channel state */
  631. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  632. {
  633. /* Return error status */
  634. status = HAL_ERROR;
  635. }
  636. else
  637. {
  638. /* Stop clock absence detection */
  639. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  640. /* Clear clock absence flag */
  641. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  642. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  643. /* Disable clock absence detection interrupt */
  644. DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
  645. }
  646. /* Return function status */
  647. return status;
  648. }
  649. /**
  650. * @brief This function allows to start short circuit detection in polling mode.
  651. * @note Same mode has to be used for all channels
  652. * @param hdfsdm_channel : DFSDM channel handle.
  653. * @param Threshold : Short circuit detector threshold.
  654. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  655. * @param BreakSignal : Break signals assigned to short circuit event.
  656. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  657. * @retval HAL status
  658. */
  659. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  660. uint32_t Threshold,
  661. uint32_t BreakSignal)
  662. {
  663. HAL_StatusTypeDef status = HAL_OK;
  664. /* Check parameters */
  665. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  666. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  667. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  668. /* Check DFSDM channel state */
  669. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  670. {
  671. /* Return error status */
  672. status = HAL_ERROR;
  673. }
  674. else
  675. {
  676. /* Configure threshold and break signals */
  677. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  678. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
  679. Threshold);
  680. /* Start short circuit detection */
  681. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  682. }
  683. /* Return function status */
  684. return status;
  685. }
  686. /**
  687. * @brief This function allows to poll for the short circuit detection.
  688. * @param hdfsdm_channel : DFSDM channel handle.
  689. * @param Timeout : Timeout value in milliseconds.
  690. * @retval HAL status
  691. */
  692. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  693. uint32_t Timeout)
  694. {
  695. uint32_t tickstart;
  696. uint32_t channel;
  697. /* Check parameters */
  698. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  699. /* Check DFSDM channel state */
  700. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  701. {
  702. /* Return error status */
  703. return HAL_ERROR;
  704. }
  705. else
  706. {
  707. /* Get channel number from channel instance */
  708. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  709. /* Get timeout */
  710. tickstart = HAL_GetTick();
  711. /* Wait short circuit detection */
  712. while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0)
  713. {
  714. /* Check the Timeout */
  715. if(Timeout != HAL_MAX_DELAY)
  716. {
  717. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  718. {
  719. /* Return timeout status */
  720. return HAL_TIMEOUT;
  721. }
  722. }
  723. }
  724. /* Clear short circuit detection flag */
  725. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
  726. /* Return function status */
  727. return HAL_OK;
  728. }
  729. }
  730. /**
  731. * @brief This function allows to stop short circuit detection in polling mode.
  732. * @param hdfsdm_channel : DFSDM channel handle.
  733. * @retval HAL status
  734. */
  735. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  736. {
  737. HAL_StatusTypeDef status = HAL_OK;
  738. uint32_t channel;
  739. /* Check parameters */
  740. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  741. /* Check DFSDM channel state */
  742. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  743. {
  744. /* Return error status */
  745. status = HAL_ERROR;
  746. }
  747. else
  748. {
  749. /* Stop short circuit detection */
  750. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  751. /* Clear short circuit detection flag */
  752. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  753. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
  754. }
  755. /* Return function status */
  756. return status;
  757. }
  758. /**
  759. * @brief This function allows to start short circuit detection in interrupt mode.
  760. * @note Same mode has to be used for all channels
  761. * @param hdfsdm_channel : DFSDM channel handle.
  762. * @param Threshold : Short circuit detector threshold.
  763. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  764. * @param BreakSignal : Break signals assigned to short circuit event.
  765. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  766. * @retval HAL status
  767. */
  768. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  769. uint32_t Threshold,
  770. uint32_t BreakSignal)
  771. {
  772. HAL_StatusTypeDef status = HAL_OK;
  773. /* Check parameters */
  774. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  775. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  776. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  777. /* Check DFSDM channel state */
  778. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  779. {
  780. /* Return error status */
  781. status = HAL_ERROR;
  782. }
  783. else
  784. {
  785. /* Activate short circuit detection interrupt */
  786. DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
  787. /* Configure threshold and break signals */
  788. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  789. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
  790. Threshold);
  791. /* Start short circuit detection */
  792. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  793. }
  794. /* Return function status */
  795. return status;
  796. }
  797. /**
  798. * @brief Short circuit detection callback.
  799. * @param hdfsdm_channel : DFSDM channel handle.
  800. * @retval None
  801. */
  802. __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  803. {
  804. /* Prevent unused argument(s) compilation warning */
  805. UNUSED(hdfsdm_channel);
  806. /* NOTE : This function should not be modified, when the callback is needed,
  807. the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
  808. */
  809. }
  810. /**
  811. * @brief This function allows to stop short circuit detection in interrupt mode.
  812. * @note Interrupt will be disabled for all channels
  813. * @param hdfsdm_channel : DFSDM channel handle.
  814. * @retval HAL status
  815. */
  816. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  817. {
  818. HAL_StatusTypeDef status = HAL_OK;
  819. uint32_t channel;
  820. /* Check parameters */
  821. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  822. /* Check DFSDM channel state */
  823. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  824. {
  825. /* Return error status */
  826. status = HAL_ERROR;
  827. }
  828. else
  829. {
  830. /* Stop short circuit detection */
  831. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  832. /* Clear short circuit detection flag */
  833. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  834. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
  835. /* Disable short circuit detection interrupt */
  836. DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
  837. }
  838. /* Return function status */
  839. return status;
  840. }
  841. /**
  842. * @brief This function allows to get channel analog watchdog value.
  843. * @param hdfsdm_channel : DFSDM channel handle.
  844. * @retval Channel analog watchdog value.
  845. */
  846. int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  847. {
  848. return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
  849. }
  850. /**
  851. * @brief This function allows to modify channel offset value.
  852. * @param hdfsdm_channel : DFSDM channel handle.
  853. * @param Offset : DFSDM channel offset.
  854. * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
  855. * @retval HAL status.
  856. */
  857. HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  858. int32_t Offset)
  859. {
  860. HAL_StatusTypeDef status = HAL_OK;
  861. /* Check parameters */
  862. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  863. assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
  864. /* Check DFSDM channel state */
  865. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  866. {
  867. /* Return error status */
  868. status = HAL_ERROR;
  869. }
  870. else
  871. {
  872. /* Modify channel offset */
  873. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
  874. hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_OFFSET);
  875. }
  876. /* Return function status */
  877. return status;
  878. }
  879. /**
  880. * @}
  881. */
  882. /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
  883. * @brief Channel state function
  884. *
  885. @verbatim
  886. ==============================================================================
  887. ##### Channel state function #####
  888. ==============================================================================
  889. [..] This section provides function allowing to:
  890. (+) Get channel handle state.
  891. @endverbatim
  892. * @{
  893. */
  894. /**
  895. * @brief This function allows to get the current DFSDM channel handle state.
  896. * @param hdfsdm_channel : DFSDM channel handle.
  897. * @retval DFSDM channel state.
  898. */
  899. HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  900. {
  901. /* Return DFSDM channel handle state */
  902. return hdfsdm_channel->State;
  903. }
  904. /**
  905. * @}
  906. */
  907. /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
  908. * @brief Filter initialization and de-initialization functions
  909. *
  910. @verbatim
  911. ==============================================================================
  912. ##### Filter initialization and de-initialization functions #####
  913. ==============================================================================
  914. [..] This section provides functions allowing to:
  915. (+) Initialize the DFSDM filter.
  916. (+) De-initialize the DFSDM filter.
  917. @endverbatim
  918. * @{
  919. */
  920. /**
  921. * @brief Initialize the DFSDM filter according to the specified parameters
  922. * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
  923. * @param hdfsdm_filter : DFSDM filter handle.
  924. * @retval HAL status.
  925. */
  926. HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  927. {
  928. /* Check DFSDM Channel handle */
  929. if(hdfsdm_filter == NULL)
  930. {
  931. return HAL_ERROR;
  932. }
  933. /* Check parameters */
  934. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  935. assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
  936. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
  937. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
  938. assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
  939. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
  940. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
  941. assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
  942. assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
  943. assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
  944. /* Check parameters compatibility */
  945. if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
  946. ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
  947. (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
  948. {
  949. return HAL_ERROR;
  950. }
  951. /* Initialize DFSDM filter variables with default values */
  952. hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
  953. hdfsdm_filter->InjectedChannelsNbr = 1;
  954. hdfsdm_filter->InjConvRemaining = 1;
  955. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
  956. /* Call MSP init function */
  957. HAL_DFSDM_FilterMspInit(hdfsdm_filter);
  958. /* Set regular parameters */
  959. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  960. if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
  961. {
  962. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
  963. }
  964. else
  965. {
  966. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
  967. }
  968. if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
  969. {
  970. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
  971. }
  972. else
  973. {
  974. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
  975. }
  976. /* Set injected parameters */
  977. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
  978. if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
  979. {
  980. assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
  981. assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
  982. hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
  983. }
  984. if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
  985. {
  986. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
  987. }
  988. else
  989. {
  990. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
  991. }
  992. if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
  993. {
  994. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
  995. }
  996. else
  997. {
  998. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
  999. }
  1000. /* Set filter parameters */
  1001. hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
  1002. hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
  1003. ((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FLTFCR_FOSR_OFFSET) |
  1004. (hdfsdm_filter->Init.FilterParam.IntOversampling - 1));
  1005. /* Store regular and injected triggers and injected scan mode*/
  1006. hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
  1007. hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
  1008. hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
  1009. hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
  1010. /* Enable DFSDM filter */
  1011. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  1012. /* Set DFSDM filter to ready state */
  1013. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
  1014. return HAL_OK;
  1015. }
  1016. /**
  1017. * @brief De-initializes the DFSDM filter.
  1018. * @param hdfsdm_filter : DFSDM filter handle.
  1019. * @retval HAL status.
  1020. */
  1021. HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1022. {
  1023. /* Check DFSDM filter handle */
  1024. if(hdfsdm_filter == NULL)
  1025. {
  1026. return HAL_ERROR;
  1027. }
  1028. /* Check parameters */
  1029. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1030. /* Disable the DFSDM filter */
  1031. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  1032. /* Call MSP deinit function */
  1033. HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
  1034. /* Set DFSDM filter in reset state */
  1035. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
  1036. return HAL_OK;
  1037. }
  1038. /**
  1039. * @brief Initializes the DFSDM filter MSP.
  1040. * @param hdfsdm_filter : DFSDM filter handle.
  1041. * @retval None
  1042. */
  1043. __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1044. {
  1045. /* Prevent unused argument(s) compilation warning */
  1046. UNUSED(hdfsdm_filter);
  1047. /* NOTE : This function should not be modified, when the function is needed,
  1048. the HAL_DFSDM_FilterMspInit could be implemented in the user file.
  1049. */
  1050. }
  1051. /**
  1052. * @brief De-initializes the DFSDM filter MSP.
  1053. * @param hdfsdm_filter : DFSDM filter handle.
  1054. * @retval None
  1055. */
  1056. __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1057. {
  1058. /* Prevent unused argument(s) compilation warning */
  1059. UNUSED(hdfsdm_filter);
  1060. /* NOTE : This function should not be modified, when the function is needed,
  1061. the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
  1062. */
  1063. }
  1064. /**
  1065. * @}
  1066. */
  1067. /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
  1068. * @brief Filter control functions
  1069. *
  1070. @verbatim
  1071. ==============================================================================
  1072. ##### Filter control functions #####
  1073. ==============================================================================
  1074. [..] This section provides functions allowing to:
  1075. (+) Select channel and enable/disable continuous mode for regular conversion.
  1076. (+) Select channels for injected conversion.
  1077. @endverbatim
  1078. * @{
  1079. */
  1080. /**
  1081. * @brief This function allows to select channel and to enable/disable
  1082. * continuous mode for regular conversion.
  1083. * @param hdfsdm_filter : DFSDM filter handle.
  1084. * @param Channel : Channel for regular conversion.
  1085. * This parameter can be a value of @ref DFSDM_Channel_Selection.
  1086. * @param ContinuousMode : Enable/disable continuous mode for regular conversion.
  1087. * This parameter can be a value of @ref DFSDM_ContinuousMode.
  1088. * @retval HAL status
  1089. */
  1090. HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1091. uint32_t Channel,
  1092. uint32_t ContinuousMode)
  1093. {
  1094. HAL_StatusTypeDef status = HAL_OK;
  1095. /* Check parameters */
  1096. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1097. assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
  1098. assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
  1099. /* Check DFSDM filter state */
  1100. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1101. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1102. {
  1103. /* Configure channel and continuous mode for regular conversion */
  1104. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
  1105. if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
  1106. {
  1107. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
  1108. DFSDM_FLTCR1_RCONT);
  1109. }
  1110. else
  1111. {
  1112. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
  1113. }
  1114. /* Store continuous mode information */
  1115. hdfsdm_filter->RegularContMode = ContinuousMode;
  1116. }
  1117. else
  1118. {
  1119. status = HAL_ERROR;
  1120. }
  1121. /* Return function status */
  1122. return status;
  1123. }
  1124. /**
  1125. * @brief This function allows to select channels for injected conversion.
  1126. * @param hdfsdm_filter : DFSDM filter handle.
  1127. * @param Channel : Channels for injected conversion.
  1128. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  1129. * @retval HAL status
  1130. */
  1131. HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1132. uint32_t Channel)
  1133. {
  1134. HAL_StatusTypeDef status = HAL_OK;
  1135. /* Check parameters */
  1136. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1137. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  1138. /* Check DFSDM filter state */
  1139. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1140. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1141. {
  1142. /* Configure channel for injected conversion */
  1143. hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
  1144. /* Store number of injected channels */
  1145. hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
  1146. /* Update number of injected channels remaining */
  1147. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  1148. hdfsdm_filter->InjectedChannelsNbr : 1;
  1149. }
  1150. else
  1151. {
  1152. status = HAL_ERROR;
  1153. }
  1154. /* Return function status */
  1155. return status;
  1156. }
  1157. /**
  1158. * @}
  1159. */
  1160. /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
  1161. * @brief Filter operation functions
  1162. *
  1163. @verbatim
  1164. ==============================================================================
  1165. ##### Filter operation functions #####
  1166. ==============================================================================
  1167. [..] This section provides functions allowing to:
  1168. (+) Start conversion of regular/injected channel.
  1169. (+) Poll for the end of regular/injected conversion.
  1170. (+) Stop conversion of regular/injected channel.
  1171. (+) Start conversion of regular/injected channel and enable interrupt.
  1172. (+) Call the callback functions at the end of regular/injected conversions.
  1173. (+) Stop conversion of regular/injected channel and disable interrupt.
  1174. (+) Start conversion of regular/injected channel and enable DMA transfer.
  1175. (+) Stop conversion of regular/injected channel and disable DMA transfer.
  1176. (+) Start analog watchdog and enable interrupt.
  1177. (+) Call the callback function when analog watchdog occurs.
  1178. (+) Stop analog watchdog and disable interrupt.
  1179. (+) Start extreme detector.
  1180. (+) Stop extreme detector.
  1181. (+) Get result of regular channel conversion.
  1182. (+) Get result of injected channel conversion.
  1183. (+) Get extreme detector maximum and minimum values.
  1184. (+) Get conversion time.
  1185. (+) Handle DFSDM interrupt request.
  1186. @endverbatim
  1187. * @{
  1188. */
  1189. /**
  1190. * @brief This function allows to start regular conversion in polling mode.
  1191. * @note This function should be called only when DFSDM filter instance is
  1192. * in idle state or if injected conversion is ongoing.
  1193. * @param hdfsdm_filter : DFSDM filter handle.
  1194. * @retval HAL status
  1195. */
  1196. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1197. {
  1198. HAL_StatusTypeDef status = HAL_OK;
  1199. /* Check parameters */
  1200. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1201. /* Check DFSDM filter state */
  1202. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1203. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1204. {
  1205. /* Start regular conversion */
  1206. DFSDM_RegConvStart(hdfsdm_filter);
  1207. }
  1208. else
  1209. {
  1210. status = HAL_ERROR;
  1211. }
  1212. /* Return function status */
  1213. return status;
  1214. }
  1215. /**
  1216. * @brief This function allows to poll for the end of regular conversion.
  1217. * @note This function should be called only if regular conversion is ongoing.
  1218. * @param hdfsdm_filter : DFSDM filter handle.
  1219. * @param Timeout : Timeout value in milliseconds.
  1220. * @retval HAL status
  1221. */
  1222. HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1223. uint32_t Timeout)
  1224. {
  1225. uint32_t tickstart;
  1226. /* Check parameters */
  1227. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1228. /* Check DFSDM filter state */
  1229. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1230. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1231. {
  1232. /* Return error status */
  1233. return HAL_ERROR;
  1234. }
  1235. else
  1236. {
  1237. /* Get timeout */
  1238. tickstart = HAL_GetTick();
  1239. /* Wait end of regular conversion */
  1240. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
  1241. {
  1242. /* Check the Timeout */
  1243. if(Timeout != HAL_MAX_DELAY)
  1244. {
  1245. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  1246. {
  1247. /* Return timeout status */
  1248. return HAL_TIMEOUT;
  1249. }
  1250. }
  1251. }
  1252. /* Check if overrun occurs */
  1253. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
  1254. {
  1255. /* Update error code and call error callback */
  1256. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  1257. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  1258. /* Clear regular overrun flag */
  1259. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  1260. }
  1261. /* Update DFSDM filter state only if not continuous conversion and SW trigger */
  1262. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1263. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  1264. {
  1265. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  1266. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  1267. }
  1268. /* Return function status */
  1269. return HAL_OK;
  1270. }
  1271. }
  1272. /**
  1273. * @brief This function allows to stop regular conversion in polling mode.
  1274. * @note This function should be called only if regular conversion is ongoing.
  1275. * @param hdfsdm_filter : DFSDM filter handle.
  1276. * @retval HAL status
  1277. */
  1278. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1279. {
  1280. HAL_StatusTypeDef status = HAL_OK;
  1281. /* Check parameters */
  1282. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1283. /* Check DFSDM filter state */
  1284. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1285. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1286. {
  1287. /* Return error status */
  1288. status = HAL_ERROR;
  1289. }
  1290. else
  1291. {
  1292. /* Stop regular conversion */
  1293. DFSDM_RegConvStop(hdfsdm_filter);
  1294. }
  1295. /* Return function status */
  1296. return status;
  1297. }
  1298. /**
  1299. * @brief This function allows to start regular conversion in interrupt mode.
  1300. * @note This function should be called only when DFSDM filter instance is
  1301. * in idle state or if injected conversion is ongoing.
  1302. * @param hdfsdm_filter : DFSDM filter handle.
  1303. * @retval HAL status
  1304. */
  1305. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1306. {
  1307. HAL_StatusTypeDef status = HAL_OK;
  1308. /* Check parameters */
  1309. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1310. /* Check DFSDM filter state */
  1311. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1312. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1313. {
  1314. /* Enable interrupts for regular conversions */
  1315. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1316. /* Start regular conversion */
  1317. DFSDM_RegConvStart(hdfsdm_filter);
  1318. }
  1319. else
  1320. {
  1321. status = HAL_ERROR;
  1322. }
  1323. /* Return function status */
  1324. return status;
  1325. }
  1326. /**
  1327. * @brief This function allows to stop regular conversion in interrupt mode.
  1328. * @note This function should be called only if regular conversion is ongoing.
  1329. * @param hdfsdm_filter : DFSDM filter handle.
  1330. * @retval HAL status
  1331. */
  1332. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1333. {
  1334. HAL_StatusTypeDef status = HAL_OK;
  1335. /* Check parameters */
  1336. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1337. /* Check DFSDM filter state */
  1338. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1339. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1340. {
  1341. /* Return error status */
  1342. status = HAL_ERROR;
  1343. }
  1344. else
  1345. {
  1346. /* Disable interrupts for regular conversions */
  1347. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1348. /* Stop regular conversion */
  1349. DFSDM_RegConvStop(hdfsdm_filter);
  1350. }
  1351. /* Return function status */
  1352. return status;
  1353. }
  1354. /**
  1355. * @brief This function allows to start regular conversion in DMA mode.
  1356. * @note This function should be called only when DFSDM filter instance is
  1357. * in idle state or if injected conversion is ongoing.
  1358. * Please note that data on buffer will contain signed regular conversion
  1359. * value on 24 most significant bits and corresponding channel on 3 least
  1360. * significant bits.
  1361. * @param hdfsdm_filter : DFSDM filter handle.
  1362. * @param pData : The destination buffer address.
  1363. * @param Length : The length of data to be transferred from DFSDM filter to memory.
  1364. * @retval HAL status
  1365. */
  1366. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1367. int32_t *pData,
  1368. uint32_t Length)
  1369. {
  1370. HAL_StatusTypeDef status = HAL_OK;
  1371. /* Check parameters */
  1372. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1373. /* Check destination address and length */
  1374. if((pData == NULL) || (Length == 0))
  1375. {
  1376. status = HAL_ERROR;
  1377. }
  1378. /* Check that DMA is enabled for regular conversion */
  1379. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  1380. {
  1381. status = HAL_ERROR;
  1382. }
  1383. /* Check parameters compatibility */
  1384. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1385. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1386. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  1387. (Length != 1))
  1388. {
  1389. status = HAL_ERROR;
  1390. }
  1391. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1392. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1393. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  1394. {
  1395. status = HAL_ERROR;
  1396. }
  1397. /* Check DFSDM filter state */
  1398. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1399. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1400. {
  1401. /* Set callbacks on DMA handler */
  1402. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  1403. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  1404. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  1405. DFSDM_DMARegularHalfConvCplt : NULL;
  1406. /* Start DMA in interrupt mode */
  1407. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
  1408. (uint32_t) pData, Length) != HAL_OK)
  1409. {
  1410. /* Set DFSDM filter in error state */
  1411. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1412. status = HAL_ERROR;
  1413. }
  1414. else
  1415. {
  1416. /* Start regular conversion */
  1417. DFSDM_RegConvStart(hdfsdm_filter);
  1418. }
  1419. }
  1420. else
  1421. {
  1422. status = HAL_ERROR;
  1423. }
  1424. /* Return function status */
  1425. return status;
  1426. }
  1427. /**
  1428. * @brief This function allows to start regular conversion in DMA mode and to get
  1429. * only the 16 most significant bits of conversion.
  1430. * @note This function should be called only when DFSDM filter instance is
  1431. * in idle state or if injected conversion is ongoing.
  1432. * Please note that data on buffer will contain signed 16 most significant
  1433. * bits of regular conversion.
  1434. * @param hdfsdm_filter : DFSDM filter handle.
  1435. * @param pData : The destination buffer address.
  1436. * @param Length : The length of data to be transferred from DFSDM filter to memory.
  1437. * @retval HAL status
  1438. */
  1439. HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1440. int16_t *pData,
  1441. uint32_t Length)
  1442. {
  1443. HAL_StatusTypeDef status = HAL_OK;
  1444. /* Check parameters */
  1445. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1446. /* Check destination address and length */
  1447. if((pData == NULL) || (Length == 0))
  1448. {
  1449. status = HAL_ERROR;
  1450. }
  1451. /* Check that DMA is enabled for regular conversion */
  1452. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  1453. {
  1454. status = HAL_ERROR;
  1455. }
  1456. /* Check parameters compatibility */
  1457. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1458. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1459. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  1460. (Length != 1))
  1461. {
  1462. status = HAL_ERROR;
  1463. }
  1464. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1465. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1466. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  1467. {
  1468. status = HAL_ERROR;
  1469. }
  1470. /* Check DFSDM filter state */
  1471. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1472. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1473. {
  1474. /* Set callbacks on DMA handler */
  1475. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  1476. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  1477. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  1478. DFSDM_DMARegularHalfConvCplt : NULL;
  1479. /* Start DMA in interrupt mode */
  1480. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2, \
  1481. (uint32_t) pData, Length) != HAL_OK)
  1482. {
  1483. /* Set DFSDM filter in error state */
  1484. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1485. status = HAL_ERROR;
  1486. }
  1487. else
  1488. {
  1489. /* Start regular conversion */
  1490. DFSDM_RegConvStart(hdfsdm_filter);
  1491. }
  1492. }
  1493. else
  1494. {
  1495. status = HAL_ERROR;
  1496. }
  1497. /* Return function status */
  1498. return status;
  1499. }
  1500. /**
  1501. * @brief This function allows to stop regular conversion in DMA mode.
  1502. * @note This function should be called only if regular conversion is ongoing.
  1503. * @param hdfsdm_filter : DFSDM filter handle.
  1504. * @retval HAL status
  1505. */
  1506. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1507. {
  1508. HAL_StatusTypeDef status = HAL_OK;
  1509. /* Check parameters */
  1510. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1511. /* Check DFSDM filter state */
  1512. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1513. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1514. {
  1515. /* Return error status */
  1516. status = HAL_ERROR;
  1517. }
  1518. else
  1519. {
  1520. /* Stop current DMA transfer */
  1521. if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
  1522. {
  1523. /* Set DFSDM filter in error state */
  1524. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1525. status = HAL_ERROR;
  1526. }
  1527. else
  1528. {
  1529. /* Stop regular conversion */
  1530. DFSDM_RegConvStop(hdfsdm_filter);
  1531. }
  1532. }
  1533. /* Return function status */
  1534. return status;
  1535. }
  1536. /**
  1537. * @brief This function allows to get regular conversion value.
  1538. * @param hdfsdm_filter : DFSDM filter handle.
  1539. * @param Channel : Corresponding channel of regular conversion.
  1540. * @retval Regular conversion value
  1541. */
  1542. int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1543. uint32_t *Channel)
  1544. {
  1545. uint32_t reg = 0;
  1546. int32_t value = 0;
  1547. /* Check parameters */
  1548. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1549. assert_param(Channel != NULL);
  1550. /* Get value of data register for regular channel */
  1551. reg = hdfsdm_filter->Instance->FLTRDATAR;
  1552. /* Extract channel and regular conversion value */
  1553. *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
  1554. value = ((int32_t)(reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_DATA_OFFSET);
  1555. /* return regular conversion value */
  1556. return value;
  1557. }
  1558. /**
  1559. * @brief This function allows to start injected conversion in polling mode.
  1560. * @note This function should be called only when DFSDM filter instance is
  1561. * in idle state or if regular conversion is ongoing.
  1562. * @param hdfsdm_filter : DFSDM filter handle.
  1563. * @retval HAL status
  1564. */
  1565. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1566. {
  1567. HAL_StatusTypeDef status = HAL_OK;
  1568. /* Check parameters */
  1569. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1570. /* Check DFSDM filter state */
  1571. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1572. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1573. {
  1574. /* Start injected conversion */
  1575. DFSDM_InjConvStart(hdfsdm_filter);
  1576. }
  1577. else
  1578. {
  1579. status = HAL_ERROR;
  1580. }
  1581. /* Return function status */
  1582. return status;
  1583. }
  1584. /**
  1585. * @brief This function allows to poll for the end of injected conversion.
  1586. * @note This function should be called only if injected conversion is ongoing.
  1587. * @param hdfsdm_filter : DFSDM filter handle.
  1588. * @param Timeout : Timeout value in milliseconds.
  1589. * @retval HAL status
  1590. */
  1591. HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1592. uint32_t Timeout)
  1593. {
  1594. uint32_t tickstart;
  1595. /* Check parameters */
  1596. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1597. /* Check DFSDM filter state */
  1598. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1599. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1600. {
  1601. /* Return error status */
  1602. return HAL_ERROR;
  1603. }
  1604. else
  1605. {
  1606. /* Get timeout */
  1607. tickstart = HAL_GetTick();
  1608. /* Wait end of injected conversions */
  1609. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
  1610. {
  1611. /* Check the Timeout */
  1612. if(Timeout != HAL_MAX_DELAY)
  1613. {
  1614. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  1615. {
  1616. /* Return timeout status */
  1617. return HAL_TIMEOUT;
  1618. }
  1619. }
  1620. }
  1621. /* Check if overrun occurs */
  1622. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
  1623. {
  1624. /* Update error code and call error callback */
  1625. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  1626. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  1627. /* Clear injected overrun flag */
  1628. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  1629. }
  1630. /* Update remaining injected conversions */
  1631. hdfsdm_filter->InjConvRemaining--;
  1632. if(hdfsdm_filter->InjConvRemaining == 0)
  1633. {
  1634. /* Update DFSDM filter state only if trigger is software */
  1635. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  1636. {
  1637. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  1638. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  1639. }
  1640. /* end of injected sequence, reset the value */
  1641. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  1642. hdfsdm_filter->InjectedChannelsNbr : 1;
  1643. }
  1644. /* Return function status */
  1645. return HAL_OK;
  1646. }
  1647. }
  1648. /**
  1649. * @brief This function allows to stop injected conversion in polling mode.
  1650. * @note This function should be called only if injected conversion is ongoing.
  1651. * @param hdfsdm_filter : DFSDM filter handle.
  1652. * @retval HAL status
  1653. */
  1654. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1655. {
  1656. HAL_StatusTypeDef status = HAL_OK;
  1657. /* Check parameters */
  1658. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1659. /* Check DFSDM filter state */
  1660. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1661. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1662. {
  1663. /* Return error status */
  1664. status = HAL_ERROR;
  1665. }
  1666. else
  1667. {
  1668. /* Stop injected conversion */
  1669. DFSDM_InjConvStop(hdfsdm_filter);
  1670. }
  1671. /* Return function status */
  1672. return status;
  1673. }
  1674. /**
  1675. * @brief This function allows to start injected conversion in interrupt mode.
  1676. * @note This function should be called only when DFSDM filter instance is
  1677. * in idle state or if regular conversion is ongoing.
  1678. * @param hdfsdm_filter : DFSDM filter handle.
  1679. * @retval HAL status
  1680. */
  1681. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1682. {
  1683. HAL_StatusTypeDef status = HAL_OK;
  1684. /* Check parameters */
  1685. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1686. /* Check DFSDM filter state */
  1687. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1688. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1689. {
  1690. /* Enable interrupts for injected conversions */
  1691. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  1692. /* Start injected conversion */
  1693. DFSDM_InjConvStart(hdfsdm_filter);
  1694. }
  1695. else
  1696. {
  1697. status = HAL_ERROR;
  1698. }
  1699. /* Return function status */
  1700. return status;
  1701. }
  1702. /**
  1703. * @brief This function allows to stop injected conversion in interrupt mode.
  1704. * @note This function should be called only if injected conversion is ongoing.
  1705. * @param hdfsdm_filter : DFSDM filter handle.
  1706. * @retval HAL status
  1707. */
  1708. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1709. {
  1710. HAL_StatusTypeDef status = HAL_OK;
  1711. /* Check parameters */
  1712. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1713. /* Check DFSDM filter state */
  1714. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1715. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1716. {
  1717. /* Return error status */
  1718. status = HAL_ERROR;
  1719. }
  1720. else
  1721. {
  1722. /* Disable interrupts for injected conversions */
  1723. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  1724. /* Stop injected conversion */
  1725. DFSDM_InjConvStop(hdfsdm_filter);
  1726. }
  1727. /* Return function status */
  1728. return status;
  1729. }
  1730. /**
  1731. * @brief This function allows to start injected conversion in DMA mode.
  1732. * @note This function should be called only when DFSDM filter instance is
  1733. * in idle state or if regular conversion is ongoing.
  1734. * Please note that data on buffer will contain signed injected conversion
  1735. * value on 24 most significant bits and corresponding channel on 3 least
  1736. * significant bits.
  1737. * @param hdfsdm_filter : DFSDM filter handle.
  1738. * @param pData : The destination buffer address.
  1739. * @param Length : The length of data to be transferred from DFSDM filter to memory.
  1740. * @retval HAL status
  1741. */
  1742. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1743. int32_t *pData,
  1744. uint32_t Length)
  1745. {
  1746. HAL_StatusTypeDef status = HAL_OK;
  1747. /* Check parameters */
  1748. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1749. /* Check destination address and length */
  1750. if((pData == NULL) || (Length == 0))
  1751. {
  1752. status = HAL_ERROR;
  1753. }
  1754. /* Check that DMA is enabled for injected conversion */
  1755. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  1756. {
  1757. status = HAL_ERROR;
  1758. }
  1759. /* Check parameters compatibility */
  1760. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1761. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  1762. (Length > hdfsdm_filter->InjConvRemaining))
  1763. {
  1764. status = HAL_ERROR;
  1765. }
  1766. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1767. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  1768. {
  1769. status = HAL_ERROR;
  1770. }
  1771. /* Check DFSDM filter state */
  1772. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1773. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1774. {
  1775. /* Set callbacks on DMA handler */
  1776. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  1777. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  1778. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  1779. DFSDM_DMAInjectedHalfConvCplt : NULL;
  1780. /* Start DMA in interrupt mode */
  1781. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
  1782. (uint32_t) pData, Length) != HAL_OK)
  1783. {
  1784. /* Set DFSDM filter in error state */
  1785. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1786. status = HAL_ERROR;
  1787. }
  1788. else
  1789. {
  1790. /* Start injected conversion */
  1791. DFSDM_InjConvStart(hdfsdm_filter);
  1792. }
  1793. }
  1794. else
  1795. {
  1796. status = HAL_ERROR;
  1797. }
  1798. /* Return function status */
  1799. return status;
  1800. }
  1801. /**
  1802. * @brief This function allows to start injected conversion in DMA mode and to get
  1803. * only the 16 most significant bits of conversion.
  1804. * @note This function should be called only when DFSDM filter instance is
  1805. * in idle state or if regular conversion is ongoing.
  1806. * Please note that data on buffer will contain signed 16 most significant
  1807. * bits of injected conversion.
  1808. * @param hdfsdm_filter : DFSDM filter handle.
  1809. * @param pData : The destination buffer address.
  1810. * @param Length : The length of data to be transferred from DFSDM filter to memory.
  1811. * @retval HAL status
  1812. */
  1813. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1814. int16_t *pData,
  1815. uint32_t Length)
  1816. {
  1817. HAL_StatusTypeDef status = HAL_OK;
  1818. /* Check parameters */
  1819. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1820. /* Check destination address and length */
  1821. if((pData == NULL) || (Length == 0))
  1822. {
  1823. status = HAL_ERROR;
  1824. }
  1825. /* Check that DMA is enabled for injected conversion */
  1826. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  1827. {
  1828. status = HAL_ERROR;
  1829. }
  1830. /* Check parameters compatibility */
  1831. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1832. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  1833. (Length > hdfsdm_filter->InjConvRemaining))
  1834. {
  1835. status = HAL_ERROR;
  1836. }
  1837. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1838. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  1839. {
  1840. status = HAL_ERROR;
  1841. }
  1842. /* Check DFSDM filter state */
  1843. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1844. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1845. {
  1846. /* Set callbacks on DMA handler */
  1847. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  1848. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  1849. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  1850. DFSDM_DMAInjectedHalfConvCplt : NULL;
  1851. /* Start DMA in interrupt mode */
  1852. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2, \
  1853. (uint32_t) pData, Length) != HAL_OK)
  1854. {
  1855. /* Set DFSDM filter in error state */
  1856. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1857. status = HAL_ERROR;
  1858. }
  1859. else
  1860. {
  1861. /* Start injected conversion */
  1862. DFSDM_InjConvStart(hdfsdm_filter);
  1863. }
  1864. }
  1865. else
  1866. {
  1867. status = HAL_ERROR;
  1868. }
  1869. /* Return function status */
  1870. return status;
  1871. }
  1872. /**
  1873. * @brief This function allows to stop injected conversion in DMA mode.
  1874. * @note This function should be called only if injected conversion is ongoing.
  1875. * @param hdfsdm_filter : DFSDM filter handle.
  1876. * @retval HAL status
  1877. */
  1878. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1879. {
  1880. HAL_StatusTypeDef status = HAL_OK;
  1881. /* Check parameters */
  1882. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1883. /* Check DFSDM filter state */
  1884. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1885. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1886. {
  1887. /* Return error status */
  1888. status = HAL_ERROR;
  1889. }
  1890. else
  1891. {
  1892. /* Stop current DMA transfer */
  1893. if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
  1894. {
  1895. /* Set DFSDM filter in error state */
  1896. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1897. status = HAL_ERROR;
  1898. }
  1899. else
  1900. {
  1901. /* Stop regular conversion */
  1902. DFSDM_InjConvStop(hdfsdm_filter);
  1903. }
  1904. }
  1905. /* Return function status */
  1906. return status;
  1907. }
  1908. /**
  1909. * @brief This function allows to get injected conversion value.
  1910. * @param hdfsdm_filter : DFSDM filter handle.
  1911. * @param Channel : Corresponding channel of injected conversion.
  1912. * @retval Injected conversion value
  1913. */
  1914. int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1915. uint32_t *Channel)
  1916. {
  1917. uint32_t reg = 0;
  1918. int32_t value = 0;
  1919. /* Check parameters */
  1920. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1921. assert_param(Channel != NULL);
  1922. /* Get value of data register for injected channel */
  1923. reg = hdfsdm_filter->Instance->FLTJDATAR;
  1924. /* Extract channel and injected conversion value */
  1925. *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
  1926. value = ((int32_t)(reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_DATA_OFFSET);
  1927. /* return regular conversion value */
  1928. return value;
  1929. }
  1930. /**
  1931. * @brief This function allows to start filter analog watchdog in interrupt mode.
  1932. * @param hdfsdm_filter : DFSDM filter handle.
  1933. * @param awdParam : DFSDM filter analog watchdog parameters.
  1934. * @retval HAL status
  1935. */
  1936. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1937. DFSDM_Filter_AwdParamTypeDef *awdParam)
  1938. {
  1939. HAL_StatusTypeDef status = HAL_OK;
  1940. /* Check parameters */
  1941. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1942. assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
  1943. assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
  1944. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
  1945. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
  1946. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
  1947. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
  1948. /* Check DFSDM filter state */
  1949. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  1950. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  1951. {
  1952. /* Return error status */
  1953. status = HAL_ERROR;
  1954. }
  1955. else
  1956. {
  1957. /* Set analog watchdog data source */
  1958. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  1959. hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
  1960. /* Set thresholds and break signals */
  1961. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  1962. hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_THRESHOLD_OFFSET) | \
  1963. awdParam->HighBreakSignal);
  1964. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  1965. hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_THRESHOLD_OFFSET) | \
  1966. awdParam->LowBreakSignal);
  1967. /* Set channels and interrupt for analog watchdog */
  1968. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
  1969. hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_OFFSET) | \
  1970. DFSDM_FLTCR2_AWDIE);
  1971. }
  1972. /* Return function status */
  1973. return status;
  1974. }
  1975. /**
  1976. * @brief This function allows to stop filter analog watchdog in interrupt mode.
  1977. * @param hdfsdm_filter : DFSDM filter handle.
  1978. * @retval HAL status
  1979. */
  1980. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1981. {
  1982. HAL_StatusTypeDef status = HAL_OK;
  1983. /* Check parameters */
  1984. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1985. /* Check DFSDM filter state */
  1986. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  1987. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  1988. {
  1989. /* Return error status */
  1990. status = HAL_ERROR;
  1991. }
  1992. else
  1993. {
  1994. /* Reset channels for analog watchdog and deactivate interrupt */
  1995. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
  1996. /* Clear all analog watchdog flags */
  1997. hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
  1998. /* Reset thresholds and break signals */
  1999. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  2000. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  2001. /* Reset analog watchdog data source */
  2002. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  2003. }
  2004. /* Return function status */
  2005. return status;
  2006. }
  2007. /**
  2008. * @brief This function allows to start extreme detector feature.
  2009. * @param hdfsdm_filter : DFSDM filter handle.
  2010. * @param Channel : Channels where extreme detector is enabled.
  2011. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  2012. * @retval HAL status
  2013. */
  2014. HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2015. uint32_t Channel)
  2016. {
  2017. HAL_StatusTypeDef status = HAL_OK;
  2018. /* Check parameters */
  2019. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2020. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  2021. /* Check DFSDM filter state */
  2022. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2023. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2024. {
  2025. /* Return error status */
  2026. status = HAL_ERROR;
  2027. }
  2028. else
  2029. {
  2030. /* Set channels for extreme detector */
  2031. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2032. hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_OFFSET);
  2033. }
  2034. /* Return function status */
  2035. return status;
  2036. }
  2037. /**
  2038. * @brief This function allows to stop extreme detector feature.
  2039. * @param hdfsdm_filter : DFSDM filter handle.
  2040. * @retval HAL status
  2041. */
  2042. HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2043. {
  2044. HAL_StatusTypeDef status = HAL_OK;
  2045. __IO uint32_t reg1;
  2046. __IO uint32_t reg2;
  2047. /* Check parameters */
  2048. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2049. /* Check DFSDM filter state */
  2050. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2051. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2052. {
  2053. /* Return error status */
  2054. status = HAL_ERROR;
  2055. }
  2056. else
  2057. {
  2058. /* Reset channels for extreme detector */
  2059. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2060. /* Clear extreme detector values */
  2061. reg1 = hdfsdm_filter->Instance->FLTEXMAX;
  2062. reg2 = hdfsdm_filter->Instance->FLTEXMIN;
  2063. UNUSED(reg1); /* To avoid GCC warning */
  2064. UNUSED(reg2); /* To avoid GCC warning */
  2065. }
  2066. /* Return function status */
  2067. return status;
  2068. }
  2069. /**
  2070. * @brief This function allows to get extreme detector maximum value.
  2071. * @param hdfsdm_filter : DFSDM filter handle.
  2072. * @param Channel : Corresponding channel.
  2073. * @retval Extreme detector maximum value
  2074. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2075. */
  2076. int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2077. uint32_t *Channel)
  2078. {
  2079. uint32_t reg = 0;
  2080. int32_t value = 0;
  2081. /* Check parameters */
  2082. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2083. assert_param(Channel != NULL);
  2084. /* Get value of extreme detector maximum register */
  2085. reg = hdfsdm_filter->Instance->FLTEXMAX;
  2086. /* Extract channel and extreme detector maximum value */
  2087. *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
  2088. value = ((int32_t)(reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_DATA_OFFSET);
  2089. /* return extreme detector maximum value */
  2090. return value;
  2091. }
  2092. /**
  2093. * @brief This function allows to get extreme detector minimum value.
  2094. * @param hdfsdm_filter : DFSDM filter handle.
  2095. * @param Channel : Corresponding channel.
  2096. * @retval Extreme detector minimum value
  2097. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2098. */
  2099. int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2100. uint32_t *Channel)
  2101. {
  2102. uint32_t reg = 0;
  2103. int32_t value = 0;
  2104. /* Check parameters */
  2105. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2106. assert_param(Channel != NULL);
  2107. /* Get value of extreme detector minimum register */
  2108. reg = hdfsdm_filter->Instance->FLTEXMIN;
  2109. /* Extract channel and extreme detector minimum value */
  2110. *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
  2111. value = ((int32_t)(reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_DATA_OFFSET);
  2112. /* return extreme detector minimum value */
  2113. return value;
  2114. }
  2115. /**
  2116. * @brief This function allows to get conversion time value.
  2117. * @param hdfsdm_filter : DFSDM filter handle.
  2118. * @retval Conversion time value
  2119. * @note To get time in second, this value has to be divided by DFSDM clock frequency.
  2120. */
  2121. uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2122. {
  2123. uint32_t reg = 0;
  2124. uint32_t value = 0;
  2125. /* Check parameters */
  2126. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2127. /* Get value of conversion timer register */
  2128. reg = hdfsdm_filter->Instance->FLTCNVTIMR;
  2129. /* Extract conversion time value */
  2130. value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_DATA_OFFSET);
  2131. /* return extreme detector minimum value */
  2132. return value;
  2133. }
  2134. /**
  2135. * @brief This function handles the DFSDM interrupts.
  2136. * @param hdfsdm_filter : DFSDM filter handle.
  2137. * @retval None
  2138. */
  2139. void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2140. {
  2141. /* Check if overrun occurs during regular conversion */
  2142. if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0) && \
  2143. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0))
  2144. {
  2145. /* Clear regular overrun flag */
  2146. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  2147. /* Update error code */
  2148. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  2149. /* Call error callback */
  2150. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2151. }
  2152. /* Check if overrun occurs during injected conversion */
  2153. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0) && \
  2154. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0))
  2155. {
  2156. /* Clear injected overrun flag */
  2157. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  2158. /* Update error code */
  2159. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  2160. /* Call error callback */
  2161. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2162. }
  2163. /* Check if end of regular conversion */
  2164. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0) && \
  2165. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0))
  2166. {
  2167. /* Call regular conversion complete callback */
  2168. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  2169. /* End of conversion if mode is not continuous and software trigger */
  2170. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  2171. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2172. {
  2173. /* Disable interrupts for regular conversions */
  2174. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
  2175. /* Update DFSDM filter state */
  2176. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  2177. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  2178. }
  2179. }
  2180. /* Check if end of injected conversion */
  2181. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0) && \
  2182. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0))
  2183. {
  2184. /* Call injected conversion complete callback */
  2185. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  2186. /* Update remaining injected conversions */
  2187. hdfsdm_filter->InjConvRemaining--;
  2188. if(hdfsdm_filter->InjConvRemaining == 0)
  2189. {
  2190. /* End of conversion if trigger is software */
  2191. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2192. {
  2193. /* Disable interrupts for injected conversions */
  2194. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
  2195. /* Update DFSDM filter state */
  2196. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2197. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2198. }
  2199. /* end of injected sequence, reset the value */
  2200. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2201. hdfsdm_filter->InjectedChannelsNbr : 1;
  2202. }
  2203. }
  2204. /* Check if analog watchdog occurs */
  2205. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0) && \
  2206. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0))
  2207. {
  2208. uint32_t reg = 0;
  2209. uint32_t threshold = 0;
  2210. uint32_t channel = 0;
  2211. /* Get channel and threshold */
  2212. reg = hdfsdm_filter->Instance->FLTAWSR;
  2213. threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
  2214. if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
  2215. {
  2216. reg = reg >> DFSDM_FLTAWSR_HIGH_OFFSET;
  2217. }
  2218. while((reg & 1) == 0)
  2219. {
  2220. channel++;
  2221. reg = reg >> 1;
  2222. }
  2223. /* Clear analog watchdog flag */
  2224. hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
  2225. (1 << (DFSDM_FLTAWSR_HIGH_OFFSET + channel)) : \
  2226. (1 << channel);
  2227. /* Call analog watchdog callback */
  2228. HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
  2229. }
  2230. /* Check if clock absence occurs */
  2231. else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
  2232. ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0) && \
  2233. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0))
  2234. {
  2235. uint32_t reg = 0;
  2236. uint32_t channel = 0;
  2237. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
  2238. while(channel < DFSDM1_CHANNEL_NUMBER)
  2239. {
  2240. /* Check if flag is set and corresponding channel is enabled */
  2241. if(((reg & 1) != 0) && (a_dfsdm1ChannelHandle[channel] != NULL))
  2242. {
  2243. /* Check clock absence has been enabled for this channel */
  2244. if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0)
  2245. {
  2246. /* Clear clock absence flag */
  2247. hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
  2248. /* Call clock absence callback */
  2249. HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
  2250. }
  2251. }
  2252. channel++;
  2253. reg = reg >> 1;
  2254. }
  2255. }
  2256. /* Check if short circuit detection occurs */
  2257. else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
  2258. ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0) && \
  2259. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0))
  2260. {
  2261. uint32_t reg = 0;
  2262. uint32_t channel = 0;
  2263. /* Get channel */
  2264. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
  2265. while((reg & 1) == 0)
  2266. {
  2267. channel++;
  2268. reg = reg >> 1;
  2269. }
  2270. /* Clear short circuit detection flag */
  2271. hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
  2272. /* Call short circuit detection callback */
  2273. HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
  2274. }
  2275. }
  2276. /**
  2277. * @brief Regular conversion complete callback.
  2278. * @note In interrupt mode, user has to read conversion value in this function
  2279. * using HAL_DFSDM_FilterGetRegularValue.
  2280. * @param hdfsdm_filter : DFSDM filter handle.
  2281. * @retval None
  2282. */
  2283. __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2284. {
  2285. /* Prevent unused argument(s) compilation warning */
  2286. UNUSED(hdfsdm_filter);
  2287. /* NOTE : This function should not be modified, when the callback is needed,
  2288. the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
  2289. */
  2290. }
  2291. /**
  2292. * @brief Half regular conversion complete callback.
  2293. * @param hdfsdm_filter : DFSDM filter handle.
  2294. * @retval None
  2295. */
  2296. __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2297. {
  2298. /* Prevent unused argument(s) compilation warning */
  2299. UNUSED(hdfsdm_filter);
  2300. /* NOTE : This function should not be modified, when the callback is needed,
  2301. the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
  2302. */
  2303. }
  2304. /**
  2305. * @brief Injected conversion complete callback.
  2306. * @note In interrupt mode, user has to read conversion value in this function
  2307. * using HAL_DFSDM_FilterGetInjectedValue.
  2308. * @param hdfsdm_filter : DFSDM filter handle.
  2309. * @retval None
  2310. */
  2311. __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2312. {
  2313. /* Prevent unused argument(s) compilation warning */
  2314. UNUSED(hdfsdm_filter);
  2315. /* NOTE : This function should not be modified, when the callback is needed,
  2316. the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
  2317. */
  2318. }
  2319. /**
  2320. * @brief Half injected conversion complete callback.
  2321. * @param hdfsdm_filter : DFSDM filter handle.
  2322. * @retval None
  2323. */
  2324. __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2325. {
  2326. /* Prevent unused argument(s) compilation warning */
  2327. UNUSED(hdfsdm_filter);
  2328. /* NOTE : This function should not be modified, when the callback is needed,
  2329. the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
  2330. */
  2331. }
  2332. /**
  2333. * @brief Filter analog watchdog callback.
  2334. * @param hdfsdm_filter : DFSDM filter handle.
  2335. * @param Channel : Corresponding channel.
  2336. * @param Threshold : Low or high threshold has been reached.
  2337. * @retval None
  2338. */
  2339. __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2340. uint32_t Channel, uint32_t Threshold)
  2341. {
  2342. /* Prevent unused argument(s) compilation warning */
  2343. UNUSED(hdfsdm_filter);
  2344. UNUSED(Channel);
  2345. UNUSED(Threshold);
  2346. /* NOTE : This function should not be modified, when the callback is needed,
  2347. the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
  2348. */
  2349. }
  2350. /**
  2351. * @brief Error callback.
  2352. * @param hdfsdm_filter : DFSDM filter handle.
  2353. * @retval None
  2354. */
  2355. __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2356. {
  2357. /* Prevent unused argument(s) compilation warning */
  2358. UNUSED(hdfsdm_filter);
  2359. /* NOTE : This function should not be modified, when the callback is needed,
  2360. the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
  2361. */
  2362. }
  2363. /**
  2364. * @}
  2365. */
  2366. /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
  2367. * @brief Filter state functions
  2368. *
  2369. @verbatim
  2370. ==============================================================================
  2371. ##### Filter state functions #####
  2372. ==============================================================================
  2373. [..] This section provides functions allowing to:
  2374. (+) Get the DFSDM filter state.
  2375. (+) Get the DFSDM filter error.
  2376. @endverbatim
  2377. * @{
  2378. */
  2379. /**
  2380. * @brief This function allows to get the current DFSDM filter handle state.
  2381. * @param hdfsdm_filter : DFSDM filter handle.
  2382. * @retval DFSDM filter state.
  2383. */
  2384. HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2385. {
  2386. /* Return DFSDM filter handle state */
  2387. return hdfsdm_filter->State;
  2388. }
  2389. /**
  2390. * @brief This function allows to get the current DFSDM filter error.
  2391. * @param hdfsdm_filter : DFSDM filter handle.
  2392. * @retval DFSDM filter error code.
  2393. */
  2394. uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2395. {
  2396. return hdfsdm_filter->ErrorCode;
  2397. }
  2398. /**
  2399. * @}
  2400. */
  2401. /**
  2402. * @}
  2403. */
  2404. /* End of exported functions -------------------------------------------------*/
  2405. /* Private functions ---------------------------------------------------------*/
  2406. /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
  2407. * @{
  2408. */
  2409. /**
  2410. * @brief DMA half transfer complete callback for regular conversion.
  2411. * @param hdma : DMA handle.
  2412. * @retval None
  2413. */
  2414. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
  2415. {
  2416. /* Get DFSDM filter handle */
  2417. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2418. /* Call regular half conversion complete callback */
  2419. HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
  2420. }
  2421. /**
  2422. * @brief DMA transfer complete callback for regular conversion.
  2423. * @param hdma : DMA handle.
  2424. * @retval None
  2425. */
  2426. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
  2427. {
  2428. /* Get DFSDM filter handle */
  2429. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2430. /* Call regular conversion complete callback */
  2431. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  2432. }
  2433. /**
  2434. * @brief DMA half transfer complete callback for injected conversion.
  2435. * @param hdma : DMA handle.
  2436. * @retval None
  2437. */
  2438. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
  2439. {
  2440. /* Get DFSDM filter handle */
  2441. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2442. /* Call injected half conversion complete callback */
  2443. HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
  2444. }
  2445. /**
  2446. * @brief DMA transfer complete callback for injected conversion.
  2447. * @param hdma : DMA handle.
  2448. * @retval None
  2449. */
  2450. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
  2451. {
  2452. /* Get DFSDM filter handle */
  2453. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2454. /* Call injected conversion complete callback */
  2455. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  2456. }
  2457. /**
  2458. * @brief DMA error callback.
  2459. * @param hdma : DMA handle.
  2460. * @retval None
  2461. */
  2462. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
  2463. {
  2464. /* Get DFSDM filter handle */
  2465. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2466. /* Update error code */
  2467. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
  2468. /* Call error callback */
  2469. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2470. }
  2471. /**
  2472. * @brief This function allows to get the number of injected channels.
  2473. * @param Channels : bitfield of injected channels.
  2474. * @retval Number of injected channels.
  2475. */
  2476. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
  2477. {
  2478. uint32_t nbChannels = 0;
  2479. uint32_t tmp;
  2480. /* Get the number of channels from bitfield */
  2481. tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
  2482. while(tmp != 0)
  2483. {
  2484. if((tmp & 1) != 0)
  2485. {
  2486. nbChannels++;
  2487. }
  2488. tmp = (uint32_t) (tmp >> 1);
  2489. }
  2490. return nbChannels;
  2491. }
  2492. /**
  2493. * @brief This function allows to get the channel number from channel instance.
  2494. * @param Instance : DFSDM channel instance.
  2495. * @retval Channel number.
  2496. */
  2497. static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
  2498. {
  2499. uint32_t channel = 0xFF;
  2500. /* Get channel from instance */
  2501. if(Instance == DFSDM1_Channel0)
  2502. {
  2503. channel = 0;
  2504. }
  2505. else if(Instance == DFSDM1_Channel1)
  2506. {
  2507. channel = 1;
  2508. }
  2509. else if(Instance == DFSDM1_Channel2)
  2510. {
  2511. channel = 2;
  2512. }
  2513. else if(Instance == DFSDM1_Channel3)
  2514. {
  2515. channel = 3;
  2516. }
  2517. #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
  2518. defined(STM32L496xx) || defined(STM32L4A6xx)
  2519. else if(Instance == DFSDM1_Channel4)
  2520. {
  2521. channel = 4;
  2522. }
  2523. else if(Instance == DFSDM1_Channel5)
  2524. {
  2525. channel = 5;
  2526. }
  2527. else if(Instance == DFSDM1_Channel6)
  2528. {
  2529. channel = 6;
  2530. }
  2531. else if(Instance == DFSDM1_Channel7)
  2532. {
  2533. channel = 7;
  2534. }
  2535. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */
  2536. return channel;
  2537. }
  2538. /**
  2539. * @brief This function allows to really start regular conversion.
  2540. * @param hdfsdm_filter : DFSDM filter handle.
  2541. * @retval None
  2542. */
  2543. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2544. {
  2545. /* Check regular trigger */
  2546. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
  2547. {
  2548. /* Software start of regular conversion */
  2549. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2550. }
  2551. else /* synchronous trigger */
  2552. {
  2553. /* Disable DFSDM filter */
  2554. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2555. /* Set RSYNC bit in DFSDM_FLTCR1 register */
  2556. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
  2557. /* Enable DFSDM filter */
  2558. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2559. /* If injected conversion was in progress, restart it */
  2560. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
  2561. {
  2562. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2563. {
  2564. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2565. }
  2566. /* Update remaining injected conversions */
  2567. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2568. hdfsdm_filter->InjectedChannelsNbr : 1;
  2569. }
  2570. }
  2571. /* Update DFSDM filter state */
  2572. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  2573. HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
  2574. }
  2575. /**
  2576. * @brief This function allows to really stop regular conversion.
  2577. * @param hdfsdm_filter : DFSDM filter handle.
  2578. * @retval None
  2579. */
  2580. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2581. {
  2582. /* Disable DFSDM filter */
  2583. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2584. /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
  2585. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2586. {
  2587. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  2588. }
  2589. /* Enable DFSDM filter */
  2590. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2591. /* If injected conversion was in progress, restart it */
  2592. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
  2593. {
  2594. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2595. {
  2596. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2597. }
  2598. /* Update remaining injected conversions */
  2599. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2600. hdfsdm_filter->InjectedChannelsNbr : 1;
  2601. }
  2602. /* Update DFSDM filter state */
  2603. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  2604. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  2605. }
  2606. /**
  2607. * @brief This function allows to really start injected conversion.
  2608. * @param hdfsdm_filter : DFSDM filter handle.
  2609. * @retval None
  2610. */
  2611. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2612. {
  2613. /* Check injected trigger */
  2614. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2615. {
  2616. /* Software start of injected conversion */
  2617. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2618. }
  2619. else /* external or synchronous trigger */
  2620. {
  2621. /* Disable DFSDM filter */
  2622. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2623. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2624. {
  2625. /* Set JSYNC bit in DFSDM_FLTCR1 register */
  2626. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
  2627. }
  2628. else /* external trigger */
  2629. {
  2630. /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  2631. hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
  2632. }
  2633. /* Enable DFSDM filter */
  2634. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2635. /* If regular conversion was in progress, restart it */
  2636. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
  2637. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2638. {
  2639. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2640. }
  2641. }
  2642. /* Update DFSDM filter state */
  2643. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  2644. HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
  2645. }
  2646. /**
  2647. * @brief This function allows to really stop injected conversion.
  2648. * @param hdfsdm_filter : DFSDM filter handle.
  2649. * @retval None
  2650. */
  2651. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2652. {
  2653. /* Disable DFSDM filter */
  2654. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2655. /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
  2656. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2657. {
  2658. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
  2659. }
  2660. else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
  2661. {
  2662. /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  2663. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
  2664. }
  2665. /* Enable DFSDM filter */
  2666. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2667. /* If regular conversion was in progress, restart it */
  2668. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
  2669. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2670. {
  2671. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2672. }
  2673. /* Update remaining injected conversions */
  2674. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2675. hdfsdm_filter->InjectedChannelsNbr : 1;
  2676. /* Update DFSDM filter state */
  2677. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2678. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2679. }
  2680. /**
  2681. * @}
  2682. */
  2683. /* End of private functions --------------------------------------------------*/
  2684. /**
  2685. * @}
  2686. */
  2687. #endif /* STM32L451xx || STM32L452xx || STM32L462xx || STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */
  2688. #endif /* HAL_DFSDM_MODULE_ENABLED */
  2689. /**
  2690. * @}
  2691. */
  2692. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/