stm32l4xx_ll_usb.c 68 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_ll_usb.c
  4. * @author MCD Application Team
  5. * @version V1.7.2
  6. * @date 16-June-2017
  7. * @brief USB Low Layer HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the USB Peripheral Controller:
  11. * + Initialization/de-initialization functions
  12. * + I/O operation functions
  13. * + Peripheral Control functions
  14. * + Peripheral State functions
  15. *
  16. @verbatim
  17. ==============================================================================
  18. ##### How to use this driver #####
  19. ==============================================================================
  20. [..]
  21. (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
  22. (#) Call USB_CoreInit() API to initialize the USB Core peripheral.
  23. (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
  24. @endverbatim
  25. ******************************************************************************
  26. * @attention
  27. *
  28. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  29. *
  30. * Redistribution and use in source and binary forms, with or without modification,
  31. * are permitted provided that the following conditions are met:
  32. * 1. Redistributions of source code must retain the above copyright notice,
  33. * this list of conditions and the following disclaimer.
  34. * 2. Redistributions in binary form must reproduce the above copyright notice,
  35. * this list of conditions and the following disclaimer in the documentation
  36. * and/or other materials provided with the distribution.
  37. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  38. * may be used to endorse or promote products derived from this software
  39. * without specific prior written permission.
  40. *
  41. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  42. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  43. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  44. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  45. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  46. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  47. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  48. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  49. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  50. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  51. *
  52. ******************************************************************************
  53. */
  54. /* Includes ------------------------------------------------------------------*/
  55. #include "stm32l4xx_hal.h"
  56. /** @defgroup USB_LL USB Low Layer
  57. * @brief Low layer module for USB_FS and USB_OTG_FS drivers
  58. * @{
  59. */
  60. #if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED)
  61. #if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \
  62. defined(STM32L452xx) || defined(STM32L462xx) || \
  63. defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
  64. defined(STM32L496xx) || defined(STM32L4A6xx)
  65. /** @addtogroup STM32L4xx_LL_USB_DRIVER
  66. * @{
  67. */
  68. /* Private typedef -----------------------------------------------------------*/
  69. /* Private define ------------------------------------------------------------*/
  70. /* Private macro -------------------------------------------------------------*/
  71. /* Private variables ---------------------------------------------------------*/
  72. /* Private function prototypes -----------------------------------------------*/
  73. /* Private functions ---------------------------------------------------------*/
  74. #if defined (USB_OTG_FS)
  75. /** @defgroup USB_LL_Private_Functions USB Low Layer Private Functions
  76. * @{
  77. */
  78. static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
  79. /**
  80. * @}
  81. */
  82. #endif /* USB_OTG_FS */
  83. /* Exported functions --------------------------------------------------------*/
  84. /** @defgroup LL_USB_Exported_Functions USB Low Layer Exported Functions
  85. * @{
  86. */
  87. /** @defgroup LL_USB_Group1 Initialization/de-initialization functions
  88. * @brief Initialization and Configuration functions
  89. *
  90. @verbatim
  91. ===============================================================================
  92. ##### Initialization/de-initialization functions #####
  93. ===============================================================================
  94. [..] This section provides functions allowing to:
  95. @endverbatim
  96. * @{
  97. */
  98. /*==============================================================================
  99. USB OTG FS peripheral available on STM32L475xx, STM32L476xx, STM32L485xx and
  100. STM32L486xx devices
  101. ==============================================================================*/
  102. #if defined (USB_OTG_FS)
  103. /**
  104. * @brief Initializes the USB Core
  105. * @param USBx: USB Instance
  106. * @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains
  107. * the configuration information for the specified USBx peripheral.
  108. * @retval HAL status
  109. */
  110. HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
  111. {
  112. /* Prevent unused argument(s) compilation warning */
  113. UNUSED(cfg);
  114. /* Select FS Embedded PHY */
  115. USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
  116. /* Reset after a PHY select and set Host mode */
  117. USB_CoreReset(USBx);
  118. /* Deactivate the power down*/
  119. USBx->GCCFG = USB_OTG_GCCFG_PWRDWN;
  120. return HAL_OK;
  121. }
  122. /**
  123. * @brief USB_EnableGlobalInt
  124. * Enables the controller's Global Int in the AHB Config reg
  125. * @param USBx: Selected device
  126. * @retval HAL status
  127. */
  128. HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
  129. {
  130. USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
  131. return HAL_OK;
  132. }
  133. /**
  134. * @brief USB_DisableGlobalInt
  135. * Disable the controller's Global Int in the AHB Config reg
  136. * @param USBx: Selected device
  137. * @retval HAL status
  138. */
  139. HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
  140. {
  141. USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
  142. return HAL_OK;
  143. }
  144. /**
  145. * @brief USB_SetCurrentMode : Set functional mode
  146. * @param USBx: Selected device
  147. * @param mode: current core mode
  148. * This parameter can be one of these values:
  149. * @arg USB_OTG_DEVICE_MODE: Peripheral mode
  150. * @arg USB_OTG_HOST_MODE: Host mode
  151. * @arg USB_OTG_DRD_MODE: Dual Role Device mode
  152. * @retval HAL status
  153. */
  154. HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_ModeTypeDef mode)
  155. {
  156. USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
  157. if ( mode == USB_HOST_MODE)
  158. {
  159. USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
  160. }
  161. else if ( mode == USB_DEVICE_MODE)
  162. {
  163. USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
  164. }
  165. HAL_Delay(50);
  166. return HAL_OK;
  167. }
  168. /**
  169. * @brief USB_DevInit : Initializes the USB_OTG controller registers
  170. * for device mode
  171. * @param USBx: Selected device
  172. * @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains
  173. * the configuration information for the specified USBx peripheral.
  174. * @retval HAL status
  175. */
  176. HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
  177. {
  178. uint32_t index = 0;
  179. /*Activate VBUS Sensing B */
  180. USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
  181. if (cfg.vbus_sensing_enable == 0)
  182. {
  183. /* Deactivate VBUS Sensing B */
  184. USBx->GCCFG &= ~ USB_OTG_GCCFG_VBDEN;
  185. /* B-peripheral session valid override enable*/
  186. USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
  187. USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
  188. }
  189. /* Restart the Phy Clock */
  190. USBx_PCGCCTL = 0;
  191. /* Device mode configuration */
  192. USBx_DEVICE->DCFG |= DCFG_FRAME_INTERVAL_80;
  193. /* Set Full speed phy */
  194. USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL);
  195. /* Flush the FIFOs */
  196. USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */
  197. USB_FlushRxFifo(USBx);
  198. /* Clear all pending Device Interrupts */
  199. USBx_DEVICE->DIEPMSK = 0;
  200. USBx_DEVICE->DOEPMSK = 0;
  201. USBx_DEVICE->DAINT = 0xFFFFFFFF;
  202. USBx_DEVICE->DAINTMSK = 0;
  203. for (index = 0; index < cfg.dev_endpoints; index++)
  204. {
  205. if ((USBx_INEP(index)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
  206. {
  207. USBx_INEP(index)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK);
  208. }
  209. else
  210. {
  211. USBx_INEP(index)->DIEPCTL = 0;
  212. }
  213. USBx_INEP(index)->DIEPTSIZ = 0;
  214. USBx_INEP(index)->DIEPINT = 0xFF;
  215. }
  216. for (index = 0; index < cfg.dev_endpoints; index++)
  217. {
  218. if ((USBx_OUTEP(index)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
  219. {
  220. USBx_OUTEP(index)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK);
  221. }
  222. else
  223. {
  224. USBx_OUTEP(index)->DOEPCTL = 0;
  225. }
  226. USBx_OUTEP(index)->DOEPTSIZ = 0;
  227. USBx_OUTEP(index)->DOEPINT = 0xFF;
  228. }
  229. USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
  230. if (cfg.dma_enable == 1)
  231. {
  232. /*Set threshold parameters */
  233. USBx_DEVICE->DTHRCTL = (USB_OTG_DTHRCTL_TXTHRLEN_6 | USB_OTG_DTHRCTL_RXTHRLEN_6);
  234. USBx_DEVICE->DTHRCTL |= (USB_OTG_DTHRCTL_RXTHREN | USB_OTG_DTHRCTL_ISOTHREN | USB_OTG_DTHRCTL_NONISOTHREN);
  235. index= USBx_DEVICE->DTHRCTL;
  236. }
  237. /* Disable all interrupts. */
  238. USBx->GINTMSK = 0;
  239. /* Clear any pending interrupts */
  240. USBx->GINTSTS = 0xBFFFFFFF;
  241. /* Enable the common interrupts */
  242. if (cfg.dma_enable == DISABLE)
  243. {
  244. USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
  245. }
  246. /* Enable interrupts matching to the Device mode ONLY */
  247. USBx->GINTMSK |= (USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |\
  248. USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |\
  249. USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM|\
  250. USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
  251. if(cfg.Sof_enable)
  252. {
  253. USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM;
  254. }
  255. if (cfg.vbus_sensing_enable == ENABLE)
  256. {
  257. USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT);
  258. }
  259. return HAL_OK;
  260. }
  261. /**
  262. * @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
  263. * @param USBx: Selected device
  264. * @param num: FIFO number
  265. * This parameter can be a value from 1 to 15
  266. 15 means Flush all Tx FIFOs
  267. * @retval HAL status
  268. */
  269. HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num)
  270. {
  271. uint32_t count = 0;
  272. USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 6));
  273. do
  274. {
  275. if (++count > 200000)
  276. {
  277. return HAL_TIMEOUT;
  278. }
  279. }
  280. while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
  281. return HAL_OK;
  282. }
  283. /**
  284. * @brief USB_FlushRxFifo : Flush Rx FIFO
  285. * @param USBx: Selected device
  286. * @retval HAL status
  287. */
  288. HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
  289. {
  290. uint32_t count = 0;
  291. USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
  292. do
  293. {
  294. if (++count > 200000)
  295. {
  296. return HAL_TIMEOUT;
  297. }
  298. }
  299. while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
  300. return HAL_OK;
  301. }
  302. /**
  303. * @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register
  304. * depending the PHY type and the enumeration speed of the device.
  305. * @param USBx: Selected device
  306. * @param speed: device speed
  307. * This parameter can be one of these values:
  308. * @arg USB_OTG_SPEED_HIGH: High speed mode
  309. * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode
  310. * @arg USB_OTG_SPEED_FULL: Full speed mode
  311. * @arg USB_OTG_SPEED_LOW: Low speed mode
  312. * @retval Hal status
  313. */
  314. HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed)
  315. {
  316. USBx_DEVICE->DCFG |= speed;
  317. return HAL_OK;
  318. }
  319. /**
  320. * @brief USB_GetDevSpeed :Return the Dev Speed
  321. * @param USBx: Selected device
  322. * @retval speed : device speed
  323. * This parameter can be one of these values:
  324. * @arg USB_OTG_SPEED_HIGH: High speed mode
  325. * @arg USB_OTG_SPEED_FULL: Full speed mode
  326. * @arg USB_OTG_SPEED_LOW: Low speed mode
  327. */
  328. uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
  329. {
  330. uint8_t speed = 0;
  331. if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ)
  332. {
  333. speed = USB_OTG_SPEED_HIGH;
  334. }
  335. else if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)||
  336. ((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ))
  337. {
  338. speed = USB_OTG_SPEED_FULL;
  339. }
  340. else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
  341. {
  342. speed = USB_OTG_SPEED_LOW;
  343. }
  344. return speed;
  345. }
  346. /**
  347. * @brief Activate and configure an endpoint
  348. * @param USBx: Selected device
  349. * @param ep: pointer to endpoint structure
  350. * @retval HAL status
  351. */
  352. HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
  353. {
  354. if (ep->is_in == 1)
  355. {
  356. USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
  357. if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
  358. {
  359. USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
  360. ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
  361. }
  362. }
  363. else
  364. {
  365. USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
  366. if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
  367. {
  368. USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
  369. (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP));
  370. }
  371. }
  372. return HAL_OK;
  373. }
  374. /**
  375. * @brief Activate and configure a dedicated endpoint
  376. * @param USBx: Selected device
  377. * @param ep: pointer to endpoint structure
  378. * @retval HAL status
  379. */
  380. HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
  381. {
  382. static __IO uint32_t debug = 0;
  383. /* Read DEPCTLn register */
  384. if (ep->is_in == 1)
  385. {
  386. if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
  387. {
  388. USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
  389. ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
  390. }
  391. debug |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
  392. ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
  393. USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
  394. }
  395. else
  396. {
  397. if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
  398. {
  399. USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
  400. ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP));
  401. debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0)*USB_OTG_EP_REG_SIZE);
  402. debug = (uint32_t )&USBx_OUTEP(ep->num)->DOEPCTL;
  403. debug |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
  404. ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP));
  405. }
  406. USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
  407. }
  408. return HAL_OK;
  409. }
  410. /**
  411. * @brief De-activate and de-initialize an endpoint
  412. * @param USBx: Selected device
  413. * @param ep: pointer to endpoint structure
  414. * @retval HAL status
  415. */
  416. HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
  417. {
  418. /* Read DEPCTLn register */
  419. if (ep->is_in == 1)
  420. {
  421. USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
  422. USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
  423. USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
  424. }
  425. else
  426. {
  427. USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
  428. USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
  429. USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
  430. }
  431. return HAL_OK;
  432. }
  433. /**
  434. * @brief De-activate and de-initialize a dedicated endpoint
  435. * @param USBx: Selected device
  436. * @param ep: pointer to endpoint structure
  437. * @retval HAL status
  438. */
  439. HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
  440. {
  441. /* Read DEPCTLn register */
  442. if (ep->is_in == 1)
  443. {
  444. USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
  445. USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
  446. }
  447. else
  448. {
  449. USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
  450. USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
  451. }
  452. return HAL_OK;
  453. }
  454. /**
  455. * @brief USB_EPStartXfer : setup and starts a transfer over an EP
  456. * @param USBx: Selected device
  457. * @param ep: pointer to endpoint structure
  458. * @param dma: USB dma enabled or disabled
  459. * This parameter can be one of these values:
  460. * 0 : DMA feature not used
  461. * 1 : DMA feature used
  462. * @retval HAL status
  463. */
  464. HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma)
  465. {
  466. uint16_t pktcnt = 0;
  467. /* IN endpoint */
  468. if (ep->is_in == 1)
  469. {
  470. /* Zero Length Packet? */
  471. if (ep->xfer_len == 0)
  472. {
  473. USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
  474. USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
  475. USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
  476. }
  477. else
  478. {
  479. /* Program the transfer size and packet count
  480. * as follows: xfersize = N * maxpacket +
  481. * short_packet pktcnt = N + (short_packet
  482. * exist ? 1 : 0)
  483. */
  484. USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
  485. USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
  486. USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket) << 19)) ;
  487. USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
  488. if (ep->type == EP_TYPE_ISOC)
  489. {
  490. USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
  491. USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (1 << 29));
  492. }
  493. }
  494. if (ep->type != EP_TYPE_ISOC)
  495. {
  496. /* Enable the Tx FIFO Empty Interrupt for this EP */
  497. if (ep->xfer_len > 0)
  498. {
  499. USBx_DEVICE->DIEPEMPMSK |= 1 << ep->num;
  500. }
  501. }
  502. if (ep->type == EP_TYPE_ISOC)
  503. {
  504. if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
  505. {
  506. USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
  507. }
  508. else
  509. {
  510. USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
  511. }
  512. }
  513. /* EP enable, IN data in FIFO */
  514. USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
  515. if (ep->type == EP_TYPE_ISOC)
  516. {
  517. USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len, dma);
  518. }
  519. }
  520. else /* OUT endpoint */
  521. {
  522. /* Program the transfer size and packet count as follows:
  523. * pktcnt = N
  524. * xfersize = N * maxpacket
  525. */
  526. USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
  527. USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
  528. if (ep->xfer_len == 0)
  529. {
  530. USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
  531. USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ;
  532. }
  533. else
  534. {
  535. pktcnt = (ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket;
  536. USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19)); ;
  537. USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt));
  538. }
  539. if (ep->type == EP_TYPE_ISOC)
  540. {
  541. if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
  542. {
  543. USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM;
  544. }
  545. else
  546. {
  547. USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
  548. }
  549. }
  550. /* EP enable */
  551. USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
  552. }
  553. return HAL_OK;
  554. }
  555. /**
  556. * @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0
  557. * @param USBx: Selected device
  558. * @param ep: pointer to endpoint structure
  559. * @param dma: USB dma enabled or disabled
  560. * This parameter can be one of these values:
  561. * 0 : DMA feature not used
  562. * 1 : DMA feature used
  563. * @retval HAL status
  564. */
  565. HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma)
  566. {
  567. /* Prevent unused argument(s) compilation warning */
  568. UNUSED(USBx);
  569. UNUSED(dma);
  570. /* IN endpoint */
  571. if (ep->is_in == 1)
  572. {
  573. /* Zero Length Packet? */
  574. if (ep->xfer_len == 0)
  575. {
  576. USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
  577. USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
  578. USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
  579. }
  580. else
  581. {
  582. /* Program the transfer size and packet count
  583. * as follows: xfersize = N * maxpacket +
  584. * short_packet pktcnt = N + (short_packet
  585. * exist ? 1 : 0)
  586. */
  587. USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
  588. USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
  589. if(ep->xfer_len > ep->maxpacket)
  590. {
  591. ep->xfer_len = ep->maxpacket;
  592. }
  593. USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
  594. USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
  595. }
  596. /* Enable the Tx FIFO Empty Interrupt for this EP */
  597. if (ep->xfer_len > 0)
  598. {
  599. USBx_DEVICE->DIEPEMPMSK |= 1 << (ep->num);
  600. }
  601. /* EP enable, IN data in FIFO */
  602. USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
  603. }
  604. else /* OUT endpoint */
  605. {
  606. /* Program the transfer size and packet count as follows:
  607. * pktcnt = N
  608. * xfersize = N * maxpacket
  609. */
  610. USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
  611. USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
  612. if (ep->xfer_len > 0)
  613. {
  614. ep->xfer_len = ep->maxpacket;
  615. }
  616. USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
  617. USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket));
  618. /* EP enable */
  619. USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
  620. }
  621. return HAL_OK;
  622. }
  623. /**
  624. * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
  625. * with the EP/channel
  626. * @param USBx: Selected device
  627. * @param src: pointer to source buffer
  628. * @param ch_ep_num: endpoint or host channel number
  629. * @param len: Number of bytes to write
  630. * @param dma: USB dma enabled or disabled
  631. * This parameter can be one of these values:
  632. * 0 : DMA feature not used
  633. * 1 : DMA feature used
  634. * @retval HAL status
  635. */
  636. HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma)
  637. {
  638. /* Prevent unused argument(s) compilation warning */
  639. UNUSED(USBx);
  640. UNUSED(dma);
  641. uint32_t count32b= 0 , index= 0;
  642. count32b = (len + 3) / 4;
  643. for (index = 0; index < count32b; index++, src += 4)
  644. {
  645. USBx_DFIFO(ch_ep_num) = *((__packed uint32_t *)src);
  646. }
  647. return HAL_OK;
  648. }
  649. /**
  650. * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
  651. * with the EP/channel
  652. * @param USBx: Selected device
  653. * @param src: source pointer
  654. * @param ch_ep_num: endpoint or host channel number
  655. * @param len: Number of bytes to read
  656. * @param dma: USB dma enabled or disabled
  657. * This parameter can be one of these values:
  658. * 0 : DMA feature not used
  659. * 1 : DMA feature used
  660. * @retval pointer to destination buffer
  661. */
  662. void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
  663. {
  664. uint32_t index=0;
  665. uint32_t count32b = (len + 3) / 4;
  666. for ( index = 0; index < count32b; index++, dest += 4 )
  667. {
  668. *(__packed uint32_t *)dest = USBx_DFIFO(0);
  669. }
  670. return ((void *)dest);
  671. }
  672. /**
  673. * @brief USB_EPSetStall : set a stall condition over an EP
  674. * @param USBx: Selected device
  675. * @param ep: pointer to endpoint structure
  676. * @retval HAL status
  677. */
  678. HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
  679. {
  680. if (ep->is_in == 1)
  681. {
  682. if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0)
  683. {
  684. USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
  685. }
  686. USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_STALL;
  687. }
  688. else
  689. {
  690. if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0)
  691. {
  692. USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
  693. }
  694. USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_STALL;
  695. }
  696. return HAL_OK;
  697. }
  698. /**
  699. * @brief USB_EPClearStall : Clear a stall condition over an EP
  700. * @param USBx: Selected device
  701. * @param ep: pointer to endpoint structure
  702. * @retval HAL status
  703. */
  704. HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
  705. {
  706. if (ep->is_in == 1)
  707. {
  708. USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
  709. if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
  710. {
  711. USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
  712. }
  713. }
  714. else
  715. {
  716. USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
  717. if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
  718. {
  719. USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
  720. }
  721. }
  722. return HAL_OK;
  723. }
  724. /**
  725. * @brief USB_StopDevice : Stop the USB device mode
  726. * @param USBx: Selected device
  727. * @retval HAL status
  728. */
  729. HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
  730. {
  731. uint32_t index;
  732. /* Clear Pending interrupt */
  733. for (index = 0; index < 15 ; index++)
  734. {
  735. USBx_INEP(index)->DIEPINT = 0xFF;
  736. USBx_OUTEP(index)->DOEPINT = 0xFF;
  737. }
  738. USBx_DEVICE->DAINT = 0xFFFFFFFF;
  739. /* Clear interrupt masks */
  740. USBx_DEVICE->DIEPMSK = 0;
  741. USBx_DEVICE->DOEPMSK = 0;
  742. USBx_DEVICE->DAINTMSK = 0;
  743. /* Flush the FIFO */
  744. USB_FlushRxFifo(USBx);
  745. USB_FlushTxFifo(USBx , 0x10 );
  746. return HAL_OK;
  747. }
  748. /**
  749. * @brief USB_SetDevAddress : Stop the USB device mode
  750. * @param USBx: Selected device
  751. * @param address: new device address to be assigned
  752. * This parameter can be a value from 0 to 255
  753. * @retval HAL status
  754. */
  755. HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address)
  756. {
  757. USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD);
  758. USBx_DEVICE->DCFG |= (address << 4) & USB_OTG_DCFG_DAD ;
  759. return HAL_OK;
  760. }
  761. /**
  762. * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
  763. * @param USBx: Selected device
  764. * @retval HAL status
  765. */
  766. HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx)
  767. {
  768. USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ;
  769. HAL_Delay(3);
  770. return HAL_OK;
  771. }
  772. /**
  773. * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
  774. * @param USBx: Selected device
  775. * @retval HAL status
  776. */
  777. HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx)
  778. {
  779. USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS ;
  780. HAL_Delay(3);
  781. return HAL_OK;
  782. }
  783. /**
  784. * @brief USB_ReadInterrupts: return the global USB interrupt status
  785. * @param USBx: Selected device
  786. * @retval HAL status
  787. */
  788. uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx)
  789. {
  790. uint32_t tmpreg = 0;
  791. tmpreg = USBx->GINTSTS;
  792. tmpreg &= USBx->GINTMSK;
  793. return tmpreg;
  794. }
  795. /**
  796. * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
  797. * @param USBx: Selected device
  798. * @retval HAL status
  799. */
  800. uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
  801. {
  802. uint32_t tmpreg;
  803. tmpreg = USBx_DEVICE->DAINT;
  804. tmpreg &= USBx_DEVICE->DAINTMSK;
  805. return ((tmpreg & 0xffff0000) >> 16);
  806. }
  807. /**
  808. * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
  809. * @param USBx: Selected device
  810. * @retval HAL status
  811. */
  812. uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
  813. {
  814. uint32_t tmpreg;
  815. tmpreg = USBx_DEVICE->DAINT;
  816. tmpreg &= USBx_DEVICE->DAINTMSK;
  817. return ((tmpreg & 0xFFFF));
  818. }
  819. /**
  820. * @brief Returns Device OUT EP Interrupt register
  821. * @param USBx: Selected device
  822. * @param epnum: endpoint number
  823. * This parameter can be a value from 0 to 15
  824. * @retval Device OUT EP Interrupt register
  825. */
  826. uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
  827. {
  828. uint32_t tmpreg;
  829. tmpreg = USBx_OUTEP(epnum)->DOEPINT;
  830. tmpreg &= USBx_DEVICE->DOEPMSK;
  831. return tmpreg;
  832. }
  833. /**
  834. * @brief Returns Device IN EP Interrupt register
  835. * @param USBx: Selected device
  836. * @param epnum: endpoint number
  837. * This parameter can be a value from 0 to 15
  838. * @retval Device IN EP Interrupt register
  839. */
  840. uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
  841. {
  842. uint32_t tmpreg = 0, msk = 0, emp = 0;
  843. msk = USBx_DEVICE->DIEPMSK;
  844. emp = USBx_DEVICE->DIEPEMPMSK;
  845. msk |= ((emp >> epnum) & 0x1) << 7;
  846. tmpreg = USBx_INEP(epnum)->DIEPINT & msk;
  847. return tmpreg;
  848. }
  849. /**
  850. * @brief USB_ClearInterrupts: clear a USB interrupt
  851. * @param USBx: Selected device
  852. * @param interrupt: interrupt flag
  853. * @retval None
  854. */
  855. void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
  856. {
  857. USBx->GINTSTS |= interrupt;
  858. }
  859. /**
  860. * @brief Returns USB core mode
  861. * @param USBx: Selected device
  862. * @retval return core mode : Host or Device
  863. * This parameter can be one of these values:
  864. * 0 : Host
  865. * 1 : Device
  866. */
  867. uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
  868. {
  869. return ((USBx->GINTSTS ) & 0x1);
  870. }
  871. /**
  872. * @brief Activate EP0 for Setup transactions
  873. * @param USBx: Selected device
  874. * @retval HAL status
  875. */
  876. HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx)
  877. {
  878. /* Set the MPS of the IN EP based on the enumeration speed */
  879. USBx_INEP(0)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
  880. if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
  881. {
  882. USBx_INEP(0)->DIEPCTL |= 3;
  883. }
  884. USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
  885. return HAL_OK;
  886. }
  887. /**
  888. * @brief Prepare the EP0 to start the first control setup
  889. * @param USBx: Selected device
  890. * @param dma: USB dma enabled or disabled
  891. * This parameter can be one of these values:
  892. * 0 : DMA feature not used
  893. * 1 : DMA feature used
  894. * @param psetup: pointer to setup packet
  895. * @retval HAL status
  896. */
  897. HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup)
  898. {
  899. /* Prevent unused argument(s) compilation warning */
  900. UNUSED(psetup);
  901. USBx_OUTEP(0)->DOEPTSIZ = 0;
  902. USBx_OUTEP(0)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ;
  903. USBx_OUTEP(0)->DOEPTSIZ |= (3 * 8);
  904. USBx_OUTEP(0)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT;
  905. return HAL_OK;
  906. }
  907. /**
  908. * @brief USB_HostInit : Initializes the USB OTG controller registers
  909. * for Host mode
  910. * @param USBx: Selected device
  911. * @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains
  912. * the configuration information for the specified USBx peripheral.
  913. * @retval HAL status
  914. */
  915. HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
  916. {
  917. uint32_t index = 0;
  918. /* Restart the Phy Clock */
  919. USBx_PCGCCTL = 0;
  920. /* Disable the FS/LS support mode only */
  921. if((cfg.speed == USB_OTG_SPEED_FULL)&&
  922. (USBx != USB_OTG_FS))
  923. {
  924. USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS;
  925. }
  926. else
  927. {
  928. USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
  929. }
  930. /* Make sure the FIFOs are flushed. */
  931. USB_FlushTxFifo(USBx, 0x10 ); /* all Tx FIFOs */
  932. USB_FlushRxFifo(USBx);
  933. /* Clear all pending HC Interrupts */
  934. for (index = 0; index < cfg.Host_channels; index++)
  935. {
  936. USBx_HC(index)->HCINT = 0xFFFFFFFF;
  937. USBx_HC(index)->HCINTMSK = 0;
  938. }
  939. /* Enable VBUS driving */
  940. USB_DriveVbus(USBx, 1);
  941. HAL_Delay(200);
  942. /* Disable all interrupts. */
  943. USBx->GINTMSK = 0;
  944. /* Clear any pending interrupts */
  945. USBx->GINTSTS = 0xFFFFFFFF;
  946. /* set Rx FIFO size */
  947. USBx->GRXFSIZ = (uint32_t )0x80;
  948. USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) | 0x80);
  949. USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0);
  950. /* Enable the common interrupts */
  951. if (cfg.dma_enable == DISABLE)
  952. {
  953. USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
  954. }
  955. /* Enable interrupts matching to the Host mode ONLY */
  956. USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM |\
  957. USB_OTG_GINTMSK_SOFM |USB_OTG_GINTSTS_DISCINT|\
  958. USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
  959. return HAL_OK;
  960. }
  961. /**
  962. * @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
  963. * HCFG register on the PHY type and set the right frame interval
  964. * @param USBx: Selected device
  965. * @param freq: clock frequency
  966. * This parameter can be one of these values:
  967. * HCFG_48_MHZ : Full Speed 48 MHz Clock
  968. * HCFG_6_MHZ : Low Speed 6 MHz Clock
  969. * @retval HAL status
  970. */
  971. HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq)
  972. {
  973. USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
  974. USBx_HOST->HCFG |= (freq & USB_OTG_HCFG_FSLSPCS);
  975. if (freq == HCFG_48_MHZ)
  976. {
  977. USBx_HOST->HFIR = (uint32_t)48000;
  978. }
  979. else if (freq == HCFG_6_MHZ)
  980. {
  981. USBx_HOST->HFIR = (uint32_t)6000;
  982. }
  983. return HAL_OK;
  984. }
  985. /**
  986. * @brief USB_OTG_ResetPort : Reset Host Port
  987. * @param USBx: Selected device
  988. * @retval HAL status
  989. * @note (1)The application must wait at least 10 ms
  990. * before clearing the reset bit.
  991. */
  992. HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
  993. {
  994. __IO uint32_t hprt0 = 0;
  995. hprt0 = USBx_HPRT0;
  996. hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
  997. USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
  998. USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);
  999. HAL_Delay (10); /* See Note #1 */
  1000. USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
  1001. return HAL_OK;
  1002. }
  1003. /**
  1004. * @brief USB_DriveVbus : activate or de-activate vbus
  1005. * @param state: VBUS state
  1006. * This parameter can be one of these values:
  1007. * 0 : VBUS Active
  1008. * 1 : VBUS Inactive
  1009. * @retval HAL status
  1010. */
  1011. HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
  1012. {
  1013. __IO uint32_t hprt0 = 0;
  1014. hprt0 = USBx_HPRT0;
  1015. hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
  1016. USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
  1017. if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 ))
  1018. {
  1019. USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0);
  1020. }
  1021. if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0 ))
  1022. {
  1023. USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
  1024. }
  1025. return HAL_OK;
  1026. }
  1027. /**
  1028. * @brief Return Host Core speed
  1029. * @param USBx: Selected device
  1030. * @retval speed : Host speed
  1031. * This parameter can be one of these values:
  1032. * @arg USB_OTG_SPEED_HIGH: High speed mode
  1033. * @arg USB_OTG_SPEED_FULL: Full speed mode
  1034. * @arg USB_OTG_SPEED_LOW: Low speed mode
  1035. */
  1036. uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx)
  1037. {
  1038. __IO uint32_t hprt0 = 0;
  1039. hprt0 = USBx_HPRT0;
  1040. return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17);
  1041. }
  1042. /**
  1043. * @brief Return Host Current Frame number
  1044. * @param USBx: Selected device
  1045. * @retval current frame number
  1046. */
  1047. uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx)
  1048. {
  1049. return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
  1050. }
  1051. /**
  1052. * @brief Initialize a host channel
  1053. * @param USBx: Selected device
  1054. * @param ch_num : Channel number
  1055. * This parameter can be a value from 1 to 15
  1056. * @param epnum: Endpoint number
  1057. * This parameter can be a value from 1 to 15
  1058. * @param dev_address: Current device address
  1059. * This parameter can be a value from 0 to 255
  1060. * @param speed: Current device speed
  1061. * This parameter can be one of these values:
  1062. * @arg USB_OTG_SPEED_HIGH: High speed mode
  1063. * @arg USB_OTG_SPEED_FULL: Full speed mode
  1064. * @arg USB_OTG_SPEED_LOW: Low speed mode
  1065. * @param ep_type: Endpoint Type
  1066. * This parameter can be one of these values:
  1067. * @arg EP_TYPE_CTRL: Control type
  1068. * @arg EP_TYPE_ISOC: Isochronous type
  1069. * @arg EP_TYPE_BULK: Bulk type
  1070. * @arg EP_TYPE_INTR: Interrupt type
  1071. * @param mps: Max Packet Size
  1072. * This parameter can be a value from 0 to32K
  1073. * @retval HAL state
  1074. */
  1075. HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
  1076. uint8_t ch_num,
  1077. uint8_t epnum,
  1078. uint8_t dev_address,
  1079. uint8_t speed,
  1080. uint8_t ep_type,
  1081. uint16_t mps)
  1082. {
  1083. /* Clear old interrupt conditions for this host channel. */
  1084. USBx_HC(ch_num)->HCINT = 0xFFFFFFFF;
  1085. /* Enable channel interrupts required for this transfer. */
  1086. switch (ep_type)
  1087. {
  1088. case EP_TYPE_CTRL:
  1089. case EP_TYPE_BULK:
  1090. USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
  1091. USB_OTG_HCINTMSK_STALLM |\
  1092. USB_OTG_HCINTMSK_TXERRM |\
  1093. USB_OTG_HCINTMSK_DTERRM |\
  1094. USB_OTG_HCINTMSK_AHBERR |\
  1095. USB_OTG_HCINTMSK_NAKM ;
  1096. if (epnum & 0x80)
  1097. {
  1098. USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
  1099. }
  1100. break;
  1101. case EP_TYPE_INTR:
  1102. USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
  1103. USB_OTG_HCINTMSK_STALLM |\
  1104. USB_OTG_HCINTMSK_TXERRM |\
  1105. USB_OTG_HCINTMSK_DTERRM |\
  1106. USB_OTG_HCINTMSK_NAKM |\
  1107. USB_OTG_HCINTMSK_AHBERR |\
  1108. USB_OTG_HCINTMSK_FRMORM ;
  1109. if (epnum & 0x80)
  1110. {
  1111. USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
  1112. }
  1113. break;
  1114. case EP_TYPE_ISOC:
  1115. USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
  1116. USB_OTG_HCINTMSK_ACKM |\
  1117. USB_OTG_HCINTMSK_AHBERR |\
  1118. USB_OTG_HCINTMSK_FRMORM ;
  1119. if (epnum & 0x80)
  1120. {
  1121. USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM);
  1122. }
  1123. break;
  1124. }
  1125. /* Enable the top level host channel interrupt. */
  1126. USBx_HOST->HAINTMSK |= (1 << ch_num);
  1127. /* Make sure host channel interrupts are enabled. */
  1128. USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM;
  1129. /* Program the HCCHAR register */
  1130. USBx_HC(ch_num)->HCCHAR = (((dev_address << 22) & USB_OTG_HCCHAR_DAD) |\
  1131. (((epnum & 0x7F)<< 11) & USB_OTG_HCCHAR_EPNUM)|\
  1132. ((((epnum & 0x80) == 0x80)<< 15) & USB_OTG_HCCHAR_EPDIR)|\
  1133. (((speed == HPRT0_PRTSPD_LOW_SPEED)<< 17) & USB_OTG_HCCHAR_LSDEV)|\
  1134. ((ep_type << 18) & USB_OTG_HCCHAR_EPTYP)|\
  1135. (mps & USB_OTG_HCCHAR_MPSIZ));
  1136. if (ep_type == EP_TYPE_INTR)
  1137. {
  1138. USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ;
  1139. }
  1140. return HAL_OK;
  1141. }
  1142. /**
  1143. * @brief Start a transfer over a host channel
  1144. * @param USBx: Selected device
  1145. * @param hc: pointer to host channel structure
  1146. * @param dma: USB dma enabled or disabled
  1147. * This parameter can be one of these values:
  1148. * 0 : DMA feature not used
  1149. * 1 : DMA feature used
  1150. * @retval HAL state
  1151. */
  1152. #if defined (__CC_ARM) /*!< ARM Compiler */
  1153. #pragma O0
  1154. #elif defined (__GNUC__) /*!< GNU Compiler */
  1155. #pragma GCC optimize ("O0")
  1156. #endif /* __CC_ARM */
  1157. HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma)
  1158. {
  1159. uint8_t is_oddframe = 0;
  1160. uint16_t len_words = 0;
  1161. uint16_t num_packets = 0;
  1162. uint16_t max_hc_pkt_count = 256;
  1163. uint32_t tmpreg = 0;
  1164. /* Compute the expected number of packets associated to the transfer */
  1165. if (hc->xfer_len > 0)
  1166. {
  1167. num_packets = (hc->xfer_len + hc->max_packet - 1) / hc->max_packet;
  1168. if (num_packets > max_hc_pkt_count)
  1169. {
  1170. num_packets = max_hc_pkt_count;
  1171. hc->xfer_len = num_packets * hc->max_packet;
  1172. }
  1173. }
  1174. else
  1175. {
  1176. num_packets = 1;
  1177. }
  1178. if (hc->ep_is_in)
  1179. {
  1180. hc->xfer_len = num_packets * hc->max_packet;
  1181. }
  1182. /* Initialize the HCTSIZn register */
  1183. USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\
  1184. ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
  1185. (((hc->data_pid) << 29) & USB_OTG_HCTSIZ_DPID);
  1186. if (dma)
  1187. {
  1188. /* xfer_buff MUST be 32-bits aligned */
  1189. USBx_HC(hc->ch_num)->HCDMA = (uint32_t)hc->xfer_buff;
  1190. }
  1191. is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1;
  1192. USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
  1193. USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29);
  1194. /* Set host channel enable */
  1195. tmpreg = USBx_HC(hc->ch_num)->HCCHAR;
  1196. tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
  1197. tmpreg |= USB_OTG_HCCHAR_CHENA;
  1198. USBx_HC(hc->ch_num)->HCCHAR = tmpreg;
  1199. if (dma == 0) /* Slave mode */
  1200. {
  1201. if((hc->ep_is_in == 0) && (hc->xfer_len > 0))
  1202. {
  1203. switch(hc->ep_type)
  1204. {
  1205. /* Non periodic transfer */
  1206. case EP_TYPE_CTRL:
  1207. case EP_TYPE_BULK:
  1208. len_words = (hc->xfer_len + 3) / 4;
  1209. /* check if there is enough space in FIFO space */
  1210. if(len_words > (USBx->HNPTXSTS & 0xFFFF))
  1211. {
  1212. /* need to process data in nptxfempty interrupt */
  1213. USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
  1214. }
  1215. break;
  1216. /* Periodic transfer */
  1217. case EP_TYPE_INTR:
  1218. case EP_TYPE_ISOC:
  1219. len_words = (hc->xfer_len + 3) / 4;
  1220. /* check if there is enough space in FIFO space */
  1221. if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */
  1222. {
  1223. /* need to process data in ptxfempty interrupt */
  1224. USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
  1225. }
  1226. break;
  1227. default:
  1228. break;
  1229. }
  1230. /* Write packet into the Tx FIFO. */
  1231. USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len, 0);
  1232. }
  1233. }
  1234. return HAL_OK;
  1235. }
  1236. /**
  1237. * @brief Read all host channel interrupts status
  1238. * @param USBx: Selected device
  1239. * @retval HAL state
  1240. */
  1241. uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx)
  1242. {
  1243. return ((USBx_HOST->HAINT) & 0xFFFF);
  1244. }
  1245. /**
  1246. * @brief Halt a host channel
  1247. * @param USBx: Selected device
  1248. * @param hc_num: Host Channel number
  1249. * This parameter can be a value from 1 to 15
  1250. * @retval HAL state
  1251. */
  1252. HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num)
  1253. {
  1254. uint32_t count = 0;
  1255. /* Check for space in the request queue to issue the halt. */
  1256. if (((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_CTRL << 18)) || ((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_BULK << 18)))
  1257. {
  1258. USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
  1259. if ((USBx->HNPTXSTS & 0xFFFF) == 0)
  1260. {
  1261. USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
  1262. USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
  1263. USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
  1264. do
  1265. {
  1266. if (++count > 1000)
  1267. {
  1268. break;
  1269. }
  1270. }
  1271. while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
  1272. }
  1273. else
  1274. {
  1275. USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
  1276. }
  1277. }
  1278. else
  1279. {
  1280. USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
  1281. if ((USBx_HOST->HPTXSTS & 0xFFFF) == 0)
  1282. {
  1283. USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
  1284. USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
  1285. USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
  1286. do
  1287. {
  1288. if (++count > 1000)
  1289. {
  1290. break;
  1291. }
  1292. }
  1293. while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
  1294. }
  1295. else
  1296. {
  1297. USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
  1298. }
  1299. }
  1300. return HAL_OK;
  1301. }
  1302. /**
  1303. * @brief Initiate Do Ping protocol
  1304. * @param USBx: Selected device
  1305. * @param hc_num: Host Channel number
  1306. * This parameter can be a value from 1 to 15
  1307. * @retval HAL state
  1308. */
  1309. HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num)
  1310. {
  1311. uint8_t num_packets = 1;
  1312. uint32_t tmpreg = 0;
  1313. USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
  1314. USB_OTG_HCTSIZ_DOPING;
  1315. /* Set host channel enable */
  1316. tmpreg = USBx_HC(ch_num)->HCCHAR;
  1317. tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
  1318. tmpreg |= USB_OTG_HCCHAR_CHENA;
  1319. USBx_HC(ch_num)->HCCHAR = tmpreg;
  1320. return HAL_OK;
  1321. }
  1322. /**
  1323. * @brief Stop Host Core
  1324. * @param USBx: Selected device
  1325. * @retval HAL state
  1326. */
  1327. HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
  1328. {
  1329. uint8_t index;
  1330. uint32_t count = 0;
  1331. uint32_t value = 0;
  1332. USB_DisableGlobalInt(USBx);
  1333. /* Flush FIFO */
  1334. USB_FlushTxFifo(USBx, 0x10);
  1335. USB_FlushRxFifo(USBx);
  1336. /* Flush out any leftover queued requests. */
  1337. for (index = 0; index <= 15; index++)
  1338. {
  1339. value = USBx_HC(index)->HCCHAR;
  1340. value |= USB_OTG_HCCHAR_CHDIS;
  1341. value &= ~USB_OTG_HCCHAR_CHENA;
  1342. value &= ~USB_OTG_HCCHAR_EPDIR;
  1343. USBx_HC(index)->HCCHAR = value;
  1344. }
  1345. /* Halt all channels to put them into a known state. */
  1346. for (index = 0; index <= 15; index++)
  1347. {
  1348. value = USBx_HC(index)->HCCHAR ;
  1349. value |= USB_OTG_HCCHAR_CHDIS;
  1350. value |= USB_OTG_HCCHAR_CHENA;
  1351. value &= ~USB_OTG_HCCHAR_EPDIR;
  1352. USBx_HC(index)->HCCHAR = value;
  1353. USBx_HC(index)->HCCHAR = value;
  1354. do
  1355. {
  1356. if (++count > 1000)
  1357. {
  1358. break;
  1359. }
  1360. }
  1361. while ((USBx_HC(index)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
  1362. }
  1363. /* Clear any pending Host interrupts */
  1364. USBx_HOST->HAINT = 0xFFFFFFFF;
  1365. USBx->GINTSTS = 0xFFFFFFFF;
  1366. USB_EnableGlobalInt(USBx);
  1367. return HAL_OK;
  1368. }
  1369. /**
  1370. * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
  1371. * @param USBx : Selected device
  1372. * @retval HAL status
  1373. */
  1374. HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
  1375. {
  1376. if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS)
  1377. {
  1378. /* active Remote wakeup signalling */
  1379. USBx_DEVICE->DCTL |= USB_OTG_DCTL_RWUSIG;
  1380. }
  1381. return HAL_OK;
  1382. }
  1383. /**
  1384. * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
  1385. * @param USBx : Selected device
  1386. * @retval HAL status
  1387. */
  1388. HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx)
  1389. {
  1390. /* active Remote wakeup signalling */
  1391. USBx_DEVICE->DCTL &= ~(USB_OTG_DCTL_RWUSIG);
  1392. return HAL_OK;
  1393. }
  1394. #endif /* USB_OTG_FS */
  1395. /*==============================================================================
  1396. USB Device FS peripheral available on STM32L432xx, STM32L433xx, STM32L442xx)
  1397. and STM32L443xx devices
  1398. ==============================================================================*/
  1399. #if defined (USB)
  1400. /**
  1401. * @brief Initializes the USB Core
  1402. * @param USBx: USB Instance
  1403. * @param cfg : pointer to a USB_CfgTypeDef structure that contains
  1404. * the configuration information for the specified USBx peripheral.
  1405. * @retval HAL status
  1406. */
  1407. HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
  1408. {
  1409. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1410. only by USB OTG FS peripheral.
  1411. - This function is added to ensure compatibility across platforms.
  1412. */
  1413. /* Prevent unused argument(s) compilation warning */
  1414. UNUSED(USBx);
  1415. UNUSED(cfg);
  1416. return HAL_OK;
  1417. }
  1418. /**
  1419. * @brief USB_EnableGlobalInt
  1420. * Enables the controller's Global Int in the AHB Config reg
  1421. * @param USBx : Selected device
  1422. * @retval HAL status
  1423. */
  1424. HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
  1425. {
  1426. uint32_t winterruptmask = 0;
  1427. /* Set winterruptmask variable */
  1428. winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
  1429. | USB_CNTR_ESOFM | USB_CNTR_RESETM;
  1430. /* Set interrupt mask */
  1431. USBx->CNTR |= winterruptmask;
  1432. return HAL_OK;
  1433. }
  1434. /**
  1435. * @brief USB_DisableGlobalInt
  1436. * Disable the controller's Global Int in the AHB Config reg
  1437. * @param USBx : Selected device
  1438. * @retval HAL status
  1439. */
  1440. HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
  1441. {
  1442. uint32_t winterruptmask = 0;
  1443. /* Set winterruptmask variable */
  1444. winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
  1445. | USB_CNTR_ESOFM | USB_CNTR_RESETM;
  1446. /* Clear interrupt mask */
  1447. USBx->CNTR &= ~winterruptmask;
  1448. return HAL_OK;
  1449. }
  1450. /**
  1451. * @brief USB_SetCurrentMode : Set functional mode
  1452. * @param USBx : Selected device
  1453. * @param mode : current core mode
  1454. * This parameter can be one of the these values:
  1455. * @arg USB_DEVICE_MODE: Peripheral mode mode
  1456. * @retval HAL status
  1457. */
  1458. HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx , USB_ModeTypeDef mode)
  1459. {
  1460. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1461. only by USB OTG FS peripheral.
  1462. - This function is added to ensure compatibility across platforms.
  1463. */
  1464. /* Prevent unused argument(s) compilation warning */
  1465. UNUSED(USBx);
  1466. UNUSED(mode);
  1467. return HAL_OK;
  1468. }
  1469. /**
  1470. * @brief USB_DevInit : Initializes the USB controller registers
  1471. * for device mode
  1472. * @param USBx : Selected device
  1473. * @param cfg : pointer to a USB_CfgTypeDef structure that contains
  1474. * the configuration information for the specified USBx peripheral.
  1475. * @retval HAL status
  1476. */
  1477. HAL_StatusTypeDef USB_DevInit (USB_TypeDef *USBx, USB_CfgTypeDef cfg)
  1478. {
  1479. /* Prevent unused argument(s) compilation warning */
  1480. UNUSED(cfg);
  1481. /* Init Device */
  1482. /*CNTR_FRES = 1*/
  1483. USBx->CNTR = USB_CNTR_FRES;
  1484. /*CNTR_FRES = 0*/
  1485. USBx->CNTR = 0;
  1486. /*Clear pending interrupts*/
  1487. USBx->ISTR = 0;
  1488. /*Set Btable Address*/
  1489. USBx->BTABLE = BTABLE_ADDRESS;
  1490. return HAL_OK;
  1491. }
  1492. /**
  1493. * @brief USB_FlushTxFifo : Flush a Tx FIFO
  1494. * @param USBx : Selected device
  1495. * @param num : FIFO number
  1496. * This parameter can be a value from 1 to 15
  1497. 15 means Flush all Tx FIFOs
  1498. * @retval HAL status
  1499. */
  1500. HAL_StatusTypeDef USB_FlushTxFifo (USB_TypeDef *USBx, uint32_t num )
  1501. {
  1502. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1503. only by USB OTG FS peripheral.
  1504. - This function is added to ensure compatibility across platforms.
  1505. */
  1506. /* Prevent unused argument(s) compilation warning */
  1507. UNUSED(USBx);
  1508. UNUSED(num);
  1509. return HAL_OK;
  1510. }
  1511. /**
  1512. * @brief USB_FlushRxFifo : Flush Rx FIFO
  1513. * @param USBx : Selected device
  1514. * @retval HAL status
  1515. */
  1516. HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx)
  1517. {
  1518. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1519. only by USB OTG FS peripheral.
  1520. - This function is added to ensure compatibility across platforms.
  1521. */
  1522. /* Prevent unused argument(s) compilation warning */
  1523. UNUSED(USBx);
  1524. return HAL_OK;
  1525. }
  1526. /**
  1527. * @brief Activate and configure an endpoint
  1528. * @param USBx : Selected device
  1529. * @param ep: pointer to endpoint structure
  1530. * @retval HAL status
  1531. */
  1532. HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
  1533. {
  1534. /* initialize Endpoint */
  1535. switch (ep->type)
  1536. {
  1537. case EP_TYPE_CTRL:
  1538. PCD_SET_EPTYPE(USBx, ep->num, USB_EP_CONTROL);
  1539. break;
  1540. case EP_TYPE_BULK:
  1541. PCD_SET_EPTYPE(USBx, ep->num, USB_EP_BULK);
  1542. break;
  1543. case EP_TYPE_INTR:
  1544. PCD_SET_EPTYPE(USBx, ep->num, USB_EP_INTERRUPT);
  1545. break;
  1546. case EP_TYPE_ISOC:
  1547. PCD_SET_EPTYPE(USBx, ep->num, USB_EP_ISOCHRONOUS);
  1548. break;
  1549. default:
  1550. break;
  1551. }
  1552. PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
  1553. if (ep->doublebuffer == 0)
  1554. {
  1555. if (ep->is_in)
  1556. {
  1557. /*Set the endpoint Transmit buffer address */
  1558. PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
  1559. PCD_CLEAR_TX_DTOG(USBx, ep->num);
  1560. /* Configure NAK status for the Endpoint*/
  1561. PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
  1562. }
  1563. else
  1564. {
  1565. /*Set the endpoint Receive buffer address */
  1566. PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
  1567. /*Set the endpoint Receive buffer counter*/
  1568. PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
  1569. PCD_CLEAR_RX_DTOG(USBx, ep->num);
  1570. /* Configure VALID status for the Endpoint*/
  1571. PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
  1572. }
  1573. }
  1574. /*Double Buffer*/
  1575. else
  1576. {
  1577. /*Set the endpoint as double buffered*/
  1578. PCD_SET_EP_DBUF(USBx, ep->num);
  1579. /*Set buffer address for double buffered mode*/
  1580. PCD_SET_EP_DBUF_ADDR(USBx, ep->num,ep->pmaaddr0, ep->pmaaddr1);
  1581. if (ep->is_in==0)
  1582. {
  1583. /* Clear the data toggle bits for the endpoint IN/OUT*/
  1584. PCD_CLEAR_RX_DTOG(USBx, ep->num);
  1585. PCD_CLEAR_TX_DTOG(USBx, ep->num);
  1586. /* Reset value of the data toggle bits for the endpoint out*/
  1587. PCD_TX_DTOG(USBx, ep->num);
  1588. PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
  1589. PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
  1590. }
  1591. else
  1592. {
  1593. /* Clear the data toggle bits for the endpoint IN/OUT*/
  1594. PCD_CLEAR_RX_DTOG(USBx, ep->num);
  1595. PCD_CLEAR_TX_DTOG(USBx, ep->num);
  1596. PCD_RX_DTOG(USBx, ep->num);
  1597. /* Configure DISABLE status for the Endpoint*/
  1598. PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
  1599. PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
  1600. }
  1601. }
  1602. return HAL_OK;
  1603. }
  1604. /**
  1605. * @brief De-activate and de-initialize an endpoint
  1606. * @param USBx : Selected device
  1607. * @param ep: pointer to endpoint structure
  1608. * @retval HAL status
  1609. */
  1610. HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
  1611. {
  1612. if (ep->doublebuffer == 0)
  1613. {
  1614. if (ep->is_in)
  1615. {
  1616. PCD_CLEAR_TX_DTOG(USBx, ep->num);
  1617. /* Configure DISABLE status for the Endpoint*/
  1618. PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
  1619. }
  1620. else
  1621. {
  1622. PCD_CLEAR_RX_DTOG(USBx, ep->num);
  1623. /* Configure DISABLE status for the Endpoint*/
  1624. PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
  1625. }
  1626. }
  1627. /*Double Buffer*/
  1628. else
  1629. {
  1630. if (ep->is_in==0)
  1631. {
  1632. /* Clear the data toggle bits for the endpoint IN/OUT*/
  1633. PCD_CLEAR_RX_DTOG(USBx, ep->num);
  1634. PCD_CLEAR_TX_DTOG(USBx, ep->num);
  1635. /* Reset value of the data toggle bits for the endpoint out*/
  1636. PCD_TX_DTOG(USBx, ep->num);
  1637. PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
  1638. PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
  1639. }
  1640. else
  1641. {
  1642. /* Clear the data toggle bits for the endpoint IN/OUT*/
  1643. PCD_CLEAR_RX_DTOG(USBx, ep->num);
  1644. PCD_CLEAR_TX_DTOG(USBx, ep->num);
  1645. PCD_RX_DTOG(USBx, ep->num);
  1646. /* Configure DISABLE status for the Endpoint*/
  1647. PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
  1648. PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
  1649. }
  1650. }
  1651. return HAL_OK;
  1652. }
  1653. /**
  1654. * @brief USB_EPStartXfer : setup and starts a transfer over an EP
  1655. * @param USBx : Selected device
  1656. * @param ep: pointer to endpoint structure
  1657. * @retval HAL status
  1658. */
  1659. HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx , USB_EPTypeDef *ep, uint8_t dma)
  1660. {
  1661. uint16_t pmabuffer = 0;
  1662. uint32_t len = ep->xfer_len;
  1663. /* IN endpoint */
  1664. if (ep->is_in == 1)
  1665. {
  1666. /*Multi packet transfer*/
  1667. if (ep->xfer_len > ep->maxpacket)
  1668. {
  1669. len=ep->maxpacket;
  1670. ep->xfer_len-=len;
  1671. }
  1672. else
  1673. {
  1674. len=ep->xfer_len;
  1675. ep->xfer_len =0;
  1676. }
  1677. /* configure and validate Tx endpoint */
  1678. if (ep->doublebuffer == 0)
  1679. {
  1680. USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, len);
  1681. PCD_SET_EP_TX_CNT(USBx, ep->num, len);
  1682. }
  1683. else
  1684. {
  1685. /* Write the data to the USB endpoint */
  1686. if (PCD_GET_ENDPOINT(USBx, ep->num)& USB_EP_DTOG_TX)
  1687. {
  1688. /* Set the Double buffer counter for pmabuffer1 */
  1689. PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
  1690. pmabuffer = ep->pmaaddr1;
  1691. }
  1692. else
  1693. {
  1694. /* Set the Double buffer counter for pmabuffer0 */
  1695. PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
  1696. pmabuffer = ep->pmaaddr0;
  1697. }
  1698. USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, len);
  1699. PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
  1700. }
  1701. PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
  1702. }
  1703. else /* OUT endpoint */
  1704. {
  1705. /* Multi packet transfer*/
  1706. if (ep->xfer_len > ep->maxpacket)
  1707. {
  1708. len=ep->maxpacket;
  1709. ep->xfer_len-=len;
  1710. }
  1711. else
  1712. {
  1713. len=ep->xfer_len;
  1714. ep->xfer_len =0;
  1715. }
  1716. /* configure and validate Rx endpoint */
  1717. if (ep->doublebuffer == 0)
  1718. {
  1719. /*Set RX buffer count*/
  1720. PCD_SET_EP_RX_CNT(USBx, ep->num, len);
  1721. }
  1722. else
  1723. {
  1724. /*Set the Double buffer counter*/
  1725. PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
  1726. }
  1727. PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
  1728. }
  1729. return HAL_OK;
  1730. }
  1731. /**
  1732. * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
  1733. * with the EP/channel
  1734. * @param USBx : Selected device
  1735. * @param src : pointer to source buffer
  1736. * @param ch_ep_num : endpoint or host channel number
  1737. * @param len : Number of bytes to write
  1738. * @retval HAL status
  1739. */
  1740. HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len)
  1741. {
  1742. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1743. only by USB OTG FS peripheral.
  1744. - This function is added to ensure compatibility across platforms.
  1745. */
  1746. /* Prevent unused argument(s) compilation warning */
  1747. UNUSED(USBx);
  1748. UNUSED(src);
  1749. UNUSED(ch_ep_num);
  1750. UNUSED(len);
  1751. return HAL_OK;
  1752. }
  1753. /**
  1754. * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
  1755. * with the EP/channel
  1756. * @param USBx : Selected device
  1757. * @param dest : destination pointer
  1758. * @param len : Number of bytes to read
  1759. * @retval pointer to destination buffer
  1760. */
  1761. void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len)
  1762. {
  1763. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1764. only by USB OTG FS peripheral.
  1765. - This function is added to ensure compatibility across platforms.
  1766. */
  1767. /* Prevent unused argument(s) compilation warning */
  1768. UNUSED(USBx);
  1769. UNUSED(dest);
  1770. UNUSED(len);
  1771. return ((void *)NULL);
  1772. }
  1773. /**
  1774. * @brief USB_EPSetStall : set a stall condition over an EP
  1775. * @param USBx : Selected device
  1776. * @param ep: pointer to endpoint structure
  1777. * @retval HAL status
  1778. */
  1779. HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx , USB_EPTypeDef *ep)
  1780. {
  1781. if (ep->num == 0)
  1782. {
  1783. /* This macro sets STALL status for RX & TX*/
  1784. PCD_SET_EP_TXRX_STATUS(USBx, ep->num, USB_EP_RX_STALL, USB_EP_TX_STALL);
  1785. }
  1786. else
  1787. {
  1788. if (ep->is_in)
  1789. {
  1790. PCD_SET_EP_TX_STATUS(USBx, ep->num , USB_EP_TX_STALL);
  1791. }
  1792. else
  1793. {
  1794. PCD_SET_EP_RX_STATUS(USBx, ep->num , USB_EP_RX_STALL);
  1795. }
  1796. }
  1797. return HAL_OK;
  1798. }
  1799. /**
  1800. * @brief USB_EPClearStall : Clear a stall condition over an EP
  1801. * @param USBx : Selected device
  1802. * @param ep: pointer to endpoint structure
  1803. * @retval HAL status
  1804. */
  1805. HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
  1806. {
  1807. if (ep->is_in)
  1808. {
  1809. PCD_CLEAR_TX_DTOG(USBx, ep->num);
  1810. PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
  1811. }
  1812. else
  1813. {
  1814. PCD_CLEAR_RX_DTOG(USBx, ep->num);
  1815. PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
  1816. }
  1817. return HAL_OK;
  1818. }
  1819. /**
  1820. * @brief USB_StopDevice : Stop the usb device mode
  1821. * @param USBx : Selected device
  1822. * @retval HAL status
  1823. */
  1824. HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx)
  1825. {
  1826. /* disable all interrupts and force USB reset */
  1827. USBx->CNTR = USB_CNTR_FRES;
  1828. /* clear interrupt status register */
  1829. USBx->ISTR = 0;
  1830. /* switch-off device */
  1831. USBx->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN);
  1832. return HAL_OK;
  1833. }
  1834. /**
  1835. * @brief USB_SetDevAddress : Stop the usb device mode
  1836. * @param USBx : Selected device
  1837. * @param address : new device address to be assigned
  1838. * This parameter can be a value from 0 to 255
  1839. * @retval HAL status
  1840. */
  1841. HAL_StatusTypeDef USB_SetDevAddress (USB_TypeDef *USBx, uint8_t address)
  1842. {
  1843. if(address == 0)
  1844. {
  1845. /* set device address and enable function */
  1846. USBx->DADDR = USB_DADDR_EF;
  1847. }
  1848. return HAL_OK;
  1849. }
  1850. /**
  1851. * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
  1852. * @param USBx : Selected device
  1853. * @retval HAL status
  1854. */
  1855. HAL_StatusTypeDef USB_DevConnect (USB_TypeDef *USBx)
  1856. {
  1857. /* Enabling DP Pull-Down bit to Connect internal pull-up on USB DP line */
  1858. USB->BCDR |= USB_BCDR_DPPU;
  1859. return HAL_OK;
  1860. }
  1861. /**
  1862. * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
  1863. * @param USBx : Selected device
  1864. * @retval HAL status
  1865. */
  1866. HAL_StatusTypeDef USB_DevDisconnect (USB_TypeDef *USBx)
  1867. {
  1868. /* Disable DP Pull-Down bit*/
  1869. USB->BCDR &= ~(USB_BCDR_DPPU);
  1870. return HAL_OK;
  1871. }
  1872. /**
  1873. * @brief USB_ReadInterrupts: return the global USB interrupt status
  1874. * @param USBx : Selected device
  1875. * @retval HAL status
  1876. */
  1877. uint32_t USB_ReadInterrupts (USB_TypeDef *USBx)
  1878. {
  1879. uint32_t tmpreg = 0;
  1880. tmpreg = USBx->ISTR;
  1881. return tmpreg;
  1882. }
  1883. /**
  1884. * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
  1885. * @param USBx : Selected device
  1886. * @retval HAL status
  1887. */
  1888. uint32_t USB_ReadDevAllOutEpInterrupt (USB_TypeDef *USBx)
  1889. {
  1890. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1891. only by USB OTG FS peripheral.
  1892. - This function is added to ensure compatibility across platforms.
  1893. */
  1894. /* Prevent unused argument(s) compilation warning */
  1895. UNUSED(USBx);
  1896. return (0);
  1897. }
  1898. /**
  1899. * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
  1900. * @param USBx : Selected device
  1901. * @retval HAL status
  1902. */
  1903. uint32_t USB_ReadDevAllInEpInterrupt (USB_TypeDef *USBx)
  1904. {
  1905. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1906. only by USB OTG FS peripheral.
  1907. - This function is added to ensure compatibility across platforms.
  1908. */
  1909. /* Prevent unused argument(s) compilation warning */
  1910. UNUSED(USBx);
  1911. return (0);
  1912. }
  1913. /**
  1914. * @brief Returns Device OUT EP Interrupt register
  1915. * @param USBx : Selected device
  1916. * @param epnum : endpoint number
  1917. * This parameter can be a value from 0 to 15
  1918. * @retval Device OUT EP Interrupt register
  1919. */
  1920. uint32_t USB_ReadDevOutEPInterrupt (USB_TypeDef *USBx , uint8_t epnum)
  1921. {
  1922. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1923. only by USB OTG FS peripheral.
  1924. - This function is added to ensure compatibility across platforms.
  1925. */
  1926. /* Prevent unused argument(s) compilation warning */
  1927. UNUSED(USBx);
  1928. UNUSED(epnum);
  1929. return (0);
  1930. }
  1931. /**
  1932. * @brief Returns Device IN EP Interrupt register
  1933. * @param USBx : Selected device
  1934. * @param epnum : endpoint number
  1935. * This parameter can be a value from 0 to 15
  1936. * @retval Device IN EP Interrupt register
  1937. */
  1938. uint32_t USB_ReadDevInEPInterrupt (USB_TypeDef *USBx , uint8_t epnum)
  1939. {
  1940. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1941. only by USB OTG FS peripheral.
  1942. - This function is added to ensure compatibility across platforms.
  1943. */
  1944. /* Prevent unused argument(s) compilation warning */
  1945. UNUSED(USBx);
  1946. UNUSED(epnum);
  1947. return (0);
  1948. }
  1949. /**
  1950. * @brief USB_ClearInterrupts: clear a USB interrupt
  1951. * @param USBx : Selected device
  1952. * @param interrupt : interrupt flag
  1953. * @retval None
  1954. */
  1955. void USB_ClearInterrupts (USB_TypeDef *USBx, uint32_t interrupt)
  1956. {
  1957. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1958. only by USB OTG FS peripheral.
  1959. - This function is added to ensure compatibility across platforms.
  1960. */
  1961. /* Prevent unused argument(s) compilation warning */
  1962. UNUSED(USBx);
  1963. UNUSED(interrupt);
  1964. }
  1965. /**
  1966. * @brief Prepare the EP0 to start the first control setup
  1967. * @param USBx : Selected device
  1968. * @param psetup : pointer to setup packet
  1969. * @retval HAL status
  1970. */
  1971. HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t dma ,uint8_t *psetup)
  1972. {
  1973. /* NOTE : - This function is not required by USB Device FS peripheral, it is used
  1974. only by USB OTG FS peripheral.
  1975. - This function is added to ensure compatibility across platforms.
  1976. */
  1977. /* Prevent unused argument(s) compilation warning */
  1978. UNUSED(USBx);
  1979. UNUSED(psetup);
  1980. UNUSED(dma);
  1981. return HAL_OK;
  1982. }
  1983. /**
  1984. * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
  1985. * @param USBx : Selected device
  1986. * @retval HAL status
  1987. */
  1988. HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx)
  1989. {
  1990. USBx->CNTR |= USB_CNTR_RESUME;
  1991. return HAL_OK;
  1992. }
  1993. /**
  1994. * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
  1995. * @param USBx : Selected device
  1996. * @retval HAL status
  1997. */
  1998. HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx)
  1999. {
  2000. USBx->CNTR &= ~(USB_CNTR_RESUME);
  2001. return HAL_OK;
  2002. }
  2003. /**
  2004. * @brief Copy a buffer from user memory area to packet memory area (PMA)
  2005. * @param USBx : pointer to USB register.
  2006. * @param pbUsrBuf : pointer to user memory area.
  2007. * @param wPMABufAddr : address into PMA.
  2008. * @param wNBytes : number of bytes to be copied.
  2009. * @retval None
  2010. */
  2011. void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
  2012. {
  2013. uint32_t n = (wNBytes + 1) >> 1;
  2014. uint32_t i;
  2015. uint16_t temp1, temp2;
  2016. uint16_t *pdwVal;
  2017. pdwVal = (uint16_t *)(wPMABufAddr + (uint32_t)USBx + 0x400);
  2018. for (i = n; i != 0; i--)
  2019. {
  2020. temp1 = (uint16_t) * pbUsrBuf;
  2021. pbUsrBuf++;
  2022. temp2 = temp1 | (uint16_t) * pbUsrBuf << 8;
  2023. *pdwVal++ = temp2;
  2024. pbUsrBuf++;
  2025. }
  2026. }
  2027. /**
  2028. * @brief Copy a buffer from user memory area to packet memory area (PMA)
  2029. * @param USBx : pointer to USB register.
  2030. * @param pbUsrBuf : pointer to user memory area.
  2031. * @param wPMABufAddr : address into PMA.
  2032. * @param wNBytes : number of bytes to be copied.
  2033. * @retval None
  2034. */
  2035. void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
  2036. {
  2037. uint32_t n = (wNBytes + 1) >> 1;
  2038. uint32_t i;
  2039. uint16_t *pdwVal;
  2040. pdwVal = (uint16_t *)(wPMABufAddr + (uint32_t)USBx + 0x400);
  2041. for (i = n; i != 0; i--)
  2042. {
  2043. *(uint16_t*)pbUsrBuf++ = *pdwVal++;
  2044. pbUsrBuf++;
  2045. }
  2046. }
  2047. #endif /* USB */
  2048. /**
  2049. * @}
  2050. */
  2051. /**
  2052. * @}
  2053. */
  2054. #if defined (USB_OTG_FS)
  2055. /** @addtogroup USB_LL_Private_Functions
  2056. * @{
  2057. */
  2058. /**
  2059. * @brief Reset the USB Core (needed after USB clock settings change)
  2060. * @param USBx : Selected device
  2061. * @retval HAL status
  2062. */
  2063. static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
  2064. {
  2065. uint32_t count = 0;
  2066. /* Wait for AHB master IDLE state. */
  2067. do
  2068. {
  2069. if (++count > 200000)
  2070. {
  2071. return HAL_TIMEOUT;
  2072. }
  2073. }
  2074. while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0);
  2075. /* Core Soft Reset */
  2076. count = 0;
  2077. USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
  2078. do
  2079. {
  2080. if (++count > 200000)
  2081. {
  2082. return HAL_TIMEOUT;
  2083. }
  2084. }
  2085. while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
  2086. return HAL_OK;
  2087. }
  2088. /**
  2089. * @}
  2090. */
  2091. #endif /* USB_OTG_FS */
  2092. #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */
  2093. /* STM32L452xx || STM32L462xx || */
  2094. /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
  2095. /* STM32L496xx || STM32L4A6xx */
  2096. #endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */
  2097. /**
  2098. * @}
  2099. */
  2100. /**
  2101. * @}
  2102. */
  2103. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/