mbfunccoils_m.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390
  1. /*
  2. * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU.
  3. * Copyright (C) 2013 Armink <armink.ztl@gmail.com>
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. * 1. Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions and the following disclaimer.
  11. * 2. Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the distribution.
  14. * 3. The name of the author may not be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18. * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27. *
  28. * File: $Id: mbfunccoils_m.c,v 1.60 2013/10/12 15:10:12 Armink Add Master Functions
  29. */
  30. /* ----------------------- System includes ----------------------------------*/
  31. #include "stdlib.h"
  32. #include "string.h"
  33. /* ----------------------- Platform includes --------------------------------*/
  34. #include "port.h"
  35. /* ----------------------- Modbus includes ----------------------------------*/
  36. #include "mb.h"
  37. #include "mb_m.h"
  38. #include "mbframe.h"
  39. #include "mbproto.h"
  40. #include "mbconfig.h"
  41. /* ----------------------- Defines ------------------------------------------*/
  42. #define MB_PDU_REQ_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0 )
  43. #define MB_PDU_REQ_READ_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 )
  44. #define MB_PDU_REQ_READ_SIZE ( 4 )
  45. #define MB_PDU_FUNC_READ_COILCNT_OFF ( MB_PDU_DATA_OFF + 0 )
  46. #define MB_PDU_FUNC_READ_VALUES_OFF ( MB_PDU_DATA_OFF + 1 )
  47. #define MB_PDU_FUNC_READ_SIZE_MIN ( 1 )
  48. #define MB_PDU_REQ_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF )
  49. #define MB_PDU_REQ_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 )
  50. #define MB_PDU_REQ_WRITE_SIZE ( 4 )
  51. #define MB_PDU_FUNC_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF )
  52. #define MB_PDU_FUNC_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 )
  53. #define MB_PDU_FUNC_WRITE_SIZE ( 4 )
  54. #define MB_PDU_REQ_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF )
  55. #define MB_PDU_REQ_WRITE_MUL_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 )
  56. #define MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF ( MB_PDU_DATA_OFF + 4 )
  57. #define MB_PDU_REQ_WRITE_MUL_VALUES_OFF ( MB_PDU_DATA_OFF + 5 )
  58. #define MB_PDU_REQ_WRITE_MUL_SIZE_MIN ( 5 )
  59. #define MB_PDU_REQ_WRITE_MUL_COILCNT_MAX ( 0x07B0 )
  60. #define MB_PDU_FUNC_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF )
  61. #define MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 )
  62. #define MB_PDU_FUNC_WRITE_MUL_SIZE ( 5 )
  63. /* ----------------------- Static functions ---------------------------------*/
  64. eMBException prveMBError2Exception( eMBErrorCode eErrorCode );
  65. /* ----------------------- Start implementation -----------------------------*/
  66. #if MB_MASTER_RTU_ENABLED > 0 || MB_MASTER_ASCII_ENABLED > 0
  67. #if MB_FUNC_READ_COILS_ENABLED > 0
  68. /**
  69. * This function will request read coil.
  70. *
  71. * @param ucSndAddr salve address
  72. * @param usCoilAddr coil start address
  73. * @param usNCoils coil total number
  74. * @param lTimeOut timeout (-1 will waiting forever)
  75. *
  76. * @return error code
  77. */
  78. eMBMasterReqErrCode
  79. eMBMasterReqReadCoils( UCHAR ucSndAddr, USHORT usCoilAddr, USHORT usNCoils ,LONG lTimeOut )
  80. {
  81. UCHAR *ucMBFrame;
  82. eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
  83. if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
  84. else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
  85. else
  86. {
  87. vMBMasterGetPDUSndBuf(&ucMBFrame);
  88. vMBMasterSetDestAddress(ucSndAddr);
  89. ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_READ_COILS;
  90. ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] = usCoilAddr >> 8;
  91. ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] = usCoilAddr;
  92. ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF ] = usNCoils >> 8;
  93. ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF + 1] = usNCoils;
  94. vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_READ_SIZE );
  95. ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT );
  96. eErrStatus = eMBMasterWaitRequestFinish( );
  97. }
  98. return eErrStatus;
  99. }
  100. eMBException
  101. eMBMasterFuncReadCoils( UCHAR * pucFrame, USHORT * usLen )
  102. {
  103. UCHAR *ucMBFrame;
  104. USHORT usRegAddress;
  105. USHORT usCoilCount;
  106. UCHAR ucByteCount;
  107. eMBException eStatus = MB_EX_NONE;
  108. eMBErrorCode eRegStatus;
  109. /* If this request is broadcast, and it's read mode. This request don't need execute. */
  110. if ( xMBMasterRequestIsBroadcast() )
  111. {
  112. eStatus = MB_EX_NONE;
  113. }
  114. else if ( *usLen >= MB_PDU_SIZE_MIN + MB_PDU_FUNC_READ_SIZE_MIN )
  115. {
  116. vMBMasterGetPDUSndBuf(&ucMBFrame);
  117. usRegAddress = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] << 8 );
  118. usRegAddress |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] );
  119. usRegAddress++;
  120. usCoilCount = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF] << 8 );
  121. usCoilCount |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF + 1] );
  122. /* Test if the quantity of coils is a multiple of 8. If not last
  123. * byte is only partially field with unused coils set to zero. */
  124. if( ( usCoilCount & 0x0007 ) != 0 )
  125. {
  126. ucByteCount = ( UCHAR )( usCoilCount / 8 + 1 );
  127. }
  128. else
  129. {
  130. ucByteCount = ( UCHAR )( usCoilCount / 8 );
  131. }
  132. /* Check if the number of registers to read is valid. If not
  133. * return Modbus illegal data value exception.
  134. */
  135. if( ( usCoilCount >= 1 ) &&
  136. ( ucByteCount == pucFrame[MB_PDU_FUNC_READ_COILCNT_OFF] ) )
  137. {
  138. /* Make callback to fill the buffer. */
  139. eRegStatus = eMBMasterRegCoilsCB( &pucFrame[MB_PDU_FUNC_READ_VALUES_OFF], usRegAddress, usCoilCount, MB_REG_READ );
  140. /* If an error occured convert it into a Modbus exception. */
  141. if( eRegStatus != MB_ENOERR )
  142. {
  143. eStatus = prveMBError2Exception( eRegStatus );
  144. }
  145. }
  146. else
  147. {
  148. eStatus = MB_EX_ILLEGAL_DATA_VALUE;
  149. }
  150. }
  151. else
  152. {
  153. /* Can't be a valid read coil register request because the length
  154. * is incorrect. */
  155. eStatus = MB_EX_ILLEGAL_DATA_VALUE;
  156. }
  157. return eStatus;
  158. }
  159. #endif
  160. #if MB_FUNC_WRITE_COIL_ENABLED > 0
  161. /**
  162. * This function will request write one coil.
  163. *
  164. * @param ucSndAddr salve address
  165. * @param usCoilAddr coil start address
  166. * @param usCoilData data to be written
  167. * @param lTimeOut timeout (-1 will waiting forever)
  168. *
  169. * @return error code
  170. *
  171. * @see eMBMasterReqWriteMultipleCoils
  172. */
  173. eMBMasterReqErrCode
  174. eMBMasterReqWriteCoil( UCHAR ucSndAddr, USHORT usCoilAddr, USHORT usCoilData, LONG lTimeOut )
  175. {
  176. UCHAR *ucMBFrame;
  177. eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
  178. if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
  179. else if ( ( usCoilData != 0xFF00 ) && ( usCoilData != 0x0000 ) ) eErrStatus = MB_MRE_ILL_ARG;
  180. else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
  181. else
  182. {
  183. vMBMasterGetPDUSndBuf(&ucMBFrame);
  184. vMBMasterSetDestAddress(ucSndAddr);
  185. ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_WRITE_SINGLE_COIL;
  186. ucMBFrame[MB_PDU_REQ_WRITE_ADDR_OFF] = usCoilAddr >> 8;
  187. ucMBFrame[MB_PDU_REQ_WRITE_ADDR_OFF + 1] = usCoilAddr;
  188. ucMBFrame[MB_PDU_REQ_WRITE_VALUE_OFF ] = usCoilData >> 8;
  189. ucMBFrame[MB_PDU_REQ_WRITE_VALUE_OFF + 1] = usCoilData;
  190. vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_WRITE_SIZE );
  191. ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT );
  192. eErrStatus = eMBMasterWaitRequestFinish( );
  193. }
  194. return eErrStatus;
  195. }
  196. eMBException
  197. eMBMasterFuncWriteCoil( UCHAR * pucFrame, USHORT * usLen )
  198. {
  199. USHORT usRegAddress;
  200. UCHAR ucBuf[2];
  201. eMBException eStatus = MB_EX_NONE;
  202. eMBErrorCode eRegStatus;
  203. if( *usLen == ( MB_PDU_FUNC_WRITE_SIZE + MB_PDU_SIZE_MIN ) )
  204. {
  205. usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF] << 8 );
  206. usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF + 1] );
  207. usRegAddress++;
  208. if( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF + 1] == 0x00 ) &&
  209. ( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF ) ||
  210. ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0x00 ) ) )
  211. {
  212. ucBuf[1] = 0;
  213. if( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF )
  214. {
  215. ucBuf[0] = 1;
  216. }
  217. else
  218. {
  219. ucBuf[0] = 0;
  220. }
  221. eRegStatus =
  222. eMBMasterRegCoilsCB( &ucBuf[0], usRegAddress, 1, MB_REG_WRITE );
  223. /* If an error occured convert it into a Modbus exception. */
  224. if( eRegStatus != MB_ENOERR )
  225. {
  226. eStatus = prveMBError2Exception( eRegStatus );
  227. }
  228. }
  229. else
  230. {
  231. eStatus = MB_EX_ILLEGAL_DATA_VALUE;
  232. }
  233. }
  234. else
  235. {
  236. /* Can't be a valid write coil register request because the length
  237. * is incorrect. */
  238. eStatus = MB_EX_ILLEGAL_DATA_VALUE;
  239. }
  240. return eStatus;
  241. }
  242. #endif
  243. #if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0
  244. /**
  245. * This function will request write multiple coils.
  246. *
  247. * @param ucSndAddr salve address
  248. * @param usCoilAddr coil start address
  249. * @param usNCoils coil total number
  250. * @param usCoilData data to be written
  251. * @param lTimeOut timeout (-1 will waiting forever)
  252. *
  253. * @return error code
  254. *
  255. * @see eMBMasterReqWriteCoil
  256. */
  257. eMBMasterReqErrCode
  258. eMBMasterReqWriteMultipleCoils( UCHAR ucSndAddr,
  259. USHORT usCoilAddr, USHORT usNCoils, UCHAR * pucDataBuffer, LONG lTimeOut)
  260. {
  261. UCHAR *ucMBFrame;
  262. USHORT usRegIndex = 0;
  263. UCHAR ucByteCount;
  264. eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
  265. if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
  266. else if ( usNCoils > MB_PDU_REQ_WRITE_MUL_COILCNT_MAX ) eErrStatus = MB_MRE_ILL_ARG;
  267. else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
  268. else
  269. {
  270. vMBMasterGetPDUSndBuf(&ucMBFrame);
  271. vMBMasterSetDestAddress(ucSndAddr);
  272. ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_WRITE_MULTIPLE_COILS;
  273. ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF] = usCoilAddr >> 8;
  274. ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF + 1] = usCoilAddr;
  275. ucMBFrame[MB_PDU_REQ_WRITE_MUL_COILCNT_OFF] = usNCoils >> 8;
  276. ucMBFrame[MB_PDU_REQ_WRITE_MUL_COILCNT_OFF + 1] = usNCoils ;
  277. if( ( usNCoils & 0x0007 ) != 0 )
  278. {
  279. ucByteCount = ( UCHAR )( usNCoils / 8 + 1 );
  280. }
  281. else
  282. {
  283. ucByteCount = ( UCHAR )( usNCoils / 8 );
  284. }
  285. ucMBFrame[MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF] = ucByteCount;
  286. ucMBFrame += MB_PDU_REQ_WRITE_MUL_VALUES_OFF;
  287. while( ucByteCount > usRegIndex)
  288. {
  289. *ucMBFrame++ = pucDataBuffer[usRegIndex++];
  290. }
  291. vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_WRITE_MUL_SIZE_MIN + ucByteCount );
  292. ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT );
  293. eErrStatus = eMBMasterWaitRequestFinish( );
  294. }
  295. return eErrStatus;
  296. }
  297. eMBException
  298. eMBMasterFuncWriteMultipleCoils( UCHAR * pucFrame, USHORT * usLen )
  299. {
  300. USHORT usRegAddress;
  301. USHORT usCoilCnt;
  302. UCHAR ucByteCount;
  303. UCHAR ucByteCountVerify;
  304. UCHAR *ucMBFrame;
  305. eMBException eStatus = MB_EX_NONE;
  306. eMBErrorCode eRegStatus;
  307. /* If this request is broadcast, the *usLen is not need check. */
  308. if( ( *usLen == MB_PDU_FUNC_WRITE_MUL_SIZE ) || xMBMasterRequestIsBroadcast() )
  309. {
  310. vMBMasterGetPDUSndBuf(&ucMBFrame);
  311. usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF] << 8 );
  312. usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF + 1] );
  313. usRegAddress++;
  314. usCoilCnt = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF] << 8 );
  315. usCoilCnt |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF + 1] );
  316. ucByteCount = ucMBFrame[MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF];
  317. /* Compute the number of expected bytes in the request. */
  318. if( ( usCoilCnt & 0x0007 ) != 0 )
  319. {
  320. ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 + 1 );
  321. }
  322. else
  323. {
  324. ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 );
  325. }
  326. if( ( usCoilCnt >= 1 ) && ( ucByteCountVerify == ucByteCount ) )
  327. {
  328. eRegStatus =
  329. eMBMasterRegCoilsCB( &ucMBFrame[MB_PDU_REQ_WRITE_MUL_VALUES_OFF],
  330. usRegAddress, usCoilCnt, MB_REG_WRITE );
  331. /* If an error occured convert it into a Modbus exception. */
  332. if( eRegStatus != MB_ENOERR )
  333. {
  334. eStatus = prveMBError2Exception( eRegStatus );
  335. }
  336. }
  337. else
  338. {
  339. eStatus = MB_EX_ILLEGAL_DATA_VALUE;
  340. }
  341. }
  342. else
  343. {
  344. /* Can't be a valid write coil register request because the length
  345. * is incorrect. */
  346. eStatus = MB_EX_ILLEGAL_DATA_VALUE;
  347. }
  348. return eStatus;
  349. }
  350. #endif
  351. #endif