cmem7_eth.h 14 KB

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  1. /**
  2. *****************************************************************************
  3. * @file cmem7_eth.h
  4. *
  5. * @brief CMEM7 ethernet header file
  6. *
  7. *
  8. * @version V1.0
  9. * @date 3. September 2013
  10. *
  11. * @note
  12. *
  13. *****************************************************************************
  14. * @attention
  15. *
  16. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  17. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  18. * TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
  19. * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  20. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  21. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  22. *
  23. * <h2><center>&copy; COPYRIGHT 2013 Capital-micro </center></h2>
  24. *****************************************************************************
  25. */
  26. #ifndef __CMEM7_ETH_H
  27. #define __CMEM7_ETH_H
  28. #ifdef __cplusplus
  29. extern "C" {
  30. #endif
  31. #include "cmem7.h"
  32. #include "cmem7_conf.h"
  33. /** @defgroup ETH_SPEED
  34. * @{
  35. */
  36. #define ETH_SPEED_10M 0x0
  37. #define ETH_SPEED_100M 0x1
  38. #define ETH_SPEED_1000M 0x2
  39. #define IS_ETH_SPEED(SPEED) (((SPEED) == ETH_SPEED_10M) || \
  40. ((SPEED) == ETH_SPEED_100M) || \
  41. ((SPEED) == ETH_SPEED_1000M))
  42. /**
  43. * @}
  44. */
  45. /** @defgroup ETH_DUPLEX
  46. * @{
  47. */
  48. #define ETH_DUPLEX_HALF 0x0
  49. #define ETH_DUPLEX_FULL 0x1
  50. #define IS_ETH_DUPLEX(DUPLEX) (((DUPLEX) == ETH_DUPLEX_HALF) || \
  51. ((DUPLEX) == ETH_DUPLEX_FULL))
  52. /**
  53. * @}
  54. */
  55. /** @defgroup ETH_INT
  56. * @{
  57. */
  58. #define ETH_INT_TX_COMPLETE_FRAME 0x0001
  59. #define ETH_INT_TX_STOP 0x0002
  60. #define ETH_INT_TX_BUF_UNAVAI 0x0004
  61. #define ETH_INT_RX_OVERFLOW 0x0010
  62. #define ETH_INT_TX_UNDERFLOW 0x0020
  63. #define ETH_INT_RX_COMPLETE_FRAME 0x0040
  64. #define ETH_INT_RX_BUF_UNAVAI 0x0080
  65. #define ETH_INT_RX_STOP 0x0100
  66. #define ETH_INT_BUS_FATAL_ERROR 0x2000
  67. #define ETH_INT_ALL (ETH_INT_TX_COMPLETE_FRAME | \
  68. ETH_INT_TX_STOP | \
  69. ETH_INT_TX_BUF_UNAVAI | \
  70. ETH_INT_RX_OVERFLOW | \
  71. ETH_INT_TX_UNDERFLOW | \
  72. ETH_INT_RX_COMPLETE_FRAME | \
  73. ETH_INT_RX_BUF_UNAVAI | \
  74. ETH_INT_RX_STOP | \
  75. ETH_INT_BUS_FATAL_ERROR)
  76. #define IS_ETH_INT(INT) (((INT) != 0) && (((INT) & ~ETH_INT_ALL) == 0))
  77. /**
  78. * @}
  79. */
  80. /**
  81. * @brief EFUSE receive filter structure
  82. */
  83. typedef struct
  84. {
  85. BOOL ETH_BroadcastFilterEnable; /*!< Broadcast is dropped or passed */
  86. BOOL ETH_OwnFilterEnable; /*!< source address filter is on or off */
  87. BOOL ETH_SelfDrop; /*!< Only own address is dropped or passed */
  88. BOOL ETH_SourceFilterEnable; /*!< source address filter is on or off */
  89. BOOL ETH_SourceDrop; /*!< Only specific source address is dropped or passed */
  90. uint8_t ETH_SourceMacAddr[6]; /*!< Source MAC address */
  91. } ETH_FrameFilter;
  92. /**
  93. * @brief Ethernet initialization structure
  94. */
  95. typedef struct
  96. {
  97. BOOL ETH_LinkUp; /*!< If ETH is linked up and it can be retrieved from PHY */
  98. uint8_t ETH_Speed; /*!< speed of ETH, refer as @ref ETH_SPEED */
  99. uint8_t ETH_Duplex; /*!< duplex mode of ETH, refer as @ref ETH_DUPLEX */
  100. BOOL ETH_RxEn; /*!< Rx enable */
  101. BOOL ETH_TxEn; /*!< Tx enable */
  102. BOOL ETH_ChecksumOffload; /*!< Checksum offload enable */
  103. BOOL ETH_JumboFrame; /*!< Jumbo Frame Enable */
  104. uint8_t ETH_MacAddr[6]; /*!< MAC address */
  105. ETH_FrameFilter *ETH_Filter; /*!< Received frame address filter, receive all if null */
  106. } ETH_InitTypeDef;
  107. /**
  108. * @brief Ethernet Tx descriptor structure
  109. */
  110. typedef struct {
  111. union {
  112. uint32_t TX0;
  113. struct {
  114. uint32_t : 1;
  115. uint32_t UNDERFLOW_ERR : 1; /*!< [OUT] Underflow error */
  116. uint32_t : 1;
  117. uint32_t COLLISION_CNT : 4; /*!< [OUT] Collision count */
  118. uint32_t : 1;
  119. uint32_t EX_COLLISION : 1; /*!< [OUT] Excessive collision error */
  120. uint32_t LATE_COLLISION : 1; /*!< [OUT] Late collision error */
  121. uint32_t NO_CARRIER : 1; /*!< [OUT] No carrier error */
  122. uint32_t LOSS_CARRIER : 1; /*!< [OUT] loss of carrier error */
  123. uint32_t PAYLOAD_ERR : 1; /*!< [OUT] IP payload error */
  124. uint32_t : 2;
  125. uint32_t ERR_SUM : 1; /*!< [OUT] Error summary */
  126. uint32_t HEADER_ERR : 1; /*!< [OUT] IP header error */
  127. uint32_t : 8;
  128. uint32_t TTSE : 1; /*!< enables IEEE1588 hardware timestamping in first segment */
  129. uint32_t : 2;
  130. uint32_t FS : 1; /*!< first segment flag */
  131. uint32_t LS : 1; /*!< last segment flag */
  132. uint32_t : 2;
  133. } TX0_b;
  134. } TX_0;
  135. union {
  136. uint32_t TX1;
  137. struct {
  138. uint32_t SIZE : 13; /*!< buffer size */
  139. uint32_t : 19;
  140. } TX1_b;
  141. } TX_1;
  142. uint32_t bufAddr; /*!< address of buffer */
  143. uint32_t nextDescAddr; /*!< address of next descriptor */
  144. uint64_t reserved;
  145. uint64_t timeStamp; /*!< time stamp while last segment */
  146. } ETH_TX_DESC;
  147. /**
  148. * @brief Ethernet Rx descriptor structure
  149. */
  150. typedef struct {
  151. union {
  152. uint32_t RX0;
  153. struct {
  154. uint32_t : 1;
  155. uint32_t CRC_ERR : 1; /*!< [OUT] CRC error while last segment */
  156. uint32_t : 5;
  157. uint32_t TTSE : 1; /*!< timestamp available while last segment */
  158. uint32_t LS : 1; /*!< [OUT] last segment flag */
  159. uint32_t FS : 1; /*!< [OUT] first segment flag */
  160. uint32_t : 1;
  161. uint32_t OVERFLOW_ERR : 1; /*!< [OUT] FIFO overflow while last segment */
  162. uint32_t LENGTH_ERR : 1; /*!< [OUT] length error while last segment */
  163. uint32_t : 2;
  164. uint32_t ERR_SUM : 1; /*!< [OUT] Error summary while last segment */
  165. uint32_t FL : 14; /*!< [OUT] frame length while last segment */
  166. uint32_t : 2;
  167. } RX0_b;
  168. } RX_0;
  169. union {
  170. uint32_t RX1;
  171. struct {
  172. uint32_t SIZE : 13; /*!< buffer size */
  173. uint32_t : 19;
  174. } RX1_b;
  175. } RX_1;
  176. uint32_t bufAddr; /*!< buffer address */
  177. uint32_t nextDescAddr; /*!< address of next descriptor */
  178. uint64_t reserved;
  179. uint64_t timeStamp; /*!< time stamp while the last segment */
  180. } ETH_RX_DESC;
  181. /**
  182. * @brief Read data from phy chip
  183. * @param[in] phyAddr Address of phy chip
  184. * @param[in] phyReg Address of phy's register to be read
  185. * @retval uint32_t value of phy's register
  186. */
  187. uint32_t ETH_PhyRead(uint32_t phyAddr, uint32_t phyReg);
  188. /**
  189. * @brief Write data to phy chip
  190. * @param[in] phyAddr Address of phy chip
  191. * @param[in] phyReg Address of phy's register to be written
  192. * @param[in] data Data to be written
  193. * @retval None
  194. */
  195. void ETH_PhyWrite(uint32_t phyAddr, uint32_t phyReg, uint32_t data);
  196. /**
  197. * @brief Fills each ETH_InitStruct member with its default value.
  198. * @param ETH_InitStruct: pointer to a ETH_InitTypeDef structure
  199. * which will be initialized.
  200. * @retval : None
  201. */
  202. void ETH_StructInit(ETH_InitTypeDef* init);
  203. /**
  204. * @brief Ethernet initialization
  205. * @note This function should be called at first before any other interfaces.
  206. * @param[in] init A pointer to structure ETH_InitTypeDef
  207. * @retval BOOL The bit indicates if ethernet is initialized successfully
  208. */
  209. BOOL ETH_Init(ETH_InitTypeDef *init);
  210. /**
  211. * @brief Enable or disable ethernet interrupt.
  212. * @param[in] Int interrupt mask bits, which can be the combination of @ref ETH_INT
  213. * @param[in] Enable The bit indicates if specific interrupts are enable or not
  214. * @retval None
  215. */
  216. void ETH_ITConfig(uint32_t Int, BOOL enable);
  217. /**
  218. * @brief Check specific interrupts are set or not
  219. * @param[in] Int interrupt mask bits, which can be the combination of @ref ETH_INT
  220. * @retval BOOL The bit indicates if specific interrupts are set or not
  221. */
  222. BOOL ETH_GetITStatus(uint32_t Int);
  223. /**
  224. * @brief Clear specific interrupts
  225. * @param[in] Int interrupt mask bits, which can be the combination of @ref ETH_INT
  226. * @retval None
  227. */
  228. void ETH_ClearITPendingBit(uint32_t Int);
  229. /**
  230. * @brief Get ethernte MAC address
  231. * @param[in] mac A user-allocated buffer to fetch MAC to be read, 6 bytes.
  232. * @retval None
  233. */
  234. void ETH_GetMacAddr(uint8_t *mac);
  235. /**
  236. * @brief Set ethernet transmission descriptor ring
  237. * @note Make sure that memory occupied by descriptors should be in physical
  238. * memory and keep valid before ethernet transmission is finished.
  239. * @param[in] ring A pointer to header of ETH_TX_DESC ring, whose last node
  240. * has a 'nextDescAddr' pointed to first node.
  241. * @retval BOOL The bit indicates if valid ring is set
  242. */
  243. BOOL ETH_SetTxDescRing(ETH_TX_DESC *ring);
  244. /**
  245. * @brief Start ethernet transmission
  246. * @param None
  247. * @retval None
  248. */
  249. void ETH_StartTx(void);
  250. /**
  251. * @brief Stop ethernet transmission
  252. * @param None
  253. * @retval None
  254. */
  255. void ETH_StopTx(void);
  256. /**
  257. * @brief Resume ethernet transmission\n
  258. * While ethernet doesn't have enough buffer to transmit data, it will
  259. * pause and inform users by interrupt 'ETH_INT_TX_BUF_UNAVAI'. Users
  260. * must call this function to start ethernet again after new buffer
  261. * prepared.
  262. * @param None
  263. * @retval None
  264. */
  265. void ETH_ResumeTx(void);
  266. /**
  267. * @brief Get free transmission descriptor\n
  268. * @param None
  269. * @retval ETH_TX_DESC* A pointer of free transmission descriptor,
  270. * NULL if no free descriptor
  271. */
  272. ETH_TX_DESC *ETH_AcquireFreeTxDesc(void);
  273. /**
  274. * @brief Check if a transmission descriptor is free or not
  275. * @param[in] desc A pointer of a transmission descriptor
  276. * @retval BOOL True if the transmission descriptor is free, or flase.
  277. */
  278. BOOL ETH_IsFreeTxDesc(ETH_TX_DESC *desc);
  279. /**
  280. * @brief Release a transmission descriptor to ethernet\n
  281. * After users prepared data in the buffer of a free descriptor,
  282. * They must call this function to change ownership of the
  283. * descriptor to hardware.
  284. * @param[in] desc A pointer of a transmission descriptor
  285. * @retval None
  286. */
  287. void ETH_ReleaseTxDesc(ETH_TX_DESC *desc);
  288. /**
  289. * @brief Set buffer address of the specific TX descriptor
  290. * @param[in] desc A pointer of a transmission descriptor
  291. * @param[in] bufAddr buffer address to be sent
  292. * @retval None
  293. */
  294. void ETH_SetTxDescBufAddr(ETH_TX_DESC *desc, uint32_t bufAddr);
  295. /**
  296. * @brief Get buffer address of the specific TX descriptor
  297. * @param[in] desc A pointer of a transmission descriptor
  298. * @retval uint32_t buffer address to be gotten
  299. */
  300. uint32_t ETH_GetTxDescBufAddr(ETH_TX_DESC *desc);
  301. /**
  302. * @brief Set ethernet receive descriptor ring
  303. * @note Make sure that memory occupied by descriptors should be in physical
  304. * memory and keep valid before ethernet receive is finished.
  305. * @param[in] ring A pointer to header of ETH_TX_DESC ring, whose last node
  306. * has a 'nextDescAddr' pointed to first node.
  307. * @retval BOOL The bit indicates if valid ring is set
  308. */
  309. BOOL ETH_SetRxDescRing(ETH_RX_DESC *ring);
  310. /**
  311. * @brief Start ethernet receive
  312. * @param None
  313. * @retval None
  314. */
  315. void ETH_StartRx(void);
  316. /**
  317. * @brief Stop ethernet receive
  318. * @param None
  319. * @retval None
  320. */
  321. void ETH_StopRx(void);
  322. /**
  323. * @brief Resume ethernet receive\n
  324. * While ethernet doesn't have enough buffer to receive data, it will
  325. * pause and inform users by interrupt 'ETH_INT_RX_BUF_UNAVAI'. Users
  326. * must call this function to start ethernet again after new buffer
  327. * prepared.
  328. * @param None
  329. * @retval None
  330. */
  331. void ETH_ResumeRx(void);
  332. /**
  333. * @brief Get the free descriptor which contains received data\n
  334. * @param None
  335. * @retval ETH_RX_DESC* A pointer of free receive descriptor,
  336. * NULL if no free descriptor
  337. */
  338. ETH_RX_DESC *ETH_AcquireFreeRxDesc(void);
  339. /**
  340. * @brief Check if a receive descriptor is free or not
  341. * @param[in] desc A pointer of a receive descriptor
  342. * @retval BOOL True if the receive descriptor is free, or flase.
  343. */
  344. BOOL ETH_IsFreeRxDesc(ETH_RX_DESC *desc);
  345. /**
  346. * @brief Release a receive descriptor to ethernet\n
  347. * After users handled data in the buffer of a free descriptor,
  348. * They must call this function to change ownership of the
  349. * descriptor to hardware.
  350. * @param[in] desc A pointer of a transmission descriptor
  351. * @retval None
  352. */
  353. void ETH_ReleaseRxDesc(ETH_RX_DESC *desc);
  354. /**
  355. * @brief Set buffer address of the specific RX descriptor
  356. * @param[in] desc A pointer of a receive descriptor
  357. * @param[in] bufAddr buffer address to be received
  358. * @retval None
  359. */
  360. void ETH_SetRxDescBufAddr(ETH_RX_DESC *desc, uint32_t bufAddr);
  361. /**
  362. * @brief Get buffer address of the specific RX descriptor
  363. * @param[in] desc A pointer of a receive descriptor
  364. * @retval uint32_t buffer address to be gotten
  365. */
  366. uint32_t ETH_GetRxDescBufAddr(ETH_RX_DESC *desc);
  367. #ifdef __cplusplus
  368. }
  369. #endif
  370. #endif /* __CMEM7_ETH_H */