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drv_iic.c 24 KB

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  1. /***************************************************************************//**
  2. * @file drv_iic.c
  3. * @brief Serial API of RT-Thread RTOS for EFM32
  4. * COPYRIGHT (C) 2012, RT-Thread Development Team
  5. * @author onelife
  6. * @version 1.0
  7. *******************************************************************************
  8. * @section License
  9. * The license and distribution terms for this file may be found in the file
  10. * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  11. *******************************************************************************
  12. * @section Change Logs
  13. * Date Author Notes
  14. * 2011-01-06 onelife Initial creation for EFM32
  15. * 2011-06-17 onelife Modify init function for EFM32 library v2.0.0
  16. * upgrading
  17. * 2011-07-11 onelife Add lock (semaphore) to prevent simultaneously
  18. * access
  19. * 2011-08-04 onelife Change the usage of the second parameter of Read
  20. * and Write functions from (seldom used) "Offset" to "Slave address"
  21. * 2011-08-04 onelife Add a timer to prevent from forever waiting
  22. * 2011-11-29 onelife Modify init function for EFM32 library v2.2.2
  23. * upgrading
  24. * 2011-12-27 onelife Utilize "I2C_PRESENT" and "I2C_COUNT"
  25. * 2011-12-27 onelife Change IIC read format
  26. ******************************************************************************/
  27. /***************************************************************************//**
  28. * @addtogroup efm32
  29. * @{
  30. ******************************************************************************/
  31. /* Includes ------------------------------------------------------------------*/
  32. #include "board.h"
  33. #include "hdl_interrupt.h"
  34. #include "drv_iic.h"
  35. #if (defined(RT_USING_IIC0) || defined(RT_USING_IIC1))
  36. #if !defined(I2C_PRESENT)
  37. #error "IIC module is not available"
  38. #endif
  39. /* Private typedef -----------------------------------------------------------*/
  40. struct efm32_iic_block
  41. {
  42. struct rt_device device;
  43. struct rt_semaphore lock;
  44. struct rt_timer timer;
  45. };
  46. /* Private define ------------------------------------------------------------*/
  47. /* Private macro -------------------------------------------------------------*/
  48. #ifdef RT_IIC_DEBUG
  49. #define iic_debug(format,args...) rt_kprintf(format, ##args)
  50. #else
  51. #define iic_debug(format,args...)
  52. #endif
  53. /* Private variables ---------------------------------------------------------*/
  54. #ifdef RT_USING_IIC0
  55. #if (RT_USING_IIC0 > EFM32_IIC_LOCATION_COUNT)
  56. #error "Wrong location number"
  57. #endif
  58. static struct efm32_iic_block iic0;
  59. #endif
  60. #ifdef RT_USING_IIC1
  61. #if (I2C_COUNT <= 1)
  62. #error "Wrong unit number"
  63. #endif
  64. #if (RT_USING_IIC1 > EFM32_IIC_LOCATION_COUNT)
  65. #error "Wrong location number"
  66. #endif
  67. static struct efm32_iic_block iic1;
  68. #endif
  69. /* Private function prototypes -----------------------------------------------*/
  70. /* Private functions ---------------------------------------------------------*/
  71. /***************************************************************************//**
  72. * @brief
  73. * Initialize IIC device
  74. *
  75. * @details
  76. *
  77. * @note
  78. *
  79. * @param[in] dev
  80. * Pointer to device descriptor
  81. *
  82. * @return
  83. * Error code
  84. ******************************************************************************/
  85. static rt_err_t rt_iic_init (rt_device_t dev)
  86. {
  87. struct efm32_iic_device_t* iic;
  88. iic = (struct efm32_iic_device_t*)dev->user_data;
  89. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  90. {
  91. /* Enable IIC */
  92. I2C_Enable(iic->iic_device, true);
  93. iic->rx_buffer = RT_NULL;
  94. iic->state = 0;
  95. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  96. }
  97. return RT_EOK;
  98. }
  99. /***************************************************************************//**
  100. * @brief
  101. * Open IIC device
  102. *
  103. * @details
  104. *
  105. * @note
  106. *
  107. * @param[in] dev
  108. * Pointer to device descriptor
  109. *
  110. * @param[in] oflag
  111. * Device open flag
  112. *
  113. * @return
  114. * Error code
  115. ******************************************************************************/
  116. static rt_err_t rt_iic_open(rt_device_t dev, rt_uint16_t oflag)
  117. {
  118. RT_ASSERT(dev != RT_NULL);
  119. struct efm32_iic_device_t *iic;
  120. iic = (struct efm32_iic_device_t *)(dev->user_data);
  121. iic->counter++;
  122. iic_debug("IIC: Open with flag %x\n", oflag);
  123. return RT_EOK;
  124. }
  125. /***************************************************************************//**
  126. * @brief
  127. * Close IIC device
  128. *
  129. * @details
  130. *
  131. * @note
  132. *
  133. * @param[in] dev
  134. * Pointer to device descriptor
  135. *
  136. * @return
  137. * Error code
  138. ******************************************************************************/
  139. static rt_err_t rt_iic_close(rt_device_t dev)
  140. {
  141. RT_ASSERT(dev != RT_NULL);
  142. struct efm32_iic_device_t *iic;
  143. iic = (struct efm32_iic_device_t *)(dev->user_data);
  144. if (--iic->counter == 0)
  145. {
  146. rt_free(iic->rx_buffer->data_ptr);
  147. rt_free(iic->rx_buffer);
  148. iic->rx_buffer = RT_NULL;
  149. }
  150. return RT_EOK;
  151. }
  152. /***************************************************************************//**
  153. * @brief
  154. * Read from IIC device
  155. *
  156. * @details
  157. *
  158. * @note
  159. *
  160. * @param[in] dev
  161. * Pointer to device descriptor
  162. *
  163. * @param[in] pos
  164. * Slave address
  165. *
  166. * @param[in] buffer
  167. * Poniter to the buffer
  168. *
  169. * @param[in] size
  170. * Buffer size in byte
  171. *
  172. * @return
  173. * Error code
  174. ******************************************************************************/
  175. static rt_size_t rt_iic_read (
  176. rt_device_t dev,
  177. rt_off_t pos,
  178. void* buffer,
  179. rt_size_t size)
  180. {
  181. rt_err_t err_code;
  182. rt_size_t read_size;
  183. struct efm32_iic_device_t* iic;
  184. I2C_TransferSeq_TypeDef seq;
  185. I2C_TransferReturn_TypeDef ret;
  186. if (!size)
  187. {
  188. return 0;
  189. }
  190. err_code = RT_EOK;
  191. read_size = 0;
  192. iic = (struct efm32_iic_device_t*)dev->user_data;
  193. /* Lock device */
  194. if (rt_hw_interrupt_check())
  195. {
  196. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  197. }
  198. else
  199. {
  200. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  201. }
  202. if (ret != RT_EOK)
  203. {
  204. return ret;
  205. }
  206. if (iic->state & IIC_STATE_MASTER)
  207. {
  208. seq.addr = (rt_uint16_t)pos << 1;
  209. if (*(rt_uint8_t *)buffer == IIC_OP_READ_ONLY)
  210. {
  211. seq.flags = I2C_FLAG_READ;
  212. /* Set read buffer pointer and size */
  213. seq.buf[0].data = (rt_uint8_t *)buffer;
  214. seq.buf[0].len = size;
  215. }
  216. else
  217. {
  218. seq.flags = I2C_FLAG_WRITE_READ;
  219. /* Set register to be read */
  220. seq.buf[0].data = (rt_uint8_t *)buffer;
  221. seq.buf[0].len = 1;
  222. /* Set read buffer pointer and size */
  223. seq.buf[1].data = (rt_uint8_t *)buffer;
  224. seq.buf[1].len = size;
  225. }
  226. /* Do a polled transfer */
  227. iic->timeout = false;
  228. rt_timer_stop(iic->timer);
  229. rt_timer_start(iic->timer);
  230. ret = I2C_TransferInit(iic->iic_device, &seq);
  231. while ((ret == i2cTransferInProgress) && !iic->timeout)
  232. {
  233. ret = I2C_Transfer(iic->iic_device);
  234. }
  235. if (ret != i2cTransferDone)
  236. {
  237. iic_debug("IIC: read error %x\n", ret);
  238. iic_debug("IIC: read address %x\n", seq.addr);
  239. iic_debug("IIC: read data0 %x -> %x\n", seq.buf[0].data, *seq.buf[0].data);
  240. iic_debug("IIC: read len0 %x\n", seq.buf[0].len);
  241. iic_debug("IIC: read data1 %x -> %x\n", seq.buf[1].data, *seq.buf[1].data);
  242. iic_debug("IIC: read len1 %x\n", seq.buf[1].len);
  243. err_code = (rt_err_t)ret;
  244. }
  245. else
  246. {
  247. read_size = size;
  248. iic_debug("IIC: read size %d\n", read_size);
  249. }
  250. }
  251. else
  252. {
  253. rt_uint8_t* ptr;
  254. ptr = buffer;
  255. /* interrupt mode Rx */
  256. while (size)
  257. {
  258. rt_base_t level;
  259. struct efm32_iic_int_mode_t *int_rx;
  260. int_rx = iic->rx_buffer;
  261. /* disable interrupt */
  262. level = rt_hw_interrupt_disable();
  263. if (int_rx->read_index != int_rx->save_index)
  264. {
  265. /* read a character */
  266. *ptr++ = int_rx->data_ptr[int_rx->read_index];
  267. size--;
  268. /* move to next position */
  269. int_rx->read_index ++;
  270. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  271. {
  272. int_rx->read_index = 0;
  273. }
  274. }
  275. else
  276. {
  277. /* set error code */
  278. err_code = -RT_EEMPTY;
  279. /* enable interrupt */
  280. rt_hw_interrupt_enable(level);
  281. break;
  282. }
  283. /* enable interrupt */
  284. rt_hw_interrupt_enable(level);
  285. }
  286. read_size = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  287. iic_debug("IIC: slave read size %d\n", read_size);
  288. }
  289. /* Unlock device */
  290. rt_sem_release(iic->lock);
  291. /* set error code */
  292. rt_set_errno(err_code);
  293. return read_size;
  294. }
  295. /***************************************************************************//**
  296. * @brief
  297. * Write to IIC device
  298. *
  299. * @details
  300. *
  301. * @note
  302. *
  303. * @param[in] dev
  304. * Pointer to device descriptor
  305. *
  306. * @param[in] pos
  307. * Slave address
  308. *
  309. * @param[in] buffer
  310. * Poniter to the buffer
  311. *
  312. * @param[in] size
  313. * Buffer size in byte
  314. *
  315. * @return
  316. * Error code
  317. ******************************************************************************/
  318. static rt_size_t rt_iic_write (
  319. rt_device_t dev,
  320. rt_off_t pos,
  321. const void* buffer,
  322. rt_size_t size)
  323. {
  324. rt_err_t err_code;
  325. rt_size_t write_size;
  326. struct efm32_iic_device_t* iic;
  327. I2C_TransferSeq_TypeDef seq;
  328. I2C_TransferReturn_TypeDef ret;
  329. if (!size)
  330. {
  331. return 0;
  332. }
  333. err_code = RT_EOK;
  334. write_size = 0;
  335. iic = (struct efm32_iic_device_t*)dev->user_data;
  336. /* Lock device */
  337. if (rt_hw_interrupt_check())
  338. {
  339. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  340. }
  341. else
  342. {
  343. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  344. }
  345. if (ret != RT_EOK)
  346. {
  347. return ret;
  348. }
  349. if (iic->state & IIC_STATE_MASTER)
  350. {
  351. seq.addr = (rt_uint16_t)pos << 1;
  352. seq.flags = I2C_FLAG_WRITE;
  353. /* Set write buffer pointer and size */
  354. seq.buf[0].data = (rt_uint8_t *)buffer;
  355. seq.buf[0].len = size;
  356. }
  357. else
  358. {
  359. // TODO: Slave mode TX
  360. }
  361. /* Do a polled transfer */
  362. iic->timeout = false;
  363. rt_timer_stop(iic->timer);
  364. rt_timer_start(iic->timer);
  365. ret = I2C_TransferInit(iic->iic_device, &seq);
  366. while ((ret == i2cTransferInProgress) && !iic->timeout)
  367. {
  368. ret = I2C_Transfer(iic->iic_device);
  369. }
  370. if (ret != i2cTransferDone)
  371. {
  372. err_code = (rt_err_t)ret;
  373. }
  374. else
  375. {
  376. write_size = size;
  377. }
  378. /* Unlock device */
  379. rt_sem_release(iic->lock);
  380. /* set error code */
  381. rt_set_errno(err_code);
  382. return write_size;
  383. }
  384. /***************************************************************************//**
  385. * @brief
  386. * Configure IIC device
  387. *
  388. * @details
  389. *
  390. * @note
  391. *
  392. * @param[in] dev
  393. * Pointer to device descriptor
  394. *
  395. * @param[in] cmd
  396. * IIC control command
  397. *
  398. * @param[in] args
  399. * Arguments
  400. *
  401. * @return
  402. * Error code
  403. ******************************************************************************/
  404. static rt_err_t rt_iic_control (
  405. rt_device_t dev,
  406. rt_uint8_t cmd,
  407. void *args)
  408. {
  409. RT_ASSERT(dev != RT_NULL);
  410. rt_err_t ret;
  411. struct efm32_iic_device_t *iic;
  412. iic = (struct efm32_iic_device_t*)dev->user_data;
  413. /* Lock device */
  414. if (rt_hw_interrupt_check())
  415. {
  416. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  417. }
  418. else
  419. {
  420. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  421. }
  422. if (ret != RT_EOK)
  423. {
  424. return ret;
  425. }
  426. switch (cmd)
  427. {
  428. case RT_DEVICE_CTRL_SUSPEND:
  429. /* suspend device */
  430. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  431. I2C_Enable(iic->iic_device, false);
  432. break;
  433. case RT_DEVICE_CTRL_RESUME:
  434. /* resume device */
  435. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  436. I2C_Enable(iic->iic_device, true);
  437. break;
  438. case RT_DEVICE_CTRL_IIC_SETTING:
  439. {
  440. /* change device setting */
  441. struct efm32_iic_control_t *control;
  442. control = (struct efm32_iic_control_t *)args;
  443. iic->state = control->config & (IIC_STATE_MASTER | IIC_STATE_BROADCAST);
  444. iic->address = control->address << 1;
  445. if (!(iic->state & IIC_STATE_MASTER))
  446. {
  447. if (iic->rx_buffer == RT_NULL)
  448. {
  449. iic->rx_buffer = rt_malloc(sizeof(struct efm32_iic_int_mode_t));
  450. if (iic->rx_buffer == RT_NULL)
  451. {
  452. iic_debug("IIC err: no MEM for IIC RX structure\n");
  453. return -RT_ENOMEM;
  454. }
  455. /* Allocate RX buffer */
  456. if ((iic->rx_buffer->data_ptr = \
  457. rt_malloc(IIC_RX_BUFFER_SIZE)) == RT_NULL)
  458. {
  459. iic_debug("IIC err: no MEM for IIC RX buffer\n");
  460. rt_free(iic->rx_buffer);
  461. return -RT_ENOMEM;
  462. }
  463. rt_memset(iic->rx_buffer->data_ptr, 0, IIC_RX_BUFFER_SIZE);
  464. iic->rx_buffer->data_size = IIC_RX_BUFFER_SIZE;
  465. iic->rx_buffer->read_index = 0;
  466. iic->rx_buffer->save_index = 0;
  467. }
  468. /* Enable slave mode */
  469. I2C_SlaveAddressSet(iic->iic_device, iic->address);
  470. I2C_SlaveAddressMaskSet(iic->iic_device, 0xFF);
  471. iic->iic_device->CTRL |= I2C_CTRL_SLAVE | I2C_CTRL_AUTOACK | I2C_CTRL_AUTOSN;
  472. /* Enable interrupts */
  473. I2C_IntEnable(iic->iic_device, I2C_IEN_ADDR | I2C_IEN_RXDATAV | I2C_IEN_SSTOP);
  474. I2C_IntClear(iic->iic_device, _I2C_IFC_MASK);
  475. /* Enable I2Cn interrupt vector in NVIC */
  476. if (dev == &iic0.device)
  477. {
  478. NVIC_ClearPendingIRQ(I2C0_IRQn);
  479. NVIC_SetPriority(I2C0_IRQn, EFM32_IRQ_PRI_DEFAULT);
  480. NVIC_EnableIRQ(I2C0_IRQn);
  481. }
  482. #if (I2C_COUNT > 1)
  483. if (dev == &iic1.device)
  484. {
  485. NVIC_ClearPendingIRQ(I2C1_IRQn);
  486. NVIC_SetPriority(I2C1_IRQn, EFM32_IRQ_PRI_DEFAULT);
  487. NVIC_EnableIRQ(I2C1_IRQn);
  488. }
  489. #endif
  490. }
  491. }
  492. break;
  493. }
  494. /* Unlock device */
  495. rt_sem_release(iic->lock);
  496. return RT_EOK;
  497. }
  498. /***************************************************************************//**
  499. * @brief
  500. * IIC timeout interrupt handler
  501. *
  502. * @details
  503. *
  504. * @note
  505. *
  506. * @param[in] parameter
  507. * Parameter
  508. ******************************************************************************/
  509. static void rt_iic_timer(void *timeout)
  510. {
  511. *(rt_bool_t *)timeout = true;
  512. }
  513. /***************************************************************************//**
  514. * @brief
  515. * Register IIC device
  516. *
  517. * @details
  518. *
  519. * @note
  520. *
  521. * @param[in] device
  522. * Pointer to device descriptor
  523. *
  524. * @param[in] name
  525. * Device name
  526. *
  527. * @param[in] flag
  528. * Configuration flags
  529. *
  530. * @param[in] iic
  531. * Pointer to IIC device descriptor
  532. *
  533. * @return
  534. * Error code
  535. ******************************************************************************/
  536. rt_err_t rt_hw_iic_register(
  537. rt_device_t device,
  538. const char *name,
  539. rt_uint32_t flag,
  540. struct efm32_iic_device_t *iic)
  541. {
  542. RT_ASSERT(device != RT_NULL);
  543. if ((flag & RT_DEVICE_FLAG_DMA_TX) || (flag & RT_DEVICE_FLAG_DMA_RX) ||
  544. (flag & RT_DEVICE_FLAG_INT_TX))
  545. {
  546. RT_ASSERT(0);
  547. }
  548. device->type = RT_Device_Class_Unknown;
  549. device->rx_indicate = RT_NULL;
  550. device->tx_complete = RT_NULL;
  551. device->init = rt_iic_init;
  552. device->open = rt_iic_open;
  553. device->close = rt_iic_close;
  554. device->read = rt_iic_read;
  555. device->write = rt_iic_write;
  556. device->control = rt_iic_control;
  557. device->user_data = iic;
  558. /* register a character device */
  559. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  560. }
  561. /***************************************************************************//**
  562. * @brief
  563. * IIC slave mode RX data valid interrupt handler
  564. *
  565. * @details
  566. *
  567. * @note
  568. *
  569. * @param[in] dev
  570. * Pointer to device descriptor
  571. ******************************************************************************/
  572. static void rt_hw_iic_slave_isr(rt_device_t dev)
  573. {
  574. struct efm32_iic_device_t *iic;
  575. struct efm32_iic_int_mode_t *int_rx;
  576. rt_uint32_t status;
  577. volatile rt_uint32_t temp;
  578. /* interrupt mode receive */
  579. RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
  580. iic = (struct efm32_iic_device_t*)dev->user_data;
  581. int_rx = iic->rx_buffer;
  582. status = iic->iic_device->IF;
  583. if (status & I2C_IF_ADDR)
  584. {
  585. /* Address Match */
  586. /* Indicating that reception is started */
  587. temp = iic->iic_device->RXDATA & 0xFFUL;
  588. if ((temp != 0x00) || (iic->state & IIC_STATE_BROADCAST))
  589. {
  590. iic->state |= IIC_STATE_RX_BUSY;
  591. }
  592. }
  593. else if (status & I2C_IF_RXDATAV)
  594. {
  595. if (iic->state & IIC_STATE_RX_BUSY)
  596. {
  597. rt_base_t level;
  598. /* disable interrupt */
  599. level = rt_hw_interrupt_disable();
  600. /* save character */
  601. int_rx->data_ptr[int_rx->save_index] = \
  602. (rt_uint8_t)(iic->iic_device->RXDATA & 0xFFUL);
  603. int_rx->save_index ++;
  604. if (int_rx->save_index >= IIC_RX_BUFFER_SIZE)
  605. int_rx->save_index = 0;
  606. /* if the next position is read index, discard this 'read char' */
  607. if (int_rx->save_index == int_rx->read_index)
  608. {
  609. int_rx->read_index ++;
  610. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  611. {
  612. int_rx->read_index = 0;
  613. }
  614. }
  615. /* enable interrupt */
  616. rt_hw_interrupt_enable(level);
  617. }
  618. else
  619. {
  620. temp = iic->iic_device->RXDATA;
  621. }
  622. }
  623. if(status & I2C_IF_SSTOP)
  624. {
  625. /* Stop received, reception is ended */
  626. iic->state &= ~(rt_uint8_t)IIC_STATE_RX_BUSY;
  627. }
  628. }
  629. /***************************************************************************//**
  630. * @brief
  631. * Initialize the specified IIC unit
  632. *
  633. * @details
  634. *
  635. * @note
  636. *
  637. * @param[in] unitNumber
  638. * Unit number
  639. *
  640. * @param[in] location
  641. * Pin location number
  642. ******************************************************************************/
  643. static struct efm32_iic_device_t *rt_hw_iic_unit_init(
  644. struct efm32_iic_block *block,
  645. rt_uint8_t unitNumber,
  646. rt_uint8_t location)
  647. {
  648. struct efm32_iic_device_t *iic;
  649. CMU_Clock_TypeDef iicClock;
  650. GPIO_Port_TypeDef port_scl, port_sda;
  651. rt_uint32_t pin_scl, pin_sda;
  652. I2C_Init_TypeDef init = I2C_INIT_DEFAULT;
  653. efm32_irq_hook_init_t hook;
  654. rt_uint8_t name[RT_NAME_MAX];
  655. do
  656. {
  657. /* Allocate device */
  658. iic = rt_malloc(sizeof(struct efm32_iic_device_t));
  659. if (iic == RT_NULL)
  660. {
  661. iic_debug("IIC err: no MEM for IIC%d driver\n", unitNumber);
  662. break;
  663. }
  664. iic->counter = 0;
  665. iic->timer = &block->timer;
  666. iic->timeout = false;
  667. iic->state |= IIC_STATE_MASTER;
  668. iic->address = 0x0000;
  669. iic->rx_buffer = RT_NULL;
  670. /* Initialization */
  671. if (unitNumber >= I2C_COUNT)
  672. {
  673. break;
  674. }
  675. switch (unitNumber)
  676. {
  677. case 0:
  678. iic->iic_device = I2C0;
  679. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C0;
  680. port_scl = AF_I2C0_SCL_PORT(location);
  681. pin_scl = AF_I2C0_SCL_PIN(location);
  682. port_sda = AF_I2C0_SDA_PORT(location);
  683. pin_sda = AF_I2C0_SDA_PIN(location);
  684. break;
  685. #if (I2C_COUNT > 1)
  686. case 1:
  687. iic->iic_device = I2C1;
  688. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C1;
  689. port_scl = AF_I2C1_SCL_PORT(location);
  690. pin_scl = AF_I2C1_SCL_PIN(location);
  691. port_sda = AF_I2C1_SDA_PORT(location);
  692. pin_sda = AF_I2C1_SDA_PIN(location);
  693. break;
  694. #endif
  695. default:
  696. break;
  697. }
  698. rt_sprintf(name, "iic%d", unitNumber);
  699. /* Enabling clock */
  700. CMU_ClockEnable(iicClock, true);
  701. /* Reset */
  702. I2C_Reset(iic->iic_device);
  703. /* Config GPIO */
  704. GPIO_PinModeSet(
  705. port_scl,
  706. pin_scl,
  707. gpioModeWiredAndPullUpFilter,
  708. 1);
  709. GPIO_PinModeSet(
  710. port_sda,
  711. pin_sda,
  712. gpioModeWiredAndPullUpFilter,
  713. 1);
  714. hook.type = efm32_irq_type_iic;
  715. hook.unit = unitNumber;
  716. hook.cbFunc = rt_hw_iic_slave_isr;
  717. hook.userPtr = (void *)&block->device;
  718. efm32_irq_hook_register(&hook);
  719. /* Enable SDZ and SCL pins and set location */
  720. iic->iic_device->ROUTE = I2C_ROUTE_SDAPEN | I2C_ROUTE_SCLPEN | \
  721. (location << _I2C_ROUTE_LOCATION_SHIFT);
  722. /* Initializing IIC */
  723. init.enable = false;
  724. I2C_Init(iic->iic_device, &init);
  725. /* Abort current TX data and clear TX buffers */
  726. iic->iic_device->CMD = I2C_CMD_ABORT | I2C_CMD_CLEARPC | I2C_CMD_CLEARTX;
  727. /* Initialize lock */
  728. iic->lock = &block->lock;
  729. if (rt_sem_init(iic->lock, name, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  730. {
  731. break;
  732. }
  733. /* Initialize timer */
  734. rt_timer_init(iic->timer, name, rt_iic_timer, &iic->timeout,
  735. IIC_TIMEOUT_PERIOD, RT_TIMER_FLAG_ONE_SHOT);
  736. return iic;
  737. } while(0);
  738. if (iic)
  739. {
  740. rt_free(iic);
  741. }
  742. iic_debug("IIC err: Unit %d init failed!\n", unitNumber);
  743. return RT_NULL;
  744. }
  745. /***************************************************************************//**
  746. * @brief
  747. * Initialize all IIC module related hardware and register IIC device to kernel
  748. *
  749. * @details
  750. *
  751. * @note
  752. ******************************************************************************/
  753. void rt_hw_iic_init(void)
  754. {
  755. struct efm32_iic_device_t *iic;
  756. rt_uint32_t flag;
  757. do
  758. {
  759. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  760. /* Initialize and register iic0 */
  761. if ((iic = rt_hw_iic_unit_init(&iic0, 0, RT_USING_IIC0)) != RT_NULL)
  762. {
  763. rt_hw_iic_register(&iic0.device, RT_IIC0_NAME, flag, iic);
  764. }
  765. else
  766. {
  767. break;
  768. }
  769. #if (I2C_COUNT > 1)
  770. /* Initialize and register iic1 */
  771. if ((iic = rt_hw_iic_unit_init(&iic1, 1, RT_USING_IIC1)) != RT_NULL)
  772. {
  773. rt_hw_iic_register(&iic1.device, RT_IIC1_NAME, flag, iic);
  774. }
  775. else
  776. {
  777. break;
  778. }
  779. #endif
  780. iic_debug("IIC: H/W init OK!\n");
  781. return;
  782. } while (0);
  783. rt_kprintf("IIC: H/W init failed!\n");
  784. }
  785. #endif /* (defined(RT_USING_IIC0) || defined(RT_USING_IIC1)) */
  786. /***************************************************************************//**
  787. * @}
  788. ******************************************************************************/