drv_usart.c 47 KB

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  1. /***************************************************************************//**
  2. * @file drv_usart.c
  3. * @brief USART driver of RT-Thread RTOS for EFM32
  4. * COPYRIGHT (C) 2012, RT-Thread Development Team
  5. * @author onelife
  6. * @version 1.0
  7. *******************************************************************************
  8. * @section License
  9. * The license and distribution terms for this file may be found in the file
  10. * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  11. *******************************************************************************
  12. * @section Change Logs of serial.c
  13. * Date Author Notes
  14. * 2009-02-05 Bernard first version
  15. * 2009-10-25 Bernard fix rt_serial_read bug when there is no data in the
  16. * buffer.
  17. * 2010-03-29 Bernard cleanup code.
  18. *
  19. * @section Change Logs
  20. * Date Author Notes
  21. * 2010-12-22 onelife Initial creation for EFM32
  22. * 2011-01-17 onelife Merge with serial.c
  23. * 2011-05-06 onelife Add sync mode (SPI) support
  24. * 2011-06-14 onelife Fix a bug of TX by DMA
  25. * 2011-06-16 onelife Modify init function for EFM32 library v2.0.0
  26. * upgrading
  27. * 2011-07-07 onelife Modify write function to avoid sleep in ISR
  28. * 2011-07-26 onelife Add lock (semaphore) to prevent simultaneously
  29. * access
  30. * 2011-11-29 onelife Modify init function for EFM32 library v2.2.2
  31. * upgrading
  32. * 2011-12-09 onelife Add giant gecko support
  33. * 2011-12-09 onelife Add UART module support
  34. * 2011-12-20 onelife Add 9-bit SPI mode support
  35. * 2011-12-20 onelife Change SPI write format (same as SPI read)
  36. * 2011-12-20 onelife Change USART status format
  37. * 2011-12-27 onelife Utilize "USART_PRESENT", "USART_COUNT",
  38. * "UART_PRESENT" and "UART_COUNT"
  39. * 2012-05-16 onelife Fix a bug in rt_hw_usart_init()
  40. ******************************************************************************/
  41. /***************************************************************************//**
  42. * @addtogroup efm32
  43. * @{
  44. ******************************************************************************/
  45. /* Includes ------------------------------------------------------------------*/
  46. #include "board.h"
  47. #include "hdl_interrupt.h"
  48. #include "drv_usart.h"
  49. #if (defined(RT_USING_USART0) || defined(RT_USING_USART1) || \
  50. defined(RT_USING_USART2) || defined(RT_USING_UART0) || \
  51. defined(RT_USING_UART1))
  52. #if ((defined(RT_USING_USART0) || defined(RT_USING_USART1) || \
  53. defined(RT_USING_USART2)) && !defined(USART_PRESENT))
  54. #error "USART module is not available"
  55. #endif
  56. #if ((defined(RT_USING_UART0) || defined(RT_USING_UART1)) && \
  57. !defined(UART_PRESENT))
  58. #error "UART module is not available"
  59. #endif
  60. /* Private typedef -----------------------------------------------------------*/
  61. /* Private define ------------------------------------------------------------*/
  62. /* Private macro -------------------------------------------------------------*/
  63. #ifdef RT_USART_DEBUG
  64. #define usart_debug(format,args...) rt_kprintf(format, ##args)
  65. #else
  66. #define usart_debug(format,args...)
  67. #endif
  68. /* Private variables ---------------------------------------------------------*/
  69. #ifdef RT_USING_USART0
  70. #if (RT_USING_USART0 >= EFM32_USART_LOCATION_COUNT)
  71. #error "Wrong location number"
  72. #endif
  73. struct rt_device usart0_device;
  74. static struct rt_semaphore usart0_lock;
  75. #endif
  76. #ifdef RT_USING_USART1
  77. #if (USART_COUNT <= 1)
  78. #error "Wrong unit number"
  79. #endif
  80. #if (RT_USING_USART1 >= EFM32_USART_LOCATION_COUNT)
  81. #error "Wrong location number"
  82. #endif
  83. struct rt_device usart1_device;
  84. static struct rt_semaphore usart1_lock;
  85. #endif
  86. #ifdef RT_USING_USART2
  87. #if (USART_COUNT <= 2)
  88. #error "Wrong unit number"
  89. #endif
  90. #if (RT_USING_USART2 >= EFM32_USART_LOCATION_COUNT)
  91. #error "Wrong location number"
  92. #endif
  93. struct rt_device usart2_device;
  94. static struct rt_semaphore usart2_lock;
  95. #endif
  96. #ifdef RT_USING_UART0
  97. #if (RT_USING_UART0 >= EFM32_UART_LOCATION_COUNT)
  98. #error "Wrong location number"
  99. #endif
  100. struct rt_device uart0_device;
  101. static struct rt_semaphore uart0_lock;
  102. #endif
  103. #ifdef RT_USING_UART1
  104. #if (UART_COUNT <= 1)
  105. #error "Wrong unit number"
  106. #endif
  107. #if (RT_USING_UART1 >= EFM32_UART_LOCATION_COUNT)
  108. #error "Wrong location number"
  109. #endif
  110. struct rt_device uart1_device;
  111. static struct rt_semaphore uart1_lock;
  112. #endif
  113. /* Private function prototypes -----------------------------------------------*/
  114. /* Private functions ---------------------------------------------------------*/
  115. /***************************************************************************//**
  116. * @brief
  117. * Initialize USART device
  118. *
  119. * @details
  120. *
  121. * @note
  122. *
  123. * @param[in] dev
  124. * Pointer to device descriptor
  125. *
  126. * @return
  127. * Error code
  128. ******************************************************************************/
  129. static rt_err_t rt_usart_init (rt_device_t dev)
  130. {
  131. struct efm32_usart_device_t *usart;
  132. usart = (struct efm32_usart_device_t *)(dev->user_data);
  133. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  134. {
  135. if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  136. {
  137. struct efm32_usart_dma_mode_t *dma_tx;
  138. dma_tx = (struct efm32_usart_dma_mode_t *)(usart->tx_mode);
  139. usart->state |= USART_STATE_RX_BUSY;
  140. }
  141. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  142. {
  143. struct efm32_usart_int_mode_t *int_rx;
  144. int_rx = (struct efm32_usart_int_mode_t *)(usart->rx_mode);
  145. int_rx->data_ptr = RT_NULL;
  146. }
  147. /* Enable USART */
  148. USART_Enable(usart->usart_device, usartEnable);
  149. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  150. }
  151. return RT_EOK;
  152. }
  153. /***************************************************************************//**
  154. * @brief
  155. * Open USART device
  156. *
  157. * @details
  158. *
  159. * @note
  160. *
  161. * @param[in] dev
  162. * Pointer to device descriptor
  163. *
  164. * @param[in] oflag
  165. * Device open flag
  166. *
  167. * @return
  168. * Error code
  169. ******************************************************************************/
  170. static rt_err_t rt_usart_open(rt_device_t dev, rt_uint16_t oflag)
  171. {
  172. RT_ASSERT(dev != RT_NULL);
  173. struct efm32_usart_device_t *usart;
  174. usart = (struct efm32_usart_device_t *)(dev->user_data);
  175. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  176. {
  177. IRQn_Type rxIrq;
  178. //if (usart->state & USART_STATE_CONSOLE)
  179. { /* Allocate new RX buffer */
  180. struct efm32_usart_int_mode_t *int_mode;
  181. int_mode = (struct efm32_usart_int_mode_t *)(usart->rx_mode);
  182. if ((int_mode->data_ptr = rt_malloc(USART_RX_BUFFER_SIZE)) == RT_NULL)
  183. {
  184. usart_debug("USART%d err: no mem for RX BUF\n", usart->unit);
  185. return -RT_ENOMEM;
  186. }
  187. rt_memset(int_mode->data_ptr, 0, USART_RX_BUFFER_SIZE);
  188. int_mode->data_size = USART_RX_BUFFER_SIZE;
  189. int_mode->read_index = 0;
  190. int_mode->save_index = 0;
  191. }
  192. /* Enable RX interrupt */
  193. #if defined(UART_PRESENT)
  194. if (usart->state & USART_STATE_ASYNC_ONLY)
  195. {
  196. usart->usart_device->IEN = UART_IEN_RXDATAV;
  197. }
  198. else
  199. #endif
  200. {
  201. usart->usart_device->IEN = USART_IEN_RXDATAV;
  202. }
  203. /* Enable IRQ */
  204. switch (usart->unit)
  205. {
  206. case 0:
  207. #if defined(UART_PRESENT)
  208. if (usart->state & USART_STATE_ASYNC_ONLY)
  209. {
  210. rxIrq = UART0_RX_IRQn;
  211. }
  212. else
  213. #endif
  214. {
  215. rxIrq = USART0_RX_IRQn;
  216. }
  217. break;
  218. #if ((defined(USART_PRESENT) && (USART_COUNT > 1)) || \
  219. (defined(UART_PRESENT) && (UART_COUNT > 1)))
  220. case 1:
  221. #if (defined(UART_PRESENT) && (UART_COUNT > 1))
  222. if (usart->state & USART_STATE_ASYNC_ONLY)
  223. {
  224. rxIrq = UART1_RX_IRQn;
  225. }
  226. else
  227. #endif
  228. {
  229. rxIrq = USART1_RX_IRQn;
  230. }
  231. break;
  232. #endif
  233. #if ((defined(USART_PRESENT) && (USART_COUNT > 2)) || \
  234. (defined(UART_PRESENT) && (UART_COUNT > 2)))
  235. case 2:
  236. #if (defined(UART_PRESENT) && (UART_COUNT > 2))
  237. if (usart->state & USART_STATE_ASYNC_ONLY)
  238. {
  239. rxIrq = UART2_RX_IRQn;
  240. }
  241. else
  242. #endif
  243. {
  244. rxIrq = USART2_RX_IRQn;
  245. }
  246. break;
  247. #endif
  248. }
  249. if (oflag != RT_DEVICE_OFLAG_WRONLY)
  250. {
  251. NVIC_ClearPendingIRQ(rxIrq);
  252. NVIC_SetPriority(rxIrq, EFM32_IRQ_PRI_DEFAULT);
  253. NVIC_EnableIRQ(rxIrq);
  254. }
  255. }
  256. /* Clear Flag */
  257. #if defined(UART_PRESENT)
  258. if (usart->state & USART_STATE_ASYNC_ONLY)
  259. {
  260. usart->usart_device->IFC = _UART_IFC_MASK;
  261. }
  262. else
  263. #endif
  264. {
  265. usart->usart_device->IFC = _USART_IFC_MASK;
  266. }
  267. if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (oflag != RT_DEVICE_OFLAG_RDONLY))
  268. {
  269. /* DMA IRQ is enabled by DMA_Init() */
  270. NVIC_SetPriority(DMA_IRQn, EFM32_IRQ_PRI_DEFAULT);
  271. }
  272. usart->counter++;
  273. usart_debug("USART%d: Open with flag %x\n", usart->unit, oflag);
  274. return RT_EOK;
  275. }
  276. /***************************************************************************//**
  277. * @brief
  278. * Close USART device
  279. *
  280. * @details
  281. *
  282. * @note
  283. *
  284. * @param[in] dev
  285. * Pointer to device descriptor
  286. *
  287. * @return
  288. * Error code
  289. ******************************************************************************/
  290. static rt_err_t rt_usart_close(rt_device_t dev)
  291. {
  292. RT_ASSERT(dev != RT_NULL);
  293. struct efm32_usart_device_t *usart;
  294. usart = (struct efm32_usart_device_t *)(dev->user_data);
  295. if (--usart->counter == 0)
  296. {
  297. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  298. {
  299. struct efm32_usart_int_mode_t *int_rx;
  300. int_rx = (struct efm32_usart_int_mode_t *)usart->rx_mode;
  301. rt_free(int_rx->data_ptr);
  302. int_rx->data_ptr = RT_NULL;
  303. }
  304. }
  305. return RT_EOK;
  306. }
  307. /***************************************************************************//**
  308. * @brief
  309. * Read from USART device
  310. *
  311. * @details
  312. *
  313. * @note
  314. * 9-bit SPI mode and SPI slave mode is untested
  315. *
  316. * @param[in] dev
  317. * Pointer to device descriptor
  318. *
  319. * @param[in] pos
  320. * Offset
  321. *
  322. * @param[in] buffer
  323. * Poniter to the buffer
  324. *
  325. * @param[in] size
  326. * Buffer size in byte
  327. *
  328. * @return
  329. * Number of read bytes
  330. ******************************************************************************/
  331. static rt_size_t rt_usart_read (
  332. rt_device_t dev,
  333. rt_off_t pos,
  334. void *buffer,
  335. rt_size_t size)
  336. {
  337. rt_err_t err_code;
  338. struct efm32_usart_device_t *usart;
  339. rt_size_t read_len, len;
  340. rt_uint8_t *ptr;
  341. rt_uint32_t rx_flag, tx_flag, b8_flag;
  342. usart = (struct efm32_usart_device_t *)(dev->user_data);
  343. #if defined(UART_PRESENT)
  344. if (usart->state & USART_STATE_ASYNC_ONLY)
  345. {
  346. rx_flag = UART_STATUS_RXDATAV;
  347. tx_flag = UART_STATUS_TXBL;
  348. b8_flag = UART_CTRL_BIT8DV;
  349. }
  350. else
  351. #endif
  352. {
  353. rx_flag = USART_STATUS_RXDATAV;
  354. tx_flag = USART_STATUS_TXBL;
  355. b8_flag = USART_CTRL_BIT8DV;
  356. }
  357. /* Lock device */
  358. if (rt_hw_interrupt_check())
  359. {
  360. err_code = rt_sem_take(usart->lock, RT_WAITING_NO);
  361. }
  362. else
  363. {
  364. err_code = rt_sem_take(usart->lock, RT_WAITING_FOREVER);
  365. }
  366. if (err_code != RT_EOK)
  367. {
  368. rt_set_errno(err_code);
  369. return 0;
  370. }
  371. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  372. {
  373. len = size;
  374. ptr = buffer;
  375. /* interrupt mode Rx */
  376. while (len)
  377. {
  378. rt_base_t level;
  379. struct efm32_usart_int_mode_t *int_rx;
  380. int_rx = (struct efm32_usart_int_mode_t *)\
  381. (((struct efm32_usart_device_t *)(dev->user_data))->rx_mode);
  382. /* disable interrupt */
  383. level = rt_hw_interrupt_disable();
  384. if (int_rx->read_index != int_rx->save_index)
  385. {
  386. /* read a character */
  387. *ptr++ = int_rx->data_ptr[int_rx->read_index];
  388. len--;
  389. /* move to next position */
  390. int_rx->read_index ++;
  391. if (int_rx->read_index >= USART_RX_BUFFER_SIZE)
  392. {
  393. int_rx->read_index = 0;
  394. }
  395. }
  396. else
  397. {
  398. /* set error code */
  399. err_code = -RT_EEMPTY;
  400. /* enable interrupt */
  401. rt_hw_interrupt_enable(level);
  402. break;
  403. }
  404. /* enable interrupt */
  405. rt_hw_interrupt_enable(level);
  406. }
  407. read_len = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  408. }
  409. else
  410. {
  411. if (usart->state & USART_STATE_SYNC)
  412. {
  413. /* SPI read */
  414. rt_uint8_t inst_len = *((rt_uint8_t *)buffer);
  415. rt_uint8_t *inst_ptr = (rt_uint8_t *)(buffer + 1);
  416. rt_uint8_t *rx_buf = *((rt_uint8_t **)(buffer + inst_len + 1));
  417. rt_off_t i;
  418. ptr = inst_ptr;
  419. len = inst_len;
  420. /* Write instructions */
  421. if (len)
  422. {
  423. if (usart->state & USART_STATE_9BIT)
  424. {
  425. usart->usart_device->CTRL &= ~b8_flag;
  426. }
  427. while (len)
  428. {
  429. while (!(usart->usart_device->STATUS & tx_flag));
  430. usart->usart_device->TXDATA = (rt_uint32_t)*(ptr++);
  431. len--;
  432. }
  433. if (usart->state & USART_STATE_9BIT)
  434. {
  435. usart->usart_device->CTRL |= b8_flag;
  436. }
  437. }
  438. /* Flushing RX */
  439. usart->usart_device->CMD = USART_CMD_CLEARRX;
  440. /* Skip some bytes if necessary */
  441. for (i = 0; i < pos; i++)
  442. {
  443. /* dummy write */
  444. while (!(usart->usart_device->STATUS & tx_flag));
  445. usart->usart_device->TXDATA = (rt_uint32_t)0xff;
  446. /* dummy read */
  447. while (!(usart->usart_device->STATUS & rx_flag));
  448. *((rt_uint32_t *)0x00) = usart->usart_device->RXDATA;
  449. }
  450. ptr = rx_buf;
  451. len = size;
  452. /* Read data */
  453. while (len)
  454. {
  455. /* dummy write */
  456. while (!(usart->usart_device->STATUS & tx_flag));
  457. usart->usart_device->TXDATA = (rt_uint32_t)0xff;
  458. /* read a byte of data */
  459. while (!(usart->usart_device->STATUS & rx_flag));
  460. *(ptr++) = usart->usart_device->RXDATA & 0xff;
  461. len--;
  462. }
  463. }
  464. else
  465. {
  466. ptr = buffer;
  467. len = size;
  468. /* polling mode */
  469. while (len)
  470. {
  471. while (usart->usart_device->STATUS & rx_flag)
  472. {
  473. *(ptr++) = usart->usart_device->RXDATA & 0xff;
  474. }
  475. len--;
  476. }
  477. }
  478. read_len = size - len;
  479. }
  480. /* Unlock device */
  481. rt_sem_release(usart->lock);
  482. /* set error code */
  483. rt_set_errno(err_code);
  484. return read_len;
  485. }
  486. /***************************************************************************//**
  487. * @brief
  488. * Write to USART device
  489. *
  490. * @details
  491. *
  492. * @note
  493. *
  494. * @param[in] dev
  495. * Pointer to device descriptor
  496. *
  497. * @param[in] pos
  498. * Offset
  499. *
  500. * @param[in] buffer
  501. * Poniter to the buffer
  502. *
  503. * @param[in] size
  504. * Buffer size in byte
  505. *
  506. * @return
  507. * Number of written bytes
  508. ******************************************************************************/
  509. static rt_size_t rt_usart_write (
  510. rt_device_t dev,
  511. rt_off_t pos,
  512. const void* buffer,
  513. rt_size_t size)
  514. {
  515. rt_err_t err_code;
  516. struct efm32_usart_device_t* usart = (struct efm32_usart_device_t*)(dev->user_data);
  517. rt_size_t read_len, len;
  518. rt_uint8_t *ptr;
  519. rt_size_t write_size = 0;
  520. rt_uint32_t tx_flag, b8_flag;
  521. #if defined(UART_PRESENT)
  522. if (usart->state & USART_STATE_ASYNC_ONLY)
  523. {
  524. tx_flag = UART_STATUS_TXBL;
  525. b8_flag = UART_CTRL_BIT8DV;
  526. }
  527. else
  528. #endif
  529. {
  530. tx_flag = USART_STATUS_TXBL;
  531. b8_flag = USART_CTRL_BIT8DV;
  532. }
  533. /* Lock device */
  534. if (rt_hw_interrupt_check())
  535. {
  536. err_code = rt_sem_take(usart->lock, RT_WAITING_NO);
  537. }
  538. else
  539. {
  540. err_code = rt_sem_take(usart->lock, RT_WAITING_FOREVER);
  541. }
  542. if (err_code != RT_EOK)
  543. {
  544. rt_set_errno(err_code);
  545. return 0;
  546. }
  547. if (usart->state & USART_STATE_SYNC)
  548. { /* SPI write */
  549. rt_uint8_t inst_len = *((rt_uint8_t *)buffer);
  550. rt_uint8_t *inst_ptr = (rt_uint8_t *)(buffer + 1);
  551. rt_uint8_t *tx_buf = *((rt_uint8_t **)(buffer + inst_len + 1));
  552. ptr = inst_ptr;
  553. len = inst_len;
  554. /* Write instructions */
  555. if (len)
  556. {
  557. if (usart->state & USART_STATE_9BIT)
  558. {
  559. usart->usart_device->CTRL &= ~b8_flag;
  560. }
  561. if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (len > 2))
  562. { /* DMA mode Tx */
  563. struct efm32_usart_dma_mode_t *dma_tx;
  564. usart_debug("USART: DMA TX INS (%d)\n", len);
  565. dma_tx = (struct efm32_usart_dma_mode_t *)(usart->tx_mode);
  566. dma_tx->data_ptr = (rt_uint32_t *)ptr;
  567. dma_tx->data_size = len;
  568. usart->state |= USART_STATE_TX_BUSY;
  569. DMA_ActivateBasic(
  570. dma_tx->dma_channel,
  571. true,
  572. false,
  573. (void *)&(usart->usart_device->TXDATA),
  574. (void *)ptr,
  575. (rt_uint32_t)(len - 1));
  576. /* Wait, otherwise the TX buffer is overwrite */
  577. // TODO: This function blocks the process => goto low power mode?
  578. // if (usart->state & USART_STATE_CONSOLE)
  579. // {
  580. while(usart->state & USART_STATE_TX_BUSY);
  581. // }
  582. // else
  583. // {
  584. // while(usart->state & USART_STATE_TX_BUSY)
  585. // {
  586. // rt_thread_sleep(USART_WAIT_TIME_TX);
  587. // }
  588. // }
  589. }
  590. else
  591. { /* polling mode */
  592. usart_debug("USART: Polling TX INS (%d)\n", len);
  593. while (len)
  594. {
  595. while (!(usart->usart_device->STATUS & tx_flag));
  596. usart->usart_device->TXDATA = (rt_uint32_t)*(ptr++);
  597. len--;
  598. }
  599. }
  600. if (usart->state & USART_STATE_9BIT)
  601. {
  602. usart->usart_device->CTRL |= b8_flag;
  603. }
  604. }
  605. ptr = tx_buf;
  606. }
  607. else
  608. {
  609. ptr = (rt_uint8_t *)buffer;
  610. }
  611. len = size;
  612. /* Write data */
  613. if (dev->flag & RT_DEVICE_FLAG_STREAM)
  614. {
  615. if (*(ptr + len - 1) == '\n')
  616. {
  617. *(ptr + len - 1) = '\r';
  618. *(ptr + len++) = '\n';
  619. *(ptr + len) = 0;
  620. }
  621. }
  622. if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (len > 2))
  623. { /* DMA mode Tx */
  624. struct efm32_usart_dma_mode_t *dma_tx;
  625. usart_debug("USART: DMA TX data (%d)\n", len);
  626. dma_tx = (struct efm32_usart_dma_mode_t *)(usart->tx_mode);
  627. dma_tx->data_ptr = (rt_uint32_t *)ptr;
  628. dma_tx->data_size = len;
  629. usart->state |= USART_STATE_TX_BUSY;
  630. DMA_ActivateBasic(
  631. dma_tx->dma_channel,
  632. true,
  633. false,
  634. (void *)&(usart->usart_device->TXDATA),
  635. (void *)ptr,
  636. (rt_uint32_t)(len - 1));
  637. /* Wait, otherwise the TX buffer is overwrite */
  638. // TODO: This function blocks the process => goto low power mode?
  639. // if (usart->state & USART_STATE_CONSOLE)
  640. // {
  641. while(usart->state & USART_STATE_TX_BUSY);
  642. // }
  643. // else
  644. // {
  645. // while(usart->state & USART_STATE_TX_BUSY)
  646. // {
  647. // rt_thread_sleep(USART_WAIT_TIME_TX);
  648. // }
  649. // }
  650. write_size = size;
  651. }
  652. else
  653. { /* polling mode */
  654. usart_debug("USART: Polling TX data (%d)\n", len);
  655. while (len)
  656. {
  657. while (!(usart->usart_device->STATUS & tx_flag));
  658. usart->usart_device->TXDATA = (rt_uint32_t)*(ptr++);
  659. len--;
  660. }
  661. write_size = size - len;
  662. }
  663. /* Unlock device */
  664. rt_sem_release(usart->lock);
  665. /* set error code */
  666. rt_set_errno(err_code);
  667. return write_size;
  668. }
  669. /***************************************************************************//**
  670. * @brief
  671. * Configure USART device
  672. *
  673. * @details
  674. *
  675. * @note
  676. *
  677. * @param[in] dev
  678. * Pointer to device descriptor
  679. *
  680. * @param[in] cmd
  681. * IIC control command
  682. *
  683. * @param[in] args
  684. * Arguments
  685. *
  686. * @return
  687. * Error code
  688. ******************************************************************************/
  689. static rt_err_t rt_usart_control (
  690. rt_device_t dev,
  691. rt_uint8_t cmd,
  692. void *args)
  693. {
  694. RT_ASSERT(dev != RT_NULL);
  695. rt_err_t err_code;
  696. struct efm32_usart_device_t *usart;
  697. usart = (struct efm32_usart_device_t *)(dev->user_data);
  698. /* Lock device */
  699. if (rt_hw_interrupt_check())
  700. {
  701. err_code = rt_sem_take(usart->lock, RT_WAITING_NO);
  702. }
  703. else
  704. {
  705. err_code = rt_sem_take(usart->lock, RT_WAITING_FOREVER);
  706. }
  707. if (err_code != RT_EOK)
  708. {
  709. return err_code;
  710. }
  711. switch (cmd)
  712. {
  713. case RT_DEVICE_CTRL_SUSPEND:
  714. /* Suspend device */
  715. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  716. USART_Enable(usart->usart_device, usartDisable);
  717. break;
  718. case RT_DEVICE_CTRL_RESUME:
  719. /* Resume device */
  720. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  721. USART_Enable(usart->usart_device, usartEnable);
  722. break;
  723. case RT_DEVICE_CTRL_USART_RBUFFER:
  724. /* Set RX buffer */
  725. {
  726. struct efm32_usart_int_mode_t *int_rx;
  727. rt_uint8_t size;
  728. int_rx = (struct efm32_usart_int_mode_t *)(usart->rx_mode);
  729. size = (rt_uint8_t)((rt_uint32_t)args & 0xFFUL);
  730. /* Free previous RX buffer */
  731. if (int_rx->data_ptr != RT_NULL)
  732. {
  733. if (size == 0)
  734. { /* Free RX buffer */
  735. rt_free(int_rx->data_ptr);
  736. int_rx->data_ptr = RT_NULL;
  737. }
  738. else if (size != int_rx->data_size)
  739. {
  740. /* Re-allocate RX buffer */
  741. if ((int_rx->data_ptr = rt_realloc(int_rx->data_ptr, size)) \
  742. == RT_NULL)
  743. {
  744. usart_debug("USART%d err: no mem for RX BUF\n", usart->unit);
  745. err_code = -RT_ENOMEM;
  746. break;
  747. }
  748. // TODO: Is the following line necessary?
  749. //rt_memset(int_rx->data_ptr, 0, size);
  750. }
  751. }
  752. else
  753. {
  754. /* Allocate new RX buffer */
  755. if ((int_rx->data_ptr = rt_malloc(size)) == RT_NULL)
  756. {
  757. usart_debug("USART%d err: no mem for RX BUF\n", usart->unit);
  758. err_code = -RT_ENOMEM;
  759. break;
  760. }
  761. }
  762. int_rx->data_size = size;
  763. int_rx->read_index = 0;
  764. int_rx->save_index = 0;
  765. }
  766. break;
  767. }
  768. /* Unlock device */
  769. rt_sem_release(usart->lock);
  770. return err_code;
  771. }
  772. /***************************************************************************//**
  773. * @brief
  774. * USART RX data valid interrupt handler
  775. *
  776. * @details
  777. *
  778. * @note
  779. * 9-bit SPI mode has not implemented yet and SPI slave mode is untested
  780. *
  781. * @param[in] dev
  782. * Pointer to device descriptor
  783. ******************************************************************************/
  784. void rt_hw_usart_rx_isr(rt_device_t dev)
  785. {
  786. struct efm32_usart_device_t *usart;
  787. struct efm32_usart_int_mode_t *int_rx;
  788. rt_uint32_t flag;
  789. /* interrupt mode receive */
  790. RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
  791. usart = (struct efm32_usart_device_t *)(dev->user_data);
  792. int_rx = (struct efm32_usart_int_mode_t *)(usart->rx_mode);
  793. RT_ASSERT(int_rx->data_ptr != RT_NULL);
  794. #if defined(UART_PRESENT)
  795. if (usart->state & USART_STATE_ASYNC_ONLY)
  796. {
  797. flag = UART_STATUS_RXDATAV;
  798. }
  799. else
  800. #endif
  801. {
  802. flag = USART_STATUS_RXDATAV;
  803. }
  804. /* Set status */
  805. usart->state |= USART_STATE_RX_BUSY;
  806. /* save into rx buffer */
  807. while (usart->usart_device->STATUS & flag)
  808. {
  809. rt_base_t level;
  810. /* disable interrupt */
  811. level = rt_hw_interrupt_disable();
  812. /* save character */
  813. int_rx->data_ptr[int_rx->save_index] = \
  814. (rt_uint8_t)(usart->usart_device->RXDATA & 0xFFUL);
  815. int_rx->save_index ++;
  816. if (int_rx->save_index >= USART_RX_BUFFER_SIZE)
  817. int_rx->save_index = 0;
  818. /* if the next position is read index, discard this 'read char' */
  819. if (int_rx->save_index == int_rx->read_index)
  820. {
  821. int_rx->read_index ++;
  822. if (int_rx->read_index >= USART_RX_BUFFER_SIZE)
  823. {
  824. int_rx->read_index = 0;
  825. }
  826. }
  827. /* enable interrupt */
  828. rt_hw_interrupt_enable(level);
  829. }
  830. /* invoke callback */
  831. if (dev->rx_indicate != RT_NULL)
  832. {
  833. rt_size_t rx_length;
  834. /* get rx length */
  835. rx_length = int_rx->read_index > int_rx->save_index ?
  836. USART_RX_BUFFER_SIZE - int_rx->read_index + int_rx->save_index : \
  837. int_rx->save_index - int_rx->read_index;
  838. dev->rx_indicate(dev, rx_length);
  839. }
  840. }
  841. /***************************************************************************//**
  842. * @brief
  843. * DMA for USART TX interrupt handler
  844. *
  845. * @details
  846. *
  847. * @note
  848. *
  849. * @param[in] dev
  850. * Pointer to device descriptor
  851. ******************************************************************************/
  852. void rt_hw_usart_dma_tx_isr(rt_device_t dev)
  853. {
  854. /* DMA mode receive */
  855. struct efm32_usart_device_t *usart;
  856. struct efm32_usart_dma_mode_t *dma_tx;
  857. RT_ASSERT(dev->flag & RT_DEVICE_FLAG_DMA_TX);
  858. usart = (struct efm32_usart_device_t *)(dev->user_data);
  859. dma_tx = (struct efm32_usart_dma_mode_t *)(usart->tx_mode);
  860. /* invoke call to notify tx complete */
  861. if (dev->tx_complete != RT_NULL)
  862. {
  863. dev->tx_complete(dev, dma_tx->data_ptr);
  864. }
  865. /* Set status */
  866. usart->state &= ~(rt_uint32_t)USART_STATE_TX_BUSY;
  867. }
  868. /***************************************************************************//**
  869. * @brief
  870. * Register USART device
  871. *
  872. * @details
  873. *
  874. * @note
  875. *
  876. * @param[in] device
  877. * Pointer to device descriptor
  878. *
  879. * @param[in] name
  880. * Device name
  881. *
  882. * @param[in] flag
  883. * Configuration flags
  884. *
  885. * @param[in] usart
  886. * Pointer to USART device descriptor
  887. *
  888. * @return
  889. * Error code
  890. ******************************************************************************/
  891. rt_err_t rt_hw_usart_register(
  892. rt_device_t device,
  893. const char *name,
  894. rt_uint32_t flag,
  895. struct efm32_usart_device_t *usart)
  896. {
  897. RT_ASSERT(device != RT_NULL);
  898. if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
  899. (flag & RT_DEVICE_FLAG_INT_TX))
  900. {
  901. RT_ASSERT(0);
  902. }
  903. if (usart->state & USART_STATE_SYNC)
  904. {
  905. device->type = RT_Device_Class_SPIBUS;
  906. }
  907. else
  908. {
  909. device->type = RT_Device_Class_Char;
  910. }
  911. device->rx_indicate = RT_NULL;
  912. device->tx_complete = RT_NULL;
  913. device->init = rt_usart_init;
  914. device->open = rt_usart_open;
  915. device->close = rt_usart_close;
  916. device->read = rt_usart_read;
  917. device->write = rt_usart_write;
  918. device->control = rt_usart_control;
  919. device->user_data = usart;
  920. /* register a character device */
  921. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  922. }
  923. /***************************************************************************//**
  924. * @brief
  925. * Initialize the specified USART unit
  926. *
  927. * @details
  928. *
  929. * @note
  930. *
  931. * @param[in] device
  932. * Pointer to device descriptor
  933. *
  934. * @param[in] unitNumber
  935. * Unit number
  936. *
  937. * @param[in] location
  938. * Pin location number
  939. *
  940. * @param[in] flag
  941. * Configuration flag
  942. *
  943. * @param[in] dmaChannel
  944. * DMA channel number for TX
  945. *
  946. * @param[in] console
  947. * Indicate if using as console
  948. *
  949. * @return
  950. * Pointer to USART device
  951. ******************************************************************************/
  952. static struct efm32_usart_device_t *rt_hw_usart_unit_init(
  953. rt_device_t device,
  954. rt_uint8_t unitNumber,
  955. rt_uint8_t location,
  956. rt_uint32_t flag,
  957. rt_uint32_t dmaChannel,
  958. rt_uint8_t config)
  959. {
  960. struct efm32_usart_device_t *usart;
  961. struct efm32_usart_dma_mode_t *dma_mode;
  962. DMA_CB_TypeDef *callback;
  963. CMU_Clock_TypeDef usartClock;
  964. rt_uint32_t txDmaSelect;
  965. GPIO_Port_TypeDef port_tx, port_rx, port_clk, port_cs;
  966. rt_uint32_t pin_tx, pin_rx, pin_clk, pin_cs;
  967. efm32_irq_hook_init_t hook;
  968. do
  969. {
  970. /* Allocate device */
  971. usart = rt_malloc(sizeof(struct efm32_usart_device_t));
  972. if (usart == RT_NULL)
  973. {
  974. usart_debug("USART%d err: no mem\n", usart->unit);
  975. break;
  976. }
  977. usart->counter = 0;
  978. usart->unit = unitNumber;
  979. usart->state = config;
  980. usart->tx_mode = RT_NULL;
  981. usart->rx_mode = RT_NULL;
  982. /* Allocate TX */
  983. dma_mode = RT_NULL;
  984. if (flag & RT_DEVICE_FLAG_DMA_TX)
  985. {
  986. usart->tx_mode = dma_mode = rt_malloc(sizeof(struct efm32_usart_dma_mode_t));
  987. if (dma_mode == RT_NULL)
  988. {
  989. usart_debug("USART%d err: no mem for DMA TX\n", usart->unit);
  990. break;
  991. }
  992. dma_mode->dma_channel = dmaChannel;
  993. }
  994. /* Allocate RX */
  995. if (flag & RT_DEVICE_FLAG_INT_RX)
  996. {
  997. usart->rx_mode = rt_malloc(sizeof(struct efm32_usart_int_mode_t));
  998. if (usart->rx_mode == RT_NULL)
  999. {
  1000. usart_debug("USART%d err: no mem for INT RX\n", usart->unit);
  1001. break;
  1002. }
  1003. }
  1004. /* Initialization */
  1005. #if defined(UART_PRESENT)
  1006. if ((!(config & USART_STATE_ASYNC_ONLY) && (unitNumber >= USART_COUNT)) || \
  1007. ((config & USART_STATE_ASYNC_ONLY) && (unitNumber >= UART_COUNT)))
  1008. #else
  1009. if (unitNumber >= USART_COUNT)
  1010. #endif
  1011. {
  1012. break;
  1013. }
  1014. switch (unitNumber)
  1015. {
  1016. case 0:
  1017. #if defined(UART_PRESENT)
  1018. if (config & USART_STATE_ASYNC_ONLY)
  1019. {
  1020. usart->usart_device = UART0;
  1021. usartClock = (CMU_Clock_TypeDef)cmuClock_UART0;
  1022. txDmaSelect = DMAREQ_UART0_TXBL;
  1023. port_tx = AF_UART0_TX_PORT(location);
  1024. pin_tx = AF_UART0_TX_PIN(location);
  1025. port_rx = AF_UART0_RX_PORT(location);
  1026. pin_rx = AF_UART0_RX_PIN(location);
  1027. }
  1028. else
  1029. #endif
  1030. {
  1031. usart->usart_device = USART0;
  1032. usartClock = (CMU_Clock_TypeDef)cmuClock_USART0;
  1033. txDmaSelect = DMAREQ_USART0_TXBL;
  1034. port_tx = AF_USART0_TX_PORT(location);
  1035. pin_tx = AF_USART0_TX_PIN(location);
  1036. port_rx = AF_USART0_RX_PORT(location);
  1037. pin_rx = AF_USART0_RX_PIN(location);
  1038. port_clk = AF_USART0_CLK_PORT(location);
  1039. pin_clk = AF_USART0_CLK_PIN(location);
  1040. port_cs = AF_USART0_CS_PORT(location);
  1041. pin_cs = AF_USART0_CS_PIN(location);
  1042. }
  1043. break;
  1044. #if ((defined(USART_PRESENT) && (USART_COUNT > 1)) || \
  1045. (defined(UART_PRESENT) && (UART_COUNT > 1)))
  1046. case 1:
  1047. #if (defined(UART_PRESENT) && (UART_COUNT > 1))
  1048. if (config & USART_STATE_ASYNC_ONLY)
  1049. {
  1050. usart->usart_device = UART1;
  1051. usartClock = (CMU_Clock_TypeDef)cmuClock_UART1;
  1052. txDmaSelect = DMAREQ_UART1_TXBL;
  1053. port_tx = AF_UART1_TX_PORT(location);
  1054. pin_tx = AF_UART1_TX_PIN(location);
  1055. port_rx = AF_UART1_RX_PORT(location);
  1056. pin_rx = AF_UART1_RX_PIN(location);
  1057. }
  1058. else
  1059. #endif
  1060. {
  1061. usart->usart_device = USART1;
  1062. usartClock = (CMU_Clock_TypeDef)cmuClock_USART1;
  1063. txDmaSelect = DMAREQ_USART1_TXBL;
  1064. port_tx = AF_USART1_TX_PORT(location);
  1065. pin_tx = AF_USART1_TX_PIN(location);
  1066. port_rx = AF_USART1_RX_PORT(location);
  1067. pin_rx = AF_USART1_RX_PIN(location);
  1068. port_clk = AF_USART1_CLK_PORT(location);
  1069. pin_clk = AF_USART1_CLK_PIN(location);
  1070. port_cs = AF_USART1_CS_PORT(location);
  1071. pin_cs = AF_USART1_CS_PIN(location);
  1072. }
  1073. break;
  1074. #endif
  1075. #if ((defined(USART_PRESENT) && (USART_COUNT > 2)) || \
  1076. (defined(UART_PRESENT) && (UART_COUNT > 2)))
  1077. case 2:
  1078. #if (defined(UART_PRESENT) && (UART_COUNT > 2))
  1079. if (config & USART_STATE_ASYNC_ONLY)
  1080. {
  1081. usart->usart_device = UART2;
  1082. usartClock = (CMU_Clock_TypeDef)cmuClock_UART2;
  1083. txDmaSelect = DMAREQ_UART2_TXBL;
  1084. port_tx = AF_UART2_TX_PORT(location);
  1085. pin_tx = AF_UART2_TX_PIN(location);
  1086. port_rx = AF_UART2_RX_PORT(location);
  1087. pin_rx = AF_UART2_RX_PIN(location);
  1088. }
  1089. else
  1090. #endif
  1091. {
  1092. usart->usart_device = USART2;
  1093. usartClock = (CMU_Clock_TypeDef)cmuClock_USART2;
  1094. txDmaSelect = DMAREQ_USART2_TXBL;
  1095. port_tx = AF_USART2_TX_PORT(location);
  1096. pin_tx = AF_USART2_TX_PIN(location);
  1097. port_rx = AF_USART2_RX_PORT(location);
  1098. pin_rx = AF_USART2_RX_PIN(location);
  1099. port_clk = AF_USART2_CLK_PORT(location);
  1100. pin_clk = AF_USART2_CLK_PIN(location);
  1101. port_cs = AF_USART2_CS_PORT(location);
  1102. pin_cs = AF_USART2_CS_PIN(location);
  1103. }
  1104. break;
  1105. #endif
  1106. default:
  1107. break;
  1108. }
  1109. /* Enable USART clock */
  1110. CMU_ClockEnable(usartClock, true);
  1111. /* Config GPIO */
  1112. GPIO_PinModeSet(
  1113. port_tx,
  1114. pin_tx,
  1115. gpioModePushPull,
  1116. 0);
  1117. GPIO_PinModeSet(
  1118. port_rx,
  1119. pin_rx,
  1120. gpioModeInputPull,
  1121. 1);
  1122. if (config & USART_STATE_SYNC)
  1123. {
  1124. GPIO_PinModeSet(
  1125. port_clk,
  1126. pin_clk,
  1127. gpioModePushPull,
  1128. 0);
  1129. }
  1130. if (config & USART_STATE_AUTOCS)
  1131. {
  1132. GPIO_PinModeSet(
  1133. port_cs,
  1134. pin_cs,
  1135. gpioModePushPull,
  1136. 1);
  1137. }
  1138. /* Config interrupt and NVIC */
  1139. if (flag & RT_DEVICE_FLAG_INT_RX)
  1140. {
  1141. hook.type = efm32_irq_type_usart;
  1142. hook.unit = unitNumber * 2 + 1;
  1143. #if defined(UART_PRESENT)
  1144. if (config & USART_STATE_ASYNC_ONLY)
  1145. {
  1146. hook.unit += USART_COUNT * 2;
  1147. }
  1148. #endif
  1149. hook.cbFunc = rt_hw_usart_rx_isr;
  1150. hook.userPtr = device;
  1151. efm32_irq_hook_register(&hook);
  1152. }
  1153. /* Config DMA */
  1154. if (flag & RT_DEVICE_FLAG_DMA_TX)
  1155. {
  1156. DMA_CfgChannel_TypeDef chnlCfg;
  1157. DMA_CfgDescr_TypeDef descrCfg;
  1158. hook.type = efm32_irq_type_dma;
  1159. hook.unit = dmaChannel;
  1160. hook.cbFunc = rt_hw_usart_dma_tx_isr;
  1161. hook.userPtr = device;
  1162. efm32_irq_hook_register(&hook);
  1163. callback = (DMA_CB_TypeDef *)rt_malloc(sizeof(DMA_CB_TypeDef));
  1164. if (callback == RT_NULL)
  1165. {
  1166. usart_debug("USART%d err: no mem for callback\n", usart->unit);
  1167. break;
  1168. }
  1169. callback->cbFunc = DMA_IRQHandler_All;
  1170. callback->userPtr = RT_NULL;
  1171. callback->primary = 0;
  1172. /* Setting up DMA channel */
  1173. chnlCfg.highPri = false; /* Can't use with peripherals */
  1174. chnlCfg.enableInt = true; /* Interrupt for callback function */
  1175. chnlCfg.select = txDmaSelect;
  1176. chnlCfg.cb = callback;
  1177. DMA_CfgChannel(dmaChannel, &chnlCfg);
  1178. /* Setting up DMA channel descriptor */
  1179. descrCfg.dstInc = dmaDataIncNone;
  1180. descrCfg.srcInc = dmaDataInc1;
  1181. descrCfg.size = dmaDataSize1;
  1182. descrCfg.arbRate = dmaArbitrate1;
  1183. descrCfg.hprot = 0;
  1184. DMA_CfgDescr(dmaChannel, true, &descrCfg);
  1185. }
  1186. /* Init specified USART unit */
  1187. if (config & USART_STATE_SYNC)
  1188. {
  1189. USART_InitSync_TypeDef init_sync = USART_INITSYNC_DEFAULT;
  1190. init_sync.enable = usartEnable;
  1191. init_sync.refFreq = 0;
  1192. init_sync.baudrate = SPI_BAUDRATE;
  1193. if (config & USART_STATE_9BIT)
  1194. {
  1195. init_sync.databits = usartDatabits9;
  1196. }
  1197. else
  1198. {
  1199. init_sync.databits = usartDatabits8;
  1200. }
  1201. if (config & USART_STATE_MASTER)
  1202. {
  1203. init_sync.master = true;
  1204. }
  1205. else
  1206. {
  1207. init_sync.master = false;
  1208. }
  1209. init_sync.msbf = true;
  1210. switch (USART_CLK_MODE_GET(config))
  1211. {
  1212. case 0:
  1213. init_sync.clockMode = usartClockMode0;
  1214. break;
  1215. case 1:
  1216. init_sync.clockMode = usartClockMode1;
  1217. break;
  1218. case 2:
  1219. init_sync.clockMode = usartClockMode2;
  1220. break;
  1221. case 3:
  1222. init_sync.clockMode = usartClockMode3;
  1223. break;
  1224. }
  1225. USART_InitSync(usart->usart_device, &init_sync);
  1226. }
  1227. else
  1228. {
  1229. USART_InitAsync_TypeDef init_async = USART_INITASYNC_DEFAULT;
  1230. init_async.enable = usartEnable;
  1231. init_async.refFreq = 0;
  1232. init_async.baudrate = UART_BAUDRATE;
  1233. init_async.oversampling = USART_CTRL_OVS_X4;
  1234. init_async.databits = USART_FRAME_DATABITS_EIGHT;
  1235. init_async.parity = USART_FRAME_PARITY_NONE;
  1236. init_async.stopbits = USART_FRAME_STOPBITS_ONE;
  1237. USART_InitAsync(usart->usart_device, &init_async);
  1238. }
  1239. /* Enable RX and TX pins and set location */
  1240. usart->usart_device->ROUTE = USART_ROUTE_RXPEN | USART_ROUTE_TXPEN | \
  1241. (location << _USART_ROUTE_LOCATION_SHIFT);
  1242. if (config & USART_STATE_SYNC)
  1243. {
  1244. usart->usart_device->ROUTE |= USART_ROUTE_CLKPEN;
  1245. }
  1246. if (config & USART_STATE_AUTOCS)
  1247. {
  1248. usart->usart_device->ROUTE |= USART_ROUTE_CSPEN;
  1249. if (config & USART_STATE_MASTER)
  1250. {
  1251. usart->usart_device->CTRL |= USART_CTRL_AUTOCS;
  1252. }
  1253. }
  1254. /* Clear RX/TX buffers */
  1255. usart->usart_device->CMD = USART_CMD_CLEARRX | USART_CMD_CLEARTX;
  1256. return usart;
  1257. } while(0);
  1258. if (usart->rx_mode)
  1259. {
  1260. rt_free(usart->rx_mode);
  1261. }
  1262. if (usart->tx_mode)
  1263. {
  1264. rt_free(usart->tx_mode);
  1265. }
  1266. if (usart)
  1267. {
  1268. rt_free(usart);
  1269. }
  1270. if (callback)
  1271. {
  1272. rt_free(callback);
  1273. }
  1274. #if defined(UART_PRESENT)
  1275. if (config & USART_STATE_ASYNC_ONLY)
  1276. {
  1277. usart_debug("UART%d err: init failed!\n", unitNumber);
  1278. }
  1279. else
  1280. #endif
  1281. {
  1282. usart_debug("USART%d err: init failed!\n", unitNumber);
  1283. }
  1284. return RT_NULL;
  1285. }
  1286. /***************************************************************************//**
  1287. * @brief
  1288. * Initialize all USART module related hardware and register USART device to
  1289. * kernel
  1290. *
  1291. * @details
  1292. *
  1293. * @note
  1294. ******************************************************************************/
  1295. void rt_hw_usart_init(void)
  1296. {
  1297. struct efm32_usart_device_t *usart;
  1298. rt_uint32_t flag;
  1299. rt_uint8_t config;
  1300. do
  1301. {
  1302. #if (defined(USART_PRESENT) && defined(RT_USING_USART0))
  1303. config = 0x00;
  1304. flag = RT_DEVICE_FLAG_RDWR;
  1305. #ifdef RT_USART0_SYNC_MODE
  1306. config |= USART_STATE_SYNC;
  1307. config |= (RT_USART0_SYNC_MODE & SYNC_SETTING_MASK) << SYNC_SETTING_SHIFT;
  1308. #if (!((RT_USART0_SYNC_MODE << SYNC_SETTING_SHIFT) & USART_STATE_MASTER))
  1309. flag |= RT_DEVICE_FLAG_INT_RX;
  1310. #endif
  1311. #else
  1312. flag |= RT_DEVICE_FLAG_INT_RX;
  1313. #endif
  1314. #if (RT_CONSOLE_DEVICE == EFM_USART0)
  1315. config |= USART_STATE_CONSOLE;
  1316. flag |= RT_DEVICE_FLAG_STREAM;
  1317. #endif
  1318. #ifdef RT_USART0_USING_DMA
  1319. RT_ASSERT(RT_USART0_USING_DMA < DMA_CHAN_COUNT);
  1320. flag |= RT_DEVICE_FLAG_DMA_TX;
  1321. #else
  1322. #define RT_USART0_USING_DMA EFM32_NO_DMA
  1323. #endif
  1324. /* Initialize and Register usart0 */
  1325. if ((usart = rt_hw_usart_unit_init(
  1326. &usart0_device,
  1327. 0,
  1328. RT_USING_USART0,
  1329. flag,
  1330. RT_USART0_USING_DMA,
  1331. config)) != RT_NULL)
  1332. {
  1333. rt_hw_usart_register(&usart0_device, RT_USART0_NAME, flag, usart);
  1334. }
  1335. else
  1336. {
  1337. break;
  1338. }
  1339. /* Initialize lock for usart0 */
  1340. usart->lock = &usart0_lock;
  1341. if (rt_sem_init(usart->lock, RT_USART0_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1342. {
  1343. break;
  1344. }
  1345. #endif
  1346. #if (defined(USART_PRESENT) && (USART_COUNT > 1) && defined(RT_USING_USART1))
  1347. config = 0x00;
  1348. flag = RT_DEVICE_FLAG_RDWR;
  1349. #ifdef RT_USART1_SYNC_MODE
  1350. config |= USART_STATE_SYNC;
  1351. config |= (RT_USART1_SYNC_MODE & SYNC_SETTING_MASK) << SYNC_SETTING_SHIFT;
  1352. #if (!((RT_USART1_SYNC_MODE << SYNC_SETTING_SHIFT) & USART_STATE_MASTER))
  1353. flag |= RT_DEVICE_FLAG_INT_RX;
  1354. #endif
  1355. #else
  1356. flag |= RT_DEVICE_FLAG_INT_RX;
  1357. #endif
  1358. #if (RT_CONSOLE_DEVICE == EFM_USART1)
  1359. config |= USART_STATE_CONSOLE;
  1360. flag |= RT_DEVICE_FLAG_STREAM;
  1361. #endif
  1362. #ifdef RT_USART1_USING_DMA
  1363. RT_ASSERT(RT_USART1_USING_DMA < DMA_CHAN_COUNT);
  1364. flag |= RT_DEVICE_FLAG_DMA_TX;
  1365. #else
  1366. #define RT_USART1_USING_DMA EFM32_NO_DMA
  1367. #endif
  1368. /* Initialize and Register usart1 */
  1369. if ((usart = rt_hw_usart_unit_init(
  1370. &usart1_device,
  1371. 1,
  1372. RT_USING_USART1,
  1373. flag,
  1374. RT_USART1_USING_DMA,
  1375. config)) != RT_NULL)
  1376. {
  1377. rt_hw_usart_register(&usart1_device, RT_USART1_NAME, flag, usart);
  1378. }
  1379. else
  1380. {
  1381. break;
  1382. }
  1383. /* Initialize lock for usart1 */
  1384. usart->lock = &usart1_lock;
  1385. if (rt_sem_init(usart->lock, RT_USART1_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1386. {
  1387. break;
  1388. }
  1389. #endif
  1390. #if (defined(USART_PRESENT) && (USART_COUNT > 2) && defined(RT_USING_USART2))
  1391. config = 0x00;
  1392. flag = RT_DEVICE_FLAG_RDWR;
  1393. #ifdef RT_USART2_SYNC_MODE
  1394. config |= USART_STATE_SYNC;
  1395. config |= (RT_USART2_SYNC_MODE & SYNC_SETTING_MASK) << SYNC_SETTING_SHIFT;
  1396. #if (!((RT_USART2_SYNC_MODE << SYNC_SETTING_SHIFT) & USART_STATE_MASTER))
  1397. flag |= RT_DEVICE_FLAG_INT_RX;
  1398. #endif
  1399. #else
  1400. flag |= RT_DEVICE_FLAG_INT_RX;
  1401. #endif
  1402. #if (RT_CONSOLE_DEVICE == EFM_USART2)
  1403. config |= USART_STATE_CONSOLE;
  1404. flag |= RT_DEVICE_FLAG_STREAM;
  1405. #endif
  1406. #ifdef RT_USART2_USING_DMA
  1407. RT_ASSERT(RT_USART2_USING_DMA < DMA_CHAN_COUNT);
  1408. flag |= RT_DEVICE_FLAG_DMA_TX;
  1409. #else
  1410. #define RT_USART2_USING_DMA EFM32_NO_DMA
  1411. #endif
  1412. /* Initialize and Register usart2 */
  1413. if ((usart = rt_hw_usart_unit_init(
  1414. &usart2_device,
  1415. 2,
  1416. RT_USING_USART2,
  1417. flag,
  1418. RT_USART2_USING_DMA,
  1419. config)) != RT_NULL)
  1420. {
  1421. rt_hw_usart_register(&usart2_device, RT_USART2_NAME, flag, usart);
  1422. }
  1423. else
  1424. {
  1425. break;
  1426. }
  1427. /* Initialize lock for usart2 */
  1428. usart->lock = &usart2_lock;
  1429. if (rt_sem_init(usart->lock, RT_USART2_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1430. {
  1431. break;
  1432. }
  1433. #endif
  1434. #if (defined(UART_PRESENT) && defined(RT_USING_UART0))
  1435. config = USART_STATE_ASYNC_ONLY;
  1436. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  1437. #if (RT_CONSOLE_DEVICE == EFM_UART0)
  1438. config |= USART_STATE_CONSOLE;
  1439. flag |= RT_DEVICE_FLAG_STREAM;
  1440. #endif
  1441. #ifdef RT_UART0_USING_DMA
  1442. RT_ASSERT(RT_UART0_USING_DMA < DMA_CHAN_COUNT);
  1443. flag |= RT_DEVICE_FLAG_DMA_TX;
  1444. #else
  1445. #define RT_UART0_USING_DMA EFM32_NO_DMA
  1446. #endif
  1447. /* Initialize and Register uart0 */
  1448. if ((usart = rt_hw_usart_unit_init(
  1449. &uart0_device,
  1450. 0,
  1451. RT_USING_UART0,
  1452. flag,
  1453. RT_UART0_USING_DMA,
  1454. config)) != RT_NULL)
  1455. {
  1456. rt_hw_usart_register(&uart0_device, RT_UART0_NAME, flag, usart);
  1457. }
  1458. else
  1459. {
  1460. break;
  1461. }
  1462. /* Initialize lock for uart0 */
  1463. usart->lock = &uart0_lock;
  1464. if (rt_sem_init(usart->lock, RT_UART0_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1465. {
  1466. break;
  1467. }
  1468. #endif
  1469. #if (defined(UART_PRESENT) && (UART_COUNT > 1) && defined(RT_USING_UART1))
  1470. config = USART_STATE_ASYNC_ONLY;
  1471. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  1472. #if (RT_CONSOLE_DEVICE == EFM_UART1)
  1473. config |= USART_STATE_CONSOLE;
  1474. flag |= RT_DEVICE_FLAG_STREAM;
  1475. #endif
  1476. #ifdef RT_UART1_USING_DMA
  1477. RT_ASSERT(RT_UART1_USING_DMA < DMA_CHAN_COUNT);
  1478. flag |= RT_DEVICE_FLAG_DMA_TX;
  1479. #else
  1480. #define RT_UART1_USING_DMA EFM32_NO_DMA
  1481. #endif
  1482. /* Initialize and Register uart1 */
  1483. if ((usart = rt_hw_usart_unit_init(
  1484. &uart1_device,
  1485. 1,
  1486. RT_USING_UART1,
  1487. flag,
  1488. RT_UART1_USING_DMA,
  1489. config)) != RT_NULL)
  1490. {
  1491. rt_hw_usart_register(&uart1_device, RT_UART1_NAME, flag, usart);
  1492. }
  1493. else
  1494. {
  1495. break;
  1496. }
  1497. /* Initialize lock for uart1 */
  1498. usart->lock = &uart1_lock;
  1499. if (rt_sem_init(usart->lock, RT_UART1_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1500. {
  1501. break;
  1502. }
  1503. #endif
  1504. usart_debug("USART: H/W init OK!\n");
  1505. return;
  1506. } while (0);
  1507. rt_kprintf("USART: H/W init failed!\n");
  1508. }
  1509. #endif /* (defined(RT_USING_USART0) || defined(RT_USING_USART1) || \
  1510. defined(RT_USING_USART2) || defined(RT_USING_UART0) || \
  1511. defined(RT_USING_UART1)) */
  1512. /***************************************************************************//**
  1513. * @}
  1514. ******************************************************************************/