gd32f10x_dac.c 10 KB

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  1. /**
  2. ******************************************************************************
  3. * @brief DAC functions of the firmware library.
  4. ******************************************************************************
  5. */
  6. /* Includes ------------------------------------------------------------------*/
  7. #include "gd32f10x_dac.h"
  8. #include "gd32f10x_rcc.h"
  9. /** @addtogroup GD32F10x_Firmware
  10. * @{
  11. */
  12. /** @defgroup DAC
  13. * @brief DAC driver modules
  14. * @{
  15. */
  16. /** @defgroup DAC_Private_Defines
  17. * @{
  18. */
  19. /* CTLR register bits mask */
  20. #define CTLR_BITS_CLEAR ((uint32_t)0x00000FFE)
  21. /* DAC Dual Channels SWTRIG masks */
  22. #define DUAL_SWTRIG_SET ((uint32_t)0x00000003)
  23. /* DHR registers offsets */
  24. #define DHR12R1_OFFSET ((uint32_t)0x00000008)
  25. #define DHR12R2_OFFSET ((uint32_t)0x00000014)
  26. #define DHR12RD_OFFSET ((uint32_t)0x00000020)
  27. /* DOR register offset */
  28. #define DOR_OFFSET ((uint32_t)0x0000002C)
  29. /**
  30. * @}
  31. */
  32. /** @defgroup DAC_Private_Functions
  33. * @{
  34. */
  35. /**
  36. * @brief Deinitialize the DAC peripheral registers.
  37. * @param DAC_InitParaStruct: DAC_InitPara structure that contains the
  38. * configuration information for the selected DAC channel.
  39. * @retval None
  40. */
  41. void DAC_DeInit(DAC_InitPara *DAC_InitParaStruct)
  42. {
  43. /* Enable DAC reset state */
  44. RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_DACRST, ENABLE);
  45. /* Release DAC from reset state */
  46. RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_DACRST, DISABLE);
  47. /* Initialize the DAC_Trigger */
  48. DAC_InitParaStruct->DAC_Trigger = DAC_TRIGGER_NONE;
  49. /* Initialize the DAC_WaveGeneration */
  50. DAC_InitParaStruct->DAC_WaveType = DAC_WAVEGENE_NONE;
  51. /* Initialize the DAC_LFSRUnmask_TriangleAmplitude */
  52. DAC_InitParaStruct->DAC_LFSRNoise_AmplitudeTriangle = DAC_LFSR_BIT0;
  53. /* Initialize the DAC_OutputBuffer */
  54. DAC_InitParaStruct->DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
  55. }
  56. /**
  57. * @brief Initialize the DAC peripheral.
  58. * @param DAC_Channel: the selected DAC channel.
  59. * This parameter can be one of the following values:
  60. * @arg DAC_Channel_1: select DAC Channel1
  61. * @arg DAC_Channel_2: select DAC Channel2
  62. * @param DAC_InitStruct: DAC_InitTypeDef structure .
  63. * @retval None
  64. */
  65. void DAC_Init(uint32_t DAC_Channel, DAC_InitPara *DAC_InitParaStruct)
  66. {
  67. uint32_t temp1 = 0, temp2 = 0;
  68. /* DAC CTLR Configuration */
  69. /* Get the DAC CTLR value */
  70. temp1 = DAC->CTLR;
  71. /* Clear BOFF, TEN, TSEL, WAVE and MAMP bits */
  72. temp1 &= ~(CTLR_BITS_CLEAR << DAC_Channel);
  73. /* Configure for the DAC channel: buffer output, trigger, wave generation,
  74. mask/amplitude for wave generation */
  75. /* Set TSEL and TEN bits according to DAC_Trigger */
  76. /* Set WAVE bits according to DAC_WaveType */
  77. /* Set MAMP bits according to DAC_LFSRNoise_AmplitudeTriangle */
  78. /* Set BOFF bit according to DAC_OutputBuffer */
  79. temp2 = (DAC_InitParaStruct->DAC_Trigger | DAC_InitParaStruct->DAC_OutputBuffer |
  80. DAC_InitParaStruct->DAC_WaveType | DAC_InitParaStruct->DAC_LFSRNoise_AmplitudeTriangle);
  81. /* Calculate CTLR register value */
  82. temp1 |= temp2 << DAC_Channel;
  83. /* Write to DAC CTLR */
  84. DAC->CTLR = temp1;
  85. }
  86. /**
  87. * @brief Enable or disable the DAC channel.
  88. * @param DAC_Channel: the selected DAC channel.
  89. * This parameter can be one of the following values:
  90. * @arg DAC_Channel_1: select DAC Channel1.
  91. * @arg DAC_Channel_2: select DAC Channel2.
  92. * @param NewValue: New value of the DAC channel.
  93. * This parameter can be: ENABLE or DISABLE.
  94. * @retval None
  95. */
  96. void DAC_Enable(uint32_t DAC_Channel, TypeState NewValue)
  97. {
  98. if (NewValue != DISABLE) {
  99. /* Enable the selected DAC channel */
  100. DAC->CTLR |= (DAC_CTLR_DEN1 << DAC_Channel) ;
  101. } else {
  102. /* Disable the selected DAC channel */
  103. DAC->CTLR &= ~(DAC_CTLR_DEN1 << DAC_Channel);
  104. }
  105. }
  106. /**
  107. * @brief Enable or disable the selected DAC channel software trigger.
  108. * @param DAC_Channel: the selected DAC channel.
  109. * This parameter can be one of the following values:
  110. * @arg DAC_Channel_1: select DAC Channel1
  111. * @arg DAC_Channel_2: select DAC Channel2
  112. * @param NewValue: New value of the selected DAC channel software trigger.
  113. * This parameter can be: ENABLE or DISABLE.
  114. * @retval None
  115. */
  116. void DAC_SoftwareTrigger_Enable(uint32_t DAC_Channel, TypeState NewValue)
  117. {
  118. if (NewValue != DISABLE) {
  119. /* Enable software trigger for DAC channel1 */
  120. DAC->SWTR |= (uint32_t)DAC_SWTR_SWTR1 << (DAC_Channel >> 4);
  121. } else {
  122. /* Disable software trigger for DAC channel1 */
  123. DAC->SWTR &= ~((uint32_t)DAC_SWTR_SWTR1 << (DAC_Channel >> 4));
  124. }
  125. }
  126. /**
  127. * @brief Enable or disable simultaneously the two DAC channels software
  128. * triggers.
  129. * @param NewValue: new value of the DAC channels software triggers.
  130. * This parameter can be: ENABLE or DISABLE.
  131. * @retval None
  132. */
  133. void DAC_DualSoftwareTrigger_Enable(TypeState NewValue)
  134. {
  135. if (NewValue != DISABLE) {
  136. /* Enable software trigger */
  137. DAC->SWTR |= DUAL_SWTRIG_SET ;
  138. } else {
  139. /* Disable software trigger */
  140. DAC->SWTR &= ~DUAL_SWTRIG_SET;
  141. }
  142. }
  143. /**
  144. * @brief Enable or disable the selected DAC channel wave generation.
  145. * @param DAC_Channel: the selected DAC channel.
  146. * This parameter can be one of the following values:
  147. * @arg DAC_Channel_1: select DAC Channel1
  148. * @arg DAC_Channel_2: select DAC Channel2
  149. * @param DAC_Wave: the wave type to enable or disable.
  150. * This parameter can be one of the following values:
  151. * @arg DAC_WAVE_NOISE: noise wave generation
  152. * @arg DAC_WAVE_TRIANGLE: triangle wave generation
  153. * @param NewValue: new value of the selected DAC channel wave generation.
  154. * This parameter can be: ENABLE or DISABLE.
  155. * @retval None
  156. */
  157. void DAC_WaveGeneration_Enable(uint32_t DAC_Channel, uint32_t DAC_Wave, TypeState NewValue)
  158. {
  159. if (NewValue != DISABLE) {
  160. /* Enable the selected DAC channel wave generation */
  161. DAC->CTLR |= DAC_Wave << DAC_Channel;
  162. } else {
  163. /* Disable the selected DAC channel wave generation */
  164. DAC->CTLR &= ~(DAC_Wave << DAC_Channel);
  165. }
  166. }
  167. /**
  168. * @brief Set the specified data holding register value for DAC channel1.
  169. * @param DAC_Align: the data alignment for DAC channel1.
  170. * This parameter can be one of the following values:
  171. * @arg DAC_ALIGN_8B_R: select 8bit right data alignment
  172. * @arg DAC_ALIGN_12B_L: select 12bit left data alignment
  173. * @arg DAC_ALIGN_12B_R: select 12bit right data alignment
  174. * @param Data: Data to be loaded.
  175. * @retval None
  176. */
  177. void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
  178. {
  179. __IO uint32_t temp = 0;
  180. temp = (uint32_t)DAC_BASE;
  181. temp += DHR12R1_OFFSET + DAC_Align;
  182. /* Set the DAC channel1 */
  183. *(__IO uint32_t *) temp = Data;
  184. }
  185. /**
  186. * @brief Set the specified data holding register value for DAC channel2.
  187. * @param DAC_Align: the data alignment for DAC channel2.
  188. * This parameter can be one of the following values:
  189. * @arg DAC_ALIGN_8B_R: select 8bit right data alignment
  190. * @arg DAC_ALIGN_12B_L: select 12bit left data alignment
  191. * @arg DAC_ALIGN_12B_R: select 12bit right data alignment
  192. * @param Data: Data to be loaded.
  193. * @retval None
  194. */
  195. void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data)
  196. {
  197. __IO uint32_t temp = 0;
  198. temp = (uint32_t)DAC_BASE;
  199. temp += DHR12R2_OFFSET + DAC_Align;
  200. /* Set the DAC channel2 */
  201. *(__IO uint32_t *) temp = Data;
  202. }
  203. /**
  204. * @brief Set the specified data for dual channel
  205. * @param DAC_Align: the data alignment for dual channel DAC.
  206. * This parameter can be one of the following values:
  207. * @arg DAC_Align_8b_R: select 8bit right data alignment
  208. * @arg DAC_Align_12b_L: select 12bit left data alignment
  209. * @arg DAC_Align_12b_R: select 12bit right data alignment
  210. * @param Data2: Data for DAC Channel2.
  211. * @param Data1: Data for DAC Channel1.
  212. * @retval None
  213. */
  214. void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
  215. {
  216. uint32_t data = 0, temp = 0;
  217. /* set dual DAC data holding register value */
  218. if (DAC_Align == DAC_ALIGN_8B_R) {
  219. data = ((uint32_t)Data2 << 8) | Data1;
  220. } else {
  221. data = ((uint32_t)Data2 << 16) | Data1;
  222. }
  223. temp = (uint32_t)DAC_BASE;
  224. temp += DHR12RD_OFFSET + DAC_Align;
  225. /* Set the dual DAC selected data holding register */
  226. *(__IO uint32_t *)temp = data;
  227. }
  228. /**
  229. * @brief Return the last data output value.
  230. * @param DAC_Channel: the selected DAC channel.
  231. * This parameter can be one of the following values:
  232. * @arg DAC_Channel_1: select DAC Channel1
  233. * @arg DAC_Channel_2: select DAC Channel2
  234. * @retval The DAC channel1 data output value.
  235. */
  236. uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
  237. {
  238. __IO uint32_t temp = 0;
  239. temp = (uint32_t) DAC_BASE;
  240. temp += DOR_OFFSET + ((uint32_t)DAC_Channel >> 2);
  241. /* Returns the DAC channel data */
  242. return (uint16_t)(*(__IO uint32_t *) temp);
  243. }
  244. /**
  245. * @brief Enable or disable DMA request.
  246. * @param DAC_Channel: the selected DAC channel.
  247. * This parameter can be one of the following values:
  248. * @arg DAC_Channel_1: select DAC Channel1
  249. * @arg DAC_Channel_2: select DAC Channel2
  250. * @param NewValue: New value of the selected DAC channel DMA request.
  251. * This parameter can be: ENABLE or DISABLE.
  252. * @retval None
  253. */
  254. void DAC_DMA_Enable(uint32_t DAC_Channel, TypeState NewValue)
  255. {
  256. if (NewValue != DISABLE) {
  257. /* Enable DMA request */
  258. DAC->CTLR |= (DAC_CTLR_DDMAEN1 << DAC_Channel);
  259. } else {
  260. /* Disable DMA request */
  261. DAC->CTLR &= ~(DAC_CTLR_DDMAEN1 << DAC_Channel);
  262. }
  263. }
  264. /**
  265. * @brief Enable or disable the specified DAC interrupts.
  266. * @param DAC_Channel: the selected DAC channel.
  267. * This parameter can be one of the following values:
  268. * @arg DAC_Channel_1: DAC Channel1 selected
  269. * @arg DAC_Channel_2: DAC Channel2 selected
  270. * @param NewValue: Alternative state of the specified DAC interrupts.
  271. * This parameter can be: ENABLE or DISABLE.
  272. * @retval None
  273. */
  274. void DAC_INTConfig(uint32_t DAC_Channel, TypeState NewValue)
  275. {
  276. if (NewValue != DISABLE) {
  277. /* Enable the DAC DMAUDR interrupts */
  278. DAC->CTLR |= (DAC_INT_DMAUDR << DAC_Channel);
  279. } else {
  280. /* Disable the DAC DMAUDR interrupts */
  281. DAC->CTLR &= (~(uint32_t)(DAC_INT_DMAUDR << DAC_Channel));
  282. }
  283. }
  284. /**
  285. * @}
  286. */
  287. /**
  288. * @}
  289. */
  290. /**
  291. * @}
  292. */