gd32f10x_gpio.c 17 KB

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  1. /**
  2. ******************************************************************************
  3. * @brief GPIO functions of the firmware library.
  4. ******************************************************************************
  5. */
  6. /* Includes ------------------------------------------------------------------*/
  7. #include "gd32f10x_gpio.h"
  8. #include "gd32f10x_rcc.h"
  9. /** @addtogroup GD32F10x_Firmware
  10. * @{
  11. */
  12. /** @defgroup GPIO
  13. * @brief GPIO driver modules
  14. * @{
  15. */
  16. /** @defgroup GPIO_Private_Defines
  17. * @{
  18. */
  19. #define ECR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
  20. #define LSB_MASK ((uint16_t)0xFFFF)
  21. #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
  22. #define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
  23. #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
  24. #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
  25. #define AFIO_PCFR1_MII_RMII ((uint32_t)0x00800000)
  26. #define AFIO_ESSR1_BITS_FIELDS ((uint8_t)0x04)
  27. #define AFIO_ESSR2_BITS_FIELDS ((uint8_t)0x08)
  28. #define AFIO_ESSR3_BITS_FIELDS ((uint8_t)0x0c)
  29. #define AFIO_ESSR_PIN_FIELDS ((uint8_t)0x04)
  30. #define AFIO_ESSR_4BIT_FIELDS ((uint8_t)0x0f)
  31. #define CTLR1_8BIT_FIELDS ((uint32_t)0x00ff)
  32. #define CTLR2_8BIT_FIELDS ((uint32_t)0x00ff)
  33. #define AFIO_PCFR2_FIELDS ((uint32_t)0x80000000)
  34. /**
  35. * @}
  36. */
  37. /** @defgroup GPIO_Private_Functions
  38. * @{
  39. */
  40. /**
  41. * @brief Reset the GPIOx peripheral.
  42. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  43. * @retval None
  44. */
  45. void GPIO_DeInit(GPIO_TypeDef *GPIOx)
  46. {
  47. if (GPIOx == GPIOA) {
  48. /* Enable GPIOA reset state */
  49. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOA, ENABLE);
  50. /* Release GPIOA from reset state */
  51. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOA, DISABLE);
  52. } else if (GPIOx == GPIOB) {
  53. /* Enable GPIOB reset state */
  54. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOB, ENABLE);
  55. /* Release GPIOB from reset state */
  56. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOB, DISABLE);
  57. } else if (GPIOx == GPIOC) {
  58. /* Enable GPIOC reset state */
  59. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOC, ENABLE);
  60. /* Release GPIOC from reset state */
  61. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOC, DISABLE);
  62. } else if (GPIOx == GPIOD) {
  63. /* Enable GPIOD reset state */
  64. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOD, ENABLE);
  65. /* Release GPIOD from reset state */
  66. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOD, DISABLE);
  67. } else if (GPIOx == GPIOE) {
  68. /* Enable GPIOE reset state */
  69. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOE, ENABLE);
  70. /* Release GPIOE from reset state */
  71. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOE, DISABLE);
  72. } else if (GPIOx == GPIOF) {
  73. /* Enable GPIOF reset state */
  74. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOF, ENABLE);
  75. /* Release GPIOF from reset state */
  76. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOF, DISABLE);
  77. } else if (GPIOx == GPIOG) {
  78. /* Enable GPIOG reset state */
  79. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOG, ENABLE);
  80. /* Release GPIOG from reset state */
  81. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_GPIOG, DISABLE);
  82. }
  83. }
  84. /**
  85. * @brief Deinitialize the Alternate Functions (remap, event control
  86. * and EXTI configuration) registers to their default reset values.
  87. * @param None
  88. * @retval None
  89. */
  90. void GPIO_AFDeInit(void)
  91. {
  92. /* Enable AFIO reset state */
  93. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_AF, ENABLE);
  94. /* Release AFIO from reset state */
  95. RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_AF, DISABLE);
  96. }
  97. /**
  98. * @brief Initialize the GPIOx peripheral.
  99. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  100. * @param GPIO_InitStruct: The structuer contains configuration information.
  101. * @retval None
  102. */
  103. void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitPara *GPIO_InitStruct)
  104. {
  105. uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
  106. uint32_t tempreg = 0x00, pinmask = 0x00;
  107. /* GPIO Mode Configuration */
  108. currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
  109. if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00) {
  110. /* Output mode */
  111. currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
  112. }
  113. /* GPIO CTLR1 Configuration */
  114. /* Configure the eight low port pins */
  115. if (((uint32_t)GPIO_InitStruct->GPIO_Pin & CTLR1_8BIT_FIELDS) != 0x00) {
  116. tempreg = GPIOx->CTLR1;
  117. for (pinpos = 0x00; pinpos < 0x08; pinpos++) {
  118. pos = ((uint32_t)0x01) << pinpos;
  119. /* Get the port pins position */
  120. currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
  121. if (currentpin == pos) {
  122. pos = pinpos << 2;
  123. /* Clear the corresponding low control register bits */
  124. pinmask = ((uint32_t)0x0F) << pos;
  125. tempreg &= ~pinmask;
  126. /* Write the mode configuration in the corresponding bits */
  127. tempreg |= (currentmode << pos);
  128. /* Reset the corresponding ODR bit */
  129. if (GPIO_InitStruct->GPIO_Mode == GPIO_MODE_IPD) {
  130. GPIOx->BCR = (((uint32_t)0x01) << pinpos);
  131. } else {
  132. /* Set the corresponding ODR bit */
  133. if (GPIO_InitStruct->GPIO_Mode == GPIO_MODE_IPU) {
  134. GPIOx->BOR = (((uint32_t)0x01) << pinpos);
  135. }
  136. }
  137. }
  138. }
  139. GPIOx->CTLR1 = tempreg;
  140. }
  141. /* GPIO CTLR2 Configuration */
  142. /* Configure the eight high port pins */
  143. if (GPIO_InitStruct->GPIO_Pin > CTLR2_8BIT_FIELDS) {
  144. tempreg = GPIOx->CTLR2;
  145. for (pinpos = 0x00; pinpos < 0x08; pinpos++) {
  146. pos = (((uint32_t)0x01) << (pinpos + 0x08));
  147. /* Get the port pins position */
  148. currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
  149. if (currentpin == pos) {
  150. pos = pinpos << 2;
  151. /* Clear the corresponding high control register bits */
  152. pinmask = ((uint32_t)0x0F) << pos;
  153. tempreg &= ~pinmask;
  154. /* Write the mode configuration in the corresponding bits */
  155. tempreg |= (currentmode << pos);
  156. /* Reset the corresponding DOR bit */
  157. if (GPIO_InitStruct->GPIO_Mode == GPIO_MODE_IPD) {
  158. GPIOx->BCR = (((uint32_t)0x01) << (pinpos + 0x08));
  159. }
  160. /* Set the corresponding DOR bit */
  161. if (GPIO_InitStruct->GPIO_Mode == GPIO_MODE_IPU) {
  162. GPIOx->BOR = (((uint32_t)0x01) << (pinpos + 0x08));
  163. }
  164. }
  165. }
  166. GPIOx->CTLR2 = tempreg;
  167. }
  168. }
  169. /**
  170. * @brief Initial GPIO_InitParameter members.
  171. * @param GPIO_InitParameter : pointer to a GPIO_InitPara structure.
  172. * @retval None
  173. */
  174. void GPIO_ParaInit(GPIO_InitPara *GPIO_InitStruct)
  175. {
  176. /* Reset GPIO init structure parameters values */
  177. GPIO_InitStruct->GPIO_Pin = GPIO_PIN_ALL;
  178. GPIO_InitStruct->GPIO_Speed = GPIO_SPEED_2MHZ;
  179. GPIO_InitStruct->GPIO_Mode = GPIO_MODE_IN_FLOATING;
  180. }
  181. /**
  182. * @brief Read the select input port.
  183. * @param GPIOx: Select the GPIO peripheral.
  184. * @param GPIO_Pin: Select the port.
  185. * @retval The input port pin value.
  186. */
  187. uint8_t GPIO_ReadInputBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  188. {
  189. uint8_t bitstatus = 0x00;
  190. if ((GPIOx->DIR & GPIO_Pin) != (uint32_t)Bit_RESET) {
  191. bitstatus = (uint8_t)Bit_SET;
  192. } else {
  193. bitstatus = (uint8_t)Bit_RESET;
  194. }
  195. return bitstatus;
  196. }
  197. /**
  198. * @brief Read the specified GPIO input data port.
  199. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  200. * @retval GPIO input data port value.
  201. */
  202. uint16_t GPIO_ReadInputData(GPIO_TypeDef *GPIOx)
  203. {
  204. return ((uint16_t)GPIOx->DIR);
  205. }
  206. /**
  207. * @brief Read the specified output data port bit.
  208. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  209. * @param GPIO_Pin: where pin can be (GPIO_PIN_0..GPIO_PIN_15) to select the GPIO peripheral.
  210. * @retval The output port pin value.
  211. */
  212. uint8_t GPIO_ReadOutputBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  213. {
  214. uint8_t bitstatus = 0x00;
  215. if ((GPIOx->DOR & GPIO_Pin) != (uint32_t)Bit_RESET) {
  216. bitstatus = (uint8_t)Bit_SET;
  217. } else {
  218. bitstatus = (uint8_t)Bit_RESET;
  219. }
  220. return bitstatus;
  221. }
  222. /**
  223. * @brief Read the specified GPIO output data port.
  224. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  225. * @retval GPIO output data port value.
  226. */
  227. uint16_t GPIO_ReadOutputData(GPIO_TypeDef *GPIOx)
  228. {
  229. return ((uint16_t)GPIOx->DOR);
  230. }
  231. /**
  232. * @brief Set the selected data port bits.
  233. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  234. * @param GPIO_Pin: where pin can be (GPIO_PIN_0..GPIO_PIN_15) to select the GPIO peripheral.
  235. * @retval None
  236. */
  237. void GPIO_SetBits(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  238. {
  239. GPIOx->BOR = GPIO_Pin;
  240. }
  241. /**
  242. * @brief Clear the selected data port bits.
  243. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  244. * @param GPIO_Pin: where pin can be (GPIO_PIN_0..GPIO_PIN_15) to select the GPIO peripheral.
  245. * @retval None
  246. */
  247. void GPIO_ResetBits(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  248. {
  249. GPIOx->BCR = GPIO_Pin;
  250. }
  251. /**
  252. * @brief Set or clear the selected data port bit.
  253. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  254. * @param GPIO_Pin: where pin can be (GPIO_PIN_0..GPIO_PIN_15) to select the GPIO peripheral.
  255. * @param BitVal: specifies the state of the port.Select one of the follwing values :
  256. * @arg Bit_RESET: clear the port pin
  257. * @arg Bit_SET: set the port pin
  258. * @retval None
  259. */
  260. void GPIO_WriteBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, BitState BitVal)
  261. {
  262. if (BitVal != Bit_RESET) {
  263. GPIOx->BOR = GPIO_Pin;
  264. } else {
  265. GPIOx->BCR = GPIO_Pin;
  266. }
  267. }
  268. /**
  269. * @brief Write data to the specified GPIO data port.
  270. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  271. * @param PortVal: specifies the value to be written to the port data output register.
  272. * @retval None
  273. */
  274. void GPIO_WritePort(GPIO_TypeDef *GPIOx, uint16_t PortVal)
  275. {
  276. GPIOx->DOR = PortVal;
  277. }
  278. /**
  279. * @brief Lock GPIO Pins configuration.
  280. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  281. * @param GPIO_Pin: where pin can be (GPIO_PIN_0..GPIO_PIN_15) to select the GPIO peripheral.
  282. * @retval None
  283. */
  284. void GPIO_PinLockConfig(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  285. {
  286. uint32_t temp = 0x00010000;
  287. temp |= GPIO_Pin;
  288. /* Set LCKK bit */
  289. GPIOx->LOCKR = temp;
  290. /* Reset LCKK bit */
  291. GPIOx->LOCKR = GPIO_Pin;
  292. /* Set LCKK bit */
  293. GPIOx->LOCKR = temp;
  294. /* Read LCKK bit*/
  295. temp = GPIOx->LOCKR;
  296. /* Read LCKK bit*/
  297. temp = GPIOx->LOCKR;
  298. }
  299. /**
  300. * @brief Select the GPIO pin used as Event output.
  301. * @param GPIO_PortSource: This parameter can be GPIO_PORT_SOURCE_GPIOx where x can be (A..G).
  302. * @param GPIO_PinSource: This parameter can be GPIO_PINSOURCEx where x can be (0..15).
  303. * @retval None
  304. */
  305. void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  306. {
  307. uint32_t temp = 0x00;
  308. temp = AFIO->AFIO_EVR;
  309. /* Clear the PORT[6:4] and PIN[3:0] bits */
  310. temp &= ECR_PORTPINCONFIG_MASK;
  311. temp |= (uint32_t)GPIO_PortSource << 0x04;
  312. temp |= GPIO_PinSource;
  313. AFIO->AFIO_EVR = temp;
  314. }
  315. /**
  316. * @brief Enable or disable the Event Output.
  317. * @param AFIO_Event: AFIO_Event Enable or Disable bit.
  318. * @param NewState: new state of the Event output.
  319. * This parameter can be: ENABLE or DISABLE.
  320. * @retval None
  321. */
  322. void GPIO_EventOutput_Enable(uint32_t AFIO_Event, TypeState NewState)
  323. {
  324. /* Enable or disable the Event Output */
  325. if (NewState != DISABLE) {
  326. AFIO->AFIO_EVR |= AFIO_ECR_EVOE_SET;
  327. } else {
  328. AFIO->AFIO_EVR &= AFIO_ECR_EVOE_RESET;
  329. }
  330. }
  331. /**
  332. * @brief Change the mapping of the specified pin.
  333. * @param GPIO_Remap: selects the pin to remap.
  334. * This parameter can be one of the following values:
  335. * @arg GPIO_REMAP_SPI1
  336. * @arg GPIO_REMAP_I2C1
  337. * @arg GPIO_REMAP_USART1
  338. * @arg GPIO_REMAP_USART2
  339. * @arg GPIO_PARTIAL_REMAP_USART3
  340. * @arg GPIO_FULL_REMAP_USART3
  341. * @arg GPIO_PARTIAL_REMAP_TIMER1
  342. * @arg GPIO_FULL_REMAP_TIMER1
  343. * @arg GPIO_PARTIAL_REMAP1_TIMER2
  344. * @arg GPIO_PARTIAL_REMAP2_TIMER2
  345. * @arg GPIO_FULL_REMAP_TIMER2
  346. * @arg GPIO_PARTIAL_REMAP_TIMER3
  347. * @arg GPIO_FULL_REMAP_TIMER3
  348. * @arg GPIO_REMAP_TIMER4
  349. * @arg GPIO_REMAP1_CAN1
  350. * @arg GPIO_REMAP2_CAN1
  351. * @arg GPIO_REMAP_PD01
  352. * @arg GPIO_REMAP_TIMER5CH4_LSI
  353. * @arg GPIO_REMAP_ADC1_ETRGINJ
  354. * @arg GPIO_REMAP_ADC1_ETRGREG
  355. * @arg GPIO_REMAP_ADC2_ETRGINJ
  356. * @arg GPIO_REMAP_ADC2_ETRGREG
  357. * @arg GPIO_REMAP_ETH
  358. * @arg GPIO_REMAP_CAN2
  359. * @arg GPIO_REMAP_SWJ_NOJTRST
  360. * @arg GPIO_REMAP_SWJ_JTAGDISABLE
  361. * @arg GPIO_REMAP_SWJ_DISABLE
  362. * @arg GPIO_REMAP_SPI3
  363. * @arg GPIO_REMAP_TIMER2ITR1_PTP_SOF
  364. * @arg GPIO_REMAP_PTP_PPS
  365. * @arg GPIO_REMAP_TIMER15
  366. * @arg GPIO_REMAP_TIMER16
  367. * @arg GPIO_REMAP_TIMER17
  368. * @arg GPIO_REMAP_CEC
  369. * @arg GPIO_REMAP_TIMER1_DMA
  370. * @arg GPIO_REMAP_TIMER9
  371. * @arg GPIO_REMAP_TIMER10
  372. * @arg GPIO_REMAP_TIMER11
  373. * @arg GPIO_REMAP_TIMER13
  374. * @arg GPIO_REMAP_TIMER14
  375. * @arg GPIO_REMAP_EXMC_NADV
  376. * @arg GPIO_REMAP_TIMER67_DAC_DMA
  377. * @arg GPIO_REMAP_TIMER12
  378. * @arg GPIO_REMAP_MISC
  379. * @param NewState: new state of the port pin remapping.
  380. * This parameter can be: ENABLE or DISABLE.
  381. * @retval None
  382. */
  383. void GPIO_PinRemapConfig(uint32_t GPIO_Remap, TypeState NewState)
  384. {
  385. uint32_t temp = 0x00, temp1 = 0x00, tempreg = 0x00, tempmask = 0x00;
  386. if ((GPIO_Remap & 0x80000000) == 0x80000000) {
  387. tempreg = AFIO->AFIO_PCFR2;
  388. } else {
  389. tempreg = AFIO->AFIO_PCFR1;
  390. }
  391. tempmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
  392. temp = GPIO_Remap & LSB_MASK;
  393. if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) {
  394. tempreg &= DBGAFR_SWJCFG_MASK;
  395. AFIO->AFIO_PCFR1 &= DBGAFR_SWJCFG_MASK;
  396. } else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK) {
  397. temp1 = ((uint32_t)0x03) << tempmask;
  398. tempreg &= ~temp1;
  399. tempreg |= ~DBGAFR_SWJCFG_MASK;
  400. } else {
  401. tempreg &= ~(temp << ((GPIO_Remap >> 0x15) * 0x10));
  402. tempreg |= ~DBGAFR_SWJCFG_MASK;
  403. }
  404. if (NewState != DISABLE) {
  405. tempreg |= (temp << ((GPIO_Remap >> 0x15) * 0x10));
  406. }
  407. if ((GPIO_Remap & AFIO_PCFR2_FIELDS) == AFIO_PCFR2_FIELDS) {
  408. AFIO->AFIO_PCFR2 = tempreg;
  409. } else {
  410. AFIO->AFIO_PCFR1 = tempreg;
  411. }
  412. }
  413. /**
  414. * @brief Select the GPIO pin used as EXTI Line.
  415. * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
  416. * This parameter can be GPIO_PORT_SOURCE_GPIOx where x can be (A..G).
  417. * @param GPIO_PinSource: specifies the EXTI line to be configured.
  418. * This parameter can be GPIO_PINSOURCEx where x can be (0..15).
  419. * @retval None
  420. */
  421. void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  422. {
  423. uint32_t temp = 0x00;
  424. temp = ((uint32_t)0x0f) << (AFIO_ESSR_PIN_FIELDS * (GPIO_PinSource & (uint8_t)0x03));
  425. /* Select EXTI0->EXTI3 bit */
  426. if (GPIO_PinSource < AFIO_ESSR1_BITS_FIELDS) {
  427. AFIO->AFIO_ESSR1 &= ~temp;
  428. AFIO->AFIO_ESSR1 |= (((uint32_t)GPIO_PortSource) << (AFIO_ESSR_PIN_FIELDS * (GPIO_PinSource & (uint8_t)0x03)));
  429. }
  430. /* Select EXTI4->EXTI7 bit */
  431. else if (GPIO_PinSource < AFIO_ESSR2_BITS_FIELDS) {
  432. AFIO->AFIO_ESSR2 &= ~temp;
  433. AFIO->AFIO_ESSR2 |= (((uint32_t)GPIO_PortSource) << (AFIO_ESSR_PIN_FIELDS * (GPIO_PinSource & (uint8_t)0x03)));
  434. }
  435. /* Select EXTI8->EXTI11 bit */
  436. else if (GPIO_PinSource < AFIO_ESSR3_BITS_FIELDS) {
  437. AFIO->AFIO_ESSR3 &= ~temp;
  438. AFIO->AFIO_ESSR3 |= (((uint32_t)GPIO_PortSource) << (AFIO_ESSR_PIN_FIELDS * (GPIO_PinSource & (uint8_t)0x03)));
  439. }
  440. /* Select EXTI12->EXTI15 bit */
  441. else {
  442. AFIO->AFIO_ESSR4 &= ~temp;
  443. AFIO->AFIO_ESSR4 |= (((uint32_t)GPIO_PortSource) << (AFIO_ESSR_PIN_FIELDS * (GPIO_PinSource & (uint8_t)0x03)));
  444. }
  445. }
  446. /**
  447. * @brief Select the Ethernet media interface.
  448. * @note This function applies only to GD32 Connectivity line devices.
  449. * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
  450. * This parameter can be one of the following values:
  451. * @arg GPIO_ETH_MEDIA_INTERFACE_MII: MII mode
  452. * @arg GPIO_ETH_MEDIA_INTERFACE_RMII: RMII mode
  453. * @retval None
  454. */
  455. void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
  456. {
  457. uint32_t temp = 0;
  458. temp = AFIO->AFIO_PCFR1;
  459. /* Clear MII_RMII_SEL bit */
  460. temp &= ~((uint32_t)AFIO_PCFR1_MII_RMII);
  461. /* Configure MII_RMII bit according to GPIO_ETH_MediaInterface value */
  462. temp |= GPIO_ETH_MediaInterface;
  463. /* Store the new value */
  464. AFIO->AFIO_PCFR1 = temp;
  465. }
  466. /**
  467. * @}
  468. */
  469. /**
  470. * @}
  471. */
  472. /**
  473. * @}
  474. */