gd32f10x_iwdg.c 3.0 KB

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  1. /**
  2. ******************************************************************************
  3. * @brief IWDG functions of the firmware library.
  4. ******************************************************************************
  5. */
  6. /* Includes ------------------------------------------------------------------*/
  7. #include "gd32f10x_iwdg.h"
  8. /** @addtogroup GD32F10x_Firmware
  9. * @{
  10. */
  11. /** @defgroup IWDG
  12. * @brief IWDG driver modules
  13. * @{
  14. */
  15. /** @defgroup IWDG_Private_Variables
  16. * @{
  17. */
  18. /* CTLR register bit mask */
  19. #define CTLR_KEY_RELOAD ((uint16_t)0xAAAA)
  20. #define CTLR_KEY_ENABLE ((uint16_t)0xCCCC)
  21. /**
  22. * @}
  23. */
  24. /** @defgroup IWDG_Private_Functions
  25. * @{
  26. */
  27. /**
  28. * @brief Enable or disable the IWDG_PSR, IWDG_RLDR and IWDG_WND write protection.
  29. * @param IWDG_WriteAccess: value to enable or disable the write access to registers.
  30. * This parameter can be one of the following values:
  31. * @arg IWDG_WRITEACCESS_ENABLE: Enable write access to IWDG_PSR, IWDG_RLDR and IWDG_WND registers
  32. * @arg IWDG_WRITEACCESS_DISABLE: Disable write access to IWDG_PSR, IWDG_RLDR and IWDG_WND registers
  33. * @retval None
  34. */
  35. void IWDG_Write_Enable(uint16_t IWDG_WriteAccess)
  36. {
  37. IWDG->CTLR = IWDG_WriteAccess;
  38. }
  39. /**
  40. * @brief Set IWDG prescaler value.
  41. * @param PrescalerValue: IWDG Prescaler value.
  42. * This parameter can be one of the following values:
  43. * @arg IWDG_PRESCALER_4: IWDG prescaler set to 4
  44. * @arg IWDG_PRESCALER_8: IWDG prescaler set to 8
  45. * @arg IWDG_PRESCALER_16: IWDG prescaler set to 16
  46. * @arg IWDG_PRESCALER_32: IWDG prescaler set to 32
  47. * @arg IWDG_PRESCALER_64: IWDG prescaler set to 64
  48. * @arg IWDG_PRESCALER_128: IWDG prescaler set to 128
  49. * @arg IWDG_PRESCALER_256: IWDG prescaler set to 256
  50. * @retval None
  51. */
  52. void IWDG_SetPrescaler(uint8_t PrescalerValue)
  53. {
  54. IWDG->PSR = PrescalerValue;
  55. }
  56. /**
  57. * @brief Set independent watchdog counter reload value.
  58. * @param ReloadValue: IWDG Reload value.
  59. * This parameter must be between 0 and 0x0FFF.
  60. * @retval None
  61. */
  62. void IWDG_SetReloadValue(uint16_t ReloadValue)
  63. {
  64. IWDG->RLDR = ReloadValue;
  65. }
  66. /**
  67. * @brief Reload the counter.
  68. * @param None
  69. * @retval None
  70. */
  71. void IWDG_ReloadCounter(void)
  72. {
  73. IWDG->CTLR = CTLR_KEY_RELOAD;
  74. }
  75. /**
  76. * @brief Start the independent watchdog counter.
  77. * @param None
  78. * @retval None
  79. */
  80. void IWDG_Enable(void)
  81. {
  82. IWDG->CTLR = CTLR_KEY_ENABLE;
  83. }
  84. /**
  85. * @brief Check registers' bit state.
  86. * @param IWDG_FLAG: the flag to check.
  87. * This parameter can be one of the following values:
  88. * @arg IWDG_BIT_PUD: A write operation to IWDG_PSR register on going
  89. * @arg IWDG_BIT_RUD: A write operation to IWDG_RLDR register on going
  90. * @arg IWDG_BIT_WUD: A write operation to IWDG_WND register on going
  91. * @retval The new state of IWDG_FLAG (SET or RESET).
  92. */
  93. TypeState IWDG_GetBitState(uint16_t IWDG_FLAG)
  94. {
  95. if ((IWDG->STR & IWDG_FLAG) != (uint32_t)RESET) {
  96. return SET;
  97. } else {
  98. return RESET;
  99. }
  100. }
  101. /**
  102. * @}
  103. */
  104. /**
  105. * @}
  106. */
  107. /**
  108. * @}
  109. */
  110. /**
  111. * @}
  112. */