gd32f10x_timer.c 77 KB

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  1. /**
  2. ******************************************************************************
  3. * @brief TIMER functions of the firmware library.
  4. ******************************************************************************
  5. */
  6. /* Includes ------------------------------------------------------------------*/
  7. #include "gd32f10x_timer.h"
  8. #include "gd32f10x_rcc.h"
  9. /** @addtogroup GD32F10x_Firmware
  10. * @{
  11. */
  12. /** @defgroup TIMER
  13. * @brief TIMER driver modules
  14. * @{
  15. */
  16. /** @defgroup TIMER_Private_Defines
  17. * @{
  18. */
  19. /* TIMER registers bit mask */
  20. #define SMC_ETR_MASK ((uint16_t)0x00FF)
  21. #define CHCTLR_OFFSET ((uint16_t)0x0018)
  22. #define CHE_CHE_SET ((uint16_t)0x0001)
  23. #define CHE_CHNE_SET ((uint16_t)0x0004)
  24. /**
  25. * @}
  26. */
  27. /* Private function prototypes */
  28. static void TI1_Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPolarity, uint16_t TIMER_ICSelection,
  29. uint16_t TIMER_ICFilter);
  30. static void TI2_Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPolarity, uint16_t TIMER_ICSelection,
  31. uint16_t TIMER_ICFilter);
  32. static void TI3_Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPolarity, uint16_t TIMER_ICSelection,
  33. uint16_t TIMER_ICFilter);
  34. static void TI4_Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPolarity, uint16_t TIMER_ICSelection,
  35. uint16_t TIMER_ICFilter);
  36. /** @defgroup TIMER_Private_Functions
  37. * @{
  38. */
  39. /**
  40. * @brief Deinitialize the TIMER .
  41. * @param TIMERx: x ={ 0-13 } .
  42. * @retval None
  43. */
  44. void TIMER_DeInit(TIMER_TypeDef *TIMERx)
  45. {
  46. if (TIMERx == TIMER0) {
  47. RCC->APB2RCR |= RCC_APB2PERIPH_TIMER0RST;
  48. RCC->APB2RCR &= ~RCC_APB2PERIPH_TIMER0;
  49. } else if (TIMERx == TIMER1) {
  50. RCC->APB1RCR |= RCC_APB1PERIPH_TIMER1RST;
  51. RCC->APB1RCR &= ~RCC_APB1PERIPH_TIMER1;
  52. } else if (TIMERx == TIMER2) {
  53. RCC->APB1RCR |= RCC_APB1PERIPH_TIMER2RST;
  54. RCC->APB1RCR &= ~RCC_APB1PERIPH_TIMER2;
  55. } else if (TIMERx == TIMER3) {
  56. RCC->APB1RCR |= RCC_APB1PERIPH_TIMER3RST;
  57. RCC->APB1RCR &= ~RCC_APB1PERIPH_TIMER3;
  58. } else if (TIMERx == TIMER4) {
  59. RCC->APB1RCR |= RCC_APB1PERIPH_TIMER4RST;
  60. RCC->APB1RCR &= ~RCC_APB1PERIPH_TIMER4;
  61. } else if (TIMERx == TIMER5) {
  62. RCC->APB1RCR |= RCC_APB1PERIPH_TIMER5RST;
  63. RCC->APB1RCR &= ~RCC_APB1PERIPH_TIMER5;
  64. } else if (TIMERx == TIMER6) {
  65. RCC->APB1RCR |= RCC_APB1PERIPH_TIMER6RST;
  66. RCC->APB1RCR &= ~RCC_APB1PERIPH_TIMER6;
  67. } else if (TIMERx == TIMER7) {
  68. RCC->APB2RCR |= RCC_APB2PERIPH_TIMER7RST;
  69. RCC->APB2RCR &= ~RCC_APB2PERIPH_TIMER7;
  70. } else if (TIMERx == TIMER8) {
  71. RCC->APB2RCR |= RCC_APB2PERIPH_TIMER8RST;
  72. RCC->APB2RCR &= ~RCC_APB2PERIPH_TIMER8;
  73. } else if (TIMERx == TIMER9) {
  74. RCC->APB2RCR |= RCC_APB2PERIPH_TIMER9RST;
  75. RCC->APB2RCR &= ~RCC_APB2PERIPH_TIMER9;
  76. } else if (TIMERx == TIMER10) {
  77. RCC->APB2RCR |= RCC_APB2PERIPH_TIMER10RST;
  78. RCC->APB2RCR &= ~RCC_APB2PERIPH_TIMER10;
  79. } else if (TIMERx == TIMER11) {
  80. RCC->APB1RCR |= RCC_APB1PERIPH_TIMER11RST;
  81. RCC->APB1RCR &= ~RCC_APB1PERIPH_TIMER11;
  82. } else if (TIMERx == TIMER12) {
  83. RCC->APB1RCR |= RCC_APB1PERIPH_TIMER12RST;
  84. RCC->APB1RCR &= ~RCC_APB1PERIPH_TIMER12;
  85. } else if (TIMERx == TIMER13) {
  86. RCC->APB1RCR |= RCC_APB1PERIPH_TIMER13RST;
  87. RCC->APB1RCR &= ~RCC_APB1PERIPH_TIMER13;
  88. }
  89. }
  90. /**
  91. * @brief Initialize the specified Timer
  92. * @param TIMERx: x ={ 0 -13 } .
  93. * @param TIMER_Init: pointer to a TIMER_BaseInitPara structure.
  94. * @retval None
  95. */
  96. void TIMER_BaseInit(TIMER_TypeDef *TIMERx, TIMER_BaseInitPara *TIMER_Init)
  97. {
  98. uint16_t tmpctlr1 = 0;
  99. tmpctlr1 = TIMERx->CTLR1;
  100. if ((TIMERx == TIMER0) || (TIMERx == TIMER7) || (TIMERx == TIMER1) || (TIMERx == TIMER2) ||
  101. (TIMERx == TIMER3) || (TIMERx == TIMER4) || (TIMERx == TIMER8) || (TIMERx == TIMER9)
  102. || (TIMERx == TIMER10) || (TIMERx == TIMER11) || (TIMERx == TIMER12) || (TIMERx == TIMER13)) {
  103. /* Configure the Counter Mode */
  104. tmpctlr1 &= (uint16_t)(~((uint16_t)(TIMER_CTLR1_DIR | TIMER_CTLR1_CAM)));
  105. tmpctlr1 |= (uint32_t)TIMER_Init->TIMER_CounterMode;
  106. }
  107. if ((TIMERx != TIMER5) && (TIMERx != TIMER6)) {
  108. /* Configure the clock division */
  109. tmpctlr1 &= (uint16_t)(~((uint16_t)TIMER_CTLR1_CDIV));
  110. tmpctlr1 |= (uint32_t)TIMER_Init->TIMER_ClockDivision;
  111. }
  112. TIMERx->CTLR1 = tmpctlr1;
  113. /* Configure the Autoreload value */
  114. TIMERx->CARL = TIMER_Init->TIMER_Period ;
  115. /* Configure the Prescaler value */
  116. TIMERx->PSC = TIMER_Init->TIMER_Prescaler;
  117. if ((TIMERx == TIMER0) ||
  118. (TIMERx == TIMER7)) {
  119. /* Configure the Repetition Counter value */
  120. TIMERx->CREP = TIMER_Init->TIMER_RepetitionCounter;
  121. }
  122. /* Generate an update event */
  123. TIMERx->EVG = TIMER_PSC_RELOAD_NOW;
  124. }
  125. /**
  126. * @brief Fill each TIMER_BaseInitPara Struct member with a default value.
  127. * @param TIMER_Init: pointer to a TIMER_BaseInitPara structure.
  128. * @retval None
  129. */
  130. void TIMER_BaseStructInit(TIMER_BaseInitPara *TIMER_Init)
  131. {
  132. /* Fill the default value */
  133. TIMER_Init->TIMER_Period = 0xFFFFFFFF;
  134. TIMER_Init->TIMER_Prescaler = 0x0000;
  135. TIMER_Init->TIMER_ClockDivision = TIMER_CDIV_DIV1;
  136. TIMER_Init->TIMER_CounterMode = TIMER_COUNTER_UP;
  137. TIMER_Init->TIMER_RepetitionCounter = 0x0000;
  138. }
  139. /**
  140. * @brief Configure the TIMER Prescaler.
  141. * @param TIMERx: x ={ 0-13 }
  142. * @param Prescaler: Prescaler value
  143. * @param TIMER_PSCReloadMode: Prescaler Reload mode
  144. * This value will be :
  145. * @arg TIMER_PSC_RELOAD_UPDATE : The Prescaler is loaded at the next update event.
  146. * @arg TIMER_PSC_RELOAD_NOW : The Prescaler is loaded right now.
  147. * @retval None
  148. */
  149. void TIMER_PrescalerConfig(TIMER_TypeDef *TIMERx, uint16_t Prescaler, uint16_t TIMER_PSCReloadMode)
  150. {
  151. /* Set PSC */
  152. TIMERx->PSC = Prescaler;
  153. /* Choose reload mode */
  154. TIMERx->EVG = TIMER_PSCReloadMode;
  155. }
  156. /**
  157. * @brief Configure the TIMER Counter Mode
  158. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  159. * @param TIMER_CounterMode: the Counter Mode
  160. * This value will be :
  161. * @arg TIMER_COUNTER_UP : Up Counting Mode
  162. * @arg TIMER_COUNTER_DOWN : Down Counting Mode
  163. * @arg TIMER_COUNTER_CENTER_ALIGNED1: Center Aligned Counting Mode1
  164. * @arg TIMER_COUNTER_CENTER_ALIGNED2: Center Aligned Counting Mode2
  165. * @arg TIMER_COUNTER_CENTER_ALIGNED3: Center Aligned Counting Mode3
  166. * @retval None
  167. */
  168. void TIMER_CounterMode(TIMER_TypeDef *TIMERx, uint16_t TIMER_CounterMode)
  169. {
  170. uint16_t tmpctlr1 = 0;
  171. tmpctlr1 = TIMERx->CTLR1;
  172. /* Reset the CAM and DIR Bits */
  173. tmpctlr1 &= (uint16_t)(~((uint16_t)(TIMER_CTLR1_DIR | TIMER_CTLR1_CAM)));
  174. /* Configures the Counter Mode */
  175. tmpctlr1 |= TIMER_CounterMode;
  176. /* Update the TIMER CTLR1 */
  177. TIMERx->CTLR1 = tmpctlr1;
  178. }
  179. /**
  180. * @brief Configure the TIMER Counter Register value
  181. * @param TIMERx: x ={ 0-13 } .
  182. * @param Counter: the Counter register new value.
  183. * @retval None
  184. */
  185. void TIMER_SetCounter(TIMER_TypeDef *TIMERx, uint32_t Counter)
  186. {
  187. TIMERx->CNT = Counter;
  188. }
  189. /**
  190. * @brief Configure the Autoreload value
  191. * @param TIMERx: x ={ 0-13 } .
  192. * @param AutoReloadValue:
  193. * @retval None
  194. */
  195. void TIMER_SetAutoreload(TIMER_TypeDef *TIMERx, uint32_t AutoReloadValue)
  196. {
  197. TIMERx->CARL = AutoReloadValue;
  198. }
  199. /**
  200. * @brief Get the Counter value.
  201. * @param TIMERx: x ={ 0-13 } .
  202. * @retval Counter Register value.
  203. */
  204. uint32_t TIMER_GetCounter(TIMER_TypeDef *TIMERx)
  205. {
  206. return TIMERx->CNT;
  207. }
  208. /**
  209. * @brief Get the Prescaler value.
  210. * @param TIMERx: x ={ 0-13 } .
  211. * @retval Prescaler Register value
  212. */
  213. uint16_t TIMER_GetPrescaler(TIMER_TypeDef *TIMERx)
  214. {
  215. return TIMERx->PSC;
  216. }
  217. /**
  218. * @brief Configure the TIMERx Update event.
  219. * @param TIMERx: x ={ 0-13 } .
  220. * @param NewValue: new value of the TIMERx UPDIS bit
  221. * This value will be :
  222. * @arg ENABLE : Update Enbale
  223. * @arg DISABLE : Update Disable
  224. * @retval None
  225. */
  226. void TIMER_UpdateDisableConfig(TIMER_TypeDef *TIMERx, TypeState NewValue)
  227. {
  228. if (NewValue != DISABLE) {
  229. TIMERx->CTLR1 |= TIMER_CTLR1_UPDIS;
  230. } else {
  231. TIMERx->CTLR1 &= (uint16_t)~((uint16_t)TIMER_CTLR1_UPDIS);
  232. }
  233. }
  234. /**
  235. * @brief Configure the TIMER Update Request source.
  236. * @param TIMERx: x ={ 0-13 } .
  237. * @param TIMER_UpdateSrc: Configures the Update source.
  238. * This value will be :
  239. * @arg TIMER_UPDATE_SRC_GLOBAL : Update generate by setting of UPG bit or the counter
  240. * overflow/underflow , or the slave mode controller trigger.
  241. * @arg TIMER_UPDATE_SRC_REGULAR : Update generate only by counter overflow/underflow.
  242. * @retval None
  243. */
  244. void TIMER_UpdateRequestConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_UpdateSrc)
  245. {
  246. if (TIMER_UpdateSrc != TIMER_UPDATE_SRC_GLOBAL) {
  247. TIMERx->CTLR1 |= TIMER_CTLR1_UPS;
  248. } else {
  249. TIMERx->CTLR1 &= (uint16_t)~((uint16_t)TIMER_CTLR1_UPS);
  250. }
  251. }
  252. /**
  253. * @brief Configure the CARL Preload function
  254. * @param TIMERx: x ={ 0-13 } .
  255. * @param NewValue: the state of the Preload function on CARL.
  256. * This value will be :
  257. * @arg ENABLE
  258. * @arg DISABLE
  259. * @retval None
  260. */
  261. void TIMER_CARLPreloadConfig(TIMER_TypeDef *TIMERx, TypeState NewValue)
  262. {
  263. if (NewValue != DISABLE) {
  264. /* Set the CARL Preload Bit */
  265. TIMERx->CTLR1 |= TIMER_CTLR1_ARSE;
  266. } else {
  267. /* Reset the CARL Preload Bit */
  268. TIMERx->CTLR1 &= (uint16_t)~((uint16_t)TIMER_CTLR1_ARSE);
  269. }
  270. }
  271. /**
  272. * @brief Select the TIMER Single Pulse Mode.
  273. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  274. * @param TIMER_SPMode: specifies the SPM Mode to be used.
  275. * This value will be :
  276. * @arg TIMER_SP_MODE_SINGLE
  277. * @arg TIMER_SP_MODE_REPETITIVE
  278. * @retval None
  279. */
  280. void TIMER_SinglePulseMode(TIMER_TypeDef *TIMERx, uint16_t TIMER_SPMode)
  281. {
  282. /* Reset the SPM Bit */
  283. TIMERx->CTLR1 &= (uint16_t)~((uint16_t)TIMER_CTLR1_SPM);
  284. /* Set the SPM Bit */
  285. TIMERx->CTLR1 |= TIMER_SPMode;
  286. }
  287. /**
  288. * @brief Configure the TIMERx Clock Division value.
  289. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  290. * @param TIMER_CDIV: the clock division value.
  291. * This value will be :
  292. * @arg TIMER_CDIV_DIV1: TDTS = Tck_tim
  293. * @arg TIMER_CDIV_DIV2: TDTS = 2*Tck_tim
  294. * @arg TIMER_CDIV_DIV4: TDTS = 4*Tck_tim
  295. * @retval None
  296. */
  297. void TIMER_SetClockDivision(TIMER_TypeDef *TIMERx, uint16_t TIMER_CDIV)
  298. {
  299. /* Reset the CDIV value*/
  300. TIMERx->CTLR1 &= (uint16_t)~((uint16_t)TIMER_CTLR1_CDIV);
  301. /* Set the CDIV value */
  302. TIMERx->CTLR1 |= TIMER_CDIV;
  303. }
  304. /**
  305. * @brief ENABLE or DISABLE the TIMER.
  306. * @param TIMERx: x ={ 0-13 } .
  307. * @param NewValue: ENABLE or DISABLE.
  308. * @retval None
  309. */
  310. void TIMER_Enable(TIMER_TypeDef *TIMERx, TypeState NewValue)
  311. {
  312. if (NewValue != DISABLE) {
  313. /* Enable the TIMER */
  314. TIMERx->CTLR1 |= TIMER_CTLR1_CNTE;
  315. } else {
  316. /* Disable the TIMER */
  317. TIMERx->CTLR1 &= (uint16_t)(~((uint16_t)TIMER_CTLR1_CNTE));
  318. }
  319. }
  320. /**
  321. * @brief Configure the: Break feature, dead time, Lock level, ROS/IOS State and the OAE
  322. * @param TIMERx: x ={ 1 , 8 } .
  323. * @param TIMER_BKDTInit: pointer to a TIMER_BKDTInitPara structure that
  324. * contains the BKDT Register configuration information for the TIMER.
  325. * @retval None
  326. */
  327. void TIMER_BKDTConfig(TIMER_TypeDef *TIMERx, TIMER_BKDTInitPara *TIMER_BKDTInit)
  328. {
  329. TIMERx->BKDT = (uint32_t)TIMER_BKDTInit->TIMER_ROSState |
  330. TIMER_BKDTInit->TIMER_IOSState |
  331. TIMER_BKDTInit->TIMER_LOCKLevel |
  332. TIMER_BKDTInit->TIMER_DeadTime |
  333. TIMER_BKDTInit->TIMER_Break |
  334. TIMER_BKDTInit->TIMER_BreakPolarity |
  335. TIMER_BKDTInit->TIMER_OutAuto;
  336. }
  337. /**
  338. * @brief Fill TIMER_BKDTInit structure member with default value.
  339. * @param TIMER_BKDTInit : pointer to a TIMER_BKDTInitPara structure which will be initialized.
  340. * @retval None
  341. */
  342. void TIMER_BKDTStructInit(TIMER_BKDTInitPara *TIMER_BKDTInit)
  343. {
  344. TIMER_BKDTInit->TIMER_ROSState = TIMER_ROS_STATE_DISABLE;
  345. TIMER_BKDTInit->TIMER_IOSState = TIMER_IOS_STATE_DISABLE;
  346. TIMER_BKDTInit->TIMER_LOCKLevel = TIMER_LOCK_LEVEL_OFF;
  347. TIMER_BKDTInit->TIMER_DeadTime = 0x00;
  348. TIMER_BKDTInit->TIMER_Break = TIMER_BREAK_DISABLE;
  349. TIMER_BKDTInit->TIMER_BreakPolarity = TIMER_BREAK_POLARITY_LOW;
  350. TIMER_BKDTInit->TIMER_OutAuto = TIMER_OUTAUTO_DISABLE;
  351. }
  352. /**
  353. * @brief Enable or disable the TIMER ALL Outputs.
  354. * @param TIMERx: x ={ 1 , 8 } .
  355. * @param NewValue: ENABLE or DISABLE .
  356. * @retval None
  357. */
  358. void TIMER_CtrlPWMOutputs(TIMER_TypeDef *TIMERx, TypeState NewValue)
  359. {
  360. if (NewValue != DISABLE) {
  361. /* Enable the TIMER ALL Output */
  362. TIMERx->BKDT |= TIMER_BKDT_POE;
  363. } else {
  364. /* Disable the TIMER ALL Output */
  365. TIMERx->BKDT &= (uint16_t)(~((uint16_t)TIMER_BKDT_POE));
  366. }
  367. }
  368. /**
  369. * @brief Initialize the TIMERx Channel1 with TIMER_OCInitPara .
  370. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  371. * @param TIMER_OCInit : pointer to a TIMER_OCInitPara structure .
  372. * @retval None
  373. */
  374. void TIMER_OC1_Init(TIMER_TypeDef *TIMERx, TIMER_OCInitPara *TIMER_OCInit)
  375. {
  376. uint16_t tmpchctlrx = 0, tmpche = 0, tmpctlr2 = 0;
  377. /* Disable the Channel 1: Reset the CH1E Bit */
  378. TIMERx->CHE &= (uint16_t)(~(uint16_t)TIMER_CHE_CH1E);
  379. /* Get the TIMERx CHE register value */
  380. tmpche = TIMERx->CHE;
  381. /* Get the TIMERx CTLR2 register value */
  382. tmpctlr2 = TIMERx->CTLR2;
  383. /* Get the TIMERx CHCTLR1 register value */
  384. tmpchctlrx = TIMERx->CHCTLR1;
  385. /* Reset the Output Compare Mode Bits */
  386. tmpchctlrx &= (uint16_t)(~((uint16_t)TIMER_CHCTLR1_CH1OM));
  387. tmpchctlrx &= (uint16_t)(~((uint16_t)TIMER_CHCTLR1_CH1M));
  388. /* Select the Output Compare Mode */
  389. tmpchctlrx |= TIMER_OCInit->TIMER_OCMode;
  390. /* Reset the Output Polarity */
  391. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH1P));
  392. /* Set the Output Compare Polarity */
  393. tmpche |= TIMER_OCInit->TIMER_OCPolarity;
  394. /* Set the Output State */
  395. tmpche |= TIMER_OCInit->TIMER_OutputState;
  396. if ((TIMERx == TIMER0) || (TIMERx == TIMER7)) {
  397. /* Reset the Output complementary Polarity */
  398. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH1NP));
  399. /* Set the Output complementary Polarity */
  400. tmpche |= TIMER_OCInit->TIMER_OCNPolarity;
  401. /* Reset the Output complementary State */
  402. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH1NE));
  403. /* Set the Output complementary State */
  404. tmpche |= TIMER_OCInit->TIMER_OutputNState;
  405. /* Reset the Ouput Compare and Output Compare complementary IDLE State */
  406. tmpctlr2 &= (uint16_t)(~((uint16_t)TIMER_CTLR2_ISO1));
  407. tmpctlr2 &= (uint16_t)(~((uint16_t)TIMER_CTLR2_ISO1N));
  408. /* Set the Output Idle state */
  409. tmpctlr2 |= TIMER_OCInit->TIMER_OCIdleState;
  410. /* Set the Output complementary Idle state */
  411. tmpctlr2 |= TIMER_OCInit->TIMER_OCNIdleState;
  412. }
  413. /* Write to TIMERx CTLR2 */
  414. TIMERx->CTLR2 = tmpctlr2;
  415. /* Write to TIMERx CHCTLR1 */
  416. TIMERx->CHCTLR1 = tmpchctlrx;
  417. /* Set the Capture / Compare Register value */
  418. TIMERx->CHCC1 = TIMER_OCInit->TIMER_Pulse;
  419. /* Write to TIMERx CHE */
  420. TIMERx->CHE = tmpche;
  421. }
  422. /**
  423. * @brief Initialize the TIMERx Channel2 with TIMER_OCInitPara .
  424. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  425. * @param TIMER_OCInit : pointer to a TIMER_OCInitPara structure .
  426. * @retval None
  427. */
  428. void TIMER_OC2_Init(TIMER_TypeDef *TIMERx, TIMER_OCInitPara *TIMER_OCInit)
  429. {
  430. uint16_t tmpchctlrx = 0, tmpche = 0, tmpctlr2 = 0;
  431. /* Disable the Channel 2: Reset the CH2E Bit */
  432. TIMERx->CHE &= (uint16_t)(~((uint16_t)TIMER_CHE_CH2E));
  433. /* Get the TIMERx CHE register value */
  434. tmpche = TIMERx->CHE;
  435. /* Get the TIMERx CTLR2 register value */
  436. tmpctlr2 = TIMERx->CTLR2;
  437. /* Get the TIMERx CHCTLR1 register value */
  438. tmpchctlrx = TIMERx->CHCTLR1;
  439. /* Reset the Output Compare Mode Bits */
  440. tmpchctlrx &= (uint16_t)(~((uint16_t)TIMER_CHCTLR1_CH2OM));
  441. tmpchctlrx &= (uint16_t)(~((uint16_t)TIMER_CHCTLR1_CH2M));
  442. /* Select the Output Compare Mode */
  443. tmpchctlrx |= (uint16_t)(TIMER_OCInit->TIMER_OCMode << 8);
  444. /* Reset the Output Polarity */
  445. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH2P));
  446. /* Set the Output Compare Polarity */
  447. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OCPolarity << 4);
  448. /* Set the Output State */
  449. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OutputState << 4);
  450. if ((TIMERx == TIMER0) || (TIMERx == TIMER7)) {
  451. /* Reset the Output complementary Polarity */
  452. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH2NP));
  453. /* Set the Output complementary Polarity */
  454. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OCNPolarity << 4);
  455. /* Reset the Output complementary State */
  456. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH2NE));
  457. /* Set the Output complementary State */
  458. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OutputNState << 4);
  459. /* Reset the Ouput Compare and Output Compare complementary IDLE State */
  460. tmpctlr2 &= (uint16_t)(~((uint16_t)TIMER_CTLR2_ISO2));
  461. tmpctlr2 &= (uint16_t)(~((uint16_t)TIMER_CTLR2_ISO2N));
  462. /* Set the Output Idle state */
  463. tmpctlr2 |= (uint16_t)(TIMER_OCInit->TIMER_OCIdleState << 2);
  464. /* Set the Output complementary Idle state */
  465. tmpctlr2 |= (uint16_t)(TIMER_OCInit->TIMER_OCNIdleState << 2);
  466. }
  467. /* Write to TIMERx CTLR2 */
  468. TIMERx->CTLR2 = tmpctlr2;
  469. /* Write to TIMERx CHCTLR1 */
  470. TIMERx->CHCTLR1 = tmpchctlrx;
  471. /* Set the Capture / Compare Register value */
  472. TIMERx->CHCC2 = TIMER_OCInit->TIMER_Pulse;
  473. /* Write to TIMERx CHE */
  474. TIMERx->CHE = tmpche;
  475. }
  476. /**
  477. * @brief Initialize the TIMERx Channel3 with TIMER_OCInitPara .
  478. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8} .
  479. * @param TIMER_OCInit : pointer to a TIMER_OCInitPara structure .
  480. * @retval None
  481. */
  482. void TIMER_OC3_Init(TIMER_TypeDef *TIMERx, TIMER_OCInitPara *TIMER_OCInit)
  483. {
  484. uint16_t tmpchctlrx = 0, tmpche = 0, tmpctlr2 = 0;
  485. /* Disable the Channel 3: Reset the CH3E Bit */
  486. TIMERx->CHE &= (uint16_t)(~((uint16_t)TIMER_CHE_CH3E));
  487. /* Get the TIMERx CHE register value */
  488. tmpche = TIMERx->CHE;
  489. /* Get the TIMERx CTLR2 register value */
  490. tmpctlr2 = TIMERx->CTLR2;
  491. /* Get the TIMERx CHCTLR2 register value */
  492. tmpchctlrx = TIMERx->CHCTLR2;
  493. /* Reset the Output Compare Mode Bits */
  494. tmpchctlrx &= (uint16_t)(~((uint16_t)TIMER_CHCTLR2_CH3OM));
  495. tmpchctlrx &= (uint16_t)(~((uint16_t)TIMER_CHCTLR2_CH3M));
  496. /* Select the Output Compare Mode */
  497. tmpchctlrx |= TIMER_OCInit->TIMER_OCMode;
  498. /* Reset the Output Polarity */
  499. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH3P));
  500. /* Set the Output Compare Polarity */
  501. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OCPolarity << 8);
  502. /* Set the Output State */
  503. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OutputState << 8);
  504. if ((TIMERx == TIMER0) || (TIMERx == TIMER7)) {
  505. /* Reset the Output complementary Polarity */
  506. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH3NP));
  507. /* Set the Output complementary Polarity */
  508. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OCNPolarity << 8);
  509. /* Reset the Output complementary State */
  510. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH3NE));
  511. /* Set the Output complementary State */
  512. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OutputNState << 8);
  513. /* Reset the Ouput Compare and Output Compare complementary IDLE State */
  514. tmpctlr2 &= (uint16_t)(~((uint16_t)TIMER_CTLR2_ISO3));
  515. tmpctlr2 &= (uint16_t)(~((uint16_t)TIMER_CTLR2_ISO3N));
  516. /* Set the Output Idle state */
  517. tmpctlr2 |= (uint16_t)(TIMER_OCInit->TIMER_OCIdleState << 4);
  518. /* Set the Output complementary Idle state */
  519. tmpctlr2 |= (uint16_t)(TIMER_OCInit->TIMER_OCNIdleState << 4);
  520. }
  521. /* Write to TIMERx CTLR2 */
  522. TIMERx->CTLR2 = tmpctlr2;
  523. /* Write to TIMERx CHCTLR2 */
  524. TIMERx->CHCTLR2 = tmpchctlrx;
  525. /* Set the Capture / Compare Register value */
  526. TIMERx->CHCC3 = TIMER_OCInit->TIMER_Pulse;
  527. /* Write to TIMERx CHE */
  528. TIMERx->CHE = tmpche;
  529. }
  530. /**
  531. * @brief Initialize the TIMERx Channel4 with TIMER_OCInitPara .
  532. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8} .
  533. * @param TIMER_OCInit : pointer to a TIMER_OCInitPara structure .
  534. * @retval None
  535. */
  536. void TIMER_OC4_Init(TIMER_TypeDef *TIMERx, TIMER_OCInitPara *TIMER_OCInit)
  537. {
  538. uint16_t tmpchctlrx = 0, tmpche = 0, tmpctlr2 = 0;
  539. /* Disable the Channel 4: Reset the CH4E Bit */
  540. TIMERx->CHE &= (uint16_t)(~((uint16_t)TIMER_CHE_CH4E));
  541. /* Get the TIMERx CHE register value */
  542. tmpche = TIMERx->CHE;
  543. /* Get the TIMERx CTLR2 register value */
  544. tmpctlr2 = TIMERx->CTLR2;
  545. /* Get the TIMERx CHCTLR2 register value */
  546. tmpchctlrx = TIMERx->CHCTLR2;
  547. /* Reset the Output Compare Mode Bits */
  548. tmpchctlrx &= (uint16_t)(~((uint16_t)TIMER_CHCTLR2_CH4OM));
  549. tmpchctlrx &= (uint16_t)(~((uint16_t)TIMER_CHCTLR2_CH4M));
  550. /* Select the Output Compare Mode */
  551. tmpchctlrx |= (uint16_t)(TIMER_OCInit->TIMER_OCMode << 8);
  552. /* Reset the Output Polarity */
  553. tmpche &= (uint16_t)(~((uint16_t)TIMER_CHE_CH4P));
  554. /* Set the Output Compare Polarity */
  555. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OCPolarity << 12);
  556. /* Set the Output State */
  557. tmpche |= (uint16_t)(TIMER_OCInit->TIMER_OutputState << 12);
  558. if ((TIMERx == TIMER0) || (TIMERx == TIMER7)) {
  559. /* Reset the Ouput Compare IDLE State */
  560. tmpctlr2 &= (uint16_t)(~((uint16_t)TIMER_CTLR2_ISO4));
  561. /* Set the Output Idle state */
  562. tmpctlr2 |= (uint16_t)(TIMER_OCInit->TIMER_OCIdleState << 6);
  563. }
  564. /* Write to TIMERx CTLR2 */
  565. TIMERx->CTLR2 = tmpctlr2;
  566. /* Write to TIMERx CHCTLR2 */
  567. TIMERx->CHCTLR2 = tmpchctlrx;
  568. /* Set the Capture Compare Register value */
  569. TIMERx->CHCC4 = TIMER_OCInit->TIMER_Pulse;
  570. /* Write to TIMERx CHE */
  571. TIMERx->CHE = tmpche;
  572. }
  573. /**
  574. * @brief Fill TIMER_OCInitPara member with default value.
  575. * @param TIMER_OCInit: pointer to a TIMER_OCInitPara structure.
  576. * @retval None
  577. */
  578. void TIMER_OCStructInit(TIMER_OCInitPara *TIMER_OCInit)
  579. {
  580. TIMER_OCInit->TIMER_OCMode = TIMER_OC_MODE_TIMING;
  581. TIMER_OCInit->TIMER_OutputState = TIMER_OUTPUT_STATE_DISABLE;
  582. TIMER_OCInit->TIMER_OutputNState = TIMER_OUTPUTN_STATE_DISABLE;
  583. TIMER_OCInit->TIMER_Pulse = 0x0000000;
  584. TIMER_OCInit->TIMER_OCPolarity = TIMER_OC_POLARITY_HIGH;
  585. TIMER_OCInit->TIMER_OCNPolarity = TIMER_OC_POLARITY_HIGH;
  586. TIMER_OCInit->TIMER_OCIdleState = TIMER_OC_IDLE_STATE_RESET;
  587. TIMER_OCInit->TIMER_OCNIdleState = TIMER_OCN_IDLE_STATE_RESET;
  588. }
  589. /**
  590. * @brief Configure the TIMER Output Compare Mode.
  591. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  592. * @param TIMER_Ch:
  593. * This value will be :
  594. * @arg TIMER_CH_1
  595. * @arg TIMER_CH_2
  596. * @arg TIMER_CH_3
  597. * @arg TIMER_CH_4
  598. * @param TIMER_OCMode: the TIMER Output Compare Mode.
  599. * This value will be :
  600. * @arg TIMER_OC_MODE_TIMING
  601. * @arg TIMER_OC_MODE_ACTIVE
  602. * @arg TIMER_OC_MODE_TOGGLE
  603. * @arg TIMER_OC_MODE_PWM1
  604. * @arg TIMER_OC_MODE_PWM2
  605. * @arg TIMER_FORCED_HIGH
  606. * @arg TIMER_FORCED_LOW
  607. * @retval None
  608. */
  609. void TIMER_OCxModeConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_Ch, uint16_t TIMER_OCMode)
  610. {
  611. uint32_t tmp = 0;
  612. uint16_t tmp1 = 0;
  613. tmp = (uint32_t) TIMERx;
  614. tmp += CHCTLR_OFFSET;
  615. tmp1 = CHE_CHE_SET << (uint16_t)TIMER_Ch;
  616. /* Disable the Channel: Reset the CHxE Bit */
  617. TIMERx->CHE &= (uint16_t) ~tmp1;
  618. if ((TIMER_Ch == TIMER_CH_1) || (TIMER_Ch == TIMER_CH_3)) {
  619. tmp += (TIMER_Ch >> 1);
  620. /* Reset the CHxOM bits in the CHCTLRx register */
  621. *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIMER_CHCTLR1_CH1OM);
  622. /* Configure the CHxOM bits in the CHCTLRx register */
  623. *(__IO uint32_t *) tmp |= TIMER_OCMode;
  624. } else {
  625. tmp += (uint16_t)(TIMER_Ch - (uint16_t)4) >> (uint16_t)1;
  626. /* Reset the CHxOM bits in the CHCTLRx register */
  627. *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIMER_CHCTLR1_CH2OM);
  628. /* Configure the CHxOM bits in the CHCTLRx register */
  629. *(__IO uint32_t *) tmp |= (uint16_t)(TIMER_OCMode << 8);
  630. }
  631. }
  632. /**
  633. * @brief Configure the TIMERx Capture or Compare Register value
  634. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  635. * @param CompValue1: the Capture / Compare1 register new value
  636. * @retval None
  637. */
  638. void TIMER_Compare1Config(TIMER_TypeDef *TIMERx, uint32_t CompValue1)
  639. {
  640. TIMERx->CHCC1 = CompValue1 ;
  641. }
  642. /**
  643. * @brief Configure the TIMERx Capture or Compare Register value
  644. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  645. * @param CompValue2: the Capture / Compare1 register new value
  646. * @retval None
  647. */
  648. void TIMER_Compare2Config(TIMER_TypeDef *TIMERx, uint32_t CompValue2)
  649. {
  650. TIMERx->CHCC2 = CompValue2;
  651. }
  652. /**
  653. * @brief Configure the TIMERx Capture or Compare Register value
  654. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  655. * @param CompValue3: the Capture / Compare1 register new value
  656. * @retval None
  657. */
  658. void TIMER_Compare3Config(TIMER_TypeDef *TIMERx, uint32_t CompValue3)
  659. {
  660. TIMERx->CHCC3 = CompValue3;
  661. }
  662. /**
  663. * @brief Configure the TIMERx Capture or Compare Register value
  664. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  665. * @param CompValue4: the Capture / Compare1 register new value
  666. * @retval None
  667. */
  668. void TIMER_Compare4Config(TIMER_TypeDef *TIMERx, uint32_t CompValue4)
  669. {
  670. TIMERx->CHCC4 = CompValue4;
  671. }
  672. /**
  673. * @brief Force the TIMERx output level to high or low
  674. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  675. * @param TIMER_Forced: forced the output level.
  676. * This value will be :
  677. * @arg TIMER_FORCED_HIGH: Force output high level
  678. * @arg TIMER_FORCED_LOW : Force output low level
  679. * @retval None
  680. */
  681. void TIMER_Forced_OC1(TIMER_TypeDef *TIMERx, uint16_t TIMER_Forced)
  682. {
  683. uint16_t tmpchctlr1 = 0;
  684. tmpchctlr1 = TIMERx->CHCTLR1;
  685. /* Reset the CH1OM Bits */
  686. tmpchctlr1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH1OM);
  687. /* Configure The Forced output Mode */
  688. tmpchctlr1 |= TIMER_Forced ;
  689. TIMERx->CHCTLR1 = tmpchctlr1;
  690. }
  691. /**
  692. * @brief Force the TIMERx output level to high or low
  693. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  694. * @param TIMER_Forced: forced the output level.
  695. * This value will be :
  696. * @arg TIMER_FORCED_HIGH: Force output high level
  697. * @arg TIMER_FORCED_LOW : Force output low level
  698. * @retval None
  699. */
  700. void TIMER_Forced_OC2(TIMER_TypeDef *TIMERx, uint16_t TIMER_Forced)
  701. {
  702. uint16_t tmpchctlr1 = 0;
  703. tmpchctlr1 = TIMERx->CHCTLR1;
  704. /* Reset the CH2OM Bits */
  705. tmpchctlr1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH2OM);
  706. /* Configure The Forced output Mode */
  707. tmpchctlr1 |= (uint16_t)(TIMER_Forced << 8);
  708. TIMERx->CHCTLR1 = tmpchctlr1;
  709. }
  710. /**
  711. * @brief Force the TIMERx output level to high or low
  712. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  713. * @param TIMER_Forced: forced the output level.
  714. * This value will be :
  715. * @arg TIMER_FORCED_HIGH: Force output high level
  716. * @arg TIMER_FORCED_LOW : Force output low level
  717. * @retval None
  718. */
  719. void TIMER_Forced_OC3(TIMER_TypeDef *TIMERx, uint16_t TIMER_Forced)
  720. {
  721. uint16_t tmpchctlr2 = 0;
  722. tmpchctlr2 = TIMERx->CHCTLR2;
  723. /* Reset the CH3OM Bits */
  724. tmpchctlr2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH3OM);
  725. /* Configure The Forced output Mode */
  726. tmpchctlr2 |= TIMER_Forced ;
  727. TIMERx->CHCTLR2 = tmpchctlr2;
  728. }
  729. /**
  730. * @brief Force the TIMERx output level to high or low
  731. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  732. * @param TIMER_Forced: forced the output level.
  733. * This value will be :
  734. * @arg TIMER_FORCED_HIGH: Force output high level
  735. * @arg TIMER_FORCED_LOW : Force output low level
  736. * @retval None
  737. */
  738. void TIMER_Forced_OC4(TIMER_TypeDef *TIMERx, uint16_t TIMER_Forced)
  739. {
  740. uint16_t tmpchctlr2 = 0;
  741. tmpchctlr2 = TIMERx->CHCTLR2;
  742. /* Reset the CH4OM Bits */
  743. tmpchctlr2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH4OM);
  744. /* Configure The Forced output Mode */
  745. tmpchctlr2 |= (uint16_t)(TIMER_Forced << 8);
  746. TIMERx->CHCTLR2 = tmpchctlr2;
  747. }
  748. /**
  749. * @brief Configure the TIMER Capture or Compare Preload Control bit
  750. * @param TIMERx: x ={ 1 , 8 } .
  751. * @param NewValue: ENABLE or DISABLE.
  752. * @retval None
  753. */
  754. void TIMER_CC_PreloadControl(TIMER_TypeDef *TIMERx, TypeState NewValue)
  755. {
  756. if (NewValue != DISABLE) {
  757. /* Set the CCSE Bit */
  758. TIMERx->CTLR2 |= TIMER_CTLR2_CCSE;
  759. } else {
  760. /* Reset the CCSE Bit */
  761. TIMERx->CTLR2 &= (uint16_t)~((uint16_t)TIMER_CTLR2_CCSE);
  762. }
  763. }
  764. /**
  765. * @brief Configure the TIMER channel 1 Capture or Compare Preload register
  766. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  767. * @param TIMER_OCPreload : state of the TIMERx Preload register
  768. * This value will be :
  769. * @arg TIMER_OC_PRELOAD_ENABLE
  770. * @arg TIMER_OC_PRELOAD_DISABLE
  771. * @retval None
  772. */
  773. void TIMER_OC1_Preload(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCPreload)
  774. {
  775. uint16_t tmpchctlr1 = 0;
  776. tmpchctlr1 = TIMERx->CHCTLR1;
  777. /* Reset the CH1OSE Bit */
  778. tmpchctlr1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH1OSE);
  779. /* Enable or Disable the Output Compare Preload */
  780. tmpchctlr1 |= TIMER_OCPreload;
  781. TIMERx->CHCTLR1 = tmpchctlr1;
  782. }
  783. /**
  784. * @brief Configure the TIMER channel 2 Capture or Compare Preload register
  785. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  786. * @param TIMER_OCPreload : state of the TIMERx Preload register
  787. * This value will be :
  788. * @arg TIMER_OC_PRELOAD_ENABLE
  789. * @arg TIMER_OC_PRELOAD_DISABLE
  790. * @retval None
  791. */
  792. void TIMER_OC2_Preload(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCPreload)
  793. {
  794. uint16_t tmpchctlr1 = 0;
  795. tmpchctlr1 = TIMERx->CHCTLR1;
  796. /* Reset the CH2OSE Bit */
  797. tmpchctlr1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH2OSE);
  798. /* Enable or Disable the Output Compare Preload */
  799. tmpchctlr1 |= (uint16_t)(TIMER_OCPreload << 8);
  800. TIMERx->CHCTLR1 = tmpchctlr1;
  801. }
  802. /**
  803. * @brief Configure the TIMER channel 3 Capture or Compare Preload register
  804. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  805. * @param TIMER_OCPreload : state of the TIMERx Preload register
  806. * This value will be :
  807. * @arg TIMER_OC_PRELOAD_ENABLE
  808. * @arg TIMER_OC_PRELOAD_DISABLE
  809. * @retval None
  810. */
  811. void TIMER_OC3_Preload(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCPreload)
  812. {
  813. uint16_t tmpchctlr2 = 0;
  814. tmpchctlr2 = TIMERx->CHCTLR2;
  815. /* Reset the CH3OSE Bit */
  816. tmpchctlr2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH3OSE);
  817. /* Enable or Disable the Output Compare Preload */
  818. tmpchctlr2 |= TIMER_OCPreload;
  819. TIMERx->CHCTLR2 = tmpchctlr2;
  820. }
  821. /**
  822. * @brief Configure the TIMER channel 4 Capture or Compare Preload register
  823. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  824. * @param TIMER_OCPreload : state of the TIMERx Preload register
  825. * This value will be :
  826. * @arg TIMER_OC_PRELOAD_ENABLE
  827. * @arg TIMER_OC_PRELOAD_DISABLE
  828. * @retval None
  829. */
  830. void TIMER_OC4_Preload(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCPreload)
  831. {
  832. uint16_t tmpchctlr2 = 0;
  833. tmpchctlr2 = TIMERx->CHCTLR2;
  834. /* Reset the CH4OSE Bit */
  835. tmpchctlr2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH4OSE);
  836. /* Enable or Disable the Output Compare Preload */
  837. tmpchctlr2 |= (uint16_t)(TIMER_OCPreload << 8);
  838. TIMERx->CHCTLR2 = tmpchctlr2;
  839. }
  840. /**
  841. * @brief Configure the TIMER channel 1 Compare output Fast mode
  842. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  843. * @param TIMER_OCFast: state of the Compare Output Fast Enable Bit.
  844. * This value will be :
  845. * @arg TIMER_OC_FAST_ENABLE : output fast enable
  846. * @arg TIMER_OC_FAST_DISABLE: output fast disable
  847. * @retval None
  848. */
  849. void TIMER_OC1_FastConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCFast)
  850. {
  851. uint16_t tmpchctlr1 = 0;
  852. tmpchctlr1 = TIMERx->CHCTLR1;
  853. /* Reset the CH1OFE Bit */
  854. tmpchctlr1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH1OFE);
  855. /* Enable or Disable the Output Compare Fast Bit */
  856. tmpchctlr1 |= TIMER_OCFast;
  857. TIMERx->CHCTLR1 = tmpchctlr1;
  858. }
  859. /**
  860. * @brief Configure the TIMER channel 2 Compare output Fast mode
  861. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  862. * @param TIMER_OCFast: state of the Compare Output Fast Enable Bit.
  863. * This value will be :
  864. * @arg TIMER_OC_FAST_ENABLE : output fast enable
  865. * @arg TIMER_OC_FAST_DISABLE: output fast disable
  866. * @retval None
  867. */
  868. void TIMER_OC2_FastConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCFast)
  869. {
  870. uint16_t tmpchctlr1 = 0;
  871. tmpchctlr1 = TIMERx->CHCTLR1;
  872. /* Reset the CH2OFE Bit */
  873. tmpchctlr1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH2OFE);
  874. /* Enable or Disable the Output Compare Fast Bit */
  875. tmpchctlr1 |= (uint16_t)(TIMER_OCFast << 8);
  876. TIMERx->CHCTLR1 = tmpchctlr1;
  877. }
  878. /**
  879. * @brief Configure the TIMER channel 3 Compare output Fast mode
  880. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  881. * @param TIMER_OCFast: state of the Compare Output Fast Enable Bit.
  882. * This value will be :
  883. * @arg TIMER_OC_FAST_ENABLE : output fast enable
  884. * @arg TIMER_OC_FAST_DISABLE: output fast disable
  885. * @retval None
  886. */
  887. void TIMER_OC3_FastConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCFast)
  888. {
  889. uint16_t tmpchctlr2 = 0;
  890. tmpchctlr2 = TIMERx->CHCTLR2;
  891. /* Reset the CH3OFE Bit */
  892. tmpchctlr2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH3OFE);
  893. /* Enable or Disable the Output Compare Fast Bit */
  894. tmpchctlr2 |= TIMER_OCFast;
  895. TIMERx->CHCTLR2 = tmpchctlr2;
  896. }
  897. /**
  898. * @brief Configure the TIMER channel 4 Compare output Fast mode
  899. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  900. * @param TIMER_OCFast: state of the Compare Output Fast Enable Bit.
  901. * This value will be :
  902. * @arg TIMER_OC_FAST_ENABLE : output fast enable
  903. * @arg TIMER_OC_FAST_DISABLE: output fast disable
  904. * @retval None
  905. */
  906. void TIMER_OC4_FastConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCFast)
  907. {
  908. uint16_t tmpchctlr2 = 0;
  909. tmpchctlr2 = TIMERx->CHCTLR2;
  910. /* Reset the CH4OFE Bit */
  911. tmpchctlr2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH4OFE);
  912. /* Enable or Disable the Output Compare Fast Bit */
  913. tmpchctlr2 |= (uint16_t)(TIMER_OCFast << 8);
  914. TIMERx->CHCTLR2 = tmpchctlr2;
  915. }
  916. /**
  917. * @brief If Clear the OCREF signal on an external event
  918. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  919. * @param TIMER_OCClear: new state of the Output Compare Clear Enable Bit.
  920. * This value will be :
  921. * @arg TIMER_OC_CLEAR_ENABLE : Output clear enable
  922. * @arg TIMER_OC_CLEAR_DISABLE: Output clear disable
  923. * @retval None
  924. */
  925. void TIMER_OC1_RefClear(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCClear)
  926. {
  927. uint16_t tmpchctlr1 = 0;
  928. tmpchctlr1 = TIMERx->CHCTLR1;
  929. /* Reset the CH1OCE Bit */
  930. tmpchctlr1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH1OCE);
  931. /* Enable or Disable the Output Compare Clear Bit */
  932. tmpchctlr1 |= TIMER_OCClear;
  933. TIMERx->CHCTLR1 = tmpchctlr1;
  934. }
  935. /**
  936. * @brief If Clear the OCREF signal on an external event
  937. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  938. * @param TIMER_OCClear: new state the Output Compare Clear Enable Bit.
  939. * This value will be :
  940. * @arg TIMER_OC_CLEAR_ENABLE : Output clear enable
  941. * @arg TIMER_OC_CLEAR_DISABLE: Output clear disable
  942. * @retval None
  943. */
  944. void TIMER_OC2_RefClear(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCClear)
  945. {
  946. uint16_t tmpchctlr1 = 0;
  947. tmpchctlr1 = TIMERx->CHCTLR1;
  948. /* Reset the OC2CE Bit */
  949. tmpchctlr1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH2OCE);
  950. /* Enable or Disable the Output Compare Clear Bit */
  951. tmpchctlr1 |= (uint16_t)(TIMER_OCClear << 8);
  952. TIMERx->CHCTLR1 = tmpchctlr1;
  953. }
  954. /**
  955. * @brief If Clear the OCREF signal on an external event
  956. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  957. * @param TIMER_OCClear: new state the Output Compare Clear Enable Bit.
  958. * This value will be :
  959. * @arg TIMER_OC_CLEAR_ENABLE : Output clear enable
  960. * @arg TIMER_OC_CLEAR_DISABLE: Output clear disable
  961. * @retval None
  962. */
  963. void TIMER_OC3_RefClear(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCClear)
  964. {
  965. uint16_t tmpchctlr2 = 0;
  966. tmpchctlr2 = TIMERx->CHCTLR2;
  967. /* Reset the CH3OCE Bit */
  968. tmpchctlr2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH3OCE);
  969. /* Enable or Disable the Output Compare Clear Bit */
  970. tmpchctlr2 |= TIMER_OCClear;
  971. TIMERx->CHCTLR2 = tmpchctlr2;
  972. }
  973. /**
  974. * @brief If Clear the OCREF signal on an external event
  975. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  976. * @param TIMER_OCClear: new state the Output Compare Clear Enable Bit.
  977. * This value will be :
  978. * @arg TIMER_OC_CLEAR_ENABLE : Output clear enable
  979. * @arg TIMER_OC_CLEAR_DISABLE: Output clear disable
  980. * @retval None
  981. */
  982. void TIMER_OC4_RefClear(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCClear)
  983. {
  984. uint16_t tmpchctlr2 = 0;
  985. tmpchctlr2 = TIMERx->CHCTLR2;
  986. /* Reset the OC4CE Bit */
  987. tmpchctlr2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH4OCE);
  988. /* Enable or Disable the Output Compare Clear Bit */
  989. tmpchctlr2 |= (uint16_t)(TIMER_OCClear << 8);
  990. TIMERx->CHCTLR2 = tmpchctlr2;
  991. }
  992. /**
  993. * @brief Configure the TIMERx channel 1 polarity.
  994. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  995. * @param TIMER_OCPolarity :
  996. * This value will be :
  997. * @arg TIMER_OC_POLARITY_HIGH: active high
  998. * @arg TIMER_OC_POLARITY_LOW : active low
  999. * @retval None
  1000. */
  1001. void TIMER_OC1_Polarity(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCPolarity)
  1002. {
  1003. uint16_t tmpche = 0;
  1004. tmpche = TIMERx->CHE;
  1005. /* Configures the CH1P Bit */
  1006. tmpche &= (uint16_t)~((uint16_t)TIMER_CHE_CH1P);
  1007. tmpche |= TIMER_OCPolarity;
  1008. TIMERx->CHE = tmpche;
  1009. }
  1010. /**
  1011. * @brief Configure the TIMERx Channel 1 complementary polarity.
  1012. * @param TIMERx: x ={ 1 , 8 } .
  1013. * @param TIMER_OCNPolarity:
  1014. * This value will be :
  1015. * @arg TIMER_OCN_POLARITY_HIGH: active high
  1016. * @arg TIMER_OCN_POLARITY_LOW: active low
  1017. * @retval None
  1018. */
  1019. void TIMER_OC1N_Polarity(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCNPolarity)
  1020. {
  1021. uint16_t tmpche = 0;
  1022. tmpche = TIMERx->CHE;
  1023. /* Configures the CH1NP Bit */
  1024. tmpche &= (uint16_t)~((uint16_t)TIMER_CHE_CH1NP);
  1025. tmpche |= TIMER_OCNPolarity;
  1026. TIMERx->CHE = tmpche;
  1027. }
  1028. /**
  1029. * @brief Configure the TIMERx channel 2 polarity.
  1030. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  1031. * @param TIMER_OCPolarity :
  1032. * This value will be :
  1033. * @arg TIMER_OC_POLARITY_HIGH: active high
  1034. * @arg TIMER_OC_POLARITY_LOW : active low
  1035. * @retval None
  1036. */
  1037. void TIMER_OC2_Polarity(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCPolarity)
  1038. {
  1039. uint16_t tmpche = 0;
  1040. tmpche = TIMERx->CHE;
  1041. /* Configure the CH2P Bit */
  1042. tmpche &= (uint16_t)~((uint16_t)TIMER_CHE_CH2P);
  1043. tmpche |= (uint16_t)(TIMER_OCPolarity << 4);
  1044. TIMERx->CHE = tmpche;
  1045. }
  1046. /**
  1047. * @brief Configure the TIMERx Channel 2 complementary polarity.
  1048. * @param TIMERx: x ={ 1 , 8 } .
  1049. * @param TIMER_OCNPolarity:
  1050. * This value will be :
  1051. * @arg TIMER_OCN_POLARITY_HIGH: active high
  1052. * @arg TIMER_OCN_POLARITY_LOW: active low
  1053. * @retval None
  1054. */
  1055. void TIMER_OC2N_Polarity(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCNPolarity)
  1056. {
  1057. uint16_t tmpche = 0;
  1058. tmpche = TIMERx->CHE;
  1059. /* Configure the CH2NP Bit */
  1060. tmpche &= (uint16_t)~((uint16_t)TIMER_CHE_CH2NP);
  1061. tmpche |= (uint16_t)(TIMER_OCNPolarity << 4);
  1062. TIMERx->CHE = tmpche;
  1063. }
  1064. /**
  1065. * @brief Configure the TIMERx channel 3 polarity.
  1066. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1067. * @param TIMER_OCPolarity :
  1068. * This value will be :
  1069. * @arg TIMER_OC_POLARITY_HIGH: active high
  1070. * @arg TIMER_OC_POLARITY_LOW : active low
  1071. * @retval None
  1072. */
  1073. void TIMER_OC3_Polarity(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCPolarity)
  1074. {
  1075. uint16_t tmpche = 0;
  1076. tmpche = TIMERx->CHE;
  1077. /* Configure the CH3P Bit */
  1078. tmpche &= (uint16_t)~((uint16_t)TIMER_CHE_CH3P);
  1079. tmpche |= (uint16_t)(TIMER_OCPolarity << 8);
  1080. TIMERx->CHE = tmpche;
  1081. }
  1082. /**
  1083. * @brief Configure the TIMERx Channel 3 complementary polarity.
  1084. * @param TIMERx: x ={ 1 , 8 } .
  1085. * @param TIMER_OCNPolarity:
  1086. * This value will be :
  1087. * @arg TIMER_OCN_POLARITY_HIGH: active high
  1088. * @arg TIMER_OCN_POLARITY_LOW : active low
  1089. * @retval None
  1090. */
  1091. void TIMER_OC3N_Polarity(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCNPolarity)
  1092. {
  1093. uint16_t tmpche = 0;
  1094. tmpche = TIMERx->CHE;
  1095. /* Configure the CH3NP Bit */
  1096. tmpche &= (uint16_t)~((uint16_t)TIMER_CHE_CH3NP);
  1097. tmpche |= (uint16_t)(TIMER_OCNPolarity << 8);
  1098. TIMERx->CHE = tmpche;
  1099. }
  1100. /**
  1101. * @brief Configure the TIMERx channel 4 polarity.
  1102. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1103. * @param TIMER_OCPolarity :
  1104. * This value will be :
  1105. * @arg TIMER_OC_POLARITY_HIGH: active high
  1106. * @arg TIMER_OC_POLARITY_LOW : active low
  1107. * @retval None
  1108. */
  1109. void TIMER_OC4_Polarity(TIMER_TypeDef *TIMERx, uint16_t TIMER_OCPolarity)
  1110. {
  1111. uint16_t tmpche = 0;
  1112. tmpche = TIMERx->CHE;
  1113. /* Configure the CH4P Bit */
  1114. tmpche &= (uint16_t)~((uint16_t)TIMER_CHE_CH4P);
  1115. tmpche |= (uint16_t)(TIMER_OCPolarity << 12);
  1116. TIMERx->CHE = tmpche;
  1117. }
  1118. /**
  1119. * @brief Turn-on or off the Channel x Capture or Compare .
  1120. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  1121. * @param TIMER_Ch:
  1122. * This value will be :
  1123. * @arg TIMER_CH_1:
  1124. * @arg TIMER_CH_2:
  1125. * @arg TIMER_CH_3:
  1126. * @arg TIMER_CH_4:
  1127. * @param TIMER_CCx: the TIMER Channel CCxE bit new value.
  1128. * This value will be:
  1129. * @arg TIMER_CCX_ENABLE
  1130. * @arg TIMER_CCX_DISABLE
  1131. * @retval None
  1132. */
  1133. void TIMER_CCxCmd(TIMER_TypeDef *TIMERx, uint16_t TIMER_Ch, uint16_t TIMER_CCx)
  1134. {
  1135. uint16_t tmp = 0;
  1136. tmp = CHE_CHE_SET << TIMER_Ch;
  1137. /* Reset the CCx Bit */
  1138. TIMERx->CHE &= (uint16_t)~ tmp;
  1139. /* Configure the CCx Bit */
  1140. TIMERx->CHE |= (uint16_t)(TIMER_CCx << TIMER_Ch);
  1141. }
  1142. /**
  1143. * @brief Turn-on or off the Channel x complementary Capture or Compare
  1144. * @param TIMERx: x ={ 1 , 8 } .
  1145. * @param TIMER_Ch:
  1146. * This value will be :
  1147. * @arg TIMER_CH_1:
  1148. * @arg TIMER_CH_2:
  1149. * @arg TIMER_CH_3:
  1150. * @param TIMER_CCxN: the Channel CCxN bit new value.
  1151. * This value will be:
  1152. * @arg TIMER_CCXN_ENABLE
  1153. * @arg TIMER_CCXN_DISABLE
  1154. * @retval None
  1155. */
  1156. void TIMER_CCxNCmd(TIMER_TypeDef *TIMERx, uint16_t TIMER_Ch, uint16_t TIMER_CCxN)
  1157. {
  1158. uint16_t tmp = 0;
  1159. tmp = CHE_CHNE_SET << TIMER_Ch;
  1160. /* Reset the CCxN Bit */
  1161. TIMERx->CHE &= (uint16_t) ~tmp;
  1162. /* Configure the CCxN Bit */
  1163. TIMERx->CHE |= (uint16_t)(TIMER_CCxN << TIMER_Ch);
  1164. }
  1165. /**
  1166. * @brief Select control shadow register update control.
  1167. * @param TIMERx: x ={ 1, 8 } .
  1168. * @param NewState: ENABLE or DISABLE.
  1169. * @retval None
  1170. */
  1171. void TIMER_SelectCOM(TIMER_TypeDef *TIMERx, TypeState NewValue)
  1172. {
  1173. if (NewValue != DISABLE) {
  1174. /* Set the CCUC Bit */
  1175. TIMERx->CTLR2 |= TIMER_CTLR2_CCUC;
  1176. } else {
  1177. /* Reset the CCUC Bit */
  1178. TIMERx->CTLR2 &= (uint16_t)~((uint16_t)TIMER_CTLR2_CCUC);
  1179. }
  1180. }
  1181. /**
  1182. * @brief Initialize the Input Capture parameters of the timer
  1183. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  1184. * @param TIMER_ICInit: pointer to a TIMER_ICInitPara structure
  1185. * @retval None
  1186. */
  1187. void TIMER_ICInit(TIMER_TypeDef *TIMERx, TIMER_ICInitPara *TIMER_ICInit)
  1188. {
  1189. if (TIMER_ICInit->TIMER_CH == TIMER_CH_1) {
  1190. TI1_Config(TIMERx, TIMER_ICInit->TIMER_ICPolarity,
  1191. TIMER_ICInit->TIMER_ICSelection,
  1192. TIMER_ICInit->TIMER_ICFilter);
  1193. /* Set the Input Capture Prescaler value */
  1194. TIMER_Set_IC1_Prescaler(TIMERx, TIMER_ICInit->TIMER_ICPrescaler);
  1195. } else if (TIMER_ICInit->TIMER_CH == TIMER_CH_2) {
  1196. TI2_Config(TIMERx, TIMER_ICInit->TIMER_ICPolarity,
  1197. TIMER_ICInit->TIMER_ICSelection,
  1198. TIMER_ICInit->TIMER_ICFilter);
  1199. /* Set the Input Capture Prescaler value */
  1200. TIMER_Set_IC2_Prescaler(TIMERx, TIMER_ICInit->TIMER_ICPrescaler);
  1201. } else if (TIMER_ICInit->TIMER_CH == TIMER_CH_3) {
  1202. TI3_Config(TIMERx, TIMER_ICInit->TIMER_ICPolarity,
  1203. TIMER_ICInit->TIMER_ICSelection,
  1204. TIMER_ICInit->TIMER_ICFilter);
  1205. /* Set the Input Capture Prescaler value */
  1206. TIMER_Set_IC3_Prescaler(TIMERx, TIMER_ICInit->TIMER_ICPrescaler);
  1207. } else {
  1208. TI4_Config(TIMERx, TIMER_ICInit->TIMER_ICPolarity,
  1209. TIMER_ICInit->TIMER_ICSelection,
  1210. TIMER_ICInit->TIMER_ICFilter);
  1211. /* Set the Input Capture Prescaler value */
  1212. TIMER_Set_IC4_Prescaler(TIMERx, TIMER_ICInit->TIMER_ICPrescaler);
  1213. }
  1214. }
  1215. /**
  1216. * @brief Fill TIMER_ICInitPara member with default value.
  1217. * @param TIMER_ICInit : pointer to a TIMER_ICInitPara structure
  1218. * @retval None
  1219. */
  1220. void TIMER_ICStructInit(TIMER_ICInitPara *TIMER_ICInit)
  1221. {
  1222. TIMER_ICInit->TIMER_CH = TIMER_CH_1;
  1223. TIMER_ICInit->TIMER_ICPolarity = TIMER_IC_POLARITY_RISING;
  1224. TIMER_ICInit->TIMER_ICSelection = TIMER_IC_SELECTION_DIRECTTI;
  1225. TIMER_ICInit->TIMER_ICPrescaler = TIMER_IC_PSC_DIV1;
  1226. TIMER_ICInit->TIMER_ICFilter = 0x00;
  1227. }
  1228. /**
  1229. * @brief Configure the TIMER PWM input Capture mode parameters
  1230. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  1231. * @param TIMER_ICInit: pointer to a TIMER_ICInitPara structure
  1232. * @retval None
  1233. */
  1234. void TIMER_PWMCaptureConfig(TIMER_TypeDef *TIMERx, TIMER_ICInitPara *TIMER_ICInit)
  1235. {
  1236. uint16_t icoppositepolarity = TIMER_IC_POLARITY_RISING;
  1237. uint16_t icoppositeselection = TIMER_IC_SELECTION_DIRECTTI;
  1238. /* Select the Opposite Input Polarity */
  1239. if (TIMER_ICInit->TIMER_ICPolarity == TIMER_IC_POLARITY_RISING) {
  1240. icoppositepolarity = TIMER_IC_POLARITY_FALLING;
  1241. } else {
  1242. icoppositepolarity = TIMER_IC_POLARITY_RISING;
  1243. }
  1244. /* Select the Opposite Input */
  1245. if (TIMER_ICInit->TIMER_ICSelection == TIMER_IC_SELECTION_DIRECTTI) {
  1246. icoppositeselection = TIMER_IC_SELECTION_INDIRECTTI;
  1247. } else {
  1248. icoppositeselection = TIMER_IC_SELECTION_DIRECTTI;
  1249. }
  1250. if (TIMER_ICInit->TIMER_CH == TIMER_CH_1) {
  1251. TI1_Config(TIMERx, TIMER_ICInit->TIMER_ICPolarity,
  1252. TIMER_ICInit->TIMER_ICSelection,
  1253. TIMER_ICInit->TIMER_ICFilter);
  1254. TIMER_Set_IC1_Prescaler(TIMERx, TIMER_ICInit->TIMER_ICPrescaler);
  1255. TI2_Config(TIMERx, icoppositepolarity, icoppositeselection, TIMER_ICInit->TIMER_ICFilter);
  1256. TIMER_Set_IC2_Prescaler(TIMERx, TIMER_ICInit->TIMER_ICPrescaler);
  1257. } else {
  1258. TI2_Config(TIMERx, TIMER_ICInit->TIMER_ICPolarity,
  1259. TIMER_ICInit->TIMER_ICSelection,
  1260. TIMER_ICInit->TIMER_ICFilter);
  1261. TIMER_Set_IC2_Prescaler(TIMERx, TIMER_ICInit->TIMER_ICPrescaler);
  1262. TI1_Config(TIMERx, icoppositepolarity, icoppositeselection, TIMER_ICInit->TIMER_ICFilter);
  1263. TIMER_Set_IC1_Prescaler(TIMERx, TIMER_ICInit->TIMER_ICPrescaler);
  1264. }
  1265. }
  1266. /**
  1267. * @brief Read the TIMERx Input Capture value.
  1268. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  1269. * @retval None
  1270. */
  1271. uint32_t TIMER_GetCapture1(TIMER_TypeDef *TIMERx)
  1272. {
  1273. return TIMERx->CHCC1;
  1274. }
  1275. /**
  1276. * @brief Read the TIMERx Input Capture value.
  1277. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  1278. * @retval None
  1279. */
  1280. uint32_t TIMER_GetCapture2(TIMER_TypeDef *TIMERx)
  1281. {
  1282. return TIMERx->CHCC2;
  1283. }
  1284. /**
  1285. * @brief Read the TIMERx Input Capture value.
  1286. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1287. * @retval None
  1288. */
  1289. uint32_t TIMER_GetCapture3(TIMER_TypeDef *TIMERx)
  1290. {
  1291. return TIMERx->CHCC3;
  1292. }
  1293. /**
  1294. * @brief Read the TIMERx Input Capture value.
  1295. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1296. * @retval None
  1297. */
  1298. uint32_t TIMER_GetCapture4(TIMER_TypeDef *TIMERx)
  1299. {
  1300. return TIMERx->CHCC4;
  1301. }
  1302. /**
  1303. * @brief Configure the TIMERx Input Capture prescaler.
  1304. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  1305. * @param TIMER_ICPSC: the Input Capture1 prescaler value.
  1306. * This value will be :
  1307. * @arg TIMER_IC_PSC_DIV1: no prescaler
  1308. * @arg TIMER_IC_PSC_DIV2: divided by 2
  1309. * @arg TIMER_IC_PSC_DIV4: divided by 4
  1310. * @arg TIMER_IC_PSC_DIV8: divided by 8
  1311. * @retval None
  1312. */
  1313. void TIMER_Set_IC1_Prescaler(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPSC)
  1314. {
  1315. TIMERx->CHCTLR1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH1ICP);
  1316. TIMERx->CHCTLR1 |= TIMER_ICPSC;
  1317. }
  1318. /**
  1319. * @brief Configure the TIMERx Input Capture prescaler.
  1320. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  1321. * @param TIMER_ICPSC: the Input Capture1 prescaler value.
  1322. * This value will be :
  1323. * @arg TIMER_IC_PSC_DIV1: no prescaler
  1324. * @arg TIMER_IC_PSC_DIV2: divided by 2
  1325. * @arg TIMER_IC_PSC_DIV4: divided by 4
  1326. * @arg TIMER_IC_PSC_DIV8: divided by 8
  1327. * @retval None
  1328. */
  1329. void TIMER_Set_IC2_Prescaler(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPSC)
  1330. {
  1331. TIMERx->CHCTLR1 &= (uint16_t)~((uint16_t)TIMER_CHCTLR1_CH2ICP);
  1332. TIMERx->CHCTLR1 |= (uint16_t)(TIMER_ICPSC << 8);
  1333. }
  1334. /**
  1335. * @brief Configure the TIMERx Input Capture prescaler.
  1336. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1337. * @param TIMER_ICPSC: the Input Capture1 prescaler value.
  1338. * This value will be :
  1339. * @arg TIMER_IC_PSC_DIV1: no prescaler
  1340. * @arg TIMER_IC_PSC_DIV2: divided by 2
  1341. * @arg TIMER_IC_PSC_DIV4: divided by 4
  1342. * @arg TIMER_IC_PSC_DIV8: divided by 8
  1343. * @retval None
  1344. */
  1345. void TIMER_Set_IC3_Prescaler(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPSC)
  1346. {
  1347. TIMERx->CHCTLR2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH3ICP);
  1348. TIMERx->CHCTLR2 |= TIMER_ICPSC;
  1349. }
  1350. /**
  1351. * @brief Configure the TIMERx Input Capture prescaler.
  1352. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1353. * @param TIMER_ICPSC: the Input Capture1 prescaler value.
  1354. * This value will be :
  1355. * @arg TIMER_IC_PSC_DIV1: no prescaler
  1356. * @arg TIMER_IC_PSC_DIV2: divided by 2
  1357. * @arg TIMER_IC_PSC_DIV4: divided by 4
  1358. * @arg TIMER_IC_PSC_DIV8: divided by 8
  1359. * @retval None
  1360. */
  1361. void TIMER_Set_IC4_Prescaler(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPSC)
  1362. {
  1363. TIMERx->CHCTLR2 &= (uint16_t)~((uint16_t)TIMER_CHCTLR2_CH4ICP);
  1364. TIMERx->CHCTLR2 |= (uint16_t)(TIMER_ICPSC << 8);
  1365. }
  1366. /**
  1367. * @brief Configure interrupts Enables
  1368. * @param TIMERx: x ={ 0-13 } .
  1369. * @param TIMER_INT: the interrupts sources to Configure.
  1370. * This value will be :
  1371. * @arg TIMER_INT_UPDATE : update Interrupt
  1372. * @arg TIMER_INT_CH1 : Channel 1 Capture or Compare Interrupt
  1373. * @arg TIMER_INT_CH2 : Channel 2 Capture or Compare Interrupt
  1374. * @arg TIMER_INT_CH3 : Channel 3 Capture or Compare Interrupt
  1375. * @arg TIMER_INT_CH4 : Channel 4 Capture or Compare Interrupt
  1376. * @arg TIMER_INT_CCUG : Commutation Interrupt
  1377. * @arg TIMER_INT_TRIGGER : Trigger Interrupt
  1378. * @arg TIMER_INT_BREAK : Break Interrupt
  1379. * @param NewValue: ENABLE or DISABLE.
  1380. * @retval None
  1381. */
  1382. void TIMER_INTConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_INT, TypeState NewValue)
  1383. {
  1384. if (NewValue != DISABLE) {
  1385. TIMERx->DIE |= TIMER_INT;
  1386. } else {
  1387. TIMERx->DIE &= (uint16_t)~TIMER_INT;
  1388. }
  1389. }
  1390. /**
  1391. * @brief Generate the software event
  1392. * @param TIMERx: x ={ 0-13 } .
  1393. * @param TIMER_EventSrc:
  1394. * This value will be :
  1395. * @arg TIMER_EVENT_SRC_UPDATE : update Event
  1396. * @arg TIMER_EVENT_SRC_CH1 : Channel 1 Capture or Compare Event
  1397. * @arg TIMER_EVENT_SRC_CH2 : Channel 2 Capture or Compare Event
  1398. * @arg TIMER_EVENT_SRC_CH3 : Channel 3 Capture or Compare Event
  1399. * @arg TIMER_EVENT_SRC_CH4 : Channel 4 Capture or Compare Event
  1400. * @arg TIMER_EVENT_SRC_COM : COM event
  1401. * @arg TIMER_EVENT_SRC_TRIGGER : Trigger Event
  1402. * @arg TIMER_EVENT_SRC_BREAK : Break event
  1403. * @retval None
  1404. */
  1405. void TIMER_GenerateEvent(TIMER_TypeDef *TIMERx, uint16_t TIMER_EventSrc)
  1406. {
  1407. TIMERx->EVG = TIMER_EventSrc;
  1408. }
  1409. /**
  1410. * @brief Get current flag status
  1411. * @param TIMERx: x ={ 0-13 } .
  1412. * @param TIMER_FLAG:
  1413. * This value will be :
  1414. * @arg TIMER_FLAG_UPDATE : update Flag
  1415. * @arg TIMER_FLAG_CH1 : Channel 1 Capture or Compare Flag
  1416. * @arg TIMER_FLAG_CH2 : Channel 2 Capture or Compare Flag
  1417. * @arg TIMER_FLAG_CH3 : Channel 3 Capture or Compare Flag
  1418. * @arg TIMER_FLAG_CH4 : Channel 4 Capture or Compare Flag
  1419. * @arg TIMER_FLAG_COM : Commutation Flag
  1420. * @arg TIMER_FLAG_TRIGGER : Trigger Flag
  1421. * @arg TIMER_FLAG_BREAK : Break Flag
  1422. * @arg TIMER_FLAG_CH1OF : Channel 1 Capture or Compare overcapture Flag
  1423. * @arg TIMER_FLAG_CH2OF : Channel 2 Capture or Compare overcapture Flag
  1424. * @arg TIMER_FLAG_CH3OF : Channel 3 Capture or Compare overcapture Flag
  1425. * @arg TIMER_FLAG_CH4OF : Channel 4 Capture or Compare overcapture Flag
  1426. * @retval The state of TIMER_FLAG ( SET or RESET ).
  1427. */
  1428. TypeState TIMER_GetBitState(TIMER_TypeDef *TIMERx, uint16_t TIMER_FLAG)
  1429. {
  1430. if ((TIMERx->STR & TIMER_FLAG) != (uint16_t)RESET) {
  1431. return SET;
  1432. } else {
  1433. return RESET;
  1434. }
  1435. }
  1436. /**
  1437. * @brief Clear the flags
  1438. * @param TIMERx: x ={ 0-13 } .
  1439. * @param TIMER_FLAG: the flag bit to clear.
  1440. * This value will be :
  1441. * @arg TIMER_FLAG_UPDATE : update Flag
  1442. * @arg TIMER_FLAG_CH1 : Channel 1 Capture or Compare Flag
  1443. * @arg TIMER_FLAG_CH2 : Channel 2 Capture or Compare Flag
  1444. * @arg TIMER_FLAG_CH3 : Channel 3 Capture or Compare Flag
  1445. * @arg TIMER_FLAG_CH4 : Channel 4 Capture or Compare Flag
  1446. * @arg TIMER_FLAG_COM : Commutation Flag
  1447. * @arg TIMER_FLAG_TRIGGER : Trigger Flag
  1448. * @arg TIMER_FLAG_BREAK : Break Flag
  1449. * @arg TIMER_FLAG_CH1OF : Channel 1 Capture or Compare overcapture Flag
  1450. * @arg TIMER_FLAG_CH2OF : Channel 2 Capture or Compare overcapture Flag
  1451. * @arg TIMER_FLAG_CH3OF : Channel 3 Capture or Compare overcapture Flag
  1452. * @arg TIMER_FLAG_CH4OF : Channel 4 Capture or Compare overcapture Flag
  1453. * @retval None
  1454. */
  1455. void TIMER_ClearBitState(TIMER_TypeDef *TIMERx, uint16_t TIMER_FLAG)
  1456. {
  1457. TIMERx->STR = (uint16_t)~TIMER_FLAG;
  1458. }
  1459. /**
  1460. * @brief Get interrupt state
  1461. * @param TIMERx: x ={ 0-13 } .
  1462. * @param TIMER_INT:
  1463. * This value will be :
  1464. * @arg TIMER_INT_UPDATE: update Interrupt
  1465. * @arg TIMER_INT_CH1 : Channel 1 Capture or Compare Interrupt
  1466. * @arg TIMER_INT_CH2 : Channel 2 Capture or Compare Interrupt
  1467. * @arg TIMER_INT_CH3 : Channel 3 Capture or Compare Interrupt
  1468. * @arg TIMER_INT_CH4 : Channel 4 Capture or Compare Interrupt
  1469. * @arg TIMER_INT_CCUG : Commutation Interrupt
  1470. * @arg TIMER_INT_TRIGGER : Trigger Interrupt
  1471. * @arg TIMER_INT_BREAK : Break Interrupt
  1472. * @retval The new state of the TIMER_INT(SET or RESET).
  1473. */
  1474. TypeState TIMER_GetIntBitState(TIMER_TypeDef *TIMERx, uint16_t TIMER_INT)
  1475. {
  1476. uint16_t TypeState = 0x0, itenable = 0x0;
  1477. TypeState = TIMERx->STR & TIMER_INT;
  1478. itenable = TIMERx->DIE & TIMER_INT;
  1479. if ((TypeState != (uint16_t)RESET) && (itenable != (uint16_t)RESET)) {
  1480. return SET;
  1481. } else {
  1482. return RESET;
  1483. }
  1484. }
  1485. /**
  1486. * @brief Clear the interrupt pending bits
  1487. * @param TIMERx: x ={ 0-13 } .
  1488. * @param TIMER_INT:
  1489. * This value will be :
  1490. * @arg TIMER_INT_UPDATE: update Interrupt
  1491. * @arg TIMER_INT_CH1 : Channel 1 Capture or Compare Interrupt
  1492. * @arg TIMER_INT_CH2 : Channel 2 Capture or Compare Interrupt
  1493. * @arg TIMER_INT_CH3 : Channel 3 Capture or Compare Interrupt
  1494. * @arg TIMER_INT_CH4 : Channel 4 Capture or Compare Interrupt
  1495. * @arg TIMER_INT_CCUG : Commutation Interrupt
  1496. * @arg TIMER_INT_TRIGGER : Trigger Interrupt
  1497. * @arg TIMER_INT_BREAK : Break Interrupt
  1498. * @retval None
  1499. */
  1500. void TIMER_ClearIntBitState(TIMER_TypeDef *TIMERx, uint16_t TIMER_INT)
  1501. {
  1502. TIMERx->STR = (uint16_t)~TIMER_INT;
  1503. }
  1504. /**
  1505. * @brief Configure the DMA .
  1506. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1507. * @param TIMER_DMABase: DMA Base address.
  1508. * This value will be :
  1509. * @arg TIMER_DMA_BASE_ADDR_CTLR1
  1510. * @arg TIMER_DMA_BASE_ADDR_CTLR2
  1511. * @arg TIMER_DMA_BASE_ADDR_SMC
  1512. * @arg TIMER_DMA_BASE_ADDR_DIE
  1513. * @arg TIMER_DMA_BASE_ADDR_STR
  1514. * @arg TIMER_DMA_BASE_ADDR_EVG
  1515. * @arg TIMER_DMA_BASE_ADDR_CHCTLR1
  1516. * @arg TIMER_DMA_BASE_ADDR_CHCTLR2
  1517. * @arg TIMER_DMA_BASE_ADDR_CHE
  1518. * @arg TIMER_DMA_BASE_ADDR_CNT
  1519. * @arg TIMER_DMA_BASE_ADDR_PSC
  1520. * @arg TIMER_DMA_BASE_ADDR_CARL
  1521. * @arg TIMER_DMA_BASE_ADDR_CREP
  1522. * @arg TIMER_DMA_BASE_ADDR_CHCC1
  1523. * @arg TIMER_DMA_BASE_ADDR_CHCC2
  1524. * @arg TIMER_DMA_BASE_ADDR_CHCC3
  1525. * @arg TIMER_DMA_BASE_ADDR_CHCC4
  1526. * @arg TIMER_DMA_BASE_ADDR_BKDT
  1527. * @arg TIMER_DMA_BASE_ADDR_DCTLR
  1528. * @arg TIMER_DMA_BASE_ADDR_DTRSF
  1529. * @param TIMER_DMABurstLength: DMA Burst length.
  1530. * This value will be :
  1531. * [ TIMER_DMA_BURST_1TRANSFER , TIMER_DMA_BURST_18TRANSFERS ]
  1532. * @retval None
  1533. */
  1534. void TIMER_DMAConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_DMABase, uint16_t TIMER_DMABurstLength)
  1535. {
  1536. TIMERx->DCTLR = TIMER_DMABase | TIMER_DMABurstLength;
  1537. }
  1538. /**
  1539. * @brief Configure the TIMERx's DMA Requests
  1540. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 } .
  1541. * @param TIMER_DMASrc: the DMA Request sources.
  1542. * This value will be :
  1543. * @arg TIMER_DMA_UPDATE : update start DMA
  1544. * @arg TIMER_DMA_CH1 : Channel 1 Capture or Compare start DMA
  1545. * @arg TIMER_DMA_CH2 : Channel 2 Capture or Compare start DMA
  1546. * @arg TIMER_DMA_CH3 : Channel 3 Capture or Compare start DMA
  1547. * @arg TIMER_DMA_CH4 : Channel 4 Capture or Compare start DMA
  1548. * @arg TIMER_DMA_COM : Commutation DMA
  1549. * @arg TIMER_DMA_TRIGGER : Trigger DMA
  1550. * @param NewValue: ENABLE or DISABLE.
  1551. * @retval None
  1552. */
  1553. void TIMER_DMACmd(TIMER_TypeDef *TIMERx, uint16_t TIMER_DMASrc, TypeState NewValue)
  1554. {
  1555. if (NewValue != DISABLE) {
  1556. /* Enable the DMA */
  1557. TIMERx->DIE |= TIMER_DMASrc;
  1558. } else {
  1559. /* Disable the DMA */
  1560. TIMERx->DIE &= (uint16_t)~TIMER_DMASrc;
  1561. }
  1562. }
  1563. /**
  1564. * @brief Select the Capture or Compare DMA source
  1565. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1566. * @param NewValue: ENABLE or DISABLE
  1567. * @retval None
  1568. */
  1569. void TIMER_CC_DMA(TIMER_TypeDef *TIMERx, TypeState NewValue)
  1570. {
  1571. if (NewValue != DISABLE) {
  1572. TIMERx->CTLR2 |= TIMER_CTLR2_DMAS;
  1573. } else {
  1574. TIMERx->CTLR2 &= (uint16_t)~((uint16_t)TIMER_CTLR2_DMAS);
  1575. }
  1576. }
  1577. /**
  1578. * @brief Configure the internal Clock
  1579. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 }
  1580. * @retval None
  1581. */
  1582. void TIMER_InternalClockConfig(TIMER_TypeDef *TIMERx)
  1583. {
  1584. TIMERx->SMC &= (uint16_t)(~((uint16_t)TIMER_SMC_SMC));
  1585. }
  1586. /**
  1587. * @brief Configure the Internal Trigger as External Input Clock
  1588. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  1589. * @param TIMER_InputTriSrc:
  1590. * This value will be :
  1591. * @arg TIMER_TS_ITR0 : Internal Trigger 0
  1592. * @arg TIMER_TS_ITR1 : Internal Trigger 1
  1593. * @arg TIMER_TS_ITR2 : Internal Trigger 2
  1594. * @arg TIMER_TS_ITR3 : Internal Trigger 3
  1595. * @retval None
  1596. */
  1597. void TIMER_ITRxExtClock(TIMER_TypeDef *TIMERx, uint16_t TIMER_InputTriSrc)
  1598. {
  1599. /* Select the Internal Trigger */
  1600. TIMER_SelectInputTrigger(TIMERx, TIMER_InputTriSrc);
  1601. /* Select the External clock mode1 */
  1602. TIMERx->SMC |= TIMER_SLAVE_MODE_EXTERNAL1;
  1603. }
  1604. /**
  1605. * @brief Configure the External Trigger as External Input Clock
  1606. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  1607. * @param TIMER_TIxExCLKSrc: Trigger source.
  1608. * This value will be :
  1609. * @arg TIMER_TIX_EXCLK1_SRC_TI1ED : TI1 Edge Detector
  1610. * @arg TIMER_TIX_EXCLK1_SRC_TI1 : Filtered Timer Input 1
  1611. * @arg TIMER_TIX_EXCLK1_SRC_TI2 : Filtered Timer Input 2
  1612. * @param TIMER_ICPolarity:
  1613. * This value will be :
  1614. * @arg TIMER_IC_POLARITY_RISING
  1615. * @arg TIMER_IC_POLARITY_FALLING
  1616. * @param ICFilter: specifies the filter value.
  1617. * This parameter must be a value between 0x0 and 0xF.
  1618. * @retval None
  1619. */
  1620. void TIMER_TIxExtCLkConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_TIxExCLKSrc,
  1621. uint16_t TIMER_ICPolarity, uint16_t ICFilter)
  1622. {
  1623. /* Select the Input Clock Source */
  1624. if (TIMER_TIxExCLKSrc == TIMER_TIX_EXCLK1_SRC_TI2) {
  1625. TI2_Config(TIMERx, TIMER_ICPolarity, TIMER_IC_SELECTION_DIRECTTI, ICFilter);
  1626. } else {
  1627. TI1_Config(TIMERx, TIMER_ICPolarity, TIMER_IC_SELECTION_DIRECTTI, ICFilter);
  1628. }
  1629. /* Select the Trigger source */
  1630. TIMER_SelectInputTrigger(TIMERx, TIMER_TIxExCLKSrc);
  1631. /* Enter the External clock mode1 */
  1632. TIMERx->SMC |= TIMER_SLAVE_MODE_EXTERNAL1;
  1633. }
  1634. /**
  1635. * @brief Configure the External clock Mode1
  1636. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1637. * @param TIMER_ExtTriPrescaler: The external Trigger Prescaler.
  1638. * This value will be :
  1639. * @arg TIMER_EXT_TRI_PSC_OFF: no divided.
  1640. * @arg TIMER_EXT_TRI_PSC_DIV2: divided by 2.
  1641. * @arg TIMER_EXT_TRI_PSC_DIV4: divided by 4.
  1642. * @arg TIMER_EXT_TRI_PSC_DIV8: divided by 8.
  1643. * @param TIMER_ExtTriPolarity: Trigger Polarity.
  1644. * This value will be :
  1645. * @arg TIMER_EXT_TRI_POLARITY_INVERTED : active low or falling edge active.
  1646. * @arg TIMER_EXT_TRI_POLARITY_NONINVERTED: active high or rising edge active.
  1647. * @param ExtTriFilter: External Trigger Filter.
  1648. * This parameter must be a value between 0x00 and 0x0F
  1649. * @retval None
  1650. */
  1651. void TIMER_ETRClockMode1Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ExTriPrescaler, uint16_t TIMER_ExTriPolarity,
  1652. uint16_t ExtTriFilter)
  1653. {
  1654. uint16_t tmpsmc = 0;
  1655. /* Configure the external Trigger Clock source */
  1656. TIMER_ETRConfig(TIMERx, TIMER_ExTriPrescaler, TIMER_ExTriPolarity, ExtTriFilter);
  1657. /* Get the TIMERx SMC register value */
  1658. tmpsmc = TIMERx->SMC;
  1659. tmpsmc &= (uint16_t)(~((uint16_t)TIMER_SMC_SMC));
  1660. /* Select the External clock mode1 */
  1661. tmpsmc |= TIMER_SLAVE_MODE_EXTERNAL1;
  1662. /* Select the Trigger selection : ETRF */
  1663. tmpsmc &= (uint16_t)(~((uint16_t)TIMER_SMC_TRGS));
  1664. tmpsmc |= TIMER_TS_ETRF;
  1665. TIMERx->SMC = tmpsmc;
  1666. }
  1667. /**
  1668. * @brief Configure the External clock Mode2
  1669. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1670. * @param TIMER_ExtTriPrescaler: The external Trigger Prescaler.
  1671. * This value will be :
  1672. * @arg TIMER_EXT_TRI_PSC_OFF: no divided.
  1673. * @arg TIMER_EXT_TRI_PSC_DIV2: divided by 2.
  1674. * @arg TIMER_EXT_TRI_PSC_DIV4: divided by 4.
  1675. * @arg TIMER_EXT_TRI_PSC_DIV8: divided by 8.
  1676. * @param TIMER_ExtTriPolarity: Trigger Polarity.
  1677. * This value will be :
  1678. * @arg TIMER_EXT_TRI_POLARITY_INVERTED : active low or falling edge active.
  1679. * @arg TIMER_EXT_TRI_POLARITY_NONINVERTED: active high or rising edge active.
  1680. * @param ExtTriFilter: External Trigger Filter.
  1681. * This parameter must be a value between 0x00 and 0x0F
  1682. * @retval None
  1683. */
  1684. void TIMER_ETRClockMode2Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ExTriPrescaler,
  1685. uint16_t TIMER_ExTriPolarity, uint16_t ExtTriFilter)
  1686. {
  1687. /* Configure the ETR Clock source */
  1688. TIMER_ETRConfig(TIMERx, TIMER_ExTriPrescaler, TIMER_ExTriPolarity, ExtTriFilter);
  1689. /* Select the External clock mode2 */
  1690. TIMERx->SMC |= TIMER_SMC_ECM2E;
  1691. }
  1692. /**
  1693. * @brief Select the Input Trigger source
  1694. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  1695. * @param TIMER_InputTriSrc: The Input Trigger source.
  1696. * This value will be :
  1697. * @arg TIMER_TS_ITR0 : Internal Trigger 0
  1698. * @arg TIMER_TS_ITR1 : Internal Trigger 1
  1699. * @arg TIMER_TS_ITR2 : Internal Trigger 2
  1700. * @arg TIMER_TS_ITR3 : Internal Trigger 3
  1701. * @arg TIMER_TS_TI1F_ED : TI1 Edge Detector
  1702. * @arg TIMER_TS_TI1FP1 : Filtered Timer Input 1
  1703. * @arg TIMER_TS_TI2FP2 : Filtered Timer Input 2
  1704. * @arg TIMER_TS_ETRF : External Trigger input
  1705. * @retval None
  1706. */
  1707. void TIMER_SelectInputTrigger(TIMER_TypeDef *TIMERx, uint16_t TIMER_InputTriSrc)
  1708. {
  1709. uint16_t tmpsmc = 0;
  1710. tmpsmc = TIMERx->SMC;
  1711. /* Reset the TS Bits */
  1712. tmpsmc &= (uint16_t)(~((uint16_t)TIMER_SMC_TRGS));
  1713. /* Set the Input Trigger source */
  1714. tmpsmc |= TIMER_InputTriSrc ;
  1715. TIMERx->SMC = tmpsmc;
  1716. }
  1717. /**
  1718. * @brief Configure the TIMERx Trigger Output Mode.
  1719. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 ,10 , 11 , 13 , 14} .
  1720. * @param TIMER_TriOutSrc:
  1721. * This value will be :
  1722. * @arg TIMER_TRI_OUT_SRC_RESET : The UPG bit in the TIMERx_EVG register as TriO.
  1723. * @arg TIMER_TRI_OUT_SRC_ENABLE : The CEN bit in TIMERx_CTLR1 as TriO.
  1724. * @arg TIMER_TRI_OUT_SRC_UPDATE : Update event as TriO.
  1725. * @arg TIMER_TRI_OUT_SRC_OC1 : capture or compare match ( CC1IF bit set ) as TriO.
  1726. * @arg TIMER_TRI_OUT_SRC_OC1REF : OC1REF as TriO.
  1727. * @arg TIMER_TRI_OUT_SRC_OC2REF : OC2REF as TriO.
  1728. * @arg TIMER_TRI_OUT_SRC_OC3REF : OC3REF as TriO.
  1729. * @arg TIMER_TRI_OUT_SRC_OC4REF : OC4REF as TriO.
  1730. * @retval None
  1731. */
  1732. void TIMER_SelectOutputTrigger(TIMER_TypeDef *TIMERx, uint16_t TIMER_TriOutSrc)
  1733. {
  1734. /* Reset the MMC Bits */
  1735. TIMERx->CTLR2 &= (uint16_t)~((uint16_t)TIMER_CTLR2_MMC);
  1736. /* Configures the TriO source */
  1737. TIMERx->CTLR2 |= TIMER_TriOutSrc;
  1738. }
  1739. /**
  1740. * @brief Configure the TIMERx Slave Mode
  1741. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  1742. * @param TIMER_SlaveMode:
  1743. * This value will be :
  1744. * @arg TIMER_SLAVE_MODE_RESET : The trigger signal reset the timer
  1745. * @arg TIMER_SLAVE_MODE_GATED : The trigger signal enable the counter when high.
  1746. * @arg TIMER_SLAVE_MODE_TRIGGER : The trigger signal starts the counter.
  1747. * @arg TIMER_SLAVE_MODE_EXTERNAL1 : The trigger signal as a counter clock.
  1748. * @retval None
  1749. */
  1750. void TIMER_SelectSlaveMode(TIMER_TypeDef *TIMERx, uint16_t TIMER_SlaveMode)
  1751. {
  1752. /* Reset the SMC Bits */
  1753. TIMERx->SMC &= (uint16_t)~((uint16_t)TIMER_SMC_SMC);
  1754. /* Configure the Slave Mode */
  1755. TIMERx->SMC |= TIMER_SlaveMode;
  1756. }
  1757. /**
  1758. * @brief Configure the TIMERx Master or Slave Mode
  1759. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 10 , 11 , 13 , 14} .
  1760. * @param TIMER_MasterSlaveMode:
  1761. * This value will be :
  1762. * @arg TIMER_MASTER_SLAVE_MODE_ENABLE : synchronize master and slave by TriO
  1763. * @arg TIMER_MASTER_SLAVE_MODE_DISABLE : Don't synchronize
  1764. * @retval None
  1765. */
  1766. void TIMER_SelectMasterSlaveMode(TIMER_TypeDef *TIMERx, uint16_t TIMER_MasterSlaveMode)
  1767. {
  1768. /* Reset the MSM Bit */
  1769. TIMERx->SMC &= (uint16_t)~((uint16_t)TIMER_SMC_MSM);
  1770. /* Configure the MSM Bit */
  1771. TIMERx->SMC |= TIMER_MasterSlaveMode;
  1772. }
  1773. /**
  1774. * @brief Configure the External Trigger (ETR)
  1775. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1776. * @param TIMER_ExTriPrescaler: external Trigger Prescaler.
  1777. * This value will be :
  1778. * @arg TIMER_EXT_TRI_PSC_OFF : no divided.
  1779. * @arg TIMER_EXT_TRI_PSC_DIV2: divided by 2.
  1780. * @arg TIMER_EXT_TRI_PSC_DIV4: divided by 4.
  1781. * @arg TIMER_EXT_TRI_PSC_DIV8: divided by 8.
  1782. * @param TIMER_ExtTriPolarity: Trigger Polarity.
  1783. * This value will be :
  1784. * @arg TIMER_EXT_TRI_POLARITY_INVERTED : active low or falling edge active.
  1785. * @arg TIMER_EXT_TRI_POLARITY_NONINVERTED: active high or rising edge active.
  1786. * @param ExtTRGFilter: The External Trigger signal Filter.
  1787. * This parameter must be a value between 0x00 and 0x0F
  1788. * @retval None
  1789. */
  1790. void TIMER_ETRConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_ExTriPrescaler, uint16_t TIMER_ExTriPolarity,
  1791. uint16_t ExtTriFilter)
  1792. {
  1793. uint16_t tmpsmc = 0;
  1794. tmpsmc = TIMERx->SMC;
  1795. /*Reset the ETR Bits */
  1796. tmpsmc &= SMC_ETR_MASK;
  1797. /* Configure the Prescaler, the Filter value and the Polarity */
  1798. tmpsmc |= (uint16_t)(TIMER_ExTriPrescaler | (uint16_t)(TIMER_ExTriPolarity | (uint16_t)(ExtTriFilter << (uint16_t)8)));
  1799. TIMERx->SMC = tmpsmc;
  1800. }
  1801. /**
  1802. * @brief Configure the Encoder Interface.
  1803. * @param TIMERx: x ={ 1 , 8 , 9 , 12 } .
  1804. * @param TIMER_EncoderMode:
  1805. * This value will be :
  1806. * @arg TIMER_ENCODER_MODE_TI1 : Counter counts on TI1FP1 edge depending on TI2FP2 level.
  1807. * @arg TIMER_ENCODER_MODE_TI2 : Counter counts on TI2FP2 edge depending on TI1FP1 level.
  1808. * @arg TIMER_ENCODER_MODE_TI12 : Counter counts on both TI1FP1 and TI2FP2 edges depending
  1809. * on the level of the other input.
  1810. * @param TIMER_IC1Polarity: input capture 1 Polarity
  1811. * This value will be :
  1812. * @arg TIMER_IC_POLARITY_FALLING : capture Falling edge.
  1813. * @arg TIMER_IC_POLARITY_RISING : capture Rising edge.
  1814. * @param TIMER_IC2Polarity: input capture 2 Polarity
  1815. * This value will be :
  1816. * @arg TIMER_IC_POLARITY_FALLING : capture Falling edge.
  1817. * @arg TIMER_IC_POLARITY_RISING : capture Rising edge.
  1818. * @retval None
  1819. */
  1820. void TIMER_EncoderInterfaceConfig(TIMER_TypeDef *TIMERx, uint16_t TIMER_EncoderMode,
  1821. uint16_t TIMER_IC1Polarity, uint16_t TIMER_IC2Polarity)
  1822. {
  1823. uint16_t tmpsmc = 0;
  1824. uint16_t tmpchctlr1 = 0;
  1825. uint16_t tmpche = 0;
  1826. tmpsmc = TIMERx->SMC;
  1827. tmpchctlr1 = TIMERx->CHCTLR1;
  1828. tmpche = TIMERx->CHE;
  1829. /* select the encoder Mode */
  1830. tmpsmc &= (uint16_t)(~((uint16_t)TIMER_SMC_SMC));
  1831. tmpsmc |= TIMER_EncoderMode;
  1832. tmpchctlr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIMER_CHCTLR1_CH1M)) & (uint16_t)(~((uint16_t)TIMER_CHCTLR1_CH2M)));
  1833. tmpchctlr1 |= TIMER_CHCTLR1_CH1M_0 | TIMER_CHCTLR1_CH2M_0;
  1834. /* select the TI1 and the TI2 Polarities*/
  1835. tmpche &= (uint16_t)~((uint16_t)(TIMER_CHE_CH1P | TIMER_CHE_CH1NP)) & (uint16_t)~((uint16_t)(TIMER_CHE_CH2P | TIMER_CHE_CH2NP));
  1836. tmpche |= (uint16_t)(TIMER_IC1Polarity | (uint16_t)(TIMER_IC2Polarity << (uint16_t)4));
  1837. TIMERx->SMC = tmpsmc;
  1838. TIMERx->CHCTLR1 = tmpchctlr1;
  1839. TIMERx->CHE = tmpche;
  1840. }
  1841. /**
  1842. * @brief Configure the Hall sensor interface
  1843. * @param TIMERx: x ={ 1 , 8 } .
  1844. * @param NewValue: ENABLE or DISABLE.
  1845. * @retval None
  1846. */
  1847. void TIMER_SelectHallSensor(TIMER_TypeDef *TIMERx, TypeState NewValue)
  1848. {
  1849. if (NewValue != DISABLE) {
  1850. TIMERx->CTLR2 |= TIMER_CTLR2_TI1S;
  1851. } else {
  1852. TIMERx->CTLR2 &= (uint16_t)~((uint16_t)TIMER_CTLR2_TI1S);
  1853. }
  1854. }
  1855. /* Private functions */
  1856. /**
  1857. * @brief Configure the TI1 as Capture Input.
  1858. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 10 , 11 , 12 , 13 , 14} .
  1859. * @param TIMER_ICPolarity: Input Capture Polarity.
  1860. * This value will be :
  1861. * @arg TIMER_IC_POLARITY_RISING : Capture rising edge
  1862. * @arg TIMER_IC_POLARITY_FALLING : Capture falling edge
  1863. * @param TIMER_ICSelection: Input Capture source.
  1864. * This value will be :
  1865. * @arg TIMER_IC_SELECTION_DIRECTTI : connected to IC1.
  1866. * @arg TIMER_IC_SELECTION_INDIRECTTI : connected to IC2.
  1867. * @arg TIMER_IC_SELECTION_TRC : connected to TRC.
  1868. * @param TIMER_ICFilter: Input Capture Filter.
  1869. * This parameter must be a value between 0x00 and 0x0F.
  1870. * @retval None
  1871. */
  1872. static void TI1_Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPolarity, uint16_t TIMER_ICSelection,
  1873. uint16_t TIMER_ICFilter)
  1874. {
  1875. uint16_t tmpchctlr1 = 0, tmpche = 0;
  1876. /* Disable the Channel 1 */
  1877. TIMERx->CHE &= (uint16_t)~((uint16_t)TIMER_CHE_CH1E);
  1878. tmpchctlr1 = TIMERx->CHCTLR1;
  1879. tmpche = TIMERx->CHE;
  1880. /* Select the Input and Configure the filter */
  1881. tmpchctlr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIMER_CHCTLR1_CH1M)) & ((uint16_t)~((uint16_t)TIMER_CHCTLR1_CH1ICF)));
  1882. tmpchctlr1 |= (uint16_t)(TIMER_ICSelection | (uint16_t)(TIMER_ICFilter << (uint16_t)4));
  1883. /* Configure the Polarity and channel enable Bit */
  1884. tmpche &= (uint16_t)~((uint16_t)(TIMER_CHE_CH1P | TIMER_CHE_CH1NP));
  1885. tmpche |= (uint16_t)(TIMER_ICPolarity | (uint16_t)TIMER_CHE_CH1E);
  1886. TIMERx->CHCTLR1 = tmpchctlr1;
  1887. TIMERx->CHE = tmpche;
  1888. }
  1889. /**
  1890. * @brief Configure the TI2 as Capture Input.
  1891. * @note None
  1892. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 , 9 , 12 } .
  1893. * @param TIMER_ICPolarity: Input Capture Polarity.
  1894. * This value will be :
  1895. * @arg TIMER_IC_POLARITY_RISING : Capture rising edge
  1896. * @arg TIMER_IC_POLARITY_FALLING : Capture falling edge
  1897. * @param TIMER_ICSelection: Input Capture source.
  1898. * This value will be :
  1899. * @arg TIMER_IC_SELECTION_DIRECTTI : connected to IC2.
  1900. * @arg TIMER_IC_SELECTION_INDIRECTTI : connected to IC1.
  1901. * @arg TIMER_IC_SELECTION_TRC : connected to TRC.
  1902. * @param TIMER_ICFilter: Input Capture Filter.
  1903. * This parameter must be a value between 0x00 and 0x0F.
  1904. * @retval None
  1905. */
  1906. static void TI2_Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPolarity, uint16_t TIMER_ICSelection,
  1907. uint16_t TIMER_ICFilter)
  1908. {
  1909. uint16_t tmpchctlr1 = 0, tmpche = 0, tmp = 0;
  1910. /* Disable the Channel 2 */
  1911. TIMERx->CHE &= (uint16_t)~((uint16_t)TIMER_CHE_CH2E);
  1912. tmpchctlr1 = TIMERx->CHCTLR1;
  1913. tmpche = TIMERx->CHE;
  1914. tmp = (uint16_t)(TIMER_ICPolarity << 4);
  1915. /* Select the Input and Configure the filter */
  1916. tmpchctlr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIMER_CHCTLR1_CH2M)) & ((uint16_t)~((uint16_t)TIMER_CHCTLR1_CH2ICF)));
  1917. tmpchctlr1 |= (uint16_t)(TIMER_ICFilter << 12);
  1918. tmpchctlr1 |= (uint16_t)(TIMER_ICSelection << 8);
  1919. /* Configure the Polarity and channel enable Bit */
  1920. tmpche &= (uint16_t)~((uint16_t)(TIMER_CHE_CH2P | TIMER_CHE_CH2NP));
  1921. tmpche |= (uint16_t)(tmp | (uint16_t)TIMER_CHE_CH2E);
  1922. TIMERx->CHCTLR1 = tmpchctlr1 ;
  1923. TIMERx->CHE = tmpche;
  1924. }
  1925. /**
  1926. * @brief Configure the TI3 as Capture Input
  1927. * @note None
  1928. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1929. * @param TIMER_ICPolarity: Input Capture Polarity.
  1930. * This value will be :
  1931. * @arg TIMER_IC_POLARITY_RISING : Capture rising edge
  1932. * @arg TIMER_IC_POLARITY_FALLING : Capture falling edge
  1933. * @param TIMER_ICSelection: Input Capture source.
  1934. * This value will be :
  1935. * @arg TIMER_IC_SELECTION_DIRECTTI : connected to IC3.
  1936. * @arg TIMER_IC_SELECTION_INDIRECTTI : connected to IC4.
  1937. * @arg TIMER_IC_SELECTION_TRC : connected to TRC.
  1938. * @param TIMER_ICFilter: Input Capture Filter.
  1939. * This parameter must be a value between 0x00 and 0x0F.
  1940. * @retval None
  1941. */
  1942. static void TI3_Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPolarity, uint16_t TIMER_ICSelection,
  1943. uint16_t TIMER_ICFilter)
  1944. {
  1945. uint16_t tmpchctlr2 = 0, tmpche = 0, tmp = 0;
  1946. /* Disable the Channel 3 */
  1947. TIMERx->CHE &= (uint16_t)~((uint16_t)TIMER_CHE_CH3E);
  1948. tmpchctlr2 = TIMERx->CHCTLR2;
  1949. tmpche = TIMERx->CHE;
  1950. tmp = (uint16_t)(TIMER_ICPolarity << 8);
  1951. /* Select the Input and Configure the filter */
  1952. tmpchctlr2 &= (uint16_t)(((uint16_t)~((uint16_t)TIMER_CHCTLR2_CH3M)) & ((uint16_t)~((uint16_t)TIMER_CHCTLR2_CH3ICF)));
  1953. tmpchctlr2 |= (uint16_t)(TIMER_ICSelection | (uint16_t)(TIMER_ICFilter << (uint16_t)4));
  1954. /* Configure the Polarity and channel enable Bit */
  1955. tmpche &= (uint16_t)~((uint16_t)(TIMER_CHE_CH3P | TIMER_CHE_CH3NP));
  1956. tmpche |= (uint16_t)(tmp | (uint16_t)TIMER_CHE_CH3E);
  1957. TIMERx->CHCTLR2 = tmpchctlr2;
  1958. TIMERx->CHE = tmpche;
  1959. }
  1960. /**
  1961. * @brief Configure the TI4 as Capture Input
  1962. * @param TIMERx: x ={ 1 , 2 , 3 , 4 , 5 , 8 } .
  1963. * @param TIMER_ICPolarity: Input Capture Polarity.
  1964. * This value will be :
  1965. * @arg TIMER_IC_POLARITY_RISING : Capture rising edge
  1966. * @arg TIMER_IC_POLARITY_FALLING : Capture falling edge
  1967. * @param TIMER_ICSelection: Input Capture source.
  1968. * This value will be :
  1969. * @arg TIMER_IC_SELECTION_DIRECTTI : connected to IC4.
  1970. * @arg TIMER_IC_SELECTION_INDIRECTTI : connected to IC3.
  1971. * @arg TIMER_IC_SELECTION_TRC : connected to TRC.
  1972. * @param TIMER_ICFilter: Input Capture Filter.
  1973. * This parameter must be a value between 0x00 and 0x0F.
  1974. * @retval None
  1975. */
  1976. static void TI4_Config(TIMER_TypeDef *TIMERx, uint16_t TIMER_ICPolarity, uint16_t TIMER_ICSelection,
  1977. uint16_t TIMER_ICFilter)
  1978. {
  1979. uint16_t tmpchctlr2 = 0, tmpche = 0, tmp = 0;
  1980. /* Disable the Channel 4 */
  1981. TIMERx->CHE &= (uint16_t)~((uint16_t)TIMER_CHE_CH4E);
  1982. tmpchctlr2 = TIMERx->CHCTLR2;
  1983. tmpche = TIMERx->CHE;
  1984. tmp = (uint16_t)(TIMER_ICPolarity << 12);
  1985. /* Select the Input and Configure the filter */
  1986. tmpchctlr2 &= (uint16_t)((uint16_t)(~(uint16_t)TIMER_CHCTLR2_CH4M) & ((uint16_t)~((uint16_t)TIMER_CHCTLR2_CH4ICF)));
  1987. tmpchctlr2 |= (uint16_t)(TIMER_ICSelection << 8);
  1988. tmpchctlr2 |= (uint16_t)(TIMER_ICFilter << 12);
  1989. /* Configure the Polarity and channel enable Bit */
  1990. tmpche &= (uint16_t)~((uint16_t)(TIMER_CHE_CH4P | TIMER_CHE_CH4NP));
  1991. tmpche &= (uint16_t)~((uint16_t)(TIMER_CHE_CH4P));
  1992. tmpche |= (uint16_t)(tmp | (uint16_t)TIMER_CHE_CH4E);
  1993. TIMERx->CHCTLR2 = tmpchctlr2;
  1994. TIMERx->CHE = tmpche;
  1995. }
  1996. /**
  1997. * @}
  1998. */
  1999. /**
  2000. * @}
  2001. */
  2002. /**
  2003. * @}
  2004. */