drv_uart.c 4.2 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2013-05-18 Bernard The first version for LPC40xx
  9. * 2019-05-05 jg1uaa port to LPC1114
  10. */
  11. #include <stddef.h>
  12. #include <rtthread.h>
  13. #include <rtdevice.h>
  14. #include <rthw.h>
  15. #include "board.h" // CPU_CLOCK
  16. #include "drv_uart.h"
  17. #ifdef RT_USING_SERIAL
  18. #define UART_BASE 0x40008000 // UART (only one)
  19. #define UART_IRQ 21
  20. #define UART_CLOCK (CPU_CLOCK / 1) // Hz
  21. #define URBR HWREG32(UART_BASE + 0x00) // R-
  22. #define UTHR HWREG32(UART_BASE + 0x00) // -W
  23. #define UIER HWREG32(UART_BASE + 0x04) // RW
  24. #define UIIR HWREG32(UART_BASE + 0x08) // R-
  25. #define UFCR HWREG32(UART_BASE + 0x08) // -W
  26. #define ULCR HWREG32(UART_BASE + 0x0c) // RW
  27. #define UMCR HWREG32(UART_BASE + 0x10) // RW
  28. #define ULSR HWREG32(UART_BASE + 0x14) // R-
  29. #define UMSR HWREG32(UART_BASE + 0x18) // R-
  30. #define UDLL HWREG32(UART_BASE + 0x00) // RW
  31. #define UDLM HWREG32(UART_BASE + 0x04) // RW
  32. #define IOCONFIG_BASE 0x40044000
  33. #define IOCON_PIO1_6 HWREG32(IOCONFIG_BASE + 0xa4)
  34. #define IOCON_PIO1_7 HWREG32(IOCONFIG_BASE + 0xa8)
  35. #define SYSCON_BASE 0x40048000
  36. #define AHBCLKCTRL HWREG32(SYSCON_BASE + 0x80)
  37. #define UARTCLKDIV HWREG32(SYSCON_BASE + 0x98)
  38. static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  39. {
  40. rt_uint32_t Fdiv = 0;
  41. RT_ASSERT(serial != RT_NULL);
  42. /* Initialize UART Configuration parameter structure to default state:
  43. * Baudrate = 115200 bps
  44. * 8 data bit
  45. * 1 Stop bit
  46. * None parity
  47. */
  48. /* set DLAB=1 */
  49. ULCR |= 0x80;
  50. /* config uart baudrate */
  51. Fdiv = UART_CLOCK / (cfg->baud_rate * 16);
  52. UDLM = Fdiv / 256;
  53. UDLL = Fdiv % 256;
  54. /* set DLAB=0 */
  55. ULCR &= ~0x80;
  56. /* config to 8 data bit,1 Stop bit,None parity */
  57. ULCR |= 0x03;
  58. /*enable and reset FIFO*/
  59. UFCR = 0x07;
  60. return RT_EOK;
  61. }
  62. static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
  63. {
  64. RT_ASSERT(serial != RT_NULL);
  65. switch (cmd)
  66. {
  67. case RT_DEVICE_CTRL_CLR_INT:
  68. /* disable rx irq */
  69. UIER &= ~0x01;
  70. break;
  71. case RT_DEVICE_CTRL_SET_INT:
  72. /* enable rx irq */
  73. UIER |= 0x01;
  74. break;
  75. }
  76. return RT_EOK;
  77. }
  78. static int lpc_putc(struct rt_serial_device *serial, char c)
  79. {
  80. while (!(ULSR & 0x20));
  81. UTHR = c;
  82. return 1;
  83. }
  84. static int lpc_getc(struct rt_serial_device *serial)
  85. {
  86. if (ULSR & 0x01)
  87. return URBR;
  88. else
  89. return -1;
  90. }
  91. static const struct rt_uart_ops lpc_uart_ops =
  92. {
  93. lpc_configure,
  94. lpc_control,
  95. lpc_putc,
  96. lpc_getc,
  97. };
  98. struct rt_serial_device serial;
  99. void UART_IRQHandler(void)
  100. {
  101. /* enter interrupt */
  102. rt_interrupt_enter();
  103. switch (UIIR & 0x0e)
  104. {
  105. case 0x04:
  106. case 0x0C:
  107. rt_hw_serial_isr(&serial, RT_SERIAL_EVENT_RX_IND);
  108. break;
  109. case 0x06:
  110. (void)ULSR;
  111. break;
  112. default:
  113. (void)ULSR;
  114. break;
  115. }
  116. /* leave interrupt */
  117. rt_interrupt_leave();
  118. }
  119. int rt_hw_uart_init(void)
  120. {
  121. rt_err_t ret = RT_EOK;
  122. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  123. serial.ops = &lpc_uart_ops;
  124. serial.config = config;
  125. serial.parent.user_data = NULL;
  126. /*
  127. * Initialize UART pin connect
  128. * P1.6: U0_RXD
  129. * P1.7: U0_TXD
  130. */
  131. IOCON_PIO1_6 = 0xc1;
  132. IOCON_PIO1_7 = 0xc1;
  133. /* setup the uart power and clock */
  134. UARTCLKDIV = 0x01; // UART PCLK = system clock / 1
  135. AHBCLKCTRL |= (1 << 12); // UART power-up
  136. /* priority = 1 */
  137. NVIC_SetPriority(UART_IRQ, 0x01 << 6);
  138. /* Enable Interrupt for UART channel */
  139. NVIC_EnableIRQ(UART_IRQ);
  140. /* register UART device */
  141. ret = rt_hw_serial_register(&serial, "uart",
  142. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  143. NULL);
  144. return ret;
  145. }
  146. INIT_BOARD_EXPORT(rt_hw_uart_init);
  147. #endif /* RT_USING_SERIAL */