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ls1b_clock.c 2.1 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2017-09-06 勤为本 first version
  9. * 2021-02-02 michael5hzg@gmail.com adapt to ls1b
  10. */
  11. #include "rtconfig.h"
  12. #include "ls1b_regs.h"
  13. #include "ls1b_public.h"
  14. // 晶振的频率
  15. #define AHB_CLK (RT_OSC_CLK)
  16. #define APB_CLK (AHB_CLK)
  17. #define DIV_DC_EN (0x1 << 31)
  18. #define DIV_DC (0x1f << 26)
  19. #define DIV_CPU_EN (0x1 << 25)
  20. #define DIV_CPU (0x1f << 20)
  21. #define DIV_DDR_EN (0x1 << 19)
  22. #define DIV_DDR (0x1f << 14)
  23. #define DIV_DC_SHIFT 26
  24. #define DIV_CPU_SHIFT 20
  25. #define DIV_DDR_SHIFT 14
  26. /*
  27. * 获取PLL频率
  28. * @ret PLL频率
  29. */
  30. unsigned long clk_get_pll_rate(void)
  31. {
  32. unsigned int ctrl;
  33. unsigned long pll_rate = 0;
  34. ctrl = reg_read_32((volatile unsigned int *)LS1B_START_FREQ);
  35. pll_rate = (12 + (ctrl & 0x3f)) * APB_CLK / 2
  36. + ((ctrl >> 8) & 0x3ff) * APB_CLK / 1024 / 2;
  37. return pll_rate;
  38. }
  39. /*
  40. * 获取CPU频率
  41. * @ret CPU频率
  42. */
  43. unsigned long clk_get_cpu_rate(void)
  44. {
  45. unsigned long pll_rate, cpu_rate;
  46. unsigned int ctrl;
  47. pll_rate = clk_get_pll_rate();
  48. ctrl = reg_read_32((volatile unsigned int *)LS1B_CLK_DIV_PARAM);
  49. cpu_rate = pll_rate / ((ctrl & DIV_CPU) >> DIV_CPU_SHIFT);
  50. return cpu_rate;
  51. }
  52. /*
  53. * 获取DDR频率
  54. * @ret DDR频率
  55. */
  56. unsigned long clk_get_ddr_rate(void)
  57. {
  58. unsigned long pll_rate, ddr_rate;
  59. unsigned int ctrl;
  60. pll_rate = clk_get_pll_rate();
  61. ctrl = reg_read_32((volatile unsigned int *)LS1B_CLK_DIV_PARAM);
  62. ddr_rate = pll_rate / ((ctrl & DIV_DDR) >> DIV_DDR_SHIFT);
  63. return ddr_rate;
  64. }
  65. /*
  66. * 获取APB频率
  67. * @ret APB频率
  68. */
  69. unsigned long clk_get_apb_rate(void)
  70. {
  71. return clk_get_ddr_rate() / 2;
  72. }
  73. /*
  74. * 获取DC频率
  75. * @ret DC频率
  76. */
  77. unsigned long clk_get_dc_rate(void)
  78. {
  79. unsigned long pll_rate, dc_rate;
  80. unsigned int ctrl;
  81. pll_rate = clk_get_pll_rate();
  82. ctrl = reg_read_32((volatile unsigned int *)LS1B_CLK_DIV_PARAM);
  83. dc_rate = pll_rate ;
  84. return dc_rate;
  85. }