context_rvds.S 2.7 KB

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  1. ;/*
  2. ; * Copyright (c) 2006-2022, RT-Thread Development Team
  3. ; *
  4. ; * SPDX-License-Identifier: Apache-2.0
  5. ; *
  6. ; * Change Logs:
  7. ; * Date Author Notes
  8. ; * 2009-01-20 Bernard first version
  9. ; * 2011-07-22 Bernard added thumb mode porting
  10. ; */
  11. NOINT EQU 0xc0 ; disable interrupt in psr
  12. AREA |.text|, CODE, READONLY, ALIGN=2
  13. ARM
  14. REQUIRE8
  15. PRESERVE8
  16. ;/*
  17. ; * rt_base_t rt_hw_interrupt_disable();
  18. ; */
  19. rt_hw_interrupt_disable PROC
  20. EXPORT rt_hw_interrupt_disable
  21. MRS r0, cpsr
  22. ORR r1, r0, #NOINT
  23. MSR cpsr_c, r1
  24. BX lr
  25. ENDP
  26. ;/*
  27. ; * void rt_hw_interrupt_enable(rt_base_t level);
  28. ; */
  29. rt_hw_interrupt_enable PROC
  30. EXPORT rt_hw_interrupt_enable
  31. MSR cpsr_c, r0
  32. BX lr
  33. ENDP
  34. ;/*
  35. ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
  36. ; * r0 --> from
  37. ; * r1 --> to
  38. ; */
  39. rt_hw_context_switch PROC
  40. EXPORT rt_hw_context_switch
  41. STMFD sp!, {lr} ; push pc (lr should be pushed in place of PC)
  42. STMFD sp!, {r0-r12, lr} ; push lr & register file
  43. MRS r4, cpsr
  44. TST lr, #0x01
  45. BEQ _ARM_MODE
  46. ORR r4, r4, #0x20 ; it's thumb code
  47. _ARM_MODE
  48. STMFD sp!, {r4} ; push cpsr
  49. STR sp, [r0] ; store sp in preempted tasks TCB
  50. LDR sp, [r1] ; get new task stack pointer
  51. LDMFD sp!, {r4} ; pop new task cpsr to spsr
  52. MSR spsr_cxsf, r4
  53. BIC r4, r4, #0x20 ; must be ARM mode
  54. MSR cpsr_cxsf, r4
  55. LDMFD sp!, {r0-r12, lr, pc}^ ; pop new task r0-r12, lr & pc, copy spsr to cpsr
  56. ENDP
  57. ;/*
  58. ; * void rt_hw_context_switch_to(rt_uint32 to);
  59. ; * r0 --> to
  60. ; */
  61. rt_hw_context_switch_to PROC
  62. EXPORT rt_hw_context_switch_to
  63. LDR sp, [r0] ; get new task stack pointer
  64. LDMFD sp!, {r4} ; pop new task cpsr to spsr
  65. MSR spsr_cxsf, r4
  66. BIC r4, r4, #0x20 ; must be ARM mode
  67. MSR cpsr_cxsf, r4
  68. LDMFD sp!, {r0-r12, lr, pc}^ ; pop new task r0-r12, lr & pc, copy spsr to cpsr
  69. ENDP
  70. ;/*
  71. ; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
  72. ; */
  73. IMPORT rt_thread_switch_interrupt_flag
  74. IMPORT rt_interrupt_from_thread
  75. IMPORT rt_interrupt_to_thread
  76. rt_hw_context_switch_interrupt PROC
  77. EXPORT rt_hw_context_switch_interrupt
  78. LDR r2, =rt_thread_switch_interrupt_flag
  79. LDR r3, [r2]
  80. CMP r3, #1
  81. BEQ _reswitch
  82. MOV r3, #1 ; set rt_thread_switch_interrupt_flag to 1
  83. STR r3, [r2]
  84. LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
  85. STR r0, [r2]
  86. _reswitch
  87. LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
  88. STR r1, [r2]
  89. BX lr
  90. ENDP
  91. END