start_gcc.S 7.7 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2008-12-11 XuXinming first version
  9. * 2011-03-17 Bernard update to 0.4.x
  10. */
  11. #define WDMOD (0xE0000000 + 0x00)
  12. #define VICIntEnClr (0xFFFFF000 + 0x014)
  13. #define VICVectAddr (0xFFFFF000 + 0xF00)
  14. #define VICIntSelect (0xFFFFF000 + 0x00C)
  15. #define PLLCFG (0xE01FC000 + 0x084)
  16. #define PLLCON (0xE01FC000 + 0x080)
  17. #define PLLFEED (0xE01FC000 + 0x08C)
  18. #define PLLSTAT (0xE01FC000 + 0x088)
  19. #define CCLKCFG (0xE01FC000 + 0x104)
  20. #define MEMMAP (0xE01FC000 + 0x040)
  21. #define SCS (0xE01FC000 + 0x1A0)
  22. #define CLKSRCSEL (0xE01FC000 + 0x10C)
  23. #define MAMCR (0xE01FC000 + 0x000)
  24. #define MAMTIM (0xE01FC000 + 0x004)
  25. /* stack memory */
  26. .section .bss.noinit
  27. .equ IRQ_STACK_SIZE, 0x00000200
  28. .equ FIQ_STACK_SIZE, 0x00000100
  29. .equ UDF_STACK_SIZE, 0x00000004
  30. .equ ABT_STACK_SIZE, 0x00000004
  31. .equ SVC_STACK_SIZE, 0x00000200
  32. .space IRQ_STACK_SIZE
  33. IRQ_STACK:
  34. .space FIQ_STACK_SIZE
  35. FIQ_STACK:
  36. .space UDF_STACK_SIZE
  37. UDF_STACK:
  38. .space ABT_STACK_SIZE
  39. ABT_STACK:
  40. .space SVC_STACK_SIZE
  41. SVC_STACK:
  42. .section .init, "ax"
  43. .code 32
  44. .globl _start
  45. _start:
  46. b reset
  47. ldr pc, _vector_undef
  48. ldr pc, _vector_swi
  49. ldr pc, _vector_pabt
  50. ldr pc, _vector_dabt
  51. ldr pc, _vector_resv
  52. ldr pc, _vector_irq
  53. ldr pc, _vector_fiq
  54. _vector_undef: .word vector_undef
  55. _vector_swi: .word vector_swi
  56. _vector_pabt: .word vector_pabt
  57. _vector_dabt: .word vector_dabt
  58. _vector_resv: .word vector_resv
  59. _vector_irq: .word vector_irq
  60. _vector_fiq: .word vector_fiq
  61. .balignl 16,0xdeadbeef
  62. /*
  63. * rtthread kernel start and end
  64. * which are defined in linker script
  65. */
  66. .globl _rtthread_start
  67. _rtthread_start:
  68. .word _start
  69. .globl _rtthread_end
  70. _rtthread_end:
  71. .word _end
  72. /*
  73. * rtthread bss start and end which are defined in linker script
  74. */
  75. .globl _bss_start
  76. _bss_start:
  77. .word __bss_start
  78. .globl _bss_end
  79. _bss_end:
  80. .word __bss_end
  81. .text
  82. .code 32
  83. /* the system entry */
  84. reset:
  85. /* enter svc mode */
  86. msr cpsr_c, #SVCMODE|NOINT
  87. /*watch dog disable */
  88. ldr r0,=WDMOD
  89. ldr r1,=0x0
  90. str r1,[r0]
  91. /* all interrupt disable */
  92. ldr r0,=VICIntEnClr
  93. ldr r1,=0xffffffff
  94. str r1,[r0]
  95. ldr r1, =VICVectAddr
  96. ldr r0, =0x00
  97. str r0, [r1]
  98. ldr r1, =VICIntSelect
  99. ldr r0, =0x00
  100. str r0, [r1]
  101. /* setup stack */
  102. bl stack_setup
  103. /* copy .data to SRAM */
  104. ldr r1, =_sidata /* .data start in image */
  105. ldr r2, =_edata /* .data end in image */
  106. ldr r3, =_sdata /* sram data start */
  107. data_loop:
  108. ldr r0, [r1, #0]
  109. str r0, [r3]
  110. add r1, r1, #4
  111. add r3, r3, #4
  112. cmp r3, r2 /* check if data to clear */
  113. blo data_loop /* loop until done */
  114. /* clear .bss */
  115. mov r0,#0 /* get a zero */
  116. ldr r1,=__bss_start /* bss start */
  117. ldr r2,=__bss_end /* bss end */
  118. bss_loop:
  119. cmp r1,r2 /* check if data to clear */
  120. strlo r0,[r1],#4 /* clear 4 bytes */
  121. blo bss_loop /* loop until done */
  122. /* call C++ constructors of global objects */
  123. ldr r0, =__ctors_start__
  124. ldr r1, =__ctors_end__
  125. ctor_loop:
  126. cmp r0, r1
  127. beq ctor_end
  128. ldr r2, [r0], #4
  129. stmfd sp!, {r0-r1}
  130. mov lr, pc
  131. bx r2
  132. ldmfd sp!, {r0-r1}
  133. b ctor_loop
  134. ctor_end:
  135. /* start RT-Thread Kernel */
  136. ldr pc, _rtthread_startup
  137. _rtthread_startup:
  138. .word rtthread_startup
  139. .equ USERMODE, 0x10
  140. .equ FIQMODE, 0x11
  141. .equ IRQMODE, 0x12
  142. .equ SVCMODE, 0x13
  143. .equ ABORTMODE, 0x17
  144. .equ UNDEFMODE, 0x1b
  145. .equ MODEMASK, 0x1f
  146. .equ NOINT, 0xc0
  147. /* exception handlers */
  148. vector_undef: bl rt_hw_trap_udef
  149. vector_swi: bl rt_hw_trap_swi
  150. vector_pabt: bl rt_hw_trap_pabt
  151. vector_dabt: bl rt_hw_trap_dabt
  152. vector_resv: bl rt_hw_trap_resv
  153. .globl rt_interrupt_enter
  154. .globl rt_interrupt_leave
  155. .globl rt_thread_switch_interrupt_flag
  156. .globl rt_interrupt_from_thread
  157. .globl rt_interrupt_to_thread
  158. vector_irq:
  159. stmfd sp!, {r0-r12,lr}
  160. bl rt_interrupt_enter
  161. bl rt_hw_trap_irq
  162. bl rt_interrupt_leave
  163. /* if rt_thread_switch_interrupt_flag set,
  164. * jump to _interrupt_thread_switch and don't return
  165. */
  166. ldr r0, =rt_thread_switch_interrupt_flag
  167. ldr r1, [r0]
  168. cmp r1, #1
  169. beq _interrupt_thread_switch
  170. ldmfd sp!, {r0-r12,lr}
  171. subs pc, lr, #4
  172. .align 5
  173. vector_fiq:
  174. stmfd sp!,{r0-r7,lr}
  175. bl rt_hw_trap_fiq
  176. ldmfd sp!,{r0-r7,lr}
  177. subs pc,lr,#4
  178. _interrupt_thread_switch:
  179. mov r1, #0 /* clear rt_thread_switch_interrupt_flag */
  180. str r1, [r0]
  181. ldmfd sp!, {r0-r12,lr} /* reload saved registers */
  182. stmfd sp!, {r0-r3} /* save r0-r3 */
  183. mov r1, sp
  184. add sp, sp, #16 /* restore sp */
  185. sub r2, lr, #4 /* save old task's pc to r2 */
  186. mrs r3, spsr /* disable interrupt */
  187. orr r0, r3, #NOINT
  188. msr spsr_c, r0
  189. ldr r0, =.+8 /* switch to interrupted task's stack */
  190. movs pc, r0
  191. stmfd sp!, {r2} /* push old task's pc */
  192. stmfd sp!, {r4-r12,lr} /* push old task's lr,r12-r4 */
  193. mov r4, r1 /* Special optimised code below */
  194. mov r5, r3
  195. ldmfd r4!, {r0-r3}
  196. stmfd sp!, {r0-r3} /* push old task's r3-r0 */
  197. stmfd sp!, {r5} /* push old task's psr */
  198. mrs r4, spsr
  199. stmfd sp!, {r4} /* push old task's spsr */
  200. ldr r4, =rt_interrupt_from_thread
  201. ldr r5, [r4]
  202. str sp, [r5] /* store sp in preempted tasks's TCB */
  203. ldr r6, =rt_interrupt_to_thread
  204. ldr r6, [r6]
  205. ldr sp, [r6] /* get new task's stack pointer */
  206. ldmfd sp!, {r4} /* pop new task's spsr */
  207. msr SPSR_cxsf, r4
  208. ldmfd sp!, {r4} /* pop new task's psr */
  209. msr CPSR_cxsf, r4
  210. ldmfd sp!, {r0-r12,lr,pc} /* pop new task's r0-r12,lr & pc */
  211. stack_setup:
  212. mrs r0, cpsr
  213. bic r0, r0, #MODEMASK
  214. orr r1, r0, #UNDEFMODE|NOINT
  215. msr cpsr_cxsf, r1 /* undef mode */
  216. ldr sp, =UDF_STACK
  217. orr r1,r0,#ABORTMODE|NOINT
  218. msr cpsr_cxsf,r1 /* abort mode */
  219. ldr sp, =ABT_STACK
  220. orr r1,r0,#IRQMODE|NOINT
  221. msr cpsr_cxsf,r1 /* IRQ mode */
  222. ldr sp, =IRQ_STACK
  223. orr r1,r0,#FIQMODE|NOINT
  224. msr cpsr_cxsf,r1 /* FIQ mode */
  225. ldr sp, =FIQ_STACK
  226. bic r0,r0,#MODEMASK
  227. orr r1,r0,#SVCMODE|NOINT
  228. msr cpsr_cxsf,r1 /* SVC mode */
  229. ldr sp, =SVC_STACK
  230. /* USER mode is not initialized. */
  231. mov pc,lr /* The LR register may be not valid for the mode changes.*/