context_iar.S 1.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566
  1. /*
  2. * File : context.asm
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2010-04-09 fify the first version
  13. * 2010-04-19 fify rewrite rt_hw_interrupt_disable/enable fuction
  14. * 2010-04-20 fify move peripheral ISR to bsp/interrupts.s34
  15. *
  16. * For : Renesas M16C
  17. * Toolchain : IAR's EW for M16C v3.401
  18. */
  19. RSEG CSTACK
  20. RSEG ISTACK
  21. RSEG CODE(1)
  22. EXTERN rt_interrupt_from_thread
  23. EXTERN rt_interrupt_to_thread
  24. PUBLIC rt_hw_interrupt_disable
  25. PUBLIC rt_hw_interrupt_enable
  26. PUBLIC rt_hw_context_switch_to
  27. PUBLIC os_context_switch
  28. rt_hw_interrupt_disable:
  29. STC FLG, R0 ;fify 20100419
  30. FCLR I
  31. RTS
  32. rt_hw_interrupt_enable:
  33. LDC R0, FLG ;fify 20100419
  34. RTS
  35. .EVEN
  36. os_context_switch:
  37. PUSHM R0,R1,R2,R3,A0,A1,SB,FB
  38. MOV.W rt_interrupt_from_thread, A0
  39. STC ISP, [A0]
  40. MOV.W rt_interrupt_to_thread, A0
  41. LDC [A0], ISP
  42. POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
  43. REIT ; Return from interrup
  44. /*
  45. * void rt_hw_context_switch_to(rt_uint32 to);
  46. * r0 --> to
  47. * this fucntion is used to perform the first thread switch
  48. */
  49. rt_hw_context_switch_to:
  50. MOV.W R0, A0
  51. LDC [A0], ISP
  52. POPM R0,R1,R2,R3,A0,A1,SB,FB
  53. REIT
  54. END