context_iar.S 3.2 KB

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  1. #include "cpuconfig.h"
  2. //#include "iorx62n.h"
  3. EXTERN _rt_thread_switch_interrupt_flag
  4. EXTERN _rt_interrupt_from_thread
  5. EXTERN _rt_interrupt_to_thread
  6. EXTERN _rt_hw_hard_fault_exception
  7. EXTERN _rt_hw_cpu_shutdown
  8. /*PUBLIC _Interrupt_SWINT*/
  9. PUBLIC ___interrupt_27
  10. PUBLIC ___interrupt_0
  11. RSEG CODE:CODE(4)
  12. ;/*
  13. ; * rt_base_t rt_hw_interrupt_disable();
  14. ; */
  15. PUBLIC _rt_hw_interrupt_disable
  16. _rt_hw_interrupt_disable:
  17. MVTIPL #MAX_SYSCALL_INTERRUPT_PRIORITY
  18. RTS
  19. ;/*
  20. ; * void rt_hw_interrupt_enable(rt_base_t level);
  21. ; */
  22. PUBLIC _rt_hw_interrupt_enable
  23. _rt_hw_interrupt_enable:
  24. MVTIPL #KERNEL_INTERRUPT_PRIORITY
  25. RTS
  26. ; r0 --> switch from thread stack
  27. ; r1 --> switch to thread stack
  28. ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
  29. ___interrupt_27:
  30. /* enable interrupt because enter the interrupt,it will be clear */
  31. SETPSW I
  32. MVTIPL #MAX_SYSCALL_INTERRUPT_PRIORITY
  33. PUSH.L R15
  34. /* justage if it should switch thread*/
  35. MOV.L #_rt_thread_switch_interrupt_flag, R15
  36. MOV.L [ R15 ], R15
  37. CMP #0, R15
  38. BEQ notask_exit
  39. /* clean the flag*/
  40. MOV.L #_rt_thread_switch_interrupt_flag, R15
  41. MOV.L #0, [ R15 ]
  42. /* justage if it should save the register*/
  43. MOV.L #_rt_interrupt_from_thread, R15
  44. MOV.L [ R15 ], R15
  45. CMP #0, R15
  46. BEQ need_modify_isp
  47. /*save register*/
  48. MVFC USP, R15
  49. SUB #12, R15
  50. MVTC R15, USP
  51. MOV.L [ R0 ], [ R15 ] ;PSW
  52. MOV.L 4[ R0 ], 4[ R15 ];PC
  53. MOV.L 8[ R0 ], 8[ R15 ] ;R15
  54. ADD #12, R0
  55. SETPSW U
  56. PUSHM R1-R14
  57. MVFC FPSW, R15
  58. PUSH.L R15
  59. MVFACHI R15
  60. PUSH.L R15
  61. MVFACMI R15 ; Middle order word.
  62. SHLL #16, R15 ; Shifted left as it is restored to the low orde r w
  63. PUSH.L R15
  64. /*save thread stack pointer and switch to new thread*/
  65. MOV.L #_rt_interrupt_from_thread, R15
  66. MOV.L [ R15 ], R15
  67. MOV.L R0, [ R15 ]
  68. BRA switch_to_thread
  69. need_modify_isp:
  70. MVFC ISP, R15
  71. ADD #12, R15
  72. MVTC R15, ISP
  73. switch_to_thread:
  74. SETPSW U
  75. MOV.L #_rt_interrupt_to_thread, R15
  76. MOV.L [ R15 ], R15
  77. MOV.L [ R15 ], R0
  78. POP R15
  79. MVTACLO R15
  80. POP R15
  81. MVTACHI R15
  82. POP R15
  83. MVTC R15, FPSW
  84. POPM R1-R15
  85. BRA pendsv_exit
  86. notask_exit:
  87. POP R15
  88. pendsv_exit:
  89. MVTIPL #KERNEL_INTERRUPT_PRIORITY
  90. RTE
  91. NOP
  92. NOP
  93. /*exception interrupt*/
  94. ___interrupt_0:
  95. PUSH.L R15
  96. /*save the register for infomation*/
  97. MVFC USP, R15
  98. SUB #12, R15
  99. MVTC R15, USP
  100. MOV.L [ R0 ], [ R15 ] ;PSW
  101. MOV.L 4[ R0 ], 4[ R15 ];PC
  102. MOV.L 8[ R0 ], 8[ R15 ] ;R15
  103. ADD #12, R0
  104. SETPSW U
  105. PUSHM R1-R14
  106. MVFC FPSW, R15
  107. PUSH.L R15
  108. MVFACHI R15
  109. PUSH.L R15
  110. MVFACMI R15 ; Middle order word.
  111. SHLL #16, R15 ; Shifted left as it is restored to the low orde r w
  112. PUSH.L R15
  113. /*save the exception infomation add R1 as a parameter of
  114. * function rt_hw_hard_fault_exception
  115. */
  116. MOV.L R0, R1
  117. BRA _rt_hw_hard_fault_exception
  118. BRA _rt_hw_cpu_shutdown
  119. RTE
  120. NOP
  121. NOP
  122. END