HAL_ADC.c 35 KB

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  1. /*
  2. ******************************************************************************
  3. * @file HAL_ADC.c
  4. * @version V1.0.0
  5. * @date 2020
  6. * @brief ADC HAL module driver.
  7. * This file provides firmware functions to manage the following
  8. * functionalities of the Analog to Digital Converter (ADC) peripheral:
  9. * @ Initialization functions
  10. * @ IO operation functions
  11. ******************************************************************************
  12. */
  13. #include "ACM32Fxx_HAL.h"
  14. extern ADC_HandleTypeDef ADC_Handle;
  15. /************************************************************************
  16. * function : HAL_ADC_IRQHandler
  17. * Description: This function handles SPI interrupt request.
  18. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  19. * the configuration information for ADC module
  20. ************************************************************************/
  21. __weak void HAL_ADC_IRQHandler(ADC_HandleTypeDef *hadc)
  22. {
  23. __IO uint32_t Status;
  24. /* Check the parameters */
  25. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return;
  26. if(!IS_ADC_ALL_CONCONVMODE(hadc->Init.ConConvMode)) return;
  27. Status = hadc->Instance->SR;
  28. /************ Check End of Conversion flag for injected ************/
  29. if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IE_JEOCIE))
  30. {
  31. if((Status & ADC_SR_JEOC) == ADC_SR_JEOC)
  32. {
  33. if(__HAL_ADC_CHECK_TRIG_INJECTED(hadc, ADC_SOFTWARE_START) ||
  34. ((__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START)) &&
  35. (hadc->Init.ConConvMode == 0)))
  36. {
  37. /* Disable ADC end of conversion interrupt on group injected */
  38. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_JEOCIE);
  39. }
  40. /* Conversion complete callback */
  41. if (NULL != hadc->InjectedConvCpltCallback)
  42. hadc->InjectedConvCpltCallback(hadc);
  43. /* Clear injected group conversion flag */
  44. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_JEOC);
  45. }
  46. }
  47. /************ Check Conversion flag for regular group ************/
  48. if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IE_EOCIE))
  49. {
  50. if((Status & ADC_SR_EOC) == ADC_SR_EOC)
  51. {
  52. /* Conversion complete callback */
  53. if (NULL != hadc->ConvCpltCallback)
  54. hadc->ConvCpltCallback(hadc);
  55. /* Clear conversion flag */
  56. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_EOC);
  57. }
  58. }
  59. /************ Check Analog watchdog flags ************/
  60. if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IE_AWDIE))
  61. {
  62. if((Status & ADC_SR_AWD) == ADC_SR_AWD)
  63. {
  64. /* Level out of window callback */
  65. if (NULL != hadc->LevelOutOfWindowCallback)
  66. hadc->LevelOutOfWindowCallback(hadc);
  67. /* Clear the ADC analog watchdog flag */
  68. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_AWD);
  69. }
  70. }
  71. /************ Check End of Conversion flag for regular group ************/
  72. if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IE_EOGIE))
  73. {
  74. if((Status & ADC_SR_EOG) == ADC_SR_EOG)
  75. {
  76. if((__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START)) &&
  77. (hadc->Init.ConConvMode == 0))
  78. {
  79. /* Disable ADC end of conversion interrupt on group regular */
  80. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOGIE);
  81. }
  82. /* Conversion complete callback */
  83. if (NULL != hadc->GroupCpltCallback)
  84. hadc->GroupCpltCallback(hadc);
  85. /* Clear regular group conversion flag */
  86. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_EOG);
  87. }
  88. }
  89. }
  90. /************************************************************************
  91. * function : HAL_ADC_MspInit
  92. * Description:
  93. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  94. * the configuration information for ADC module
  95. * return : none
  96. ************************************************************************/
  97. __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
  98. {
  99. uint32_t i;
  100. uint32_t ADC_Pin_Map[][3] =
  101. {
  102. { ADC_CHANNEL_0_EN, GPIOC, GPIO_PIN_5 },
  103. { ADC_CHANNEL_1_EN, GPIOA, GPIO_PIN_7 },
  104. { ADC_CHANNEL_2_EN, GPIOA, GPIO_PIN_5 },
  105. { ADC_CHANNEL_3_EN, GPIOA, GPIO_PIN_3 },
  106. { ADC_CHANNEL_4_EN, GPIOC, GPIO_PIN_3 },
  107. { ADC_CHANNEL_5_EN, GPIOC, GPIO_PIN_1 },
  108. { ADC_CHANNEL_6_EN, GPIOA, GPIO_PIN_0 },
  109. { ADC_CHANNEL_8_EN, GPIOC, GPIO_PIN_4 },
  110. { ADC_CHANNEL_9_EN, GPIOA, GPIO_PIN_6 },
  111. { ADC_CHANNEL_10_EN, GPIOA, GPIO_PIN_4 },
  112. { ADC_CHANNEL_11_EN, GPIOA, GPIO_PIN_2 },
  113. { ADC_CHANNEL_12_EN, GPIOC, GPIO_PIN_2 },
  114. { ADC_CHANNEL_13_EN, GPIOC, GPIO_PIN_0 },
  115. { ADC_CHANNEL_VBAT_EN, GPIOA, GPIO_PIN_1 },
  116. { ADC_CHANNEL_EXT2_EN, GPIOB, GPIO_PIN_1 },
  117. { ADC_CHANNEL_EXT3_EN, GPIOB, GPIO_PIN_2 },
  118. { 0xffffffff, 0 }, //结束标志
  119. };
  120. /*
  121. NOTE : This function should be modified by the user.
  122. */
  123. /* For Example */
  124. GPIO_InitTypeDef GPIO_Handle;
  125. //Set gpio to analog.
  126. for(i = 0; ADC_Pin_Map[i][0] != 0xffffffff; i++)
  127. {
  128. if(hadc->Init.ChannelEn & ADC_Pin_Map[i][0])
  129. {
  130. GPIO_Handle.Pin = ADC_Pin_Map[i][2];
  131. GPIO_Handle.Mode = GPIO_MODE_ANALOG;
  132. GPIO_Handle.Pull = GPIO_NOPULL;
  133. HAL_GPIO_Init(ADC_Pin_Map[i][1], &GPIO_Handle);
  134. }
  135. }
  136. /* Enable ADC Clock */
  137. System_Module_Enable(EN_ADC);
  138. /* Clear Pending Interrupt */
  139. NVIC_ClearPendingIRQ(ADC_IRQn);
  140. /* Enable External Interrupt */
  141. NVIC_EnableIRQ(ADC_IRQn);
  142. }
  143. /************************************************************************
  144. * function : HAL_ADC_MspDeInit
  145. * Description:
  146. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  147. * the configuration information for ADC module
  148. * return : none
  149. ************************************************************************/
  150. __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
  151. {
  152. /*
  153. NOTE : This function should be modified by the user.
  154. */
  155. /* For Example */
  156. if(hadc->Init.DMAMode)
  157. {
  158. HAL_DMA_DeInit(hadc->DMA_Handle);
  159. hadc->DMA_Handle = NULL;
  160. }
  161. /* Disable ADC Clock */
  162. System_Module_Disable(EN_ADC);
  163. /* Clear Pending Interrupt */
  164. NVIC_ClearPendingIRQ(ADC_IRQn);
  165. /* Disable External Interrupt */
  166. NVIC_DisableIRQ(ADC_IRQn);
  167. }
  168. /************************************************************************
  169. * function : HAL_ADC_Init
  170. * Description: Init the ADC module
  171. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  172. * the configuration information for ADC module
  173. * return : HAL_StatusTypeDef
  174. ************************************************************************/
  175. HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
  176. {
  177. /* Check the ADC handle allocation */
  178. if (hadc == NULL)
  179. {
  180. return HAL_ERROR;
  181. }
  182. /* Check the parameters */
  183. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  184. if(!IS_ADC_ALL_CONCONVMODE(hadc->Init.ConConvMode)) return HAL_ERROR;
  185. if(!IS_ADC_ALL_JCHANNELMODE(hadc->Init.JChannelMode)) return HAL_ERROR;
  186. if(!IS_ADC_ALL_DIFFMODE(hadc->Init.DiffMode)) return HAL_ERROR;
  187. if(!IS_ADC_ALL_DMAMODE(hadc->Init.DMAMode)) return HAL_ERROR;
  188. if(!IS_ADC_ALL_OVERMODE(hadc->Init.OverMode)) return HAL_ERROR;
  189. if(!IS_ADC_ALL_OVERSAMPMODE(hadc->Init.OverSampMode)) return HAL_ERROR;
  190. if(!IS_ADC_ALL_OVSR(hadc->Init.Oversampling.Ratio)) return HAL_ERROR;
  191. if(!IS_ADC_ALL_OVSS(hadc->Init.Oversampling.RightBitShift)) return HAL_ERROR;
  192. if(!IS_ADC_ALL_ANALOGWDGEN(hadc->Init.AnalogWDGEn)) return HAL_ERROR;
  193. if(!IS_ADC_ALL_CLOCKDIV(hadc->Init.ClockDiv)) return HAL_ERROR;
  194. if(!IS_ADC_ALL_CHANNELEN(hadc->Init.ChannelEn)) return HAL_ERROR;
  195. if(!IS_ADC_ALL_TRIG(hadc->Init.ExTrigMode.ExTrigSel)) return HAL_ERROR;
  196. if(!IS_ADC_ALL_CHANNELEN(hadc->Init.ExTrigMode.JExTrigSel)) return HAL_ERROR;
  197. /* Init the low level hardware : GPIO, CLOCK, NVIC, DMA */
  198. HAL_ADC_MspInit(hadc);
  199. //Reset AFE.
  200. SET_BIT(hadc->Instance->CR2,ADC_CR2_AFE_RSTN);
  201. //Set Clock DIV.
  202. MODIFY_REG(hadc->Instance->CR2,ADC_CR2_DIV_MASK,hadc->Init.ClockDiv<<ADC_CR2_DIV_POS);
  203. //Set continued convert mode
  204. if(hadc->Init.ConConvMode)
  205. SET_BIT(hadc->Instance->CR1,ADC_CR1_CONT);
  206. else
  207. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_CONT);
  208. //Overflow
  209. if(hadc->Init.OverMode == ADC_OVERMODE_ENABLE)
  210. SET_BIT(hadc->Instance->CR2,ADC_CR2_OVRMOD);
  211. else
  212. CLEAR_BIT(hadc->Instance->CR2,ADC_CR2_OVRMOD);
  213. //Over Sample Set
  214. if(hadc->Init.OverSampMode)
  215. {
  216. if(hadc->Init.JChannelMode)
  217. {
  218. SET_BIT(hadc->Instance->CR2,ADC_CR2_JOVSE); // Inject channel over sample en.
  219. if(hadc->Init.Oversampling.TriggeredMode)
  220. SET_BIT(hadc->Instance->CR2,ADC_CR2_JTOVS); // N times sample every trig.
  221. else
  222. CLEAR_BIT(hadc->Instance->CR2,ADC_CR2_JTOVS); // 1 time sample every trig.
  223. }
  224. MODIFY_REG(hadc->Instance->CR2,ADC_CR2_OVSR_MASK,hadc->Init.Oversampling.Ratio<<ADC_CR2_OVSR_POS); //over sample rate
  225. MODIFY_REG(hadc->Instance->CR2,ADC_CR2_OVSS_MASK,hadc->Init.Oversampling.RightBitShift<<ADC_CR2_OVSS_POS); //over sample right shift.
  226. SET_BIT(hadc->Instance->CR2,ADC_CR2_OVSE); // Regular channel over sample en.
  227. }
  228. //ExTrigSel set
  229. MODIFY_REG(hadc->Instance->CR1,ADC_CR1_EXTSEL_MASK,hadc->Init.ExTrigMode.ExTrigSel<<ADC_CR1_EXTSEL_POS);
  230. if(hadc->Init.JChannelMode)
  231. {
  232. /* Enable the inject channel */
  233. SET_BIT(hadc->Instance->CR1, ADC_CR1_JEN);
  234. //JExTrigSel set
  235. MODIFY_REG(hadc->Instance->CR1,ADC_CR1_JEXTSEL_MASK,hadc->Init.ExTrigMode.JExTrigSel<<ADC_CR1_JEXTSEL_POS);
  236. }
  237. //Clear the sequence length.
  238. CLEAR_BIT(hadc->Instance->SQR1,ADC_SQR1_L); //Clear the sequence length.
  239. return HAL_OK;
  240. }
  241. /************************************************************************
  242. * function : HAL_ADC_DeInit
  243. * Description: DeInit the ADC module
  244. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  245. * the configuration information for ADC module
  246. * return : HAL_StatusTypeDef
  247. ************************************************************************/
  248. HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
  249. {
  250. /* Check the ADC handle allocation */
  251. if (hadc == NULL)
  252. {
  253. return HAL_ERROR;
  254. }
  255. HAL_ADC_MspDeInit(hadc);
  256. hadc->ChannelNum = 0;
  257. hadc->ConvCpltCallback = NULL;
  258. hadc->InjectedConvCpltCallback = NULL;
  259. hadc->LevelOutOfWindowCallback = NULL;
  260. memset(&hadc->Init, 0, sizeof(hadc->Init));
  261. return HAL_OK;
  262. }
  263. /************************************************************************
  264. * function : HAL_ADC_ConfigChannel
  265. * Description: Config the regular channel
  266. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  267. * the configuration information for ADC module
  268. * sConfig : pointer to a ADC_ChannelConfTypeDef structure that contains
  269. * the configuration information for ADC channel
  270. * return : HAL_StatusTypeDef
  271. ************************************************************************/
  272. HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
  273. {
  274. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  275. if(!IS_ADC_ALL_CHANNEL(sConfig->Channel)) return HAL_ERROR;
  276. if(!IS_ADC_ALL_SMPCLOCK(sConfig->Smp)) return HAL_ERROR;
  277. if(!IS_ADC_ALL_SEQUENCE(sConfig->Sq)) return HAL_ERROR;
  278. /* Differential mode set*/
  279. if(hadc->Init.DiffMode)
  280. {
  281. if(sConfig->Channel < 8)
  282. {
  283. SET_BIT(hadc->Instance->DIFF,1<<sConfig->Channel);
  284. SET_BIT(hadc->Instance->SIGN,1<<sConfig->Channel); //If define differential mode ,set as sign resault
  285. }
  286. else
  287. return HAL_ERROR;
  288. }
  289. else if(sConfig->Channel < 8)
  290. {
  291. CLEAR_BIT(hadc->Instance->DIFF,1<<sConfig->Channel);
  292. CLEAR_BIT(hadc->Instance->SIGN,1<<sConfig->Channel); //If define differential mode ,set as unsign resault
  293. }
  294. if((sConfig->Channel >= 8) && (hadc->Instance->DIFF & (1<<(sConfig->Channel-8)))) return HAL_ERROR;
  295. if(sConfig->RjMode == 0)
  296. {
  297. if((sConfig->Sq >= 1)&&(sConfig->Sq <= 5))
  298. MODIFY_REG(hadc->Instance->SQR1,(ADC_CH_MASK << (5*sConfig->Sq )),(sConfig->Channel << (5*sConfig->Sq )));
  299. else if((sConfig->Sq >= 6)&&(sConfig->Sq <= 11))
  300. MODIFY_REG(hadc->Instance->SQR2,(ADC_CH_MASK << (5*(sConfig->Sq-6))),(sConfig->Channel << (5*(sConfig->Sq-6))));
  301. else if((sConfig->Sq >= 12)&&(sConfig->Sq <= 16))
  302. MODIFY_REG(hadc->Instance->SQR3,(ADC_CH_MASK << (5*(sConfig->Sq-12))),(sConfig->Channel << (5*(sConfig->Sq-12))));
  303. else
  304. return HAL_ERROR;
  305. }
  306. else
  307. {
  308. /* Inject channel */
  309. MODIFY_REG(hadc->Instance->JSQR,ADC_CH_MASK,sConfig->Channel);
  310. }
  311. MODIFY_REG(hadc->Instance->SQR1,ADC_SQR1_L,(ADC_Handle.ChannelNum-1));
  312. /* Set the SMPR to every register*/
  313. if(sConfig->Channel <= ADC_CHANNEL_7)
  314. MODIFY_REG(hadc->Instance->SMPR1,(ADC_SMPR_CH_MASK << (4*sConfig->Channel )),(sConfig->Smp << (4*sConfig->Channel )));
  315. else if((sConfig->Channel >= ADC_CHANNEL_8)&&(sConfig->Channel <= ADC_CHANNEL_15))
  316. MODIFY_REG(hadc->Instance->SMPR2,(ADC_SMPR_CH_MASK << (4*(sConfig->Channel-8))),(sConfig->Smp << (4*(sConfig->Channel-8))));
  317. else if((sConfig->Channel >= ADC_CHANNEL_TEMP)&&(sConfig->Channel <= ADC_CHANNEL_EXT3))
  318. MODIFY_REG(hadc->Instance->SMPR3,(ADC_SMPR_CH_MASK << (4*(sConfig->Channel-16))),(sConfig->Smp << (4*(sConfig->Channel-16))));
  319. else
  320. return HAL_ERROR;
  321. if(hadc->Init.ChannelEn & ADC_CHANNEL_TEMP_EN)
  322. {
  323. SET_BIT(hadc->Instance->TSREF,ADC_TSREF_EN_TS);//Enable the temperature sensor
  324. System_Delay(1000);
  325. }
  326. if(hadc->Init.ChannelEn & (ADC_CHANNEL_VBGR_EN | ADC_CHANNEL_EXT2_EN | ADC_CHANNEL_EXT3_EN))
  327. {
  328. SET_BIT(hadc->Instance->CR2,ADC_CR2_EN_BUF);//Enable the buffer
  329. System_Delay(1000);
  330. }
  331. return HAL_OK;
  332. }
  333. /************************************************************************
  334. * function : HAL_ADC_AnalogWDGConfig
  335. * Description: Config the analog watchdog
  336. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  337. * the configuration information for ADC module
  338. * AnalogWDGConfig : pointer to a ADC_AnalogWDGConfTypeDef structure that contains
  339. * the configuration information for ADC analog watchdog
  340. * return : HAL_StatusTypeDef
  341. ************************************************************************/
  342. HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
  343. {
  344. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  345. if(!IS_ADC_ALL_CHANNEL(AnalogWDGConfig->Channel)) return HAL_ERROR;
  346. if (hadc->Init.AnalogWDGEn)
  347. {
  348. switch(AnalogWDGConfig->WatchdogMode)
  349. {
  350. /* AWDSGL:0; AWDEN:1; JAWDEN:0 */
  351. case ADC_ANALOGWATCHDOG_RCH_ALL:
  352. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  353. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  354. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  355. break;
  356. /* AWDSGL:0; AWDEN:0; JAWDEN:1 */
  357. case ADC_ANALOGWATCHDOG_JCH_ALL:
  358. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  359. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  360. SET_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  361. break;
  362. /* AWDSGL:0; AWDEN:1; JAWDEN:1 */
  363. case ADC_ANALOGWATCHDOG_RCH_AND_JCH_ALL:
  364. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  365. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  366. SET_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  367. break;
  368. /* AWDSGL:1; AWDEN:1; JAWDEN:0 */
  369. case ADC_ANALOGWATCHDOG_RCH_SINGLE:
  370. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  371. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  372. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  373. MODIFY_REG(hadc->Instance->CR1,ADC_CH_MASK,AnalogWDGConfig->Channel); //The regular watchdog channel set
  374. break;
  375. /* AWDSGL:1; AWDEN:0; JAWDEN:1 */
  376. case ADC_ANALOGWATCHDOG_JCH_SINGLE:
  377. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  378. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  379. SET_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  380. MODIFY_REG(hadc->Instance->CR1,(ADC_CH_MASK<<27),AnalogWDGConfig->Channel<<27); //The inject watchdog channel set
  381. break;
  382. /* AWDSGL:1; AWDEN:1; JAWDEN:1 */
  383. case ADC_ANALOGWATCHDOG_RCH_OR_JCH_SINGLE:
  384. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  385. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  386. SET_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  387. MODIFY_REG(hadc->Instance->CR1,ADC_CH_MASK,AnalogWDGConfig->Channel); //The regular watchdog channel set
  388. MODIFY_REG(hadc->Instance->CR1,(ADC_CH_MASK<<27),AnalogWDGConfig->Channel<<27); //The inject watchdog channel set
  389. break;
  390. /* AWDSGL:x; AWDEN:0; JAWDEN:0 */
  391. default: /* ADC_ANALOGWATCHDOG_NONE */
  392. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  393. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  394. break;
  395. }
  396. /* Configure ADC analog watchdog interrupt */
  397. if(AnalogWDGConfig->ITMode)
  398. __HAL_ADC_ENABLE_IT(hadc,ADC_IE_AWDIE);
  399. else
  400. __HAL_ADC_DISABLE_IT(hadc,ADC_IE_AWDIE);
  401. }
  402. if(hadc->Init.DiffMode)
  403. {
  404. hadc->Instance->HTR = AnalogWDGConfig->HighThreshold<<16;
  405. hadc->Instance->LTR = AnalogWDGConfig->LowThreshold<<16;
  406. }
  407. else
  408. {
  409. hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
  410. hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
  411. }
  412. /* Return function status */
  413. return HAL_OK;
  414. }
  415. /************************************************************************
  416. * function : HAL_ADC_Start
  417. * Description: Enable and start the ADC convertion
  418. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  419. * the configuration information for ADC module
  420. * return : HAL_StatusTypeDef
  421. ************************************************************************/
  422. HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
  423. {
  424. /* Check the parameters */
  425. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  426. /* check the total number of the enabled channels */
  427. if((READ_BIT(hadc->Instance->SQR1,ADC_SQR1_L)+1) != hadc->ChannelNum) return HAL_ERROR;
  428. /* Enable the ADC */
  429. __HAL_ADC_ENABLE(hadc);
  430. /* Clear the SR register */
  431. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  432. /* Wait ADC ready */
  433. while(!(hadc->Instance->SR & ADC_SR_ADRDY));
  434. if(__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START))
  435. {
  436. /* Start covertion */
  437. SET_BIT(hadc->Instance->CR1,ADC_CR1_SWSTART);
  438. }
  439. /* Return function status */
  440. return HAL_OK;
  441. }
  442. /************************************************************************
  443. * function : HAL_ADC_Stop
  444. * Description: Stop ADC conversion of regular group (and injected channels in
  445. * case of auto_injection mode), disable ADC peripheral.
  446. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  447. * the configuration information for ADC module
  448. * return : HAL_StatusTypeDef
  449. ************************************************************************/
  450. HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
  451. {
  452. /* Check the parameters */
  453. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  454. if(hadc->Init.ConConvMode)
  455. {
  456. /* Set stop flag */
  457. SET_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP);
  458. /* Waitting stop flag be cleared */
  459. while(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP));
  460. }
  461. /* Disable the ADC peripheral */
  462. __HAL_ADC_DISABLE(hadc);
  463. /* Clear the SR register */
  464. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  465. /* Return function status */
  466. return HAL_OK;
  467. }
  468. /************************************************************************
  469. * function : HAL_ADC_Start_IT
  470. * Description: Enable ADC, start conversion of regular group with interruption.
  471. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  472. * the configuration information for ADC module
  473. * return : HAL_StatusTypeDef
  474. ************************************************************************/
  475. HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
  476. {
  477. /* Check the parameters */
  478. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  479. /* Enable the ADC */
  480. __HAL_ADC_ENABLE(hadc);
  481. /* Clear the SR register */
  482. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  483. /* Disable all interruptions before enabling the desired ones */
  484. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE | ADC_IE_OVERFIE | ADC_IE_JEOCIE);
  485. __HAL_ADC_ENABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE);
  486. /* Enable ADC overrun interrupt */
  487. /* If hadc->Init.OverMode is set to ADC_OVERMODE_DISABLE, only then is
  488. ADC_IE_OVERFIE enabled; otherwise data overwrite is considered as normal
  489. behavior and no CPU time is lost for a non-processed interruption */
  490. if (hadc->Init.OverMode == ADC_OVERMODE_DISABLE)
  491. {
  492. __HAL_ADC_ENABLE_IT(hadc, ADC_IE_OVERFIE);
  493. }
  494. if(__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START))
  495. {
  496. /* Start covertion */
  497. SET_BIT(hadc->Instance->CR1,ADC_CR1_SWSTART);
  498. }
  499. /* Return function status */
  500. return HAL_OK;
  501. }
  502. /************************************************************************
  503. * function : HAL_ADC_Stop_IT
  504. * Description: Stop ADC conversion of regular group (and injected group in
  505. * case of auto_injection mode), disable interrution of
  506. * end-of-conversion, disable ADC peripheral.
  507. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  508. * the configuration information for ADC module
  509. * return : HAL_StatusTypeDef
  510. ************************************************************************/
  511. HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
  512. {
  513. /* Check the parameters */
  514. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  515. if(hadc->Init.ConConvMode)
  516. {
  517. /* Set stop flag */
  518. SET_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP);
  519. /* Waitting stop flag be cleared */
  520. while(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP));
  521. }
  522. /* Disable the ADC peripheral */
  523. __HAL_ADC_DISABLE(hadc);
  524. /* Disable all interruptions before enabling the desired ones */
  525. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE | ADC_IE_OVERFIE | ADC_IE_JEOCIE);
  526. /* Clear the SR register */
  527. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  528. /* Return function status */
  529. return HAL_OK;
  530. }
  531. /************************************************************************
  532. * function : HAL_ADC_Start_DMA
  533. * Description: Enable ADC, start conversion of regular group and transfer result through DMA.
  534. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  535. * the configuration information for ADC module
  536. * : pData : Destination Buffer address.
  537. * : Length : Number of data to be transferred from ADC peripheral to memory.
  538. * return : HAL_StatusTypeDef
  539. ************************************************************************/
  540. HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
  541. {
  542. HAL_StatusTypeDef tmp_hal_status;
  543. /* Check the parameters */
  544. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  545. /* Specific case for first call occurrence of this function (DMA transfer */
  546. /* not activated and ADC disabled), DMA transfer must be activated */
  547. /* with ADC disabled. */
  548. if (READ_BIT(hadc->Instance->CR1,ADC_CR1_DMA) == 0UL)
  549. {
  550. if(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_EN))
  551. {
  552. /* Disable ADC */
  553. __HAL_ADC_DISABLE(hadc);
  554. }
  555. /* Enable ADC DMA mode */
  556. SET_BIT(hadc->Instance->CR1,ADC_CR1_DMA);
  557. }
  558. /* Enable the ADC peripheral */
  559. __HAL_ADC_ENABLE(hadc);
  560. /* Clear the SR register */
  561. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  562. /* Disable all interruptions before enabling the desired ones */
  563. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE | ADC_IE_OVERFIE | ADC_IE_JEOCIE);
  564. /* Start the DMA channel */
  565. tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
  566. /* Enable conversion of regular group. */
  567. /* If software start has been selected, conversion starts immediately. */
  568. /* If external trigger has been selected, conversion will start at next */
  569. /* trigger event. */
  570. /* Start ADC group regular conversion */
  571. if(__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START))
  572. {
  573. /* Start covertion */
  574. SET_BIT(hadc->Instance->CR1,ADC_CR1_SWSTART);
  575. }
  576. /* Return function status */
  577. return tmp_hal_status;
  578. }
  579. /************************************************************************
  580. * function : HAL_ADC_Stop_DMA
  581. * Description: Stop ADC conversion of regular group (and injected group in
  582. * case of auto_injection mode), disable ADC DMA transfer, disable
  583. * ADC peripheral.
  584. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  585. * the configuration information for ADC module
  586. * return : HAL_StatusTypeDef
  587. ************************************************************************/
  588. HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
  589. {
  590. /* Check the parameters */
  591. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  592. if(hadc->Init.ConConvMode)
  593. {
  594. /* Set stop flag */
  595. SET_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP);
  596. /* Waitting stop flag be cleared */
  597. while(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP));
  598. }
  599. /* Waitting stop flag be cleared */
  600. while(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP));
  601. /* Disable the DMA channel (in case of DMA in circular mode or stop */
  602. /* while DMA transfer is on going) */
  603. HAL_DMA_Abort(hadc->DMA_Handle);
  604. /* Disable ADC overrun interrupt */
  605. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_OVERFIE);
  606. /* 2. Disable the ADC peripheral */
  607. /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */
  608. /* in memory a potential failing status. */
  609. /* Disable the ADC peripheral */
  610. __HAL_ADC_DISABLE(hadc);
  611. /* Disable all interruptions before enabling the desired ones */
  612. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE | ADC_IE_OVERFIE | ADC_IE_JEOCIE);
  613. /* Clear the SR register */
  614. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  615. /* Disable ADC DMA (ADC DMA configuration of continuous requests is kept) */
  616. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_DMA);
  617. /* Return function status */
  618. return HAL_OK;
  619. }
  620. /************************************************************************
  621. * function : HAL_ADC_GetValue
  622. * Description: ADC retrieve conversion value intended to be used with polling or interruption
  623. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  624. * the configuration information for ADC module
  625. * return : uint32_t the ADC covert result.
  626. ************************************************************************/
  627. uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef *hadc)
  628. {
  629. /* Check the parameters */
  630. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  631. return (hadc->Instance->DR);
  632. }
  633. /************************************************************************
  634. * function : HAL_ADC_PollForEvent
  635. * Description: Poll for ADC event.
  636. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  637. * the configuration information for ADC module
  638. * : EventType: the ADC event type. can be :ADC_SR_AWD,ADC_SR_OVERF,ADC_SR_EOG,ADC_SR_JEOC,ADC_SR_EOC
  639. * : Timeout : Polling timeout.
  640. * return : HAL_StatusTypeDef
  641. ************************************************************************/
  642. HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef *hadc, uint32_t EventType, uint32_t Timeout)
  643. {
  644. __IO uint32_t uiTimeout;
  645. /* Check the parameters */
  646. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  647. if(!IS_ADC_EVENT_TYPE(EventType)) return HAL_ERROR;
  648. uiTimeout = Timeout;
  649. /* Check selected event flag */
  650. while (__HAL_ADC_GET_FLAG(hadc, EventType) == 0UL)
  651. {
  652. /* Check if timeout is disabled (set to infinite wait) */
  653. if(uiTimeout)
  654. {
  655. uiTimeout--;
  656. if(uiTimeout == 0)
  657. return HAL_TIMEOUT;
  658. }
  659. }
  660. if(EventType == ADC_SR_OVERF)
  661. {
  662. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_OVERF);
  663. if (hadc->Init.OverMode == ADC_OVERMODE_ENABLE)
  664. {
  665. /* Clear ADC Overrun flag only if Overrun is set to ADC_OVERMODE_ENABLE(Over written) */
  666. return HAL_ERROR;
  667. }
  668. }
  669. else
  670. {
  671. __HAL_ADC_CLEAR_FLAG(hadc, EventType);
  672. }
  673. /* Return function status */
  674. return HAL_OK;
  675. }
  676. /************************************************************************
  677. * function : HAL_ADC_InjectedStart_IT
  678. * Description: Enable ADC, start conversion of injected channel with interruption.
  679. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  680. * the configuration information for ADC module
  681. * return : HAL_StatusTypeDef
  682. ************************************************************************/
  683. HAL_StatusTypeDef HAL_ADC_InjectedStart_IT(ADC_HandleTypeDef* hadc)
  684. {
  685. /* Check the parameters */
  686. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  687. /* Clear the SR register */
  688. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_JEOC);
  689. __HAL_ADC_ENABLE_IT(hadc, ADC_IE_JEOCIE);
  690. /* Enable ADC overrun interrupt */
  691. /* If hadc->Init.OverMode is set to ADC_OVERMODE_DISABLE, only then is
  692. ADC_IE_OVERFIE enabled; otherwise data overwrite is considered as normal
  693. behavior and no CPU time is lost for a non-processed interruption */
  694. if (hadc->Init.OverMode == ADC_OVERMODE_DISABLE)
  695. {
  696. __HAL_ADC_ENABLE_IT(hadc, ADC_IE_OVERFIE);
  697. }
  698. if(__HAL_ADC_CHECK_TRIG_INJECTED(hadc, ADC_SOFTWARE_START))
  699. {
  700. /* Start covertion */
  701. SET_BIT(hadc->Instance->CR1,ADC_CR1_JSWSTART);
  702. }
  703. /* Return function status */
  704. return HAL_OK;
  705. }
  706. /************************************************************************
  707. * function : HAL_ADC_InjectedStop_IT
  708. * Description: Stop ADC conversion of injected channel, disable interrution of
  709. * end-of-conversion, disable ADC peripheral.
  710. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  711. * the configuration information for ADC module
  712. * return : HAL_StatusTypeDef
  713. ************************************************************************/
  714. HAL_StatusTypeDef HAL_ADC_InjectedStop_IT(ADC_HandleTypeDef* hadc)
  715. {
  716. /* Return function status */
  717. return (HAL_ADC_Stop_IT(hadc));
  718. }
  719. /************************************************************************
  720. * function : HAL_ADC_InjectedGetValue
  721. * Description: ADC retrieve injected channel conversion value intended to be used with polling or interruption
  722. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  723. * the configuration information for ADC module
  724. * return : uint32_t the ADC covert result.
  725. ************************************************************************/
  726. uint32_t HAL_ADC_InjectedGetValue(ADC_HandleTypeDef *hadc)
  727. {
  728. /* Check the parameters */
  729. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  730. return (hadc->Instance->JDR);
  731. }
  732. /************************************************************************
  733. * function : HAL_ADC_Polling
  734. * Description: Polling to get the results of the ADC converter.
  735. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  736. * the configuration information for ADC module
  737. * : pData : Destination Buffer address.
  738. * : Length : Number of data to be transferred from ADC peripheral to memory.
  739. * : Timeout : Polling timeout.
  740. * return : HAL_StatusTypeDef
  741. ************************************************************************/
  742. HAL_StatusTypeDef HAL_ADC_Polling(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length, uint32_t Timeout)
  743. {
  744. uint32_t tmp_hal_status;
  745. __IO uint32_t uiTimeout;
  746. if(HAL_ADC_Start(hadc) != HAL_OK) return HAL_ERROR;
  747. if(!pData) return HAL_ERROR;
  748. hadc->AdcResults = pData;
  749. uiTimeout = Timeout;
  750. while(Length)
  751. {
  752. tmp_hal_status = hadc->Instance->SR;
  753. if(tmp_hal_status & ADC_SR_EOC)
  754. {
  755. *hadc->AdcResults = hadc->Instance->DR | HAL_ADC_EOC_FLAG;
  756. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_EOC);
  757. hadc->AdcResults++;
  758. Length--;
  759. }
  760. if(tmp_hal_status & ADC_SR_JEOC)
  761. {
  762. *hadc->AdcResults = hadc->Instance->JDR | HAL_ADC_JEOC_FLAG;
  763. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_JEOC);
  764. hadc->AdcResults++;
  765. Length--;
  766. }
  767. if(tmp_hal_status & ADC_SR_OVERF)
  768. {
  769. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_OVERF);
  770. }
  771. if(tmp_hal_status & ADC_SR_EOG)
  772. {
  773. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_EOG);
  774. break;
  775. }
  776. if(uiTimeout)
  777. {
  778. uiTimeout--;
  779. if(uiTimeout == 0)
  780. return HAL_TIMEOUT;
  781. }
  782. }
  783. HAL_ADC_Stop(hadc);
  784. return HAL_OK;
  785. }