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drv_gpio.c 8.9 KB

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  1. /*
  2. * Copyright (c) 2006-2020, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-07-09 whik first version
  9. */
  10. #include <rtthread.h>
  11. #include <rtdevice.h>
  12. #include <rthw.h>
  13. #include "drv_gpio.h"
  14. #ifdef BSP_USING_GPIO
  15. static struct rt_pin_irq_hdr sf2_pin_irq_hdr_tab[] =
  16. {
  17. /* pin, hdr, mode, args */
  18. {-1, 0, RT_NULL, RT_NULL},
  19. {-1, 0, RT_NULL, RT_NULL},
  20. {-1, 0, RT_NULL, RT_NULL},
  21. {-1, 0, RT_NULL, RT_NULL},
  22. {-1, 0, RT_NULL, RT_NULL},
  23. {-1, 0, RT_NULL, RT_NULL},
  24. {-1, 0, RT_NULL, RT_NULL},
  25. {-1, 0, RT_NULL, RT_NULL},
  26. {-1, 0, RT_NULL, RT_NULL},
  27. {-1, 0, RT_NULL, RT_NULL},
  28. {-1, 0, RT_NULL, RT_NULL},
  29. {-1, 0, RT_NULL, RT_NULL},
  30. {-1, 0, RT_NULL, RT_NULL},
  31. {-1, 0, RT_NULL, RT_NULL},
  32. {-1, 0, RT_NULL, RT_NULL},
  33. {-1, 0, RT_NULL, RT_NULL},
  34. {-1, 0, RT_NULL, RT_NULL},
  35. {-1, 0, RT_NULL, RT_NULL},
  36. {-1, 0, RT_NULL, RT_NULL},
  37. {-1, 0, RT_NULL, RT_NULL},
  38. {-1, 0, RT_NULL, RT_NULL},
  39. {-1, 0, RT_NULL, RT_NULL},
  40. {-1, 0, RT_NULL, RT_NULL},
  41. {-1, 0, RT_NULL, RT_NULL},
  42. {-1, 0, RT_NULL, RT_NULL},
  43. {-1, 0, RT_NULL, RT_NULL},
  44. {-1, 0, RT_NULL, RT_NULL},
  45. {-1, 0, RT_NULL, RT_NULL},
  46. {-1, 0, RT_NULL, RT_NULL},
  47. {-1, 0, RT_NULL, RT_NULL},
  48. {-1, 0, RT_NULL, RT_NULL},
  49. {-1, 0, RT_NULL, RT_NULL},
  50. };
  51. /* configure an individual GPIO port */
  52. static void sf2_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
  53. {
  54. uint32_t config;
  55. switch (mode)
  56. {
  57. case PIN_MODE_OUTPUT:
  58. config = MSS_GPIO_OUTPUT_MODE;
  59. break;
  60. case PIN_MODE_INPUT:
  61. config = MSS_GPIO_INPUT_MODE;
  62. break;
  63. default:
  64. config = MSS_GPIO_INOUT_MODE;
  65. break;
  66. }
  67. MSS_GPIO_config((mss_gpio_id_t )pin, config);
  68. }
  69. static int sf2_pin_read(rt_device_t dev, rt_base_t pin)
  70. {
  71. uint32_t value;
  72. value = MSS_GPIO_get_inputs() & (1<<pin);
  73. return ((value) ? PIN_HIGH : PIN_LOW);
  74. }
  75. static void sf2_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
  76. {
  77. if (value == PIN_HIGH)
  78. MSS_GPIO_set_output((mss_gpio_id_t )pin, 1);
  79. else
  80. MSS_GPIO_set_output((mss_gpio_id_t )pin, 0);
  81. }
  82. static rt_err_t sf2_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
  83. rt_uint32_t mode, void (*hdr)(void *args), void *args)
  84. {
  85. rt_base_t level;
  86. level = rt_hw_interrupt_disable();
  87. if (sf2_pin_irq_hdr_tab[pin].pin == pin &&
  88. sf2_pin_irq_hdr_tab[pin].hdr == hdr &&
  89. sf2_pin_irq_hdr_tab[pin].mode == mode &&
  90. sf2_pin_irq_hdr_tab[pin].args == args)
  91. {
  92. rt_hw_interrupt_enable(level);
  93. return RT_EOK;
  94. }
  95. if (sf2_pin_irq_hdr_tab[pin].pin != -1)
  96. {
  97. rt_hw_interrupt_enable(level);
  98. return -RT_EBUSY;
  99. }
  100. sf2_pin_irq_hdr_tab[pin].pin = pin;
  101. sf2_pin_irq_hdr_tab[pin].hdr = hdr;
  102. sf2_pin_irq_hdr_tab[pin].mode = mode;
  103. sf2_pin_irq_hdr_tab[pin].args = args;
  104. rt_hw_interrupt_enable(level);
  105. return RT_EOK;
  106. }
  107. static rt_err_t sf2_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
  108. {
  109. rt_base_t level;
  110. level = rt_hw_interrupt_disable();
  111. if (sf2_pin_irq_hdr_tab[pin].pin == -1)
  112. {
  113. rt_hw_interrupt_enable(level);
  114. return RT_EOK;
  115. }
  116. sf2_pin_irq_hdr_tab[pin].pin = -1;
  117. sf2_pin_irq_hdr_tab[pin].hdr = RT_NULL;
  118. sf2_pin_irq_hdr_tab[pin].mode = 0;
  119. sf2_pin_irq_hdr_tab[pin].args = RT_NULL;
  120. rt_hw_interrupt_enable(level);
  121. return RT_EOK;
  122. }
  123. static rt_err_t sf2_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
  124. {
  125. uint32_t mode = 0;
  126. rt_base_t level;
  127. if (enabled == PIN_IRQ_ENABLE)
  128. {
  129. level = rt_hw_interrupt_disable();
  130. if (sf2_pin_irq_hdr_tab[pin].pin == -1)
  131. {
  132. rt_hw_interrupt_enable(level);
  133. return -RT_ENOSYS;
  134. }
  135. switch(sf2_pin_irq_hdr_tab[pin].mode)
  136. {
  137. case PIN_IRQ_MODE_RISING :
  138. mode = MSS_GPIO_IRQ_EDGE_POSITIVE;
  139. break;
  140. case PIN_IRQ_MODE_FALLING :
  141. mode = MSS_GPIO_IRQ_EDGE_NEGATIVE;
  142. break;
  143. case PIN_IRQ_MODE_RISING_FALLING:
  144. mode = MSS_GPIO_IRQ_EDGE_BOTH;
  145. break;
  146. case PIN_IRQ_MODE_HIGH_LEVEL :
  147. mode = MSS_GPIO_IRQ_LEVEL_HIGH;
  148. break;
  149. case PIN_IRQ_MODE_LOW_LEVEL:
  150. mode = MSS_GPIO_IRQ_LEVEL_LOW;
  151. break;
  152. }
  153. MSS_GPIO_config((mss_gpio_id_t )pin, MSS_GPIO_INPUT_MODE | mode);
  154. MSS_GPIO_enable_irq((mss_gpio_id_t )pin);
  155. rt_hw_interrupt_enable(level);
  156. }
  157. else if (enabled == PIN_IRQ_DISABLE)
  158. {
  159. MSS_GPIO_config((mss_gpio_id_t )pin, MSS_GPIO_INPUT_MODE);
  160. MSS_GPIO_disable_irq((mss_gpio_id_t )pin);
  161. }
  162. else
  163. return -RT_ENOSYS;
  164. return RT_EOK;
  165. }
  166. static const struct rt_pin_ops sf2_pin_ops =
  167. {
  168. sf2_pin_mode,
  169. sf2_pin_write,
  170. sf2_pin_read,
  171. sf2_pin_attach_irq,
  172. sf2_pin_detach_irq,
  173. sf2_pin_irq_enable
  174. };
  175. int rt_hw_pin_init(void)
  176. {
  177. rt_err_t result = RT_EOK;
  178. MSS_GPIO_init();
  179. result = rt_device_pin_register("pin", &sf2_pin_ops, RT_NULL);
  180. RT_ASSERT(result == RT_EOK);
  181. return result;
  182. }
  183. INIT_BOARD_EXPORT(rt_hw_pin_init);
  184. rt_inline void pin_irq_hdr(int pin)
  185. {
  186. MSS_GPIO_clear_irq((mss_gpio_id_t )pin);
  187. if (sf2_pin_irq_hdr_tab[pin].hdr)
  188. sf2_pin_irq_hdr_tab[pin].hdr(sf2_pin_irq_hdr_tab[pin].args);
  189. }
  190. void GPIO0_IRQHandler( void )
  191. {
  192. /* enter interrupt */
  193. rt_interrupt_enter();
  194. pin_irq_hdr(0);
  195. /* leave interrupt */
  196. rt_interrupt_leave();
  197. }
  198. void GPIO1_IRQHandler( void )
  199. {
  200. rt_interrupt_enter();
  201. pin_irq_hdr(1);
  202. rt_interrupt_leave();
  203. }
  204. void GPIO2_IRQHandler( void )
  205. {
  206. rt_interrupt_enter();
  207. pin_irq_hdr(2);
  208. rt_interrupt_leave();
  209. }
  210. void GPIO3_IRQHandler( void )
  211. {
  212. rt_interrupt_enter();
  213. pin_irq_hdr(3);
  214. rt_interrupt_leave();
  215. }
  216. void GPIO4_IRQHandler( void )
  217. {
  218. rt_interrupt_enter();
  219. pin_irq_hdr(4);
  220. rt_interrupt_leave();
  221. }
  222. void GPIO5_IRQHandler( void )
  223. {
  224. rt_interrupt_enter();
  225. pin_irq_hdr(5);
  226. rt_interrupt_leave();
  227. }
  228. void GPIO6_IRQHandler( void )
  229. {
  230. rt_interrupt_enter();
  231. pin_irq_hdr(6);
  232. rt_interrupt_leave();
  233. }
  234. void GPIO7_IRQHandler( void )
  235. {
  236. rt_interrupt_enter();
  237. pin_irq_hdr(7);
  238. rt_interrupt_leave();
  239. }
  240. void GPIO8_IRQHandler( void )
  241. {
  242. rt_interrupt_enter();
  243. pin_irq_hdr(8);
  244. rt_interrupt_leave();
  245. }
  246. void GPIO9_IRQHandler( void )
  247. {
  248. rt_interrupt_enter();
  249. pin_irq_hdr(9);
  250. rt_interrupt_leave();
  251. }
  252. void GPIO10_IRQHandler( void )
  253. {
  254. rt_interrupt_enter();
  255. pin_irq_hdr(10);
  256. rt_interrupt_leave();
  257. }
  258. void GPIO11_IRQHandler( void )
  259. {
  260. rt_interrupt_enter();
  261. pin_irq_hdr(11);
  262. rt_interrupt_leave();
  263. }
  264. void GPIO12_IRQHandler( void )
  265. {
  266. rt_interrupt_enter();
  267. pin_irq_hdr(12);
  268. rt_interrupt_leave();
  269. }
  270. void GPIO13_IRQHandler( void )
  271. {
  272. rt_interrupt_enter();
  273. pin_irq_hdr(13);
  274. rt_interrupt_leave();
  275. }
  276. void GPIO14_IRQHandler( void )
  277. {
  278. rt_interrupt_enter();
  279. pin_irq_hdr(14);
  280. rt_interrupt_leave();
  281. }
  282. void GPIO15_IRQHandler( void )
  283. {
  284. rt_interrupt_enter();
  285. pin_irq_hdr(15);
  286. rt_interrupt_leave();
  287. }
  288. void GPIO16_IRQHandler( void )
  289. {
  290. rt_interrupt_enter();
  291. pin_irq_hdr(16);
  292. rt_interrupt_leave();
  293. }
  294. void GPIO17_IRQHandler( void )
  295. {
  296. rt_interrupt_enter();
  297. pin_irq_hdr(17);
  298. rt_interrupt_leave();
  299. }
  300. void GPIO18_IRQHandler( void )
  301. {
  302. rt_interrupt_enter();
  303. pin_irq_hdr(18);
  304. rt_interrupt_leave();
  305. }
  306. void GPIO19_IRQHandler( void )
  307. {
  308. rt_interrupt_enter();
  309. pin_irq_hdr(19);
  310. rt_interrupt_leave();
  311. }
  312. void GPIO20_IRQHandler( void )
  313. {
  314. rt_interrupt_enter();
  315. pin_irq_hdr(20);
  316. rt_interrupt_leave();
  317. }
  318. void GPIO21_IRQHandler( void )
  319. {
  320. rt_interrupt_enter();
  321. pin_irq_hdr(21);
  322. rt_interrupt_leave();
  323. }
  324. void GPIO22_IRQHandler( void )
  325. {
  326. rt_interrupt_enter();
  327. pin_irq_hdr(22);
  328. rt_interrupt_leave();
  329. }
  330. void GPIO23_IRQHandler( void )
  331. {
  332. rt_interrupt_enter();
  333. pin_irq_hdr(23);
  334. rt_interrupt_leave();
  335. }
  336. void GPIO24_IRQHandler( void )
  337. {
  338. rt_interrupt_enter();
  339. pin_irq_hdr(24);
  340. rt_interrupt_leave();
  341. }
  342. void GPIO25_IRQHandler( void )
  343. {
  344. rt_interrupt_enter();
  345. pin_irq_hdr(25);
  346. rt_interrupt_leave();
  347. }
  348. void GPIO26_IRQHandler( void )
  349. {
  350. rt_interrupt_enter();
  351. pin_irq_hdr(26);
  352. rt_interrupt_leave();
  353. }
  354. void GPIO27_IRQHandler( void )
  355. {
  356. rt_interrupt_enter();
  357. pin_irq_hdr(27);
  358. rt_interrupt_leave();
  359. }
  360. void GPIO28_IRQHandler( void )
  361. {
  362. rt_interrupt_enter();
  363. pin_irq_hdr(28);
  364. rt_interrupt_leave();
  365. }
  366. void GPIO29_IRQHandler( void )
  367. {
  368. rt_interrupt_enter();
  369. pin_irq_hdr(29);
  370. rt_interrupt_leave();
  371. }
  372. void GPIO30_IRQHandler( void )
  373. {
  374. rt_interrupt_enter();
  375. pin_irq_hdr(30);
  376. rt_interrupt_leave();
  377. }
  378. void GPIO31_IRQHandler( void )
  379. {
  380. rt_interrupt_enter();
  381. pin_irq_hdr(31);
  382. rt_interrupt_leave();
  383. }
  384. #endif