tae32f53xx_ac5_flash.sct 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127
  1. #! armcc -E
  2. ; command above MUST be in first line (no comment above!)
  3. /*
  4. ;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
  5. */
  6. /*--------------------- Flash Configuration ----------------------------------
  7. ; <h> Flash Configuration
  8. ; <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
  9. ; <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
  10. ; </h>
  11. *----------------------------------------------------------------------------*/
  12. #define __ROM_BASE 0x08000000
  13. #define __ROM_SIZE 0x00012C00
  14. /*--------------------- RAMCODE Section Configuration ------------------------
  15. ; <h> RAMCODE Configuration
  16. ; <o0.27..28> RAMCODE in which MCU
  17. ; <3=> TAE32F5300
  18. ; <2=> TAE32F5600
  19. ; <i> RAMCODE Base Address is different in different MCUs
  20. ; <i> Unsupported if your MCU is not in the list
  21. ; <o1> RAMCODE Size (in Bytes) <0x0-0xFFFFFFFF:8>
  22. ; </h>
  23. *----------------------------------------------------------------------------*/
  24. #define __RAMCODE_BASE 0x18000000
  25. #define __RAMCODE_SIZE 0x00000000
  26. /*--------------------- Embedded RAMA Configuration --------------------------
  27. ; <h> RAMA Configuration
  28. ; <o0> RAMA Base Address <0x0-0xFFFFFFFF:8>
  29. ; <o1> RAMA Size (in Bytes) <0x0-0xFFFFFFFF:8>
  30. ; </h>
  31. *----------------------------------------------------------------------------*/
  32. #define __RAMA_BASE 0x20000000
  33. #define __RAMA_SIZE 0x00004000
  34. /*--------------------- Embedded RAMB Configuration --------------------------
  35. ; <h> RAMB Configuration
  36. ; <o0> RAMB Base Address <0x0-0xFFFFFFFF:8>
  37. ; <o1> RAMB Size (in Bytes) <0x0-0xFFFFFFFF:8>
  38. ; </h>
  39. *----------------------------------------------------------------------------*/
  40. #define __RAMB_BASE 0x20004000
  41. #define __RAMB_SIZE 0x00001000
  42. /*--------------------- Embedded RAMC Configuration --------------------------
  43. ; <h> RAMC Configuration
  44. ; <o0> RAMC Base Address <0x0-0xFFFFFFFF:8>
  45. ; <o1> RAMC Size (in Bytes) <0x0-0xFFFFFFFF:8>
  46. ; </h>
  47. *----------------------------------------------------------------------------*/
  48. #define __RAMC_BASE 0x20005000
  49. #define __RAMC_SIZE 0x00001000
  50. /*--------------------- Stack / Heap Configuration ---------------------------
  51. ; <h> Stack / Heap Configuration
  52. ; <i> Stack and Heap will be placed in RAMA
  53. ; <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  54. ; <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  55. ; </h>
  56. *----------------------------------------------------------------------------*/
  57. #define __STACK_SIZE 0x00000400
  58. #define __HEAP_SIZE 0x00000000
  59. /*
  60. ;------------- <<< end of configuration section >>> ---------------------------
  61. */
  62. /*----------------------------------------------------------------------------
  63. User Stack & Heap boundary definition
  64. *----------------------------------------------------------------------------*/
  65. #define __STACK_TOP (__RAMA_BASE + __RAMA_SIZE) /* starts at end of RAMA */
  66. #define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAMA section, 8 byte aligned */
  67. /*----------------------------------------------------------------------------
  68. Scatter File Definitions definition
  69. *----------------------------------------------------------------------------*/
  70. #define __RO_BASE __ROM_BASE
  71. #define __RO_SIZE __ROM_SIZE
  72. #define __RW_CODE_BASE __RAMCODE_BASE
  73. #define __RW_CODE_SIZE __RAMCODE_SIZE
  74. #define __RW_BASE (__RAMA_BASE + __RAMCODE_SIZE)
  75. #define __RW_SIZE (__RAMA_SIZE - __RAMCODE_SIZE - __STACK_SIZE - __HEAP_SIZE)
  76. LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
  77. ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
  78. *.o (RESET, +First)
  79. *(InRoot$$Sections)
  80. .ANY (+RO)
  81. .ANY (+XO)
  82. }
  83. #if __RW_CODE_SIZE > 0
  84. RW_CODE __RW_CODE_BASE __RW_CODE_SIZE {
  85. *.o (RAMCODE)
  86. }
  87. #endif
  88. RW_RAMA __RW_BASE __RW_SIZE { ; RWA data
  89. *.o (SECTION_RAMA)
  90. .ANY (+RW +ZI)
  91. }
  92. #if __HEAP_SIZE > 0
  93. ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap
  94. }
  95. #endif
  96. ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
  97. }
  98. RW_RAMB __RAMB_BASE __RAMB_SIZE { ; RWB region
  99. *.o (SECTION_RAMB)
  100. }
  101. RW_RAMC __RAMC_BASE __RAMC_SIZE { ; RWC region
  102. *.o (SECTION_RAMC)
  103. }
  104. }