F2837xD_defaultisr.h 13 KB

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  1. //###########################################################################
  2. //
  3. // FILE: F2837xD_defaultisr.h
  4. //
  5. // TITLE: F2837xD Device Default Interrupt Service Routines Definitions
  6. //
  7. //###########################################################################
  8. // $TI Release: F2837xD Support Library v3.05.00.00 $
  9. // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
  10. // $Copyright:
  11. // Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
  12. //
  13. // Redistribution and use in source and binary forms, with or without
  14. // modification, are permitted provided that the following conditions
  15. // are met:
  16. //
  17. // Redistributions of source code must retain the above copyright
  18. // notice, this list of conditions and the following disclaimer.
  19. //
  20. // Redistributions in binary form must reproduce the above copyright
  21. // notice, this list of conditions and the following disclaimer in the
  22. // documentation and/or other materials provided with the
  23. // distribution.
  24. //
  25. // Neither the name of Texas Instruments Incorporated nor the names of
  26. // its contributors may be used to endorse or promote products derived
  27. // from this software without specific prior written permission.
  28. //
  29. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40. // $
  41. //###########################################################################
  42. #ifndef F2837xD_DEFAULT_ISR_H
  43. #define F2837xD_DEFAULT_ISR_H
  44. #ifdef __cplusplus
  45. extern "C" {
  46. #endif
  47. //
  48. // Default Interrupt Service Routine Declarations:
  49. // The following function prototypes are for the
  50. // default ISR routines used with the default PIE vector table.
  51. // This default vector table is found in the F2837xD_pievect.h
  52. // file.
  53. //
  54. interrupt void TIMER1_ISR(void); // CPU Timer 1 Interrupt
  55. interrupt void TIMER2_ISR(void); // CPU Timer 2 Interrupt
  56. interrupt void DATALOG_ISR(void); // Datalogging Interrupt
  57. interrupt void RTOS_ISR(void); // RTOS Interrupt
  58. interrupt void EMU_ISR(void); // Emulation Interrupt
  59. interrupt void NMI_ISR(void); // Non-Maskable Interrupt
  60. interrupt void ILLEGAL_ISR(void); // Illegal Operation Trap
  61. interrupt void USER1_ISR(void); // User Defined Trap 1
  62. interrupt void USER2_ISR(void); // User Defined Trap 2
  63. interrupt void USER3_ISR(void); // User Defined Trap 3
  64. interrupt void USER4_ISR(void); // User Defined Trap 4
  65. interrupt void USER5_ISR(void); // User Defined Trap 5
  66. interrupt void USER6_ISR(void); // User Defined Trap 6
  67. interrupt void USER7_ISR(void); // User Defined Trap 7
  68. interrupt void USER8_ISR(void); // User Defined Trap 8
  69. interrupt void USER9_ISR(void); // User Defined Trap 9
  70. interrupt void USER10_ISR(void); // User Defined Trap 10
  71. interrupt void USER11_ISR(void); // User Defined Trap 11
  72. interrupt void USER12_ISR(void); // User Defined Trap 12
  73. interrupt void ADCA1_ISR(void); // 1.1 - ADCA Interrupt 1
  74. interrupt void ADCB1_ISR(void); // 1.2 - ADCB Interrupt 1
  75. interrupt void ADCC1_ISR(void); // 1.3 - ADCC Interrupt 1
  76. interrupt void XINT1_ISR(void); // 1.4 - XINT1 Interrupt
  77. interrupt void XINT2_ISR(void); // 1.5 - XINT2 Interrupt
  78. interrupt void ADCD1_ISR(void); // 1.6 - ADCD Interrupt 1
  79. interrupt void TIMER0_ISR(void); // 1.7 - Timer 0 Interrupt
  80. interrupt void WAKE_ISR(void); // 1.8 - Standby and Halt Wakeup Interrupt
  81. interrupt void EPWM1_TZ_ISR(void); // 2.1 - ePWM1 Trip Zone Interrupt
  82. interrupt void EPWM2_TZ_ISR(void); // 2.2 - ePWM2 Trip Zone Interrupt
  83. interrupt void EPWM3_TZ_ISR(void); // 2.3 - ePWM3 Trip Zone Interrupt
  84. interrupt void EPWM4_TZ_ISR(void); // 2.4 - ePWM4 Trip Zone Interrupt
  85. interrupt void EPWM5_TZ_ISR(void); // 2.5 - ePWM5 Trip Zone Interrupt
  86. interrupt void EPWM6_TZ_ISR(void); // 2.6 - ePWM6 Trip Zone Interrupt
  87. interrupt void EPWM7_TZ_ISR(void); // 2.7 - ePWM7 Trip Zone Interrupt
  88. interrupt void EPWM8_TZ_ISR(void); // 2.8 - ePWM8 Trip Zone Interrupt
  89. interrupt void EPWM1_ISR(void); // 3.1 - ePWM1 Interrupt
  90. interrupt void EPWM2_ISR(void); // 3.2 - ePWM2 Interrupt
  91. interrupt void EPWM3_ISR(void); // 3.3 - ePWM3 Interrupt
  92. interrupt void EPWM4_ISR(void); // 3.4 - ePWM4 Interrupt
  93. interrupt void EPWM5_ISR(void); // 3.5 - ePWM5 Interrupt
  94. interrupt void EPWM6_ISR(void); // 3.6 - ePWM6 Interrupt
  95. interrupt void EPWM7_ISR(void); // 3.7 - ePWM7 Interrupt
  96. interrupt void EPWM8_ISR(void); // 3.8 - ePWM8 Interrupt
  97. interrupt void ECAP1_ISR(void); // 4.1 - eCAP1 Interrupt
  98. interrupt void ECAP2_ISR(void); // 4.2 - eCAP2 Interrupt
  99. interrupt void ECAP3_ISR(void); // 4.3 - eCAP3 Interrupt
  100. interrupt void ECAP4_ISR(void); // 4.4 - eCAP4 Interrupt
  101. interrupt void ECAP5_ISR(void); // 4.5 - eCAP5 Interrupt
  102. interrupt void ECAP6_ISR(void); // 4.6 - eCAP6 Interrupt
  103. interrupt void EQEP1_ISR(void); // 5.1 - eQEP1 Interrupt
  104. interrupt void EQEP2_ISR(void); // 5.2 - eQEP2 Interrupt
  105. interrupt void EQEP3_ISR(void); // 5.3 - eQEP3 Interrupt
  106. interrupt void SPIA_RX_ISR(void); // 6.1 - SPIA Receive Interrupt
  107. interrupt void SPIA_TX_ISR(void); // 6.2 - SPIA Transmit Interrupt
  108. interrupt void SPIB_RX_ISR(void); // 6.3 - SPIB Receive Interrupt
  109. interrupt void SPIB_TX_ISR(void); // 6.4 - SPIB Transmit Interrupt
  110. interrupt void MCBSPA_RX_ISR(void); // 6.5 - McBSPA Receive Interrupt
  111. interrupt void MCBSPA_TX_ISR(void); // 6.6 - McBSPA Transmit Interrupt
  112. interrupt void MCBSPB_RX_ISR(void); // 6.7 - McBSPB Receive Interrupt
  113. interrupt void MCBSPB_TX_ISR(void); // 6.8 - McBSPB Transmit Interrupt
  114. interrupt void DMA_CH1_ISR(void); // 7.1 - DMA Channel 1 Interrupt
  115. interrupt void DMA_CH2_ISR(void); // 7.2 - DMA Channel 2 Interrupt
  116. interrupt void DMA_CH3_ISR(void); // 7.3 - DMA Channel 3 Interrupt
  117. interrupt void DMA_CH4_ISR(void); // 7.4 - DMA Channel 4 Interrupt
  118. interrupt void DMA_CH5_ISR(void); // 7.5 - DMA Channel 5 Interrupt
  119. interrupt void DMA_CH6_ISR(void); // 7.6 - DMA Channel 6 Interrupt
  120. interrupt void I2CA_ISR(void); // 8.1 - I2CA Interrupt 1
  121. interrupt void I2CA_FIFO_ISR(void); // 8.2 - I2CA Interrupt 2
  122. interrupt void I2CB_ISR(void); // 8.3 - I2CB Interrupt 1
  123. interrupt void I2CB_FIFO_ISR(void); // 8.4 - I2CB Interrupt 2
  124. interrupt void SCIC_RX_ISR(void); // 8.5 - SCIC Receive Interrupt
  125. interrupt void SCIC_TX_ISR(void); // 8.6 - SCIC Transmit Interrupt
  126. interrupt void SCID_RX_ISR(void); // 8.7 - SCID Receive Interrupt
  127. interrupt void SCID_TX_ISR(void); // 8.8 - SCID Transmit Interrupt
  128. interrupt void SCIA_RX_ISR(void); // 9.1 - SCIA Receive Interrupt
  129. interrupt void SCIA_TX_ISR(void); // 9.2 - SCIA Transmit Interrupt
  130. interrupt void SCIB_RX_ISR(void); // 9.3 - SCIB Receive Interrupt
  131. interrupt void SCIB_TX_ISR(void); // 9.4 - SCIB Transmit Interrupt
  132. interrupt void CANA0_ISR(void); // 9.5 - CANA Interrupt 0
  133. interrupt void CANA1_ISR(void); // 9.6 - CANA Interrupt 1
  134. interrupt void CANB0_ISR(void); // 9.7 - CANB Interrupt 0
  135. interrupt void CANB1_ISR(void); // 9.8 - CANB Interrupt 1
  136. interrupt void ADCA_EVT_ISR(void); // 10.1 - ADCA Event Interrupt
  137. interrupt void ADCA2_ISR(void); // 10.2 - ADCA Interrupt 2
  138. interrupt void ADCA3_ISR(void); // 10.3 - ADCA Interrupt 3
  139. interrupt void ADCA4_ISR(void); // 10.4 - ADCA Interrupt 4
  140. interrupt void ADCB_EVT_ISR(void); // 10.5 - ADCB Event Interrupt
  141. interrupt void ADCB2_ISR(void); // 10.6 - ADCB Interrupt 2
  142. interrupt void ADCB3_ISR(void); // 10.7 - ADCB Interrupt 3
  143. interrupt void ADCB4_ISR(void); // 10.8 - ADCB Interrupt 4
  144. interrupt void CLA1_1_ISR(void); // 11.1 - CLA1 Interrupt 1
  145. interrupt void CLA1_2_ISR(void); // 11.2 - CLA1 Interrupt 2
  146. interrupt void CLA1_3_ISR(void); // 11.3 - CLA1 Interrupt 3
  147. interrupt void CLA1_4_ISR(void); // 11.4 - CLA1 Interrupt 4
  148. interrupt void CLA1_5_ISR(void); // 11.5 - CLA1 Interrupt 5
  149. interrupt void CLA1_6_ISR(void); // 11.6 - CLA1 Interrupt 6
  150. interrupt void CLA1_7_ISR(void); // 11.7 - CLA1 Interrupt 7
  151. interrupt void CLA1_8_ISR(void); // 11.8 - CLA1 Interrupt 8
  152. interrupt void XINT3_ISR(void); // 12.1 - XINT3 Interrupt
  153. interrupt void XINT4_ISR(void); // 12.2 - XINT4 Interrupt
  154. interrupt void XINT5_ISR(void); // 12.3 - XINT5 Interrupt
  155. interrupt void VCU_ISR(void); // 12.6 - VCU Interrupt
  156. interrupt void FPU_OVERFLOW_ISR(void); // 12.7 - FPU Overflow Interrupt
  157. interrupt void FPU_UNDERFLOW_ISR(void); // 12.8 - FPU Underflow Interrupt
  158. interrupt void IPC0_ISR(void); // 1.13 - IPC Interrupt 0
  159. interrupt void IPC1_ISR(void); // 1.14 - IPC Interrupt 1
  160. interrupt void IPC2_ISR(void); // 1.15 - IPC Interrupt 2
  161. interrupt void IPC3_ISR(void); // 1.16 - IPC Interrupt 3
  162. interrupt void EPWM9_TZ_ISR(void); // 2.9 - ePWM9 Trip Zone Interrupt
  163. interrupt void EPWM10_TZ_ISR(void); // 2.10 - ePWM10 Trip Zone Interrupt
  164. interrupt void EPWM11_TZ_ISR(void); // 2.11 - ePWM11 Trip Zone Interrupt
  165. interrupt void EPWM12_TZ_ISR(void); // 2.12 - ePWM12 Trip Zone Interrupt
  166. interrupt void EPWM9_ISR(void); // 3.9 - ePWM9 Interrupt
  167. interrupt void EPWM10_ISR(void); // 3.10 - ePWM10 Interrupt
  168. interrupt void EPWM11_ISR(void); // 3.11 - ePWM11 Interrupt
  169. interrupt void EPWM12_ISR(void); // 3.12 - ePWM12 Interrupt
  170. interrupt void SD1_ISR(void); // 5.9 - SD1 Interrupt
  171. interrupt void SD2_ISR(void); // 5.10 - SD2 Interrupt
  172. interrupt void SPIC_RX_ISR(void); // 6.9 - SPIC Receive Interrupt
  173. interrupt void SPIC_TX_ISR(void); // 6.10 - SPIC Transmit Interrupt
  174. interrupt void UPPA_ISR(void); // 8.15 - uPPA Interrupt
  175. interrupt void USBA_ISR(void); // 9.15 - USBA Interrupt
  176. interrupt void ADCC_EVT_ISR(void); // 10.9 - ADCC Event Interrupt
  177. interrupt void ADCC2_ISR(void); // 10.10 - ADCC Interrupt 2
  178. interrupt void ADCC3_ISR(void); // 10.11 - ADCC Interrupt 3
  179. interrupt void ADCC4_ISR(void); // 10.12 - ADCC Interrupt 4
  180. interrupt void ADCD_EVT_ISR(void); // 10.13 - ADCD Event Interrupt
  181. interrupt void ADCD2_ISR(void); // 10.14 - ADCD Interrupt 2
  182. interrupt void ADCD3_ISR(void); // 10.15 - ADCD Interrupt 3
  183. interrupt void ADCD4_ISR(void); // 10.16 - ADCD Interrupt 4
  184. interrupt void EMIF_ERROR_ISR(void); // 12.9 - EMIF Error Interrupt
  185. interrupt void RAM_CORRECTABLE_ERROR_ISR(void); // 12.10 - RAM Correctable
  186. // Error Interrupt
  187. interrupt void FLASH_CORRECTABLE_ERROR_ISR(void); // 12.11 - Flash Correctable
  188. // Error Interrupt
  189. interrupt void RAM_ACCESS_VIOLATION_ISR(void); // 12.12 - RAM Access
  190. // Violation Interrupt
  191. interrupt void SYS_PLL_SLIP_ISR(void); // 12.13 - System PLL Slip
  192. // Interrupt
  193. interrupt void AUX_PLL_SLIP_ISR(void); // 12.14 - Auxiliary PLL
  194. // Slip Interrupt
  195. interrupt void CLA_OVERFLOW_ISR(void); // 12.15 - CLA Overflow
  196. // Interrupt
  197. interrupt void CLA_UNDERFLOW_ISR(void); // 12.16 - CLA Underflow
  198. // Interrupt
  199. //
  200. // Catch-all for PIE Reserved Locations for testing purposes:
  201. //
  202. interrupt void PIE_RESERVED_ISR(void); // Reserved ISR
  203. interrupt void EMPTY_ISR(void); // Only does a return
  204. interrupt void NOTUSED_ISR(void); // Unused ISR
  205. #ifdef __cplusplus
  206. }
  207. #endif /* extern "C" */
  208. #endif // end of F2837xD_PIEVECT_H definition
  209. //
  210. // End of file
  211. //