1
0

board.c 3.7 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394
  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-11-06 SummerGift first version
  9. */
  10. #include "board.h"
  11. void SystemClock_Config(void)
  12. {
  13. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  14. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  15. RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
  16. /** Configure LSE Drive Capability
  17. */
  18. HAL_PWR_EnableBkUpAccess();
  19. __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
  20. /** Configure the main internal regulator output voltage
  21. */
  22. __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  23. /** Initializes the RCC Oscillators according to the specified parameters
  24. * in the RCC_OscInitTypeDef structure.
  25. */
  26. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI1
  27. |RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE
  28. |RCC_OSCILLATORTYPE_MSI;
  29. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  30. RCC_OscInitStruct.LSEState = RCC_LSE_ON;
  31. RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  32. RCC_OscInitStruct.MSIState = RCC_MSI_ON;
  33. RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  34. RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
  35. RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
  36. RCC_OscInitStruct.LSIState = RCC_LSI_ON;
  37. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  38. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
  39. RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
  40. RCC_OscInitStruct.PLL.PLLN = 32;
  41. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  42. RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
  43. RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
  44. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  45. {
  46. Error_Handler();
  47. }
  48. /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
  49. */
  50. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2
  51. |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  52. |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  53. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  54. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  55. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  56. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  57. RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV2;
  58. RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
  59. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
  60. {
  61. Error_Handler();
  62. }
  63. /** Initializes the peripherals clocks
  64. */
  65. PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RTC
  66. |RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_LPUART1
  67. |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_ADC;
  68. PeriphClkInitStruct.PLLSAI1.PLLN = 24;
  69. PeriphClkInitStruct.PLLSAI1.PLLP = RCC_PLLP_DIV2;
  70. PeriphClkInitStruct.PLLSAI1.PLLQ = RCC_PLLQ_DIV2;
  71. PeriphClkInitStruct.PLLSAI1.PLLR = RCC_PLLR_DIV2;
  72. PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_USBCLK|RCC_PLLSAI1_ADCCLK;
  73. PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
  74. PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
  75. PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
  76. PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
  77. PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
  78. PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSI;
  79. PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
  80. if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
  81. {
  82. Error_Handler();
  83. }
  84. /* USER CODE BEGIN Smps */
  85. /* USER CODE END Smps */
  86. /** Enable MSI Auto calibration
  87. */
  88. HAL_RCCEx_EnableMSIPLLMode();
  89. }