drv_mic.c 10 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-28 Ernest the first version
  9. */
  10. #include "board.h"
  11. #include "drv_mic.h"
  12. #include "drv_wm8978.h"
  13. #include "drv_sound.h"
  14. #define DBG_TAG "drv.mic"
  15. #define DBG_LVL DBG_INFO
  16. #include <rtdbg.h>
  17. #define CODEC_I2C_NAME ("i2c1")
  18. #define RX_DMA_FIFO_SIZE (2048)
  19. extern struct drv_sai _sai_a;
  20. static struct drv_sai _sai_b = {0};
  21. struct stm32_mic
  22. {
  23. struct rt_i2c_bus_device *i2c_bus;
  24. struct rt_audio_device audio;
  25. struct rt_audio_configure config;
  26. rt_uint8_t *rx_fifo;
  27. rt_bool_t startup;
  28. };
  29. static struct stm32_mic _stm32_audio_record = {0};
  30. static rt_err_t SAIB_samplerate_set(rt_uint32_t freq)
  31. {
  32. __HAL_SAI_DISABLE(&_sai_b.hsai);
  33. _sai_b.hsai.Init.AudioFrequency = freq;
  34. HAL_SAI_Init(&_sai_b.hsai);
  35. __HAL_SAI_ENABLE(&_sai_b.hsai);
  36. return RT_EOK;
  37. }
  38. void SAIB_channels_set(rt_uint16_t channels)
  39. {
  40. if (channels == 2)
  41. {
  42. _sai_b.hsai.Init.MonoStereoMode = SAI_STEREOMODE;
  43. }
  44. else
  45. {
  46. _sai_b.hsai.Init.MonoStereoMode = SAI_MONOMODE;
  47. }
  48. __HAL_SAI_DISABLE(&_sai_b.hsai);
  49. HAL_SAI_Init(&_sai_b.hsai);
  50. __HAL_SAI_ENABLE(&_sai_b.hsai);
  51. }
  52. void SAIB_samplebits_set(rt_uint16_t samplebits)
  53. {
  54. switch (samplebits)
  55. {
  56. case 16:
  57. _sai_b.hsai.Init.DataSize = SAI_DATASIZE_16;
  58. break;
  59. case 24:
  60. _sai_b.hsai.Init.DataSize = SAI_DATASIZE_24;
  61. break;
  62. case 32:
  63. _sai_b.hsai.Init.DataSize = SAI_DATASIZE_32;
  64. break;
  65. default:
  66. _sai_b.hsai.Init.DataSize = SAI_DATASIZE_16;
  67. break;
  68. }
  69. __HAL_SAI_DISABLE(&_sai_b.hsai);
  70. HAL_SAI_Init(&_sai_b.hsai);
  71. __HAL_SAI_ENABLE(&_sai_b.hsai);
  72. }
  73. void SAIB_config_set(struct rt_audio_configure config)
  74. {
  75. SAIB_channels_set(config.channels);
  76. SAIB_samplerate_set(config.samplerate);
  77. SAIB_samplebits_set(config.samplebits);
  78. }
  79. static void SAIB_config_init()
  80. {
  81. _sai_b.hsai.Instance = SAI1_Block_B;
  82. _sai_b.hsai.Init.AudioMode = SAI_MODESLAVE_RX;
  83. _sai_b.hsai.Init.Synchro = SAI_SYNCHRONOUS;
  84. _sai_b.hsai.Init.OutputDrive = SAI_OUTPUTDRIVE_ENABLE;
  85. _sai_b.hsai.Init.NoDivider = SAI_MASTERDIVIDER_ENABLE;
  86. _sai_b.hsai.Init.FIFOThreshold = SAI_FIFOTHRESHOLD_1QF;
  87. _sai_b.hsai.Init.ClockSource = SAI_CLKSOURCE_PLLI2S;
  88. _sai_b.hsai.Init.MonoStereoMode = SAI_STEREOMODE;
  89. _sai_b.hsai.Init.Protocol = SAI_FREE_PROTOCOL;
  90. _sai_b.hsai.Init.DataSize = SAI_DATASIZE_16;
  91. _sai_b.hsai.Init.FirstBit = SAI_FIRSTBIT_MSB;
  92. _sai_b.hsai.Init.ClockStrobing = SAI_CLOCKSTROBING_RISINGEDGE;
  93. /* frame */
  94. _sai_b.hsai.FrameInit.FrameLength = 64;
  95. _sai_b.hsai.FrameInit.ActiveFrameLength = 32;
  96. _sai_b.hsai.FrameInit.FSDefinition = SAI_FS_CHANNEL_IDENTIFICATION;
  97. _sai_b.hsai.FrameInit.FSPolarity = SAI_FS_ACTIVE_LOW;
  98. _sai_b.hsai.FrameInit.FSOffset = SAI_FS_BEFOREFIRSTBIT;
  99. /* slot */
  100. _sai_b.hsai.SlotInit.FirstBitOffset = 0;
  101. _sai_b.hsai.SlotInit.SlotSize = SAI_SLOTSIZE_32B;
  102. _sai_b.hsai.SlotInit.SlotNumber = 2;
  103. _sai_b.hsai.SlotInit.SlotActive = SAI_SLOTACTIVE_0 | SAI_SLOTACTIVE_1;
  104. HAL_SAI_Init(&_sai_b.hsai);
  105. __HAL_SAI_ENABLE(&_sai_b.hsai);
  106. }
  107. static void SAIB_tx_dma(void)
  108. {
  109. __HAL_RCC_DMA2_CLK_ENABLE();
  110. __HAL_LINKDMA(&_sai_b.hsai, hdmarx, _sai_b.hdma);
  111. _sai_b.hdma.Instance = DMA2_Stream5;
  112. _sai_b.hdma.Init.Channel = DMA_CHANNEL_0;
  113. _sai_b.hdma.Init.Direction = DMA_PERIPH_TO_MEMORY;
  114. _sai_b.hdma.Init.PeriphInc = DMA_PINC_DISABLE;
  115. _sai_b.hdma.Init.MemInc = DMA_MINC_ENABLE;
  116. _sai_b.hdma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
  117. _sai_b.hdma.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
  118. _sai_b.hdma.Init.Mode = DMA_CIRCULAR;
  119. _sai_b.hdma.Init.Priority = DMA_PRIORITY_MEDIUM;
  120. _sai_b.hdma.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  121. _sai_b.hdma.Init.MemBurst = DMA_MBURST_SINGLE;
  122. _sai_b.hdma.Init.PeriphBurst = DMA_PBURST_SINGLE;
  123. HAL_DMA_DeInit(&_sai_b.hdma);
  124. HAL_DMA_Init(&_sai_b.hdma);
  125. __HAL_DMA_DISABLE(&_sai_b.hdma);
  126. __HAL_DMA_CLEAR_FLAG(&_sai_b.hdma, DMA_FLAG_TCIF1_5);
  127. __HAL_DMA_ENABLE_IT(&_sai_b.hdma, DMA_IT_TC);
  128. HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 5, 1);
  129. HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn);
  130. }
  131. static rt_err_t sai_record_init()
  132. {
  133. SAIA_config_init();
  134. SAIB_config_init();
  135. /* set record samplerate */
  136. SAIA_config_set(_stm32_audio_record.config);
  137. SAIB_config_set(_stm32_audio_record.config);
  138. SAIA_tx_dma();
  139. SAIB_tx_dma();
  140. return RT_EOK;
  141. }
  142. void DMA2_Stream5_IRQHandler(void)
  143. {
  144. rt_interrupt_enter();
  145. HAL_DMA_IRQHandler(_sai_b.hsai.hdmarx);
  146. rt_interrupt_leave();
  147. }
  148. void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai)
  149. {
  150. rt_audio_rx_done(&(_stm32_audio_record.audio), &_stm32_audio_record.rx_fifo[0], RX_DMA_FIFO_SIZE / 2);
  151. }
  152. void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai)
  153. {
  154. rt_audio_rx_done(&(_stm32_audio_record.audio), &_stm32_audio_record.rx_fifo[RX_DMA_FIFO_SIZE / 2], RX_DMA_FIFO_SIZE / 2);
  155. }
  156. static rt_err_t stm32_mic_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  157. {
  158. rt_err_t result = RT_EOK;
  159. LOG_D("%s:main_type: %d, sub_type: %d", __FUNCTION__, caps->main_type, caps->sub_type);
  160. switch (caps->main_type)
  161. {
  162. /* Provide capabilities of INTPUT unit */
  163. case AUDIO_TYPE_INPUT:
  164. {
  165. switch (caps->sub_type)
  166. {
  167. case AUDIO_DSP_PARAM:
  168. caps->udata.config.channels = _stm32_audio_record.config.channels;
  169. caps->udata.config.samplebits = _stm32_audio_record.config.samplebits;
  170. caps->udata.config.samplerate = _stm32_audio_record.config.samplerate;
  171. break;
  172. case AUDIO_DSP_SAMPLERATE:
  173. caps->udata.config.samplerate = _stm32_audio_record.config.samplerate;
  174. break;
  175. case AUDIO_DSP_CHANNELS:
  176. caps->udata.config.channels = _stm32_audio_record.config.channels;
  177. break;
  178. case AUDIO_DSP_SAMPLEBITS:
  179. caps->udata.config.samplebits = _stm32_audio_record.config.samplebits;
  180. break;
  181. default:
  182. result = -RT_ERROR;
  183. break;
  184. }
  185. break;
  186. }
  187. default:
  188. result = -RT_ERROR;
  189. break;
  190. }
  191. return result;
  192. }
  193. static void start_record_mode(void)
  194. {
  195. rt_uint8_t temp[4] = {0};
  196. HAL_SAI_DMAStop(&_sai_b.hsai);
  197. HAL_SAI_Transmit(&_sai_a.hsai, temp, 4, 0);
  198. HAL_SAI_Receive_DMA(&_sai_b.hsai, _stm32_audio_record.rx_fifo, RX_DMA_FIFO_SIZE / 2);
  199. }
  200. static rt_err_t stm32_mic_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
  201. {
  202. rt_err_t result = RT_EOK;
  203. LOG_D("%s:main_type: %d, sub_type: %d", __FUNCTION__, caps->main_type, caps->sub_type);
  204. switch (caps->main_type)
  205. {
  206. case AUDIO_TYPE_INPUT:
  207. {
  208. switch (caps->sub_type)
  209. {
  210. case AUDIO_DSP_PARAM:
  211. {
  212. _stm32_audio_record.config.samplerate = caps->udata.config.samplerate;
  213. _stm32_audio_record.config.channels = caps->udata.config.channels;
  214. _stm32_audio_record.config.samplebits = caps->udata.config.samplebits;
  215. HAL_SAI_DMAStop(&_sai_b.hsai);
  216. SAIA_config_set(caps->udata.config);
  217. SAIB_config_set(caps->udata.config);
  218. break;
  219. }
  220. case AUDIO_DSP_SAMPLERATE:
  221. {
  222. _stm32_audio_record.config.samplerate = caps->udata.config.samplerate;
  223. SAIA_samplerate_set(caps->udata.config.samplerate);
  224. break;
  225. }
  226. case AUDIO_DSP_CHANNELS:
  227. {
  228. _stm32_audio_record.config.channels = caps->udata.config.channels;
  229. SAIA_channels_set(caps->udata.config.channels);
  230. SAIB_channels_set(caps->udata.config.channels);
  231. break;
  232. }
  233. case AUDIO_DSP_SAMPLEBITS:
  234. {
  235. _stm32_audio_record.config.samplebits = caps->udata.config.samplebits;
  236. SAIA_samplebits_set(caps->udata.config.samplebits);
  237. break;
  238. }
  239. default:
  240. result = -RT_ERROR;
  241. break;
  242. }
  243. /* After set config, MCLK will stop */
  244. start_record_mode();
  245. break;
  246. }
  247. default:
  248. break;
  249. }
  250. return result;
  251. }
  252. static rt_err_t stm32_mic_init(struct rt_audio_device *audio)
  253. {
  254. rt_err_t result = RT_EOK;
  255. /* initialize wm8978 */
  256. _stm32_audio_record.i2c_bus = (struct rt_i2c_bus_device *)rt_device_find(CODEC_I2C_NAME);
  257. if (_stm32_audio_record.i2c_bus != RT_NULL)
  258. {
  259. LOG_D("Find device i2c1 success");
  260. }
  261. else
  262. {
  263. LOG_E("Find device i2c1 error");
  264. return -RT_ERROR;
  265. }
  266. result = wm8978_init(_stm32_audio_record.i2c_bus);
  267. if (result != RT_EOK)
  268. {
  269. LOG_E("initialize wm8978 failed");
  270. return result;
  271. }
  272. sai_record_init();
  273. return RT_EOK;
  274. }
  275. static rt_err_t stm32_mic_start(struct rt_audio_device *audio, int stream)
  276. {
  277. rt_err_t result = RT_EOK;
  278. if (stream == AUDIO_STREAM_RECORD)
  279. {
  280. /* set mic start */
  281. wm8978_record_start(_stm32_audio_record.i2c_bus);
  282. /* start transfer data */
  283. start_record_mode();
  284. }
  285. return result;
  286. }
  287. static rt_err_t stm32_mic_stop(struct rt_audio_device *audio, int stream)
  288. {
  289. if (stream == AUDIO_STREAM_RECORD)
  290. {
  291. HAL_SAI_DMAStop(&_sai_b.hsai);
  292. HAL_SAI_DMAStop(&_sai_a.hsai);
  293. wm8978_mic_enabled(_stm32_audio_record.i2c_bus, 0);
  294. }
  295. return RT_EOK;
  296. }
  297. static struct rt_audio_ops _mic_audio_ops =
  298. {
  299. .getcaps = stm32_mic_getcaps,
  300. .configure = stm32_mic_configure,
  301. .init = stm32_mic_init,
  302. .start = stm32_mic_start,
  303. .stop = stm32_mic_stop,
  304. .transmit = RT_NULL,
  305. .buffer_info = RT_NULL,
  306. };
  307. int rt_hw_mic_init(void)
  308. {
  309. struct rt_audio_device *audio = &_stm32_audio_record.audio;
  310. /* mic default */
  311. _stm32_audio_record.rx_fifo = rt_calloc(1, RX_DMA_FIFO_SIZE);
  312. if (_stm32_audio_record.rx_fifo == RT_NULL)
  313. {
  314. return -RT_ENOMEM;
  315. }
  316. _stm32_audio_record.config.channels = 1;
  317. _stm32_audio_record.config.samplerate = 16000;
  318. _stm32_audio_record.config.samplebits = 16;
  319. /* register mic device */
  320. audio->ops = &_mic_audio_ops;
  321. rt_audio_register(audio, "mic0", RT_DEVICE_FLAG_RDONLY, &_stm32_audio_record);
  322. return RT_EOK;
  323. }
  324. INIT_DEVICE_EXPORT(rt_hw_mic_init);