drv_hwtimer.h 4.3 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-09-10 MXH the first version
  9. */
  10. #ifndef __DRV_HWTIMER_H__
  11. #define __DRV_HWTIMER_H__
  12. #include <rtthread.h>
  13. #if defined(SOC_RISCV_SERIES_CH32V3)
  14. #include "ch32v30x_tim.h"
  15. #endif
  16. #if defined(SOC_RISCV_SERIES_CH32V2)
  17. #include "ch32v20x_tim.h"
  18. #endif
  19. #ifdef BSP_USING_HWTIMER
  20. typedef struct
  21. {
  22. TIM_TypeDef *instance;
  23. TIM_TimeBaseInitTypeDef init;
  24. rt_uint32_t rcc;
  25. }TIM_HandleTypeDef;
  26. struct ch32_hwtimer
  27. {
  28. rt_hwtimer_t device;
  29. TIM_HandleTypeDef handle;
  30. IRQn_Type irqn;
  31. char *name;
  32. };
  33. /* TIM CONFIG */
  34. #ifndef TIM_DEV_INFO_CONFIG
  35. #define TIM_DEV_INFO_CONFIG \
  36. { \
  37. .maxfreq = 1000000, \
  38. .minfreq = 3000, \
  39. .maxcnt = 0xFFFF, \
  40. .cntmode = HWTIMER_CNTMODE_UP, \
  41. }
  42. #endif /* TIM_DEV_INFO_CONFIG */
  43. #ifdef BSP_USING_TIM1
  44. #define TIM1_CONFIG \
  45. { \
  46. .handle.instance = TIM1, \
  47. .handle.rcc = RCC_APB2Periph_TIM1, \
  48. .irqn = TIM1_UP_IRQn, \
  49. .name = "timer1", \
  50. }
  51. #endif /* BSP_USING_TIM1 */
  52. #ifdef BSP_USING_TIM2
  53. #define TIM2_CONFIG \
  54. { \
  55. .handle.instance = TIM2, \
  56. .handle.rcc = RCC_APB1Periph_TIM2, \
  57. .irqn = TIM2_IRQn, \
  58. .name = "timer2", \
  59. }
  60. #endif /* BSP_USING_TIM2 */
  61. #ifdef BSP_USING_TIM3
  62. #define TIM3_CONFIG \
  63. { \
  64. .handle.instance = TIM3, \
  65. .handle.rcc = RCC_APB1Periph_TIM3, \
  66. .irqn = TIM3_IRQn, \
  67. .name = "timer3", \
  68. }
  69. #endif /* BSP_USING_TIM3 */
  70. #ifdef BSP_USING_TIM4
  71. #define TIM4_CONFIG \
  72. { \
  73. .handle.instance = TIM4, \
  74. .handle.rcc = RCC_APB1Periph_TIM4, \
  75. .irqn = TIM4_IRQn, \
  76. .name = "timer4", \
  77. }
  78. #endif /* BSP_USING_TIM4 */
  79. #ifdef BSP_USING_TIM5
  80. #define TIM5_CONFIG \
  81. { \
  82. .handle.instance = TIM5, \
  83. .handle.rcc = RCC_APB1Periph_TIM5, \
  84. .irqn = TIM5_IRQn, \
  85. .name = "timer5", \
  86. }
  87. #endif /* BSP_USING_TIM5 */
  88. #ifdef BSP_USING_TIM6
  89. #define TIM6_CONFIG \
  90. { \
  91. .handle.instance = TIM6, \
  92. .handle.rcc = RCC_APB1Periph_TIM6, \
  93. .irqn = TIM6_IRQn, \
  94. .name = "timer6", \
  95. }
  96. #endif /* BSP_USING_TIM6 */
  97. #ifdef BSP_USING_TIM7
  98. #define TIM7_CONFIG \
  99. { \
  100. .handle.instance = TIM7, \
  101. .handle.rcc = RCC_APB1Periph_TIM7, \
  102. .irqn = TIM7_IRQn, \
  103. .name = "timer7", \
  104. }
  105. #endif /* BSP_USING_TIM7 */
  106. #ifdef BSP_USING_TIM8
  107. #define TIM8_CONFIG \
  108. { \
  109. .handle.instance = TIM8, \
  110. .handle.rcc = RCC_APB2Periph_TIM8, \
  111. .irqn = TIM8_UP_IRQn, \
  112. .name = "timer8", \
  113. }
  114. #endif /* BSP_USING_TIM8 */
  115. #ifdef BSP_USING_TIM9
  116. #define TIM9_CONFIG \
  117. { \
  118. .handle.instance = TIM9, \
  119. .handle.rcc = RCC_APB2Periph_TIM9, \
  120. .irqn = TIM9_UP_IRQn, \
  121. .name = "timer9", \
  122. }
  123. #endif /* BSP_USING_TIM9 */
  124. #ifdef BSP_USING_TIM10
  125. #define TIM10_CONFIG \
  126. { \
  127. .handle.instance = TIM10, \
  128. .handle.rcc = RCC_APB2Periph_TIM10, \
  129. .irqn = TIM10_UP_IRQn, \
  130. .name = "timer10", \
  131. }
  132. #endif /* BSP_USING_TIM10 */
  133. #endif /* BSP_USING_HWTIMER */
  134. #endif /* __DRV_HWTIMER_H__ */