drv_soft_spi.c 5.4 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-10-01 zhs the first version which add from wch
  9. */
  10. #include <board.h>
  11. #include "drv_soft_spi.h"
  12. #ifdef BSP_USING_SOFT_SPI
  13. #define LOG_TAG "drv.soft_spi"
  14. #include <drv_log.h>
  15. static struct ch32_soft_spi_config soft_spi_config[] =
  16. {
  17. #ifdef BSP_USING_SOFT_SPI1
  18. SOFT_SPI1_BUS_CONFIG,
  19. #endif
  20. #ifdef BSP_USING_SOFT_SPI2
  21. SOFT_SPI2_BUS_CONFIG,
  22. #endif
  23. };
  24. /**
  25. * Attach the spi device to soft SPI bus, this function must be used after initialization.
  26. */
  27. rt_err_t rt_hw_soft_spi_device_attach(const char *bus_name, const char *device_name, const char *pin_name)
  28. {
  29. rt_err_t result;
  30. struct rt_spi_device *spi_device;
  31. /* initialize the cs pin && select the slave*/
  32. rt_base_t cs_pin = rt_pin_get(pin_name);
  33. rt_pin_mode(cs_pin, PIN_MODE_OUTPUT);
  34. rt_pin_write(cs_pin, PIN_HIGH);
  35. /* attach the device to soft spi bus*/
  36. spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  37. RT_ASSERT(spi_device != RT_NULL);
  38. result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
  39. return result;
  40. }
  41. static void ch32_spi_gpio_init(struct ch32_soft_spi *spi)
  42. {
  43. struct ch32_soft_spi_config *cfg = (struct ch32_soft_spi_config *)spi->cfg;
  44. rt_pin_mode(cfg->sck, PIN_MODE_OUTPUT);
  45. rt_pin_mode(cfg->miso, PIN_MODE_INPUT);
  46. rt_pin_mode(cfg->mosi, PIN_MODE_OUTPUT);
  47. rt_pin_write(cfg->miso, PIN_HIGH);
  48. rt_pin_write(cfg->sck, PIN_HIGH);
  49. rt_pin_write(cfg->mosi, PIN_HIGH);
  50. }
  51. void ch32_tog_sclk(void *data)
  52. {
  53. struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
  54. if(rt_pin_read(cfg->sck) == PIN_HIGH)
  55. {
  56. rt_pin_write(cfg->sck, PIN_LOW);
  57. }
  58. else
  59. {
  60. rt_pin_write(cfg->sck, PIN_HIGH);
  61. }
  62. }
  63. void ch32_set_sclk(void *data, rt_int32_t state)
  64. {
  65. struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
  66. if (state)
  67. {
  68. rt_pin_write(cfg->sck, PIN_HIGH);
  69. }
  70. else
  71. {
  72. rt_pin_write(cfg->sck, PIN_LOW);
  73. }
  74. }
  75. void ch32_set_mosi(void *data, rt_int32_t state)
  76. {
  77. struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
  78. if (state)
  79. {
  80. rt_pin_write(cfg->mosi, PIN_HIGH);
  81. }
  82. else
  83. {
  84. rt_pin_write(cfg->mosi, PIN_LOW);
  85. }
  86. }
  87. void ch32_set_miso(void *data, rt_int32_t state)
  88. {
  89. struct ch32_soft_spi_config* cfg = (struct ch3_soft_spi_config*)data;
  90. if (state)
  91. {
  92. rt_pin_write(cfg->miso, PIN_HIGH);
  93. }
  94. else
  95. {
  96. rt_pin_write(cfg->miso, PIN_LOW);
  97. }
  98. }
  99. rt_int32_t ch32_get_sclk(void *data)
  100. {
  101. struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
  102. return rt_pin_read(cfg->sck);
  103. }
  104. rt_int32_t ch32_get_mosi(void *data)
  105. {
  106. struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
  107. return rt_pin_read(cfg->mosi);
  108. }
  109. rt_int32_t ch32_get_miso(void *data)
  110. {
  111. struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
  112. return rt_pin_read(cfg->miso);
  113. }
  114. void ch32_dir_mosi(void *data, rt_int32_t state)
  115. {
  116. struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
  117. if (state)
  118. {
  119. rt_pin_mode(cfg->mosi, PIN_MODE_INPUT);
  120. }
  121. else
  122. {
  123. rt_pin_mode(cfg->mosi, PIN_MODE_OUTPUT);
  124. }
  125. }
  126. void ch32_dir_miso(void *data, rt_int32_t state)
  127. {
  128. struct ch32_soft_spi_config* cfg = (struct ch32_soft_spi_config*)data;
  129. if (state)
  130. {
  131. rt_pin_mode(cfg->miso, PIN_MODE_INPUT);
  132. }
  133. else
  134. {
  135. rt_pin_mode(cfg->miso, PIN_MODE_OUTPUT);
  136. }
  137. }
  138. static void ch32_udelay(rt_uint32_t us)
  139. {
  140. rt_uint32_t ticks;
  141. rt_uint32_t told, tnow, tcnt = 0;
  142. rt_uint32_t reload = SysTick->CMP;
  143. ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
  144. told = SysTick->CNT;
  145. while (1)
  146. {
  147. tnow = SysTick->CNT;
  148. if (tnow != told)
  149. {
  150. if (tnow > told)
  151. {
  152. tcnt += tnow - told;
  153. }
  154. else
  155. {
  156. tcnt += reload - told + tnow;
  157. }
  158. told = tnow;
  159. if (tcnt >= ticks)
  160. {
  161. break;
  162. }
  163. }
  164. }
  165. }
  166. static struct rt_spi_bit_ops ch32_soft_spi_ops =
  167. {
  168. .data = RT_NULL,
  169. .tog_sclk = ch32_tog_sclk,
  170. .set_sclk = ch32_set_sclk,
  171. .set_mosi = ch32_set_mosi,
  172. .set_miso = ch32_set_miso,
  173. .get_sclk = ch32_get_sclk,
  174. .get_mosi = ch32_get_mosi,
  175. .get_miso = ch32_get_miso,
  176. .dir_mosi = ch32_dir_mosi,
  177. .dir_miso = ch32_dir_miso,
  178. .udelay = ch32_udelay,
  179. .delay_us = 1,
  180. };
  181. static struct ch32_soft_spi spi_obj[sizeof(soft_spi_config) / sizeof(soft_spi_config[0])];
  182. /* Soft SPI initialization function */
  183. int rt_soft_spi_init(void)
  184. {
  185. rt_size_t obj_num = sizeof(spi_obj) / sizeof(struct ch32_soft_spi);
  186. rt_err_t result;
  187. for (int i = 0; i < obj_num; i++)
  188. {
  189. ch32_soft_spi_ops.data = (void *)&soft_spi_config[i];
  190. spi_obj[i].spi.ops = &ch32_soft_spi_ops;
  191. spi_obj[i].cfg = (void *)&soft_spi_config[i];
  192. ch32_spi_gpio_init(&spi_obj[i]);
  193. result = rt_spi_bit_add_bus(&spi_obj[i].spi, soft_spi_config[i].bus_name, &ch32_soft_spi_ops);
  194. RT_ASSERT(result == RT_EOK);
  195. }
  196. return RT_EOK;
  197. }
  198. INIT_BOARD_EXPORT(rt_soft_spi_init);
  199. #endif /* BSP_USING_SOFT_SPI */