1
0

c66xx.h 3.0 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798
  1. /*
  2. * Copyright (c) 2021, Shenzhen Academy of Aerospace Technology
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-11-16 Dystopia the first version
  9. */
  10. #ifndef __C66XX_H__
  11. #define __C66XX_H__
  12. extern __cregister volatile unsigned int IERR; /* Internal Exception Report Register */
  13. extern __cregister volatile unsigned int ECR; /* Exception Clear Register */
  14. extern __cregister volatile unsigned int EFR; /* Exception Flag Register */
  15. extern __cregister volatile unsigned int TSR; /* Task State Register */
  16. extern __cregister volatile unsigned int ITSR; /* Interrupt Task State Register */
  17. extern __cregister volatile unsigned int NTSR; /* NMI/exception Task State Register */
  18. extern __cregister volatile unsigned int TSCL; /* Time Stamp Counter Register - Low Half */
  19. extern __cregister volatile unsigned int TSCH; /* Time Stamp Counter Register - High Half */
  20. extern __cregister volatile unsigned int DNUM; /* Core number */
  21. extern __cregister volatile unsigned int AMR;
  22. extern __cregister volatile unsigned int CSR;
  23. extern __cregister volatile unsigned int IFR;
  24. extern __cregister volatile unsigned int ISR;
  25. extern __cregister volatile unsigned int ICR;
  26. extern __cregister volatile unsigned int IER;
  27. extern __cregister volatile unsigned int ISTP;
  28. extern __cregister volatile unsigned int IRP;
  29. extern __cregister volatile unsigned int NRP;
  30. #ifdef _BIG_ENDIAN
  31. #define RT_REG_PAIR(odd, even) unsigned long odd; unsigned long even
  32. #else
  33. #define RT_REG_PAIR(odd, even) unsigned long even; unsigned long odd
  34. #endif
  35. struct rt_hw_register
  36. {
  37. RT_REG_PAIR(b17, b16);
  38. RT_REG_PAIR(b19, b18);
  39. RT_REG_PAIR(b21, b20);
  40. RT_REG_PAIR(b23, b22);
  41. RT_REG_PAIR(b25, b24);
  42. RT_REG_PAIR(b27, b26);
  43. RT_REG_PAIR(b29, b28);
  44. RT_REG_PAIR(b31, b30);
  45. RT_REG_PAIR(b1, b0);
  46. RT_REG_PAIR(b3, b2);
  47. RT_REG_PAIR(b5, b4);
  48. RT_REG_PAIR(b7, b6);
  49. RT_REG_PAIR(b9, b8);
  50. RT_REG_PAIR(b11, b10);
  51. RT_REG_PAIR(b13, b12);
  52. RT_REG_PAIR(a17, a16);
  53. RT_REG_PAIR(a19, a18);
  54. RT_REG_PAIR(a21, a20);
  55. RT_REG_PAIR(a23, a22);
  56. RT_REG_PAIR(a25, a24);
  57. RT_REG_PAIR(a27, a26);
  58. RT_REG_PAIR(a29, a28);
  59. RT_REG_PAIR(a31, a30);
  60. RT_REG_PAIR(a1, a0);
  61. RT_REG_PAIR(a3, a2);
  62. RT_REG_PAIR(a5, a4);
  63. RT_REG_PAIR(a7, a6);
  64. RT_REG_PAIR(a9, a8);
  65. RT_REG_PAIR(a11, a10);
  66. RT_REG_PAIR(a13, a12);
  67. RT_REG_PAIR(a15, a14);
  68. RT_REG_PAIR(sp, dp);
  69. };
  70. typedef struct rt_hw_exp_stack_register
  71. {
  72. RT_REG_PAIR(tsr, orig_a4);
  73. RT_REG_PAIR(rilc, ilc);
  74. RT_REG_PAIR(pc, csr);
  75. struct rt_hw_register hw_register;
  76. } rt_hw_thread_stack_register;
  77. #define __dint() asm(" DINT")
  78. #define __rint() asm(" RINT")
  79. #define __system_call() asm(" SWE")
  80. #define __enter_idle() asm(" IDLE")
  81. #define __nop() asm(" NOP")
  82. #define __mfence() asm(" MFENCE")
  83. #define __SYSREG(ADDR, TYPE) (*(volatile TYPE*)(ADDR))
  84. #define __SYSREGA(ADDR, TYPE) ((volatile TYPE*)(ADDR))
  85. #endif /* __C66XX_H__ */