intexc.asm 6.7 KB

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  1. ;
  2. ; Copyright (c) 2021, Shenzhen Academy of Aerospace Technology
  3. ;
  4. ; SPDX-License-Identifier: Apache-2.0
  5. ;
  6. ; Change Logs:
  7. ; Date Author Notes
  8. ; 2021-11-16 Dystopia the first version
  9. ;
  10. ;-----------------------------------------------------------
  11. ; interrupt and execption handler for C6000 DSP
  12. ;-----------------------------------------------------------
  13. ;-----------------------------------------------------------
  14. ; macro definition
  15. ;-----------------------------------------------------------
  16. DP .set B14
  17. SP .set B15
  18. ;
  19. ;-----------------------------------------------------------
  20. ;
  21. .include "contextinc.asm"
  22. ;-----------------------------------------------------------
  23. ; global function
  24. ;-----------------------------------------------------------
  25. .global _nmi_handler
  26. .global _bad_handler
  27. .global _int4_handler
  28. .global _int5_handler
  29. .global _int6_handler
  30. .global _int7_handler
  31. .global _int8_handler
  32. .global _int9_handler
  33. .global _int10_handler
  34. .global _int11_handler
  35. .global _int12_handler
  36. .global _int13_handler
  37. .global _int14_handler
  38. .global _int15_handler
  39. ;
  40. ;-----------------------------------------------------------
  41. ;
  42. ;-----------------------------------------------------------
  43. ; extern function
  44. ;-----------------------------------------------------------
  45. .ref hw_nmi_handler
  46. .ref hw_bad_handler
  47. .ref hw_int4_handler
  48. .ref hw_int5_handler
  49. .ref hw_int6_handler
  50. .ref hw_int7_handler
  51. .ref hw_int8_handler
  52. .ref hw_int9_handler
  53. .ref hw_int10_handler
  54. .ref hw_int11_handler
  55. .ref hw_int12_handler
  56. .ref hw_int13_handler
  57. .ref hw_int14_handler
  58. .ref hw_int15_handler
  59. .ref rt_hw_process_exception
  60. .ref rt_interrupt_context_restore
  61. ;
  62. ;-----------------------------------------------------------
  63. ;
  64. ;-----------------------------------------------------------
  65. ; interrupt macro definition
  66. ;-----------------------------------------------------------
  67. RT_INTERRUPT_ENTRY .macro
  68. SAVE_ALL IRP,ITSR
  69. .endm
  70. RT_CALL_INT .macro __isr
  71. B __isr
  72. ADDKPC $1 ,B3,4
  73. $1:
  74. B .S1 rt_interrupt_context_restore
  75. NOP 5
  76. .endm
  77. ;-----------------------------------------------------------
  78. ; execption macro definition
  79. ;-----------------------------------------------------------
  80. RT_EXECPTION_ENTRY .macro
  81. SAVE_ALL NRP,NTSR
  82. .endm
  83. RT_EXECPTION_EXIT .macro
  84. RESTORE_ALL NRP,NTSR
  85. B .S2 NRP ; return from execption
  86. NOP 5
  87. .endm
  88. ;
  89. ;-----------------------------------------------------------
  90. ;
  91. .sect ".text"
  92. ;
  93. ;-----------------------------------------------------------
  94. ;
  95. ;-----------------------------------------------------------
  96. ; handler NMI interrupt
  97. ;-----------------------------------------------------------
  98. _nmi_handler:
  99. ;{
  100. RT_EXECPTION_ENTRY
  101. MVC .S2 EFR,B2
  102. CMPEQ .L2 1,B2,B2
  103. || MVC .S2 TSR,B1
  104. MV .D1X B2,A2
  105. || CLR .S2 B1,10,10,B1
  106. MVC .S2 B1,TSR
  107. [!A2] MVKL .S1 rt_hw_process_exception,A0
  108. ||[B2] MVKL .S2 rt_hw_software_exception,B1
  109. [!A2] MVKH .S1 rt_hw_process_exception,A0
  110. ||[B2] MVKH .S2 rt_hw_software_exception,B1
  111. [!B2] B .S2X A0
  112. [B2] B .S2 B1
  113. [!B2] ADDAW .D2 SP,2,B1
  114. [!B2] MV .D1X B1,A4
  115. ADDKPC .S2 ret_from_trap,B3,2
  116. ;
  117. ; return from trap
  118. ;
  119. ret_from_trap:
  120. MV .D2X A4,B0
  121. [!B0] MVKL .S2 ret_from_exception,B3
  122. [!B0] MVKH .S2 ret_from_exception,B3
  123. [!B0] BNOP .S2 B3,5
  124. ;
  125. ; return from trap restore exception context
  126. ;
  127. ret_from_exception:
  128. RT_EXECPTION_EXIT
  129. ;
  130. rt_hw_software_exception:
  131. MVKL .S1 rt_hw_process_exception,A0
  132. MVKH .S1 rt_hw_process_exception,A0
  133. B .S2X A0
  134. ADDAW .D2 SP,2,B1
  135. MV .D1X B1,A4
  136. ADDKPC .S2 ret_from_trap,B3,2
  137. NOP 2
  138. ;}
  139. ;-----------------------------------------------------------
  140. ; handler bad interrupt
  141. ;-----------------------------------------------------------
  142. _bad_handler:
  143. ;{
  144. RT_INTERRUPT_ENTRY
  145. RT_CALL_INT hw_bad_handler
  146. ;}
  147. ;-----------------------------------------------------------
  148. ; handler INT4 interrupt
  149. ;-----------------------------------------------------------
  150. _int4_handler:
  151. ;{
  152. RT_INTERRUPT_ENTRY
  153. RT_CALL_INT hw_int4_handler
  154. ;}
  155. ;-----------------------------------------------------------
  156. ; handler INT5 interrupt
  157. ;-----------------------------------------------------------
  158. _int5_handler:
  159. ;{
  160. RT_INTERRUPT_ENTRY
  161. RT_CALL_INT hw_int5_handler
  162. ;}
  163. ;-----------------------------------------------------------
  164. ; handler INT6 interrupt
  165. ;-----------------------------------------------------------
  166. _int6_handler:
  167. ;{
  168. RT_INTERRUPT_ENTRY
  169. RT_CALL_INT hw_int6_handler
  170. ;}
  171. ;-----------------------------------------------------------
  172. ; handler INT7 interrupt
  173. ;-----------------------------------------------------------
  174. _int7_handler:
  175. ;{
  176. RT_INTERRUPT_ENTRY
  177. RT_CALL_INT hw_int7_handler
  178. ;}
  179. ;-----------------------------------------------------------
  180. ; handler INT8 interrupt
  181. ;-----------------------------------------------------------
  182. _int8_handler:
  183. ;{
  184. RT_INTERRUPT_ENTRY
  185. RT_CALL_INT hw_int8_handler
  186. ;}
  187. ;-----------------------------------------------------------
  188. ; handler INT9 interrupt
  189. ;-----------------------------------------------------------
  190. _int9_handler:
  191. ;{
  192. RT_INTERRUPT_ENTRY
  193. RT_CALL_INT hw_int9_handler
  194. ;}
  195. ;-----------------------------------------------------------
  196. ; handler INT10 interrupt
  197. ;-----------------------------------------------------------
  198. _int10_handler:
  199. ;{
  200. RT_INTERRUPT_ENTRY
  201. RT_CALL_INT hw_int10_handler
  202. ;}
  203. ;-----------------------------------------------------------
  204. ; handler INT11 interrupt
  205. ;-----------------------------------------------------------
  206. _int11_handler:
  207. ;{
  208. RT_INTERRUPT_ENTRY
  209. RT_CALL_INT hw_int11_handler
  210. ;}
  211. ;-----------------------------------------------------------
  212. ; handler INT12 interrupt
  213. ;-----------------------------------------------------------
  214. _int12_handler:
  215. ;{
  216. RT_INTERRUPT_ENTRY
  217. RT_CALL_INT hw_int12_handler
  218. ;}
  219. ;-----------------------------------------------------------
  220. ; handler INT13 interrupt
  221. ;-----------------------------------------------------------
  222. _int13_handler:
  223. ;{
  224. RT_INTERRUPT_ENTRY
  225. RT_CALL_INT hw_int13_handler
  226. ;}
  227. ;-----------------------------------------------------------
  228. ; handler INT14 interrupt
  229. ;-----------------------------------------------------------
  230. _int14_handler:
  231. ;{
  232. RT_INTERRUPT_ENTRY
  233. RT_CALL_INT hw_int14_handler
  234. ;}
  235. ;-----------------------------------------------------------
  236. ; handler INT15 interrupt
  237. ;-----------------------------------------------------------
  238. _int15_handler:
  239. ;{
  240. RT_INTERRUPT_ENTRY
  241. RT_CALL_INT hw_int15_handler
  242. ;}
  243. .end