eth_phy_port.c 8.5 KB

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  1. /*
  2. * Copyright (c) 2022 hpmicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-01-11 hpmicro First version
  9. */
  10. #include "rtthread.h"
  11. #ifdef RT_USING_PHY
  12. #include <rtdevice.h>
  13. #include <rtdbg.h>
  14. #include "hpm_enet_drv.h"
  15. #include "eth_phy_port.h"
  16. #include "hpm_soc.h"
  17. #include "netif/ethernetif.h"
  18. #include "board.h"
  19. typedef struct
  20. {
  21. char *mdio_name;
  22. ENET_Type *instance;
  23. struct eth_device *eth_dev;
  24. phy_device_t *phy_dev;
  25. struct rt_mdio_bus *mdio_bus;
  26. } eth_phy_handle_t;
  27. typedef struct
  28. {
  29. uint8_t phy_handle_cnt;
  30. eth_phy_handle_t **phy_handle;
  31. } eth_phy_monitor_handle_t;
  32. #ifdef BSP_USING_ETH0
  33. extern struct eth_device eth0_dev;
  34. static struct rt_mdio_bus mdio0_bus;
  35. static phy_device_t phy0_dev;
  36. static uint8_t phy0_reg_list[]= {PHY0_REG_LIST};
  37. static eth_phy_handle_t eth0_phy_handle =
  38. {
  39. .instance = HPM_ENET0,
  40. .eth_dev = &eth0_dev,
  41. .phy_dev = &phy0_dev,
  42. .mdio_name = "MDIO0",
  43. .mdio_bus = &mdio0_bus,
  44. };
  45. #endif
  46. #ifdef BSP_USING_ETH1
  47. extern struct eth_device eth1_dev;
  48. static struct rt_mdio_bus mdio1_bus;
  49. static phy_device_t phy1_dev;
  50. static uint8_t phy1_reg_list[]= {PHY1_REG_LIST};
  51. static eth_phy_handle_t eth1_phy_handle =
  52. {
  53. .instance = HPM_ENET1,
  54. .eth_dev = &eth1_dev,
  55. .phy_dev = &phy1_dev,
  56. .mdio_name = "MDIO1",
  57. .mdio_bus = &mdio1_bus,
  58. };
  59. #endif
  60. static eth_phy_handle_t *s_gphys[] =
  61. {
  62. #ifdef BSP_USING_ETH0
  63. &eth0_phy_handle,
  64. #endif
  65. #ifdef BSP_USING_ETH1
  66. &eth1_phy_handle
  67. #endif
  68. };
  69. static uint8_t *s_gphy_reg_list[] =
  70. {
  71. #ifdef BSP_USING_ETH0
  72. phy0_reg_list,
  73. #endif
  74. #ifdef BSP_USING_ETH1
  75. phy1_reg_list,
  76. #endif
  77. };
  78. eth_phy_monitor_handle_t phy_monitor_handle =
  79. {
  80. .phy_handle_cnt = ARRAY_SIZE(s_gphys),
  81. .phy_handle = s_gphys
  82. };
  83. static struct rt_phy_ops phy_ops;
  84. static rt_phy_status phy_init(void *object, rt_uint32_t phy_addr, rt_uint32_t src_clock_hz)
  85. {
  86. return PHY_STATUS_OK;
  87. }
  88. static rt_size_t phy_read(void *bus, rt_uint32_t addr, rt_uint32_t reg, void *data, rt_uint32_t size)
  89. {
  90. *(uint16_t *)data = enet_read_phy(((struct rt_mdio_bus *)bus)->hw_obj, addr, reg);
  91. return size;
  92. }
  93. static rt_size_t phy_write(void *bus, rt_uint32_t addr, rt_uint32_t reg, void *data, rt_uint32_t size)
  94. {
  95. enet_write_phy(((struct rt_mdio_bus *)bus)->hw_obj, addr, reg, *(uint16_t *)data);
  96. return size;
  97. }
  98. static rt_phy_status phy_get_link_status(rt_phy_t *phy, rt_bool_t *status)
  99. {
  100. uint16_t reg_status;
  101. reg_status = enet_read_phy(phy->bus->hw_obj, phy->addr, phy->reg_list[PHY_BASIC_STATUS_REG_IDX]);
  102. #if PHY_AUTO_NEGO
  103. reg_status &= PHY_AUTONEGO_COMPLETE_MASK | PHY_LINKED_STATUS_MASK;
  104. *status = reg_status ? RT_TRUE : RT_FALSE;
  105. #else
  106. reg_status &= PHY_LINKED_STATUS_MASK;
  107. *status = reg_status ? RT_TRUE : RT_FALSE;
  108. #endif
  109. return PHY_STATUS_OK;
  110. }
  111. static rt_phy_status phy_get_link_speed_duplex(rt_phy_t *phy, rt_uint32_t *speed, rt_uint32_t *duplex)
  112. {
  113. uint16_t reg_status;
  114. reg_status = enet_read_phy(phy->bus->hw_obj, phy->addr, phy->reg_list[PHY_STATUS_REG_IDX]);
  115. #if RGMII
  116. if (PHY_STATUS_SPEED_1000M(reg_status))
  117. {
  118. *speed = PHY_SPEED_1000M;
  119. }
  120. else if (PHY_STATUS_SPEED_100M(reg_status))
  121. {
  122. *speed = PHY_SPEED_100M;
  123. }
  124. else
  125. {
  126. *speed = PHY_SPEED_10M;
  127. }
  128. #else
  129. if (PHY_STATUS_SPEED_10M(reg_status))
  130. {
  131. *speed = PHY_SPEED_10M;
  132. }
  133. else
  134. {
  135. *speed = PHY_SPEED_100M;
  136. }
  137. #endif
  138. *duplex = PHY_STATUS_FULL_DUPLEX(reg_status) ? PHY_FULL_DUPLEX: PHY_HALF_DUPLEX;
  139. return PHY_STATUS_OK;
  140. }
  141. static void phy_poll_status(void *parameter)
  142. {
  143. int ret;
  144. phy_info_t phy_info;
  145. rt_bool_t status;
  146. rt_device_t dev;
  147. rt_phy_msg_t msg;
  148. rt_uint32_t speed, duplex;
  149. phy_device_t *phy_dev;
  150. struct eth_device* eth_dev;
  151. char const *ps[] = {"10Mbps", "100Mbps", "1000Mbps"};
  152. enet_line_speed_t line_speed[] = {enet_line_speed_10mbps, enet_line_speed_100mbps, enet_line_speed_1000mbps};
  153. eth_phy_monitor_handle_t *phy_monitor_handle = (eth_phy_monitor_handle_t *)parameter;
  154. for (uint32_t i = 0; i < phy_monitor_handle->phy_handle_cnt; i++)
  155. {
  156. eth_dev = phy_monitor_handle->phy_handle[i]->eth_dev;
  157. phy_dev = phy_monitor_handle->phy_handle[i]->phy_dev;
  158. phy_dev->phy.ops->get_link_status(&phy_dev->phy, &status);
  159. if (status)
  160. {
  161. phy_dev->phy.ops->get_link_speed_duplex(&phy_dev->phy, &phy_info.phy_speed, &phy_info.phy_duplex);
  162. ret = memcmp(&phy_dev->phy_info, &phy_info, sizeof(phy_info_t));
  163. if (ret != 0)
  164. {
  165. memcpy(&phy_dev->phy_info, &phy_info, sizeof(phy_info_t));
  166. }
  167. }
  168. if (phy_dev->phy_link != status)
  169. {
  170. phy_dev->phy_link = status ? PHY_LINK_UP : PHY_LINK_DOWN;
  171. eth_device_linkchange(eth_dev, status);
  172. LOG_I("PHY Status: %s", status ? "Link up" : "Link down\n");
  173. if (status == PHY_LINK_UP)
  174. {
  175. LOG_I("PHY Speed: %s", ps[phy_dev->phy_info.phy_speed]);
  176. LOG_I("PHY Duplex: %s\n", phy_dev->phy_info.phy_duplex & PHY_FULL_DUPLEX ? "full duplex" : "half duplex");
  177. enet_set_line_speed(phy_monitor_handle->phy_handle[i]->instance, line_speed[phy_dev->phy_info.phy_speed]);
  178. enet_set_duplex_mode(phy_monitor_handle->phy_handle[i]->instance, phy_dev->phy_info.phy_duplex);
  179. }
  180. }
  181. }
  182. }
  183. static void phy_detection(void *parameter)
  184. {
  185. uint8_t detected_count = 0;
  186. struct rt_phy_msg msg = {0, 0};
  187. phy_device_t *phy_dev = (phy_device_t *)parameter;
  188. rt_uint32_t i;
  189. msg.reg = phy_dev->phy.reg_list[PHY_ID1_REG_IDX];
  190. phy_dev->phy.ops->init(phy_dev->phy.bus->hw_obj, phy_dev->phy.addr, PHY_MDIO_CSR_CLK_FREQ);
  191. while(phy_dev->phy.addr == 0xffff)
  192. {
  193. /* Search a PHY */
  194. for (i = 0; i <= 0x1f; i++)
  195. {
  196. ((rt_phy_t *)(phy_dev->phy.parent.user_data))->addr = i;
  197. phy_dev->phy.parent.read(&(phy_dev->phy.parent), 0, &msg, 1);
  198. if (msg.value == PHY_ID1)
  199. {
  200. phy_dev->phy.addr = i;
  201. LOG_D("Found a PHY device[address:0x%02x].\n", phy_dev->phy.addr);
  202. return;
  203. }
  204. }
  205. phy_dev->phy.addr = 0xffff;
  206. detected_count++;
  207. rt_thread_mdelay(1000);
  208. if (detected_count > 3)
  209. {
  210. LOG_E("No any PHY device is detected! Please check your hardware!\n");
  211. return;
  212. }
  213. }
  214. }
  215. static void phy_monitor_thread_entry(void *args)
  216. {
  217. rt_timer_t phy_status_timer;
  218. eth_phy_monitor_handle_t *phy_monitor_handle = (eth_phy_monitor_handle_t *)args;
  219. for (uint32_t i = 0; i < phy_monitor_handle->phy_handle_cnt; i++)
  220. {
  221. LOG_D("Detect a PHY%d\n", i);
  222. phy_detection(phy_monitor_handle->phy_handle[i]->phy_dev);
  223. }
  224. phy_status_timer = rt_timer_create("PHY_Monitor", phy_poll_status, phy_monitor_handle, RT_TICK_PER_SECOND, RT_TIMER_FLAG_PERIODIC | RT_TIMER_FLAG_SOFT_TIMER);
  225. if (!phy_status_timer || rt_timer_start(phy_status_timer) != RT_EOK)
  226. {
  227. LOG_E("Failed to start link change detection timer\n");
  228. }
  229. }
  230. int phy_device_register(void)
  231. {
  232. rt_err_t err = RT_ERROR;
  233. rt_thread_t thread_phy_monitor;
  234. /* Set ops for PHY */
  235. phy_ops.init = phy_init;
  236. phy_ops.get_link_status = phy_get_link_status;
  237. phy_ops.get_link_speed_duplex = phy_get_link_speed_duplex;
  238. for (uint32_t i = 0; i < ARRAY_SIZE(s_gphys); i++)
  239. {
  240. /* Set PHY address */
  241. s_gphys[i]->phy_dev->phy.addr = 0xffff;
  242. /* Set MIDO bus */
  243. s_gphys[i]->mdio_bus->hw_obj = s_gphys[i]->instance;
  244. s_gphys[i]->mdio_bus->name = s_gphys[i]->mdio_name;
  245. s_gphys[i]->mdio_bus->ops->read = phy_read;
  246. s_gphys[i]->mdio_bus->ops->write = phy_write;
  247. s_gphys[i]->phy_dev->phy.bus = s_gphys[i]->mdio_bus;
  248. s_gphys[i]->phy_dev->phy.ops = &phy_ops;
  249. /* Set PHY register list */
  250. s_gphys[i]->phy_dev->phy.reg_list = s_gphy_reg_list[i];
  251. rt_hw_phy_register(&s_gphys[i]->phy_dev->phy, PHY_NAME);
  252. }
  253. /* Start PHY monitor */
  254. thread_phy_monitor = rt_thread_create("PHY Monitor", phy_monitor_thread_entry, &phy_monitor_handle, 1024, RT_THREAD_PRIORITY_MAX - 2, 2);
  255. if (thread_phy_monitor != RT_NULL)
  256. {
  257. rt_thread_startup(thread_phy_monitor);
  258. }
  259. else
  260. {
  261. err = RT_ERROR;
  262. }
  263. return err;
  264. }
  265. INIT_PREV_EXPORT(phy_device_register);
  266. #endif /* RT_USING_PHY */