start.S 1.4 KB

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  1. /*
  2. * Copyright (c) 2021-2023 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #include <rtconfig.h>
  8. #include "hpm_csr_regs.h"
  9. .section .start, "ax"
  10. .global _start
  11. .type _start,@function
  12. _start:
  13. /* Initialize global pointer */
  14. .option push
  15. .option norelax
  16. la gp, __global_pointer$
  17. la tp, __thread_pointer
  18. .option pop
  19. /* Enable LMM1 clock */
  20. la t0, 0xF4000800
  21. lw t1, 0(t0)
  22. ori t1, t1, 0x80
  23. sw t1, 0(t0)
  24. #ifdef INIT_EXT_RAM_FOR_DATA
  25. la t0, _stack_in_dlm
  26. mv sp, t0
  27. call _init_ext_ram
  28. #endif
  29. /* Initialize stack pointer */
  30. la t0, _stack
  31. mv sp, t0
  32. #ifdef __nds_execit
  33. /* Initialize EXEC.IT table */
  34. la t0, _ITB_BASE_
  35. csrw uitb, t0
  36. #endif
  37. #ifdef __riscv_flen
  38. /* Enable FPU */
  39. li t0, CSR_MSTATUS_FS_MASK
  40. csrrs t0, mstatus, t0
  41. /* Initialize FCSR */
  42. fscsr zero
  43. #endif
  44. /* Disable Vector mode */
  45. csrci CSR_MMISC_CTL, 2
  46. /* Initialize trap_entry base */
  47. la t0, SW_handler
  48. csrw mtvec, t0
  49. /* System reset handler */
  50. call reset_handler
  51. /* Infinite loop, if returned accidently */
  52. 1: j 1b
  53. .weak nmi_handler
  54. nmi_handler:
  55. 1: j 1b
  56. .global default_irq_handler
  57. .weak default_irq_handler
  58. .align 2
  59. default_irq_handler:
  60. 1: j 1b
  61. .macro IRQ_HANDLER irq
  62. .weak default_isr_\irq
  63. .set default_isr_\irq, default_irq_handler
  64. .long default_isr_\irq
  65. .endm
  66. #include "vectors.S"