hpm_romapi.h 40 KB

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  1. /*
  2. * Copyright (c) 2022-2023 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #ifndef HPM_ROMAPI_H
  8. #define HPM_ROMAPI_H
  9. /**
  10. * @brief ROM APIs
  11. * @defgroup romapi_interface ROM APIs
  12. * @{
  13. */
  14. #include "hpm_common.h"
  15. #include "hpm_otp_drv.h"
  16. #include "hpm_romapi_xpi_def.h"
  17. #include "hpm_romapi_xpi_soc_def.h"
  18. #include "hpm_romapi_xpi_nor_def.h"
  19. #include "hpm_romapi_xpi_ram_def.h"
  20. #include "hpm_sdp_drv.h"
  21. /* XPI0 base address */
  22. #define HPM_XPI0_BASE (0xF3040000UL) /**< XPI0 Base address */
  23. /* XPI0 base pointer */
  24. #define HPM_XPI0 ((XPI_Type *) HPM_XPI0_BASE) /**< XPI0 Base pointer */
  25. /***********************************************************************************************************************
  26. *
  27. *
  28. * Definitions
  29. *
  30. *
  31. **********************************************************************************************************************/
  32. /**
  33. * @brief Enter Bootloader API argument
  34. */
  35. typedef union {
  36. uint32_t U;
  37. struct {
  38. uint32_t index: 8; /**< Image index */
  39. uint32_t peripheral: 8; /**< Boot peripheral */
  40. uint32_t src: 8; /**< Boot source */
  41. uint32_t tag: 8; /**< ROM API parameter tag, must be 0xEB */
  42. };
  43. } api_boot_arg_t;
  44. /*EXiP Region Parameter */
  45. typedef struct {
  46. uint32_t start; /**< Start address, must be 4KB aligned */
  47. uint32_t len; /**< Must be 4KB aligned */
  48. uint8_t key[16]; /**< AES Key */
  49. uint8_t ctr[8]; /**< Initial Vector/Counter */
  50. } exip_region_param_t;
  51. #define API_BOOT_TAG (0xEBU) /**< ROM API parameter tag */
  52. #define API_BOOT_SRC_OTP (0U) /**< Boot source: OTP */
  53. #define API_BOOT_SRC_PRIMARY (1U) /**< Boot source: Primary */
  54. #define API_BOOT_SRC_SERIAL_BOOT (2U) /**< Boot source: Serial Boot */
  55. #define API_BOOT_SRC_ISP (3U) /**< Boot source: ISP */
  56. #define API_BOOT_PERIPH_AUTO (0U) /**< Boot peripheral: Auto detected */
  57. #define API_BOOT_PERIPH_UART (1U) /**< Boot peripheral: UART */
  58. #define API_BOOT_PERIPH_USBHID (2U) /**< Boot Peripheral: USB-HID */
  59. /**
  60. * @brief OTP driver interface
  61. */
  62. typedef struct {
  63. /**< OTP driver interface version */
  64. uint32_t version;
  65. /**< OTP driver interface: init */
  66. void (*init)(void);
  67. /**< OTP driver interface: deinit */
  68. void (*deinit)(void);
  69. /**< OTP driver interface: read from shadow */
  70. uint32_t (*read_from_shadow)(uint32_t addr);
  71. /**< OTP driver interface: read from ip */
  72. uint32_t (*read_from_ip)(uint32_t addr);
  73. /**< OTP driver interface: program */
  74. hpm_stat_t (*program)(uint32_t addr, const uint32_t *src, uint32_t num_of_words);
  75. /**< OTP driver interface: reload */
  76. hpm_stat_t (*reload)(otp_region_t region);
  77. /**< OTP driver interface: lock */
  78. hpm_stat_t (*lock)(uint32_t addr, otp_lock_option_t lock_option);
  79. /**< OTP driver interface: lock_shadow */
  80. hpm_stat_t (*lock_shadow)(uint32_t addr, otp_lock_option_t lock_option);
  81. /**< OTP driver interface: set_configurable_region */
  82. hpm_stat_t (*set_configurable_region)(uint32_t start, uint32_t num_of_words);
  83. /**< OTP driver interface: write_shadow_register */
  84. hpm_stat_t (*write_shadow_register)(uint32_t addr, uint32_t data);
  85. } otp_driver_interface_t;
  86. /**
  87. * @brief XPI driver interface
  88. */
  89. typedef struct {
  90. /**< XPI driver interface: version */
  91. uint32_t version;
  92. /**< XPI driver interface: get default configuration */
  93. hpm_stat_t (*get_default_config)(xpi_config_t *xpi_config);
  94. /**< XPI driver interface: get default device configuration */
  95. hpm_stat_t (*get_default_device_config)(xpi_device_config_t *dev_config);
  96. /**< XPI driver interface: initialize the XPI using xpi_config */
  97. hpm_stat_t (*init)(XPI_Type *base, xpi_config_t *xpi_config);
  98. /**< XPI driver interface: configure the AHB buffer */
  99. hpm_stat_t (*config_ahb_buffer)(XPI_Type *base, xpi_ahb_buffer_cfg_t *ahb_buf_cfg);
  100. /**< XPI driver interface: configure the device */
  101. hpm_stat_t (*config_device)(XPI_Type *base, xpi_device_config_t *dev_cfg, xpi_channel_t channel);
  102. /**< XPI driver interface: update instruction talbe */
  103. hpm_stat_t (*update_instr_table)(XPI_Type *base, const uint32_t *inst_base, uint32_t seq_idx, uint32_t num);
  104. /**< XPI driver interface: transfer command/data using block interface */
  105. hpm_stat_t (*transfer_blocking)(XPI_Type *base, xpi_xfer_ctx_t *xfer);
  106. /**< Software reset the XPI controller */
  107. void (*software_reset)(XPI_Type *base);
  108. /**< XPI driver interface: Check whether IP is idle */
  109. bool (*is_idle)(XPI_Type *base);
  110. /**< XPI driver interface: update delay line setting */
  111. void (*update_dllcr)(XPI_Type *base,
  112. uint32_t serial_root_clk_freq,
  113. uint32_t data_valid_time,
  114. xpi_channel_t channel,
  115. uint32_t dly_target);
  116. /**< XPI driver interface: Get absolute address for APB transfer */
  117. hpm_stat_t
  118. (*get_abs_apb_xfer_addr)(XPI_Type *base, xpi_xfer_channel_t channel, uint32_t in_addr, uint32_t *out_addr);
  119. } xpi_driver_interface_t;
  120. /**
  121. * @brief XPI NOR driver interface
  122. */
  123. typedef struct {
  124. /**< XPI NOR driver interface: API version */
  125. uint32_t version;
  126. /**< XPI NOR driver interface: Get FLASH configuration */
  127. hpm_stat_t (*get_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
  128. /**< XPI NOR driver interface: initialize FLASH */
  129. hpm_stat_t (*init)(XPI_Type *base, xpi_nor_config_t *nor_config);
  130. /**< XPI NOR driver interface: Enable write access to FLASH */
  131. hpm_stat_t
  132. (*enable_write)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
  133. /**< XPI NOR driver interface: Get FLASH status register */
  134. hpm_stat_t (*get_status)(XPI_Type *base,
  135. xpi_xfer_channel_t channel,
  136. const xpi_nor_config_t *nor_config,
  137. uint32_t addr,
  138. uint16_t *out_status);
  139. /**< XPI NOR driver interface: Wait when FLASH is still busy */
  140. hpm_stat_t
  141. (*wait_busy)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
  142. /**< XPI NOR driver interface: erase a specified FLASH region */
  143. hpm_stat_t (*erase)(XPI_Type *base,
  144. xpi_xfer_channel_t channel,
  145. const xpi_nor_config_t *nor_config,
  146. uint32_t start,
  147. uint32_t length);
  148. /**< XPI NOR driver interface: Erase the whole FLASH */
  149. hpm_stat_t (*erase_chip)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config);
  150. /**< XPI NOR driver interface: Erase specified FLASH sector */
  151. hpm_stat_t
  152. (*erase_sector)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
  153. /**< XPI NOR driver interface: Erase specified FLASH block */
  154. hpm_stat_t
  155. (*erase_block)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
  156. /**< XPI NOR driver interface: Program data to specified FLASH address */
  157. hpm_stat_t (*program)(XPI_Type *base,
  158. xpi_xfer_channel_t channel,
  159. const xpi_nor_config_t *nor_config,
  160. const uint32_t *src,
  161. uint32_t dst_addr,
  162. uint32_t length);
  163. /**< XPI NOR driver interface: read data from specified FLASH address */
  164. hpm_stat_t (*read)(XPI_Type *base,
  165. xpi_xfer_channel_t channel,
  166. const xpi_nor_config_t *nor_config,
  167. uint32_t *dst,
  168. uint32_t start,
  169. uint32_t length);
  170. /**< XPI NOR driver interface: program FLASH page using nonblocking interface */
  171. hpm_stat_t (*page_program_nonblocking)(XPI_Type *base,
  172. xpi_xfer_channel_t channel,
  173. const xpi_nor_config_t *nor_config,
  174. const uint32_t *src,
  175. uint32_t dst_addr,
  176. uint32_t length);
  177. /**< XPI NOR driver interface: erase FLASH sector using nonblocking interface */
  178. hpm_stat_t (*erase_sector_nonblocking)(XPI_Type *base,
  179. xpi_xfer_channel_t channel,
  180. const xpi_nor_config_t *nor_config,
  181. uint32_t addr);
  182. /**< XPI NOR driver interface: erase FLASH block using nonblocking interface */
  183. hpm_stat_t (*erase_block_nonblocking)(XPI_Type *base,
  184. xpi_xfer_channel_t channel,
  185. const xpi_nor_config_t *nor_config,
  186. uint32_t addr);
  187. /**< XPI NOR driver interface: erase the whole FLASh using nonblocking interface */
  188. hpm_stat_t
  189. (*erase_chip_nonblocking)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config);
  190. uint32_t reserved0[3];
  191. /**< XPI NOR driver interface: automatically configuration flash based on the cfg_option setting */
  192. hpm_stat_t (*auto_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
  193. /**< XPI NOR driver interface: Get FLASH properties */
  194. hpm_stat_t (*get_property)(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value);
  195. } xpi_nor_driver_interface_t;
  196. /**
  197. * @brief XPI RAM driver interface
  198. */
  199. typedef struct {
  200. /**< XPI RAM driver interface: API version */
  201. uint32_t version;
  202. /**< Get XPI RAM configuration based on cfg_option */
  203. hpm_stat_t (*get_config)(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option);
  204. /**< XPI RAM driver interface: Initialize XPI RAM */
  205. hpm_stat_t (*init)(XPI_Type *base, xpi_ram_config_t *ram_cfg);
  206. } xpi_ram_driver_interface_t;
  207. /**
  208. * @brief SDP API interface
  209. */
  210. typedef struct {
  211. /**< SDP API interface: API version */
  212. uint32_t version;
  213. /**< SDP API interface: Initialize IP */
  214. hpm_stat_t (*sdp_ip_init)(void);
  215. /**< SDP API interface: Deinitialize IP */
  216. hpm_stat_t (*sdp_ip_deinit)(void);
  217. /**< SDP API interface: Set AES key */
  218. hpm_stat_t (*aes_set_key)(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t keybits, uint32_t key_idx);
  219. /**< SDP API interface: AES ECB crypto operation */
  220. hpm_stat_t (*aes_crypt_ecb)(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
  221. /**< SDP API interface: AES CBC crypto operation */
  222. hpm_stat_t (*aes_crypt_cbc)(sdp_aes_ctx_t *aes_ctx,
  223. sdp_aes_op_t op,
  224. uint32_t length,
  225. uint8_t iv[16],
  226. const uint8_t *input,
  227. uint8_t *output);
  228. /**< SDP API interface: AES CTR crypto operation */
  229. hpm_stat_t
  230. (*aes_crypt_ctr)(sdp_aes_ctx_t *aes_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
  231. /**< SDP API interface: AES CCM encryption */
  232. hpm_stat_t (*aes_ccm_gen_enc)(sdp_aes_ctx_t *aes_ctx,
  233. uint32_t input_len,
  234. const uint8_t *nonce,
  235. uint32_t nonce_len,
  236. const uint8_t *aad,
  237. uint32_t aad_len,
  238. const uint8_t *input,
  239. uint8_t *output,
  240. uint8_t *tag,
  241. uint32_t tag_len);
  242. /**< SDP API interface: AES CCM Decrypt and verify */
  243. hpm_stat_t (*aes_ccm_dec_verify)(sdp_aes_ctx_t *aes_ctx,
  244. uint32_t input_len,
  245. const uint8_t *nonce,
  246. uint32_t nonce_len,
  247. const uint8_t *aad,
  248. uint32_t aad_len,
  249. const uint8_t *input,
  250. uint8_t *output,
  251. const uint8_t *tag,
  252. uint32_t tag_len);
  253. /**< SDP API interface: memcpy */
  254. hpm_stat_t (*memcpy)(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length);
  255. /**< SDP API interface: memset */
  256. hpm_stat_t (*memset)(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length);
  257. /**< SDP API interface: HASH initialization */
  258. hpm_stat_t (*hash_init)(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg);
  259. /**< SDP API interface: HASH update */
  260. hpm_stat_t (*hash_update)(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length);
  261. /**< SDP API interface: HASH finish */
  262. hpm_stat_t (*hash_finish)(sdp_hash_ctx_t *hash_ctx, uint8_t *digest);
  263. /**< SDP API interface: Set SM4 Key */
  264. hpm_stat_t (*sm4_set_key)(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t keybits, uint32_t key_idx);
  265. /**< SDP API interface: SM4 Crypto ECB mode */
  266. hpm_stat_t (*sm4_crypt_ecb)(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
  267. /**< SDP API Interface: SM4 Crypto CBC mode*/
  268. hpm_stat_t (*sm4_crypt_cbc)(sdp_sm4_ctx_t *sm4_ctx,
  269. sdp_sm4_op_t op,
  270. uint32_t length,
  271. uint8_t iv[16],
  272. const uint8_t *input,
  273. uint8_t *output);
  274. /**< SDP API Interface: SM4 CTR mode */
  275. hpm_stat_t
  276. (*sm4_crypt_ctr)(sdp_sm4_ctx_t *sm4_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
  277. /**< SDP API Interface: SM4 CCM Encryption */
  278. hpm_stat_t (*sm4_ccm_gen_enc)(sdp_sm4_ctx_t *sm4_ctx,
  279. uint32_t input_len,
  280. const uint8_t *nonce,
  281. uint32_t nonce_len,
  282. const uint8_t *aad,
  283. uint32_t aad_len,
  284. const uint8_t *input,
  285. uint8_t *output,
  286. uint8_t *tag,
  287. uint32_t tag_len);
  288. /**< SDP API Interface: SM4 CCM Decrypt and Verify */
  289. hpm_stat_t (*sm4_ccm_dec_verify)(sdp_sm4_ctx_t *sm4_ctx,
  290. uint32_t input_len,
  291. const uint8_t *nonce,
  292. uint32_t nonce_len,
  293. const uint8_t *aad,
  294. uint32_t aad_len,
  295. const uint8_t *input,
  296. uint8_t *output,
  297. const uint8_t *tag,
  298. uint32_t tag_len);
  299. } sdp_driver_interface_t;
  300. /**
  301. * @brief Bootloader API table
  302. */
  303. typedef struct {
  304. /**< Bootloader API table: version */
  305. const uint32_t version;
  306. /**< Bootloader API table: copyright string address */
  307. const char *copyright;
  308. /**< Bootloader API table: run_bootloader API */
  309. const hpm_stat_t (*run_bootloader)(void *arg);
  310. /**< Bootloader API table: otp driver interface address */
  311. const otp_driver_interface_t *otp_driver_if;
  312. /**< Bootloader API table: xpi driver interface address */
  313. const xpi_driver_interface_t *xpi_driver_if;
  314. /**< Bootloader API table: xpi nor driver interface address */
  315. const xpi_nor_driver_interface_t *xpi_nor_driver_if;
  316. /**< Bootloader API table: xpi ram driver interface address */
  317. const xpi_ram_driver_interface_t *xpi_ram_driver_if;
  318. /**< Bootloader API table: sdp driver interface address */
  319. const sdp_driver_interface_t *sdp_driver_if;
  320. } bootloader_api_table_t;
  321. /**< Bootloader API table Root */
  322. #define ROM_API_TABLE_ROOT ((const bootloader_api_table_t *)0x2001FF00U)
  323. #ifdef __cplusplus
  324. extern "C" {
  325. #endif
  326. /***********************************************************************************************************************
  327. *
  328. *
  329. * Enter bootloader Wrapper
  330. *
  331. *
  332. **********************************************************************************************************************/
  333. /**
  334. * @brief Eneter specified Boot mode
  335. * @param [in] ctx Enter bootloader context
  336. * @retval status_invalid Invalid parameters were deteced
  337. */
  338. static inline hpm_stat_t rom_enter_bootloader(void *ctx)
  339. {
  340. return ROM_API_TABLE_ROOT->run_bootloader(ctx);
  341. }
  342. /***********************************************************************************************************************
  343. *
  344. *
  345. * XPI NOR Driver Wrapper
  346. *
  347. *
  348. **********************************************************************************************************************/
  349. /**
  350. * @brief Setup API Runtime environment on demand
  351. */
  352. static inline void rom_xpi_nor_api_setup(void)
  353. {
  354. static const uint32_t s_setup_code[] = {
  355. 0x300027f3, 0xf6b36719, 0xe68100e7, 0x90738fd9, 0x80823007,
  356. };
  357. if (ROM_API_TABLE_ROOT->version == 0x56010000UL) {
  358. typedef void (*api_setup_entry_t)(void);
  359. api_setup_entry_t entry = (api_setup_entry_t) &s_setup_code[0];
  360. entry();
  361. }
  362. }
  363. /**
  364. * @brief Get XPI NOR configuration via cfg_option
  365. * @param [in] base XPI base address
  366. * @param [out] nor_cfg XPI NOR configuration structure
  367. * @param [in] cfg_option XPI NOR configuration option
  368. * @return API execution status
  369. */
  370. static inline hpm_stat_t rom_xpi_nor_get_config(XPI_Type *base,
  371. xpi_nor_config_t *nor_cfg,
  372. xpi_nor_config_option_t *cfg_option)
  373. {
  374. rom_xpi_nor_api_setup();
  375. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_config(base, nor_cfg, cfg_option);
  376. }
  377. /**
  378. * @brief Initialize XPI NOR based on nor_config
  379. * @param [in] base XPI base address
  380. * @param[in] nor_config XPI NOR configuration
  381. * @return API execution status
  382. */
  383. static inline hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
  384. {
  385. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->init(base, nor_config);
  386. }
  387. /**
  388. * @brief Erase specified FLASH region
  389. * @param[in] base XPI base address
  390. * @param[in] channel XPI transfer channel
  391. * @param[in] nor_config XPI nOR configuration
  392. * @param[in] start Erase address start address
  393. * @param[in] length Region size to be erased
  394. * @return API execution status
  395. */
  396. static inline hpm_stat_t rom_xpi_nor_erase(XPI_Type *base,
  397. xpi_xfer_channel_t channel,
  398. const xpi_nor_config_t *nor_config,
  399. uint32_t start,
  400. uint32_t length)
  401. {
  402. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase(base, channel, nor_config, start, length);
  403. }
  404. /**
  405. * @brief Erase specified FLASH sector in blocking way
  406. * @param[in] base XPI base address
  407. * @param[in] channel XPI transfer channel
  408. * @param[in] nor_config XPI NOR configuration
  409. * @param[in] start Sector address
  410. * @return API execution status
  411. */
  412. static inline hpm_stat_t rom_xpi_nor_erase_sector(XPI_Type *base,
  413. xpi_xfer_channel_t channel,
  414. const xpi_nor_config_t *nor_config,
  415. uint32_t start)
  416. {
  417. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector(base, channel, nor_config, start);
  418. }
  419. /**
  420. * @brief Erase specified FLASH sector in non-blocking way
  421. * @param[in] base XPI base address
  422. * @param[in] channel XPI transfer channel
  423. * @param[in] nor_config XPI NOR configuration
  424. * @param[in] start Sector address
  425. * @return API execution status
  426. */
  427. static inline hpm_stat_t rom_xpi_nor_erase_sector_nonblocking(XPI_Type *base,
  428. xpi_xfer_channel_t channel,
  429. const xpi_nor_config_t *nor_config,
  430. uint32_t start)
  431. {
  432. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector_nonblocking(base, channel, nor_config, start);
  433. }
  434. /**
  435. * @brief Erase specified FLASH blcok in blocking way
  436. * @param[in] base XPI base address
  437. * @param[in] channel XPI transfer channel
  438. * @param[in] nor_config XPI NOR configuration
  439. * @param[in] start Block address
  440. * @return API execution status
  441. */
  442. static inline hpm_stat_t rom_xpi_nor_erase_block(XPI_Type *base,
  443. xpi_xfer_channel_t channel,
  444. const xpi_nor_config_t *nor_config,
  445. uint32_t start)
  446. {
  447. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block(base, channel, nor_config, start);
  448. }
  449. /**
  450. * @brief Erase specified FLASH blcok in non-blocking way
  451. * @param[in] base XPI base address
  452. * @param[in] channel XPI transfer channel
  453. * @param[in] nor_config XPI NOR configuration
  454. * @param[in] start Block address
  455. * @return API execution status
  456. */
  457. static inline hpm_stat_t rom_xpi_nor_erase_block_nonblocking(XPI_Type *base,
  458. xpi_xfer_channel_t channel,
  459. const xpi_nor_config_t *nor_config,
  460. uint32_t start)
  461. {
  462. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block_nonblocking(base, channel, nor_config, start);
  463. }
  464. /**
  465. * @brief Erase the whole FLASH in blocking way
  466. * @param[in] base XPI base address
  467. * @param[in] channel XPI transfer channel
  468. * @param[in] nor_config XPI NOR configuration
  469. * @return API execution status
  470. */
  471. static inline hpm_stat_t rom_xpi_nor_erase_chip(XPI_Type *base,
  472. xpi_xfer_channel_t channel,
  473. const xpi_nor_config_t *nor_config)
  474. {
  475. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip(base, channel, nor_config);
  476. }
  477. /**
  478. * @brief Erase the whole FLASH in non-blocking way
  479. * @param[in] base XPI base address
  480. * @param[in] channel XPI transfer channel
  481. * @param[in] nor_config XPI NOR configuration
  482. * @return API execution status
  483. */
  484. static inline hpm_stat_t rom_xpi_nor_erase_chip_nonblocking(XPI_Type *base,
  485. xpi_xfer_channel_t channel,
  486. const xpi_nor_config_t *nor_config)
  487. {
  488. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip_nonblocking(base, channel, nor_config);
  489. }
  490. /**
  491. * @brief Program data to specified FLASH address in blocking way
  492. * @param[in] base XPI base address
  493. * @param[in] channel XPI transfer channel
  494. * @param[in] nor_config XPI NOR configuration
  495. * @param[in] src data source address
  496. * @param[in] dst_addr Destination FLASH address
  497. * @param[in] length length of data to be programmed
  498. * @return API execution status
  499. */
  500. static inline hpm_stat_t rom_xpi_nor_program(XPI_Type *base,
  501. xpi_xfer_channel_t channel,
  502. const xpi_nor_config_t *nor_config,
  503. const uint32_t *src,
  504. uint32_t dst_addr,
  505. uint32_t length)
  506. {
  507. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->program(base, channel, nor_config, src, dst_addr, length);
  508. }
  509. /**
  510. * @brief Page-Program data to specified FLASH address in non-blocking way
  511. * @param[in] base XPI base address
  512. * @param[in] channel XPI transfer channel
  513. * @param[in] nor_config XPI NOR configuration
  514. * @param[in] src data source address
  515. * @param[in] dst_addr Destination FLASH address
  516. * @param[in] length length of data to be programmed
  517. * @return API execution status
  518. */
  519. static inline hpm_stat_t rom_xpi_nor_page_program_nonblocking(XPI_Type *base,
  520. xpi_xfer_channel_t channel,
  521. const xpi_nor_config_t *nor_config,
  522. const uint32_t *src,
  523. uint32_t dst_addr,
  524. uint32_t length)
  525. {
  526. return ROM_API_TABLE_ROOT->xpi_nor_driver_if
  527. ->page_program_nonblocking(base, channel, nor_config, src, dst_addr, length);
  528. }
  529. /**
  530. * @brief Read data from specified FLASH address
  531. * @param [in] base XPI base address
  532. * @param [in] channel XPI transfer channel
  533. * @param [in] nor_config XPI NOR configuration
  534. * @param [in] dst Memory start address to store the data read out from FLASH
  535. * @param [in] start FLASH address for data read
  536. * @param [in] length length of data to be read out
  537. * @return API execution address
  538. */
  539. static inline hpm_stat_t rom_xpi_nor_read(XPI_Type *base,
  540. xpi_xfer_channel_t channel,
  541. const xpi_nor_config_t *nor_config,
  542. uint32_t *dst,
  543. uint32_t start,
  544. uint32_t length)
  545. {
  546. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->read(base, channel, nor_config, dst, start, length);
  547. }
  548. /**
  549. * @brief Automatically configure XPI NOR based on cfg_option
  550. * @param [in] base XPI base address
  551. * @param [out] config XPI NOR configuration structure
  552. * @param [in] cfg_option XPI NOR configuration option
  553. * @return API execution status
  554. */
  555. static inline hpm_stat_t rom_xpi_nor_auto_config(XPI_Type *base,
  556. xpi_nor_config_t *config,
  557. xpi_nor_config_option_t *cfg_option)
  558. {
  559. rom_xpi_nor_api_setup();
  560. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->auto_config(base, config, cfg_option);
  561. }
  562. /**
  563. * @brief Get XPI NOR properties
  564. * @param [in] base XPI base address
  565. * @param [in] nor_cfg XPI NOR configuration structure
  566. * @param [in] property_id
  567. * @param [out] value property value retrieved by this API
  568. * @return API execution status
  569. */
  570. static inline hpm_stat_t rom_xpi_nor_get_property(XPI_Type *base,
  571. xpi_nor_config_t *nor_cfg,
  572. uint32_t property_id,
  573. uint32_t *value)
  574. {
  575. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_property(base, nor_cfg, property_id, value);
  576. }
  577. /**
  578. * @brief Return the status register value on XPI NOR FLASH
  579. *
  580. * @param [in] base XPI base address
  581. * @param [in] channel XPI transfer channel
  582. * @param [in] nor_config XPI NOR configuration
  583. * @param [in] addr FLASH address offset
  584. * @param [out] out_status FLASH status register value
  585. * @return API execution status
  586. */
  587. static inline hpm_stat_t rom_xpi_nor_get_status(XPI_Type *base, xpi_xfer_channel_t channel,
  588. const xpi_nor_config_t *nor_config, uint32_t addr,
  589. uint16_t *out_status)
  590. {
  591. return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_status(base, channel, nor_config, addr, out_status);
  592. }
  593. /**
  594. * @brief Configure the XPI Address Remapping Logic
  595. * @param [in] base XPI base address
  596. * @param [in] start Start Address (memory mapped address)
  597. * @param [in] len Size for the remapping region
  598. * @param [in] offset Relative address based on parameter "start"
  599. * @retval true is all parameters are valid
  600. * @retval false if any parameter is invalid
  601. */
  602. ATTR_RAMFUNC
  603. static inline bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
  604. {
  605. if ((base != HPM_XPI0) || ((start & 0xFFF) != 0) || ((len & 0xFFF) != 0)
  606. || ((offset & 0xFFF) != 0)) {
  607. return false;
  608. }
  609. static const uint8_t k_mc_xpi_remap_config[] = {
  610. 0x2e, 0x96, 0x23, 0x22, 0xc5, 0x42, 0x23, 0x24,
  611. 0xd5, 0x42, 0x93, 0xe5, 0x15, 0x00, 0x23, 0x20,
  612. 0xb5, 0x42, 0x05, 0x45, 0x82, 0x80,
  613. };
  614. typedef bool (*remap_config_cb_t)(XPI_Type *, uint32_t, uint32_t, uint32_t);
  615. remap_config_cb_t cb = (remap_config_cb_t) &k_mc_xpi_remap_config;
  616. bool result = cb(base, start, len, offset);
  617. ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
  618. fencei();
  619. return result;
  620. }
  621. /**
  622. * @brief Disable XPI Remapping logic
  623. * @param [in] base XPI base address
  624. */
  625. ATTR_RAMFUNC
  626. static inline void rom_xpi_nor_remap_disable(XPI_Type *base)
  627. {
  628. static const uint8_t k_mc_xpi_remap_disable[] = {
  629. 0x83, 0x27, 0x05, 0x42, 0xf9, 0x9b, 0x23, 0x20,
  630. 0xf5, 0x42, 0x82, 0x80,
  631. };
  632. typedef void (*remap_disable_cb_t)(XPI_Type *);
  633. remap_disable_cb_t cb = (remap_disable_cb_t) &k_mc_xpi_remap_disable;
  634. cb(base);
  635. fencei();
  636. }
  637. /**
  638. * @brief Check whether XPI Remapping is enabled
  639. * @param [in] base XPI base address
  640. *
  641. * @retval true Remapping logic is enabled
  642. * @retval false Remapping logic is disabled
  643. */
  644. ATTR_RAMFUNC
  645. static inline bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
  646. {
  647. static const uint8_t k_mc_xpi_remap_enabled[] = {
  648. 0x03, 0x25, 0x05, 0x42, 0x05, 0x89, 0x82, 0x80,
  649. };
  650. typedef bool (*remap_chk_cb_t)(XPI_Type *);
  651. remap_chk_cb_t chk_cb = (remap_chk_cb_t) &k_mc_xpi_remap_enabled;
  652. return chk_cb(base);
  653. }
  654. /**
  655. * @brief Configure Specified EXiP Region
  656. * @param [in] base XPI base address
  657. * @param [in] index EXiP Region index
  658. * @param [in] param ExiP Region Parameter
  659. * @retval true All parameters are valid
  660. * @retval false Any parameter is invalid
  661. */
  662. ATTR_RAMFUNC
  663. static inline bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
  664. {
  665. if (base != HPM_XPI0) {
  666. return false;
  667. }
  668. static const uint8_t k_mc_exip_region_config[] = {
  669. 0x18, 0x4a, 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67,
  670. 0xaa, 0x97, 0x23, 0xa4, 0xe7, 0xd0, 0x4c, 0x4a,
  671. 0x14, 0x42, 0x58, 0x42, 0x23, 0xa6, 0xb7, 0xd0,
  672. 0x4c, 0x46, 0x36, 0x97, 0x13, 0x77, 0x07, 0xc0,
  673. 0x23, 0xa2, 0xb7, 0xd0, 0x0c, 0x46, 0x13, 0x67,
  674. 0x37, 0x00, 0x05, 0x45, 0x23, 0xa0, 0xb7, 0xd0,
  675. 0x0c, 0x4e, 0x23, 0xaa, 0xb7, 0xd0, 0x50, 0x4e,
  676. 0x23, 0xa8, 0xc7, 0xd0, 0x23, 0xac, 0xd7, 0xd0,
  677. 0x23, 0xae, 0xe7, 0xd0, 0x82, 0x80,
  678. };
  679. typedef void (*exip_region_config_cb_t)(XPI_Type *, uint32_t, exip_region_param_t *);
  680. exip_region_config_cb_t cb = (exip_region_config_cb_t) &k_mc_exip_region_config;
  681. cb(base, index, param);
  682. ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
  683. fencei();
  684. return true;
  685. }
  686. /**
  687. * @brief Disable EXiP Feature on specified EXiP Region
  688. * @@param [in] base XPI base address
  689. * @param [in] index EXiP Region index
  690. */
  691. ATTR_RAMFUNC
  692. static inline void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
  693. {
  694. static const uint8_t k_mc_exip_region_disable[] = {
  695. 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67, 0xaa, 0x97,
  696. 0x03, 0xa7, 0xc7, 0xd1, 0x75, 0x9b, 0x23, 0xae,
  697. 0xe7, 0xd0, 0x82, 0x80
  698. };
  699. typedef void (*exip_region_disable_cb_t)(XPI_Type *, uint32_t);
  700. exip_region_disable_cb_t cb = (exip_region_disable_cb_t) &k_mc_exip_region_disable;
  701. cb(base, index);
  702. ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
  703. fencei();
  704. }
  705. /**
  706. * @brief Enable global EXiP logic
  707. * @@param [in] base XPI base address
  708. */
  709. ATTR_RAMFUNC
  710. static inline void rom_xpi_nor_exip_enable(XPI_Type *base)
  711. {
  712. static const uint8_t k_mc_exip_enable[] = {
  713. 0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
  714. 0x37, 0x07, 0x00, 0x80, 0xd9, 0x8f, 0x23, 0x20,
  715. 0xf5, 0xc0, 0x82, 0x80
  716. };
  717. typedef void (*exip_enable_cb_t)(XPI_Type *);
  718. exip_enable_cb_t cb = (exip_enable_cb_t) &k_mc_exip_enable;
  719. cb(base);
  720. }
  721. /**
  722. * @brief Disable global EXiP logic
  723. * @@param [in] base XPI base address
  724. */
  725. ATTR_RAMFUNC
  726. static inline void rom_xpi_nor_exip_disable(XPI_Type *base)
  727. {
  728. static const uint8_t k_mc_exip_disable[] = {
  729. 0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
  730. 0x86, 0x07, 0x85, 0x83, 0x23, 0x20, 0xf5, 0xc0,
  731. 0x82, 0x80
  732. };
  733. typedef void (*exip_disable_cb_t)(XPI_Type *);
  734. exip_disable_cb_t cb = (exip_disable_cb_t) &k_mc_exip_disable;
  735. cb(base);
  736. ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
  737. fencei();
  738. }
  739. /***********************************************************************************************************************
  740. *
  741. *
  742. * XPI RAM Driver Wrapper
  743. *
  744. *
  745. **********************************************************************************************************************/
  746. /**
  747. * @brief Get XPI RAM configuration based on cfg_option
  748. * @param [in] base XPI base address
  749. * @param [out] ram_cfg XPI RAM configuration structure
  750. * @param [in] cfg_option XPI RAM configuration option
  751. * @return API execution status
  752. */
  753. static inline hpm_stat_t rom_xpi_ram_get_config(XPI_Type *base,
  754. xpi_ram_config_t *ram_cfg,
  755. xpi_ram_config_option_t *cfg_option)
  756. {
  757. return ROM_API_TABLE_ROOT->xpi_ram_driver_if->get_config(base, ram_cfg, cfg_option);
  758. }
  759. /**
  760. * @brief Initialize XPI RAM
  761. * @param [in] base XPI base address
  762. * @param [in] ram_cfg XPI ram configuration
  763. * @return API execution status
  764. */
  765. static inline hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
  766. {
  767. return ROM_API_TABLE_ROOT->xpi_ram_driver_if->init(base, ram_cfg);
  768. }
  769. /***********************************************************************************************************************
  770. *
  771. *
  772. * SDP Driver Wrapper
  773. *
  774. *
  775. **********************************************************************************************************************/
  776. /**
  777. * @brief Initialize SDP IP
  778. */
  779. static inline void rom_sdp_init(void)
  780. {
  781. ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_init();
  782. }
  783. /**
  784. * @brief De-initialize SDP IP
  785. */
  786. static inline void rom_sdp_deinit(void)
  787. {
  788. ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_deinit();
  789. }
  790. /**
  791. * @brief Set AES key to SDP
  792. * @param [in] aes_ctx AES context
  793. * @param [in] key AES key buffer
  794. * @param [in] key_bits AES key-bit option
  795. * @param[in] key_idx AES key index
  796. * @return API execution status
  797. */
  798. static inline hpm_stat_t rom_sdp_aes_set_key(sdp_aes_ctx_t *aes_ctx,
  799. const uint8_t *key,
  800. sdp_aes_key_bits_t key_bits,
  801. uint32_t key_idx)
  802. {
  803. return ROM_API_TABLE_ROOT->sdp_driver_if->aes_set_key(aes_ctx, key, key_bits, key_idx);
  804. }
  805. /**
  806. * @brief SDP AES ECB crypto operation(Encrypt or Decrypt)
  807. * @param [in] aes_ctx AES context
  808. * @param [in] op AES operation: encrypt or decrypt
  809. * @param [in] len Data length for AES encryption/decryption
  810. * @param [in] in Input data
  811. * @param [out] out Output data
  812. * @return API execution status
  813. */
  814. static inline hpm_stat_t rom_sdp_aes_crypt_ecb(sdp_aes_ctx_t *aes_ctx,
  815. sdp_aes_op_t op,
  816. uint32_t len,
  817. const uint8_t *in,
  818. uint8_t *out)
  819. {
  820. return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_ecb(aes_ctx, op, len, in, out);
  821. }
  822. /**
  823. * @brief SDP AES CBC crypto operation(Encrypt or Decrypt)
  824. * @param [in] aes_ctx AES context
  825. * @param [in] op AES operation: encrypt or decrypt
  826. * @param [in] length Data length for AES encryption/decryption
  827. * @param [in] iv Initial vector/nonce
  828. * @param [in] in Input data
  829. * @param [out] out Output data
  830. * @return API execution status
  831. */
  832. static inline hpm_stat_t rom_sdp_aes_crypt_cbc(sdp_aes_ctx_t *aes_ctx,
  833. sdp_aes_op_t op,
  834. uint32_t length,
  835. uint8_t iv[16],
  836. const uint8_t *in,
  837. uint8_t *out)
  838. {
  839. return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_cbc(aes_ctx, op, length, iv, in, out);
  840. }
  841. /**
  842. * @brief Set SM4 key to SDP
  843. * @param [in] sm4_ctx SM4 context
  844. * @param [in] key SM4 key buffer
  845. * @param [in] key_bits SM4 key-bit option
  846. * @param[in] key_idx SM4 key index
  847. * @return API execution status
  848. */
  849. static inline hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx,
  850. const uint8_t *key,
  851. sdp_sm4_key_bits_t key_bits,
  852. uint32_t key_idx)
  853. {
  854. return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_set_key(sm4_ctx, key, key_bits, key_idx);
  855. }
  856. /**
  857. * @brief SDP SM4 ECB crypto operation(Encrypt or Decrypt)
  858. * @param [in] sm4_ctx SM4 context
  859. * @param [in] op SM4 operation: encrypt or decrypt
  860. * @param [in] len Data length for SM4 encryption/decryption
  861. * @param [in] in Input data
  862. * @param [out] out Output data
  863. * @return API execution status
  864. */
  865. static inline hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx,
  866. sdp_sm4_op_t op,
  867. uint32_t len,
  868. const uint8_t *in,
  869. uint8_t *out)
  870. {
  871. return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_ecb(sm4_ctx, op, len, in, out);
  872. }
  873. /**
  874. * @brief SDP SM4 CBC crypto operation(Encrypt or Decrypt)
  875. * @param [in] sm4_ctx SM4 context
  876. * @param [in] op SM4 operation: encrypt or decrypt
  877. * @param [in] length Data length for SM4 encryption/decryption
  878. * @param [in] iv Initial vector/nonce
  879. * @param [in] in Input data
  880. * @param [out] out Output data
  881. * @return API execution status
  882. */
  883. static inline hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx,
  884. sdp_sm4_op_t op,
  885. uint32_t length,
  886. uint8_t iv[16],
  887. const uint8_t *in,
  888. uint8_t *out)
  889. {
  890. return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_cbc(sm4_ctx, op, length, iv, in, out);
  891. }
  892. /**
  893. * @brief HASH initialization
  894. * @param [in] hash_ctx HASH context
  895. * @param [in] alg HASH algorithm
  896. * @return API execution status
  897. */
  898. static inline hpm_stat_t rom_sdp_hash_init(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg)
  899. {
  900. return ROM_API_TABLE_ROOT->sdp_driver_if->hash_init(hash_ctx, alg);
  901. }
  902. /**
  903. * @brief HASH Update
  904. * @param [in] hash_ctx HASH context
  905. * @param [in] data Data for HASH operation
  906. * @param [in] length of the data for HASH operation
  907. * @return API execution status
  908. */
  909. static inline hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
  910. {
  911. return ROM_API_TABLE_ROOT->sdp_driver_if->hash_update(hash_ctx, data, length);
  912. }
  913. /**
  914. * @brief HASH finialize
  915. * @param [in] hash_ctx HASH context
  916. * @param [out] digest the output digest
  917. * @return API execution status
  918. */
  919. static inline hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
  920. {
  921. return ROM_API_TABLE_ROOT->sdp_driver_if->hash_finish(hash_ctx, digest);
  922. }
  923. /**
  924. * @brief SDP memcpy operation
  925. * @param [in] dma_ctx DMA context
  926. * @param [out] dst Destination address for memcpy
  927. * @param [in] src Source address for memcpy
  928. * @param [in] length Size of data for memcpy operation
  929. * @return API execution status
  930. */
  931. static inline hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
  932. {
  933. return ROM_API_TABLE_ROOT->sdp_driver_if->memcpy(dma_ctx, dst, src, length);
  934. }
  935. /**
  936. * @brief SDP memset operation
  937. * @param [in] dma_ctx DMA context
  938. * @param [out] dst Destination address for memset
  939. * @param [in] pattern pattern for memset
  940. * @param [in] length Size of data for memset operation
  941. * @return API execution status
  942. */
  943. static inline hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
  944. {
  945. return ROM_API_TABLE_ROOT->sdp_driver_if->memset(dma_ctx, dst, pattern, length);
  946. }
  947. #ifdef __cplusplus
  948. }
  949. #endif
  950. /**
  951. * @}
  952. */
  953. #endif /* HPM_ROMAPI_H */