drv_i2c.c 5.0 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-15 Magicoe The first version for LPC55S6x
  9. * 2023-02-17 Vandoul Add status to lpc_i2c_bus.
  10. */
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include "board.h"
  14. #include "fsl_iocon.h"
  15. #include "fsl_gpio.h"
  16. #include "fsl_i2c.h"
  17. #include "fsl_i2c_dma.h"
  18. #ifdef BSP_USING_I2C
  19. enum
  20. {
  21. #ifdef BSP_USING_I2C1
  22. I2C1_INDEX,
  23. #endif
  24. #ifdef BSP_USING_I2C4
  25. I2C4_INDEX,
  26. #endif
  27. };
  28. #define i2c_dbg rt_kprintf
  29. struct lpc_i2c_bus
  30. {
  31. struct rt_i2c_bus_device parent;
  32. I2C_Type *I2C;
  33. DMA_Type *DMA;
  34. i2c_master_dma_handle_t i2c_mst_dma_handle;
  35. dma_handle_t dmaHandle;
  36. rt_sem_t sem;
  37. clock_attach_id_t i2c_clock_id;
  38. uint32_t dma_chl;
  39. uint32_t instance;
  40. uint32_t baud;
  41. char *device_name;
  42. uint32_t status;
  43. };
  44. struct lpc_i2c_bus lpc_obj[] =
  45. {
  46. #ifdef BSP_USING_I2C1
  47. {
  48. .I2C = I2C1,
  49. .DMA = DMA0,
  50. .dma_chl = 7,
  51. .device_name = "i2c1",
  52. .baud = 100000U,
  53. .instance = 1U,
  54. .i2c_clock_id = kFRO12M_to_FLEXCOMM1,
  55. },
  56. #endif
  57. #ifdef BSP_USING_I2C4
  58. {
  59. .I2C = I2C4,
  60. .DMA = DMA0,
  61. .dma_chl = 13,
  62. .device_name = "i2c4",
  63. .baud = 400000U,
  64. .instance = 4U,
  65. .i2c_clock_id = kFRO12M_to_FLEXCOMM4,
  66. },
  67. #endif
  68. };
  69. static void i2c_mst_dma_callback(I2C_Type *base, i2c_master_dma_handle_t *handle, status_t status, void *userData)
  70. {
  71. struct lpc_i2c_bus *lpc_i2c = (struct lpc_i2c_bus*)userData;
  72. lpc_i2c->status = status;
  73. rt_sem_release(lpc_i2c->sem);
  74. }
  75. static rt_ssize_t lpc_i2c_xfer(struct rt_i2c_bus_device *bus,
  76. struct rt_i2c_msg msgs[], rt_uint32_t num)
  77. {
  78. struct rt_i2c_msg *msg;
  79. i2c_master_transfer_t xfer = {0};
  80. rt_uint32_t i;
  81. rt_err_t ret = -RT_ERROR;
  82. struct lpc_i2c_bus *lpc_i2c = (struct lpc_i2c_bus *)bus;
  83. for (i = 0; i < num; i++)
  84. {
  85. msg = &msgs[i];
  86. if (msg->flags & RT_I2C_RD)
  87. {
  88. xfer.slaveAddress = msg->addr;
  89. xfer.direction = kI2C_Read;
  90. xfer.subaddress = 0;
  91. xfer.subaddressSize = 0;
  92. xfer.data = msg->buf;
  93. xfer.dataSize = msg->len;
  94. if(i != 0)
  95. xfer.flags = kI2C_TransferRepeatedStartFlag;
  96. else
  97. xfer.flags = kI2C_TransferDefaultFlag;
  98. // if (I2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
  99. if(I2C_MasterTransferDMA(lpc_i2c->I2C, &lpc_i2c->i2c_mst_dma_handle, &xfer) != kStatus_Success)
  100. {
  101. i2c_dbg("i2c bus read failed!\n");
  102. return i;
  103. }
  104. rt_sem_take(lpc_i2c->sem, RT_WAITING_FOREVER);
  105. }
  106. else
  107. {
  108. xfer.slaveAddress = msg->addr;
  109. xfer.direction = kI2C_Write;
  110. xfer.subaddress = 0;
  111. xfer.subaddressSize = 0;
  112. xfer.data = msg->buf;
  113. xfer.dataSize = msg->len;
  114. if(i == 0)
  115. xfer.flags = kI2C_TransferNoStopFlag;
  116. else
  117. xfer.flags = kI2C_TransferDefaultFlag;
  118. //if (I2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
  119. if(I2C_MasterTransferDMA(lpc_i2c->I2C, &lpc_i2c->i2c_mst_dma_handle, &xfer) != kStatus_Success)
  120. {
  121. i2c_dbg("i2c bus write failed!\n");
  122. return i;
  123. }
  124. rt_sem_take(lpc_i2c->sem, RT_WAITING_FOREVER);
  125. if(lpc_i2c->status != kStatus_Success)
  126. {
  127. break;
  128. }
  129. }
  130. }
  131. ret = i;
  132. return ret;
  133. }
  134. static const struct rt_i2c_bus_device_ops i2c_ops =
  135. {
  136. lpc_i2c_xfer,
  137. RT_NULL,
  138. RT_NULL
  139. };
  140. int rt_hw_i2c_init(void)
  141. {
  142. int i;
  143. i2c_master_config_t masterConfig;
  144. for(i=0; i<ARRAY_SIZE(lpc_obj); i++)
  145. {
  146. CLOCK_AttachClk(lpc_obj[i].i2c_clock_id);
  147. I2C_MasterGetDefaultConfig(&masterConfig);
  148. masterConfig.baudRate_Bps = lpc_obj[i].baud;
  149. /* Initialize the I2C master peripheral */
  150. I2C_MasterInit(lpc_obj[i].I2C, &masterConfig, CLOCK_GetFlexCommClkFreq(lpc_obj[i].instance));
  151. lpc_obj[i].parent.ops = &i2c_ops;
  152. lpc_obj[i].sem = rt_sem_create("sem_i2c", 0, RT_IPC_FLAG_FIFO);
  153. DMA_CreateHandle(&lpc_obj[i].dmaHandle, lpc_obj[i].DMA, lpc_obj[i].dma_chl);
  154. I2C_MasterTransferCreateHandleDMA(lpc_obj[i].I2C, &lpc_obj[i].i2c_mst_dma_handle, i2c_mst_dma_callback, &lpc_obj[i], &lpc_obj[i].dmaHandle);
  155. rt_i2c_bus_device_register(&lpc_obj[i].parent, lpc_obj[i].device_name);
  156. }
  157. return 0;
  158. }
  159. INIT_DEVICE_EXPORT(rt_hw_i2c_init);
  160. #endif /* BSP_USING_I2C */